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Merge branch 'gudp'
[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx4 / en_ethtool.c
CommitLineData
c27a02cd
YP		 1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/kernel.h>
35#include <linux/ethtool.h>
36#include <linux/netdevice.h>
af22d9de 37#include <linux/mlx4/driver.h>
f90a3673
HHZ		 38#include <linux/in.h>
39#include <net/ip.h>
c27a02cd
YP		 40
41#include "mlx4_en.h"
42#include "en_port.h"
43
82067281 44#define EN_ETHTOOL_QP_ATTACH (1ull << 63)
82067281
HHZ		 45#define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
46#define EN_ETHTOOL_WORD_MASK cpu_to_be32(0xffffffff)
c27a02cd 47
79c54b6b
AV		 48static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
49{
50 int i;
51 int err = 0;
52
53 for (i = 0; i < priv->tx_ring_num; i++) {
41d942d5
EE		 54 priv->tx_cq[i]->moder_cnt = priv->tx_frames;
55 priv->tx_cq[i]->moder_time = priv->tx_usecs;
38463e2c 56 if (priv->port_up) {
41d942d5 57 err = mlx4_en_set_cq_moder(priv, priv->tx_cq[i]);
38463e2c
EE		 58 if (err)
59 return err;
60 }
79c54b6b
AV		 61 }
62
63 if (priv->adaptive_rx_coal)
64 return 0;
65
66 for (i = 0; i < priv->rx_ring_num; i++) {
41d942d5
EE		 67 priv->rx_cq[i]->moder_cnt = priv->rx_frames;
68 priv->rx_cq[i]->moder_time = priv->rx_usecs;
79c54b6b 69 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
38463e2c 70 if (priv->port_up) {
41d942d5 71 err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]);
38463e2c
EE		 72 if (err)
73 return err;
74 }
79c54b6b
AV		 75 }
76
77 return err;
78}
79
c27a02cd
YP		 80static void
81mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
82{
83 struct mlx4_en_priv *priv = netdev_priv(dev);
84 struct mlx4_en_dev *mdev = priv->mdev;
85
612a94d6
RJ		 86 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
87 strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
88 sizeof(drvinfo->version));
89 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
90 "%d.%d.%d",
c27a02cd
YP		 91 (u16) (mdev->dev->caps.fw_ver >> 32),
92 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
93 (u16) (mdev->dev->caps.fw_ver & 0xffff));
612a94d6
RJ		 94 strlcpy(drvinfo->bus_info, pci_name(mdev->dev->pdev),
95 sizeof(drvinfo->bus_info));
c27a02cd
YP		 96 drvinfo->n_stats = 0;
97 drvinfo->regdump_len = 0;
98 drvinfo->eedump_len = 0;
99}
100
0fef9d03
AV		 101static const char mlx4_en_priv_flags[][ETH_GSTRING_LEN] = {
102 "blueflame",
103};
104
c27a02cd
YP		 105static const char main_strings[][ETH_GSTRING_LEN] = {
106 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
107 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
108 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
109 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
110 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
111 "tx_heartbeat_errors", "tx_window_errors",
112
113 /* port statistics */
fa37a958 114 "tso_packets",
c27a02cd
YP		 115 "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
116 "rx_csum_good", "rx_csum_none", "tx_chksum_offload",
117
118 /* packet statistics */
119 "broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3",
120 "rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0",
121 "tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5",
122 "tx_prio_6", "tx_prio_7",
123};
d61702f1 124#define NUM_MAIN_STATS 21
c27a02cd
YP		 125#define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS)
126
e7c1c2c4 127static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
fd9071ec 128 "Interrupt Test",
e7c1c2c4
YP		 129 "Link Test",
130 "Speed Test",
131 "Register Test",
132 "Loopback Test",
133};
134
c27a02cd
YP		 135static u32 mlx4_en_get_msglevel(struct net_device *dev)
136{
137 return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
138}
139
140static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
141{
142 ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
143}
144
145static void mlx4_en_get_wol(struct net_device *netdev,
146 struct ethtool_wolinfo *wol)
147{
14c07b13
YP		 148 struct mlx4_en_priv *priv = netdev_priv(netdev);
149 int err = 0;
150 u64 config = 0;
559a9f1d 151 u64 mask;
14c07b13 152
559a9f1d
OD		 153 if ((priv->port < 1) || (priv->port > 2)) {
154 en_err(priv, "Failed to get WoL information\n");
155 return;
156 }
157
158 mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
159 MLX4_DEV_CAP_FLAG_WOL_PORT2;
160
161 if (!(priv->mdev->dev->caps.flags & mask)) {
14c07b13
YP		 162 wol->supported = 0;
163 wol->wolopts = 0;
164 return;
165 }
166
167 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
168 if (err) {
169 en_err(priv, "Failed to get WoL information\n");
170 return;
171 }
172
173 if (config & MLX4_EN_WOL_MAGIC)
174 wol->supported = WAKE_MAGIC;
175 else
176 wol->supported = 0;
177
178 if (config & MLX4_EN_WOL_ENABLED)
179 wol->wolopts = WAKE_MAGIC;
180 else
181 wol->wolopts = 0;
182}
183
184static int mlx4_en_set_wol(struct net_device *netdev,
185 struct ethtool_wolinfo *wol)
186{
187 struct mlx4_en_priv *priv = netdev_priv(netdev);
188 u64 config = 0;
189 int err = 0;
559a9f1d
OD		 190 u64 mask;
191
192 if ((priv->port < 1) || (priv->port > 2))
193 return -EOPNOTSUPP;
194
195 mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
196 MLX4_DEV_CAP_FLAG_WOL_PORT2;
14c07b13 197
559a9f1d 198 if (!(priv->mdev->dev->caps.flags & mask))
14c07b13
YP		 199 return -EOPNOTSUPP;
200
201 if (wol->supported & ~WAKE_MAGIC)
202 return -EINVAL;
203
204 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
205 if (err) {
206 en_err(priv, "Failed to get WoL info, unable to modify\n");
207 return err;
208 }
209
210 if (wol->wolopts & WAKE_MAGIC) {
211 config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
212 MLX4_EN_WOL_MAGIC;
213 } else {
214 config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
215 config |= MLX4_EN_WOL_DO_MODIFY;
216 }
217
218 err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
219 if (err)
220 en_err(priv, "Failed to set WoL information\n");
221
222 return err;
c27a02cd
YP		 223}
224
225static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
226{
227 struct mlx4_en_priv *priv = netdev_priv(dev);
93ece0c1 228 int bit_count = hweight64(priv->stats_bitmap);
c27a02cd 229
e7c1c2c4
YP		 230 switch (sset) {
231 case ETH_SS_STATS:
93ece0c1 232 return (priv->stats_bitmap ? bit_count : NUM_ALL_STATS) +
8501841a 233 (priv->tx_ring_num * 2) +
e0d1095a 234#ifdef CONFIG_NET_RX_BUSY_POLL
8501841a
AV		 235 (priv->rx_ring_num * 5);
236#else
237 (priv->rx_ring_num * 2);
238#endif
e7c1c2c4 239 case ETH_SS_TEST:
ccf86321
OG		 240 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
241 & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
0fef9d03
AV		 242 case ETH_SS_PRIV_FLAGS:
243 return ARRAY_SIZE(mlx4_en_priv_flags);
e7c1c2c4 244 default:
c27a02cd 245 return -EOPNOTSUPP;
e7c1c2c4 246 }
c27a02cd
YP		 247}
248
249static void mlx4_en_get_ethtool_stats(struct net_device *dev,
250 struct ethtool_stats *stats, uint64_t *data)
251{
252 struct mlx4_en_priv *priv = netdev_priv(dev);
253 int index = 0;
93ece0c1 254 int i, j = 0;
c27a02cd
YP		 255
256 spin_lock_bh(&priv->stats_lock);
257
93ece0c1
EE		 258 if (!(priv->stats_bitmap)) {
259 for (i = 0; i < NUM_MAIN_STATS; i++)
260 data[index++] =
261 ((unsigned long *) &priv->stats)[i];
262 for (i = 0; i < NUM_PORT_STATS; i++)
263 data[index++] =
264 ((unsigned long *) &priv->port_stats)[i];
265 for (i = 0; i < NUM_PKT_STATS; i++)
266 data[index++] =
267 ((unsigned long *) &priv->pkstats)[i];
268 } else {
269 for (i = 0; i < NUM_MAIN_STATS; i++) {
270 if ((priv->stats_bitmap >> j) & 1)
271 data[index++] =
272 ((unsigned long *) &priv->stats)[i];
273 j++;
274 }
275 for (i = 0; i < NUM_PORT_STATS; i++) {
276 if ((priv->stats_bitmap >> j) & 1)
277 data[index++] =
278 ((unsigned long *) &priv->port_stats)[i];
279 j++;
280 }
281 }
c27a02cd 282 for (i = 0; i < priv->tx_ring_num; i++) {
41d942d5
EE		 283 data[index++] = priv->tx_ring[i]->packets;
284 data[index++] = priv->tx_ring[i]->bytes;
c27a02cd
YP		 285 }
286 for (i = 0; i < priv->rx_ring_num; i++) {
41d942d5
EE		 287 data[index++] = priv->rx_ring[i]->packets;
288 data[index++] = priv->rx_ring[i]->bytes;
e0d1095a 289#ifdef CONFIG_NET_RX_BUSY_POLL
41d942d5
EE		 290 data[index++] = priv->rx_ring[i]->yields;
291 data[index++] = priv->rx_ring[i]->misses;
292 data[index++] = priv->rx_ring[i]->cleaned;
8501841a 293#endif
c27a02cd 294 }
c27a02cd
YP		 295 spin_unlock_bh(&priv->stats_lock);
296
297}
298
e7c1c2c4
YP		 299static void mlx4_en_self_test(struct net_device *dev,
300 struct ethtool_test *etest, u64 *buf)
301{
302 mlx4_en_ex_selftest(dev, &etest->flags, buf);
303}
304
c27a02cd
YP		 305static void mlx4_en_get_strings(struct net_device *dev,
306 uint32_t stringset, uint8_t *data)
307{
308 struct mlx4_en_priv *priv = netdev_priv(dev);
309 int index = 0;
310 int i;
311
e7c1c2c4
YP		 312 switch (stringset) {
313 case ETH_SS_TEST:
314 for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
315 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
ccf86321 316 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
e7c1c2c4
YP		 317 for (; i < MLX4_EN_NUM_SELF_TEST; i++)
318 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
319 break;
320
321 case ETH_SS_STATS:
322 /* Add main counters */
93ece0c1
EE		 323 if (!priv->stats_bitmap) {
324 for (i = 0; i < NUM_MAIN_STATS; i++)
325 strcpy(data + (index++) * ETH_GSTRING_LEN,
326 main_strings[i]);
327 for (i = 0; i < NUM_PORT_STATS; i++)
328 strcpy(data + (index++) * ETH_GSTRING_LEN,
329 main_strings[i +
330 NUM_MAIN_STATS]);
331 for (i = 0; i < NUM_PKT_STATS; i++)
332 strcpy(data + (index++) * ETH_GSTRING_LEN,
333 main_strings[i +
334 NUM_MAIN_STATS +
335 NUM_PORT_STATS]);
336 } else
337 for (i = 0; i < NUM_MAIN_STATS + NUM_PORT_STATS; i++) {
338 if ((priv->stats_bitmap >> i) & 1) {
339 strcpy(data +
340 (index++) * ETH_GSTRING_LEN,
341 main_strings[i]);
342 }
343 if (!(priv->stats_bitmap >> i))
344 break;
345 }
e7c1c2c4
YP		 346 for (i = 0; i < priv->tx_ring_num; i++) {
347 sprintf(data + (index++) * ETH_GSTRING_LEN,
348 "tx%d_packets", i);
349 sprintf(data + (index++) * ETH_GSTRING_LEN,
350 "tx%d_bytes", i);
351 }
352 for (i = 0; i < priv->rx_ring_num; i++) {
353 sprintf(data + (index++) * ETH_GSTRING_LEN,
354 "rx%d_packets", i);
355 sprintf(data + (index++) * ETH_GSTRING_LEN,
356 "rx%d_bytes", i);
e0d1095a 357#ifdef CONFIG_NET_RX_BUSY_POLL
8501841a
AV		 358 sprintf(data + (index++) * ETH_GSTRING_LEN,
359 "rx%d_napi_yield", i);
360 sprintf(data + (index++) * ETH_GSTRING_LEN,
361 "rx%d_misses", i);
362 sprintf(data + (index++) * ETH_GSTRING_LEN,
363 "rx%d_cleaned", i);
364#endif
e7c1c2c4 365 }
e7c1c2c4 366 break;
0fef9d03
AV		 367 case ETH_SS_PRIV_FLAGS:
368 for (i = 0; i < ARRAY_SIZE(mlx4_en_priv_flags); i++)
369 strcpy(data + i * ETH_GSTRING_LEN,
370 mlx4_en_priv_flags[i]);
371 break;
372
e7c1c2c4 373 }
c27a02cd
YP		 374}
375
376static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
377{
7699517d
YP		 378 struct mlx4_en_priv *priv = netdev_priv(dev);
379 int trans_type;
380
c27a02cd
YP		 381 cmd->autoneg = AUTONEG_DISABLE;
382 cmd->supported = SUPPORTED_10000baseT_Full;
7699517d
YP		 383 cmd->advertising = ADVERTISED_10000baseT_Full;
384
385 if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
386 return -ENOMEM;
387
388 trans_type = priv->port_state.transciver;
c27a02cd 389 if (netif_carrier_ok(dev)) {
70739497 390 ethtool_cmd_speed_set(cmd, priv->port_state.link_speed);
c27a02cd
YP		 391 cmd->duplex = DUPLEX_FULL;
392 } else {
537fae01
JP		 393 ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN);
394 cmd->duplex = DUPLEX_UNKNOWN;
c27a02cd 395 }
7699517d
YP		 396
397 if (trans_type > 0 && trans_type <= 0xC) {
398 cmd->port = PORT_FIBRE;
399 cmd->transceiver = XCVR_EXTERNAL;
400 cmd->supported |= SUPPORTED_FIBRE;
401 cmd->advertising |= ADVERTISED_FIBRE;
402 } else if (trans_type == 0x80 || trans_type == 0) {
403 cmd->port = PORT_TP;
404 cmd->transceiver = XCVR_INTERNAL;
405 cmd->supported |= SUPPORTED_TP;
406 cmd->advertising |= ADVERTISED_TP;
407 } else {
408 cmd->port = -1;
409 cmd->transceiver = -1;
410 }
c27a02cd
YP		 411 return 0;
412}
413
414static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
415{
416 if ((cmd->autoneg == AUTONEG_ENABLE) ||
25db0338
DD		 417 (ethtool_cmd_speed(cmd) != SPEED_10000) ||
418 (cmd->duplex != DUPLEX_FULL))
c27a02cd
YP		 419 return -EINVAL;
420
421 /* Nothing to change */
422 return 0;
423}
424
425static int mlx4_en_get_coalesce(struct net_device *dev,
426 struct ethtool_coalesce *coal)
427{
428 struct mlx4_en_priv *priv = netdev_priv(dev);
429
a19a848a
YP		 430 coal->tx_coalesce_usecs = priv->tx_usecs;
431 coal->tx_max_coalesced_frames = priv->tx_frames;
fbc6daf1
AV		 432 coal->tx_max_coalesced_frames_irq = priv->tx_work_limit;
433
c27a02cd
YP		 434 coal->rx_coalesce_usecs = priv->rx_usecs;
435 coal->rx_max_coalesced_frames = priv->rx_frames;
436
437 coal->pkt_rate_low = priv->pkt_rate_low;
438 coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
439 coal->pkt_rate_high = priv->pkt_rate_high;
440 coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
441 coal->rate_sample_interval = priv->sample_interval;
442 coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
fbc6daf1 443
c27a02cd
YP		 444 return 0;
445}
446
447static int mlx4_en_set_coalesce(struct net_device *dev,
448 struct ethtool_coalesce *coal)
449{
450 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd 451
fbc6daf1
AV		 452 if (!coal->tx_max_coalesced_frames_irq)
453 return -EINVAL;
454
c27a02cd
YP		 455 priv->rx_frames = (coal->rx_max_coalesced_frames ==
456 MLX4_EN_AUTO_CONF) ?
3db36fb2 457 MLX4_EN_RX_COAL_TARGET :
c27a02cd
YP		 458 coal->rx_max_coalesced_frames;
459 priv->rx_usecs = (coal->rx_coalesce_usecs ==
460 MLX4_EN_AUTO_CONF) ?
461 MLX4_EN_RX_COAL_TIME :
462 coal->rx_coalesce_usecs;
463
a19a848a
YP		 464 /* Setting TX coalescing parameters */
465 if (coal->tx_coalesce_usecs != priv->tx_usecs ||
466 coal->tx_max_coalesced_frames != priv->tx_frames) {
467 priv->tx_usecs = coal->tx_coalesce_usecs;
468 priv->tx_frames = coal->tx_max_coalesced_frames;
a19a848a
YP		 469 }
470
c27a02cd
YP		 471 /* Set adaptive coalescing params */
472 priv->pkt_rate_low = coal->pkt_rate_low;
473 priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
474 priv->pkt_rate_high = coal->pkt_rate_high;
475 priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
476 priv->sample_interval = coal->rate_sample_interval;
477 priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
fbc6daf1 478 priv->tx_work_limit = coal->tx_max_coalesced_frames_irq;
c27a02cd 479
79c54b6b 480 return mlx4_en_moderation_update(priv);
c27a02cd
YP		 481}
482
483static int mlx4_en_set_pauseparam(struct net_device *dev,
484 struct ethtool_pauseparam *pause)
485{
486 struct mlx4_en_priv *priv = netdev_priv(dev);
487 struct mlx4_en_dev *mdev = priv->mdev;
488 int err;
489
278d436a
IV		 490 if (pause->autoneg)
491 return -EINVAL;
492
d53b93f2
YP		 493 priv->prof->tx_pause = pause->tx_pause != 0;
494 priv->prof->rx_pause = pause->rx_pause != 0;
c27a02cd
YP		 495 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
496 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP		 497 priv->prof->tx_pause,
498 priv->prof->tx_ppp,
499 priv->prof->rx_pause,
500 priv->prof->rx_ppp);
c27a02cd 501 if (err)
453a6082 502 en_err(priv, "Failed setting pause params\n");
c27a02cd
YP		 503
504 return err;
505}
506
507static void mlx4_en_get_pauseparam(struct net_device *dev,
508 struct ethtool_pauseparam *pause)
509{
510 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd 511
d53b93f2
YP		 512 pause->tx_pause = priv->prof->tx_pause;
513 pause->rx_pause = priv->prof->rx_pause;
c27a02cd
YP		 514}
515
18cc42a3
YP		 516static int mlx4_en_set_ringparam(struct net_device *dev,
517 struct ethtool_ringparam *param)
518{
519 struct mlx4_en_priv *priv = netdev_priv(dev);
520 struct mlx4_en_dev *mdev = priv->mdev;
521 u32 rx_size, tx_size;
522 int port_up = 0;
523 int err = 0;
524
525 if (param->rx_jumbo_pending || param->rx_mini_pending)
526 return -EINVAL;
527
528 rx_size = roundup_pow_of_two(param->rx_pending);
529 rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
bd531e36 530 rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
18cc42a3
YP		 531 tx_size = roundup_pow_of_two(param->tx_pending);
532 tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
bd531e36 533 tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
18cc42a3 534
41d942d5
EE		 535 if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size :
536 priv->rx_ring[0]->size) &&
537 tx_size == priv->tx_ring[0]->size)
18cc42a3
YP		 538 return 0;
539
540 mutex_lock(&mdev->state_lock);
541 if (priv->port_up) {
542 port_up = 1;
3484aac1 543 mlx4_en_stop_port(dev, 1);
18cc42a3
YP		 544 }
545
fe0af03c 546 mlx4_en_free_resources(priv);
18cc42a3
YP		 547
548 priv->prof->tx_ring_size = tx_size;
549 priv->prof->rx_ring_size = rx_size;
550
551 err = mlx4_en_alloc_resources(priv);
552 if (err) {
453a6082 553 en_err(priv, "Failed reallocating port resources\n");
18cc42a3
YP		 554 goto out;
555 }
556 if (port_up) {
557 err = mlx4_en_start_port(dev);
558 if (err)
453a6082 559 en_err(priv, "Failed starting port\n");
18cc42a3
YP		 560 }
561
79c54b6b 562 err = mlx4_en_moderation_update(priv);
6b4d8d9f 563
18cc42a3
YP		 564out:
565 mutex_unlock(&mdev->state_lock);
566 return err;
567}
568
c27a02cd
YP		 569static void mlx4_en_get_ringparam(struct net_device *dev,
570 struct ethtool_ringparam *param)
571{
572 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd
YP		 573
574 memset(param, 0, sizeof(*param));
bd531e36
YP		 575 param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
576 param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
bc081cec 577 param->rx_pending = priv->port_up ?
41d942d5
EE		 578 priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size;
579 param->tx_pending = priv->tx_ring[0]->size;
c27a02cd
YP		 580}
581
93d3e367
YP		 582static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
583{
584 struct mlx4_en_priv *priv = netdev_priv(dev);
585
586 return priv->rx_ring_num;
587}
588
fe62d001 589static int mlx4_en_get_rxfh(struct net_device *dev, u32 *ring_index, u8 *key)
93d3e367
YP		 590{
591 struct mlx4_en_priv *priv = netdev_priv(dev);
592 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
593 int rss_rings;
594 size_t n = priv->rx_ring_num;
595 int err = 0;
596
597 rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num;
598
599 while (n--) {
600 ring_index[n] = rss_map->qps[n % rss_rings].qpn -
601 rss_map->base_qpn;
602 }
603
604 return err;
605}
606
fe62d001
BH		 607static int mlx4_en_set_rxfh(struct net_device *dev, const u32 *ring_index,
608 const u8 *key)
93d3e367
YP		 609{
610 struct mlx4_en_priv *priv = netdev_priv(dev);
611 struct mlx4_en_dev *mdev = priv->mdev;
612 int port_up = 0;
613 int err = 0;
614 int i;
615 int rss_rings = 0;
616
617 /* Calculate RSS table size and make sure flows are spread evenly
618 * between rings
619 */
620 for (i = 0; i < priv->rx_ring_num; i++) {
621 if (i > 0 && !ring_index[i] && !rss_rings)
622 rss_rings = i;
623
624 if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num)))
625 return -EINVAL;
626 }
627
628 if (!rss_rings)
629 rss_rings = priv->rx_ring_num;
630
631 /* RSS table size must be an order of 2 */
632 if (!is_power_of_2(rss_rings))
633 return -EINVAL;
634
635 mutex_lock(&mdev->state_lock);
636 if (priv->port_up) {
637 port_up = 1;
3484aac1 638 mlx4_en_stop_port(dev, 1);
93d3e367
YP		 639 }
640
641 priv->prof->rss_rings = rss_rings;
642
643 if (port_up) {
644 err = mlx4_en_start_port(dev);
645 if (err)
646 en_err(priv, "Failed starting port\n");
647 }
648
649 mutex_unlock(&mdev->state_lock);
650 return err;
651}
652
82067281
HHZ		 653#define all_zeros_or_all_ones(field) \
654 ((field) == 0 || (field) == (__force typeof(field))-1)
655
656static int mlx4_en_validate_flow(struct net_device *dev,
657 struct ethtool_rxnfc *cmd)
658{
659 struct ethtool_usrip4_spec *l3_mask;
660 struct ethtool_tcpip4_spec *l4_mask;
661 struct ethhdr *eth_mask;
82067281
HHZ		 662
663 if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
664 return -EINVAL;
665
520dfe3a
YB		 666 if (cmd->fs.flow_type & FLOW_MAC_EXT) {
667 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
668 if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
669 return -EINVAL;
670 }
671
672 switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
82067281
HHZ		 673 case TCP_V4_FLOW:
674 case UDP_V4_FLOW:
675 if (cmd->fs.m_u.tcp_ip4_spec.tos)
676 return -EINVAL;
677 l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
678 /* don't allow mask which isn't all 0 or 1 */
679 if (!all_zeros_or_all_ones(l4_mask->ip4src) ||
680 !all_zeros_or_all_ones(l4_mask->ip4dst) ||
681 !all_zeros_or_all_ones(l4_mask->psrc) ||
682 !all_zeros_or_all_ones(l4_mask->pdst))
683 return -EINVAL;
684 break;
685 case IP_USER_FLOW:
686 l3_mask = &cmd->fs.m_u.usr_ip4_spec;
687 if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto ||
688 cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 ||
689 (!l3_mask->ip4src && !l3_mask->ip4dst) ||
690 !all_zeros_or_all_ones(l3_mask->ip4src) ||
691 !all_zeros_or_all_ones(l3_mask->ip4dst))
692 return -EINVAL;
693 break;
694 case ETHER_FLOW:
695 eth_mask = &cmd->fs.m_u.ether_spec;
696 /* source mac mask must not be set */
c402b947 697 if (!is_zero_ether_addr(eth_mask->h_source))
82067281
HHZ		 698 return -EINVAL;
699
700 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
c402b947 701 if (!is_broadcast_ether_addr(eth_mask->h_dest))
82067281
HHZ		 702 return -EINVAL;
703
704 if (!all_zeros_or_all_ones(eth_mask->h_proto))
705 return -EINVAL;
706 break;
707 default:
708 return -EINVAL;
709 }
710
711 if ((cmd->fs.flow_type & FLOW_EXT)) {
712 if (cmd->fs.m_ext.vlan_etype ||
8258bd27
HHZ		 713 !((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
714 0 ||
715 (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
716 cpu_to_be16(VLAN_VID_MASK)))
82067281 717 return -EINVAL;
8258bd27 718
69d7126b
HHZ		 719 if (cmd->fs.m_ext.vlan_tci) {
720 if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID)
721 return -EINVAL;
8258bd27 722
69d7126b 723 }
82067281
HHZ		 724 }
725
726 return 0;
727}
728
f90a3673
HHZ		 729static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd,
730 struct list_head *rule_list_h,
731 struct mlx4_spec_list *spec_l2,
732 unsigned char *mac)
733{
734 int err = 0;
735 __be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16);
736
737 spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
738 memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN);
739 memcpy(spec_l2->eth.dst_mac, mac, ETH_ALEN);
740
8258bd27
HHZ		 741 if ((cmd->fs.flow_type & FLOW_EXT) &&
742 (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) {
f90a3673 743 spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci;
8258bd27 744 spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK);
f90a3673
HHZ		 745 }
746
747 list_add_tail(&spec_l2->list, rule_list_h);
748
749 return err;
750}
751
752static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv,
753 struct ethtool_rxnfc *cmd,
754 struct list_head *rule_list_h,
755 struct mlx4_spec_list *spec_l2,
756 __be32 ipv4_dst)
757{
f9d96862 758#ifdef CONFIG_INET
f90a3673
HHZ		 759 unsigned char mac[ETH_ALEN];
760
761 if (!ipv4_is_multicast(ipv4_dst)) {
6bbb6d99 762 if (cmd->fs.flow_type & FLOW_MAC_EXT)
f90a3673 763 memcpy(&mac, cmd->fs.h_ext.h_dest, ETH_ALEN);
6bbb6d99
YB		 764 else
765 memcpy(&mac, priv->dev->dev_addr, ETH_ALEN);
f90a3673
HHZ		 766 } else {
767 ip_eth_mc_map(ipv4_dst, mac);
768 }
769
770 return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]);
f9d96862
HHZ		 771#else
772 return -EINVAL;
773#endif
f90a3673
HHZ		 774}
775
82067281 776static int add_ip_rule(struct mlx4_en_priv *priv,
f90a3673
HHZ		 777 struct ethtool_rxnfc *cmd,
778 struct list_head *list_h)
82067281 779{
377d9739 780 int err;
f90a3673
HHZ		 781 struct mlx4_spec_list *spec_l2 = NULL;
782 struct mlx4_spec_list *spec_l3 = NULL;
82067281
HHZ		 783 struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec;
784
f90a3673
HHZ		 785 spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
786 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
787 if (!spec_l2 || !spec_l3) {
377d9739
HHZ		 788 err = -ENOMEM;
789 goto free_spec;
82067281
HHZ		 790 }
791
377d9739
HHZ		 792 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2,
793 cmd->fs.h_u.
794 usr_ip4_spec.ip4dst);
795 if (err)
796 goto free_spec;
82067281
HHZ		 797 spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
798 spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src;
799 if (l3_mask->ip4src)
800 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
801 spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst;
802 if (l3_mask->ip4dst)
803 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
804 list_add_tail(&spec_l3->list, list_h);
805
806 return 0;
377d9739
HHZ		 807
808free_spec:
809 kfree(spec_l2);
810 kfree(spec_l3);
811 return err;
82067281
HHZ		 812}
813
814static int add_tcp_udp_rule(struct mlx4_en_priv *priv,
815 struct ethtool_rxnfc *cmd,
816 struct list_head *list_h, int proto)
817{
377d9739 818 int err;
f90a3673
HHZ		 819 struct mlx4_spec_list *spec_l2 = NULL;
820 struct mlx4_spec_list *spec_l3 = NULL;
821 struct mlx4_spec_list *spec_l4 = NULL;
82067281
HHZ		 822 struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
823
f90a3673
HHZ		 824 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
825 spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
826 spec_l4 = kzalloc(sizeof(*spec_l4), GFP_KERNEL);
827 if (!spec_l2 || !spec_l3 || !spec_l4) {
377d9739
HHZ		 828 err = -ENOMEM;
829 goto free_spec;
82067281
HHZ		 830 }
831
832 spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
833
834 if (proto == TCP_V4_FLOW) {
377d9739
HHZ		 835 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
836 spec_l2,
837 cmd->fs.h_u.
838 tcp_ip4_spec.ip4dst);
839 if (err)
840 goto free_spec;
82067281
HHZ		 841 spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP;
842 spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src;
843 spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst;
844 spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc;
845 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst;
846 } else {
377d9739
HHZ		 847 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
848 spec_l2,
849 cmd->fs.h_u.
850 udp_ip4_spec.ip4dst);
851 if (err)
852 goto free_spec;
82067281
HHZ		 853 spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP;
854 spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src;
855 spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst;
856 spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc;
857 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst;
858 }
859
860 if (l4_mask->ip4src)
861 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
862 if (l4_mask->ip4dst)
863 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
864
865 if (l4_mask->psrc)
866 spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK;
867 if (l4_mask->pdst)
868 spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK;
869
870 list_add_tail(&spec_l3->list, list_h);
871 list_add_tail(&spec_l4->list, list_h);
872
873 return 0;
377d9739
HHZ		 874
875free_spec:
876 kfree(spec_l2);
877 kfree(spec_l3);
878 kfree(spec_l4);
879 return err;
82067281
HHZ		 880}
881
882static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
883 struct ethtool_rxnfc *cmd,
884 struct list_head *rule_list_h)
885{
886 int err;
82067281 887 struct ethhdr *eth_spec;
82067281 888 struct mlx4_spec_list *spec_l2;
f90a3673 889 struct mlx4_en_priv *priv = netdev_priv(dev);
82067281
HHZ		 890
891 err = mlx4_en_validate_flow(dev, cmd);
892 if (err)
893 return err;
894
520dfe3a 895 switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
82067281 896 case ETHER_FLOW:
f90a3673
HHZ		 897 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
898 if (!spec_l2)
899 return -ENOMEM;
900
82067281 901 eth_spec = &cmd->fs.h_u.ether_spec;
f90a3673
HHZ		 902 mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2,
903 &eth_spec->h_dest[0]);
82067281
HHZ		 904 spec_l2->eth.ether_type = eth_spec->h_proto;
905 if (eth_spec->h_proto)
906 spec_l2->eth.ether_type_enable = 1;
907 break;
908 case IP_USER_FLOW:
909 err = add_ip_rule(priv, cmd, rule_list_h);
910 break;
911 case TCP_V4_FLOW:
912 err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW);
913 break;
914 case UDP_V4_FLOW:
915 err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW);
916 break;
917 }
918
919 return err;
920}
921
922static int mlx4_en_flow_replace(struct net_device *dev,
923 struct ethtool_rxnfc *cmd)
924{
925 int err;
926 struct mlx4_en_priv *priv = netdev_priv(dev);
927 struct ethtool_flow_id *loc_rule;
928 struct mlx4_spec_list *spec, *tmp_spec;
929 u32 qpn;
930 u64 reg_id;
931
932 struct mlx4_net_trans_rule rule = {
933 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
934 .exclusive = 0,
935 .allow_loopback = 1,
f9162539 936 .promisc_mode = MLX4_FS_REGULAR,
82067281
HHZ		 937 };
938
939 rule.port = priv->port;
940 rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location;
941 INIT_LIST_HEAD(&rule.list);
942
943 /* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */
944 if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC)
cabdc8ee 945 qpn = priv->drop_qp.qpn;
82067281
HHZ		 946 else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) {
947 qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1);
948 } else {
949 if (cmd->fs.ring_cookie >= priv->rx_ring_num) {
1a91de28 950 en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n",
82067281
HHZ		 951 cmd->fs.ring_cookie);
952 return -EINVAL;
953 }
954 qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn;
955 if (!qpn) {
1a91de28 956 en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n",
82067281
HHZ		 957 cmd->fs.ring_cookie);
958 return -EINVAL;
959 }
960 }
961 rule.qpn = qpn;
962 err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list);
963 if (err)
964 goto out_free_list;
965
966 loc_rule = &priv->ethtool_rules[cmd->fs.location];
967 if (loc_rule->id) {
968 err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id);
969 if (err) {
970 en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n",
971 cmd->fs.location, loc_rule->id);
972 goto out_free_list;
973 }
974 loc_rule->id = 0;
975 memset(&loc_rule->flow_spec, 0,
976 sizeof(struct ethtool_rx_flow_spec));
0d256c0e 977 list_del(&loc_rule->list);
82067281
HHZ		 978 }
979 err = mlx4_flow_attach(priv->mdev->dev, &rule, &reg_id);
980 if (err) {
1a91de28 981 en_err(priv, "Fail to attach network rule at location %d\n",
82067281
HHZ		 982 cmd->fs.location);
983 goto out_free_list;
984 }
985 loc_rule->id = reg_id;
986 memcpy(&loc_rule->flow_spec, &cmd->fs,
987 sizeof(struct ethtool_rx_flow_spec));
0d256c0e 988 list_add_tail(&loc_rule->list, &priv->ethtool_list);
82067281
HHZ		 989
990out_free_list:
991 list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) {
992 list_del(&spec->list);
993 kfree(spec);
994 }
995 return err;
996}
997
998static int mlx4_en_flow_detach(struct net_device *dev,
999 struct ethtool_rxnfc *cmd)
1000{
1001 int err = 0;
1002 struct ethtool_flow_id *rule;
1003 struct mlx4_en_priv *priv = netdev_priv(dev);
1004
1005 if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1006 return -EINVAL;
1007
1008 rule = &priv->ethtool_rules[cmd->fs.location];
1009 if (!rule->id) {
1010 err = -ENOENT;
1011 goto out;
1012 }
1013
1014 err = mlx4_flow_detach(priv->mdev->dev, rule->id);
1015 if (err) {
1016 en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n",
1017 cmd->fs.location, rule->id);
1018 goto out;
1019 }
1020 rule->id = 0;
1021 memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec));
0d256c0e 1022 list_del(&rule->list);
82067281
HHZ		 1023out:
1024 return err;
1025
1026}
1027
1028static int mlx4_en_get_flow(struct net_device *dev, struct ethtool_rxnfc *cmd,
1029 int loc)
1030{
1031 int err = 0;
1032 struct ethtool_flow_id *rule;
1033 struct mlx4_en_priv *priv = netdev_priv(dev);
1034
1035 if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES)
1036 return -EINVAL;
1037
1038 rule = &priv->ethtool_rules[loc];
1039 if (rule->id)
1040 memcpy(&cmd->fs, &rule->flow_spec,
1041 sizeof(struct ethtool_rx_flow_spec));
1042 else
1043 err = -ENOENT;
1044
1045 return err;
1046}
1047
1048static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)
1049{
1050
1051 int i, res = 0;
1052 for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
1053 if (priv->ethtool_rules[i].id)
1054 res++;
1055 }
1056 return res;
1057
1058}
1059
93d3e367
YP		 1060static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1061 u32 *rule_locs)
1062{
1063 struct mlx4_en_priv *priv = netdev_priv(dev);
82067281 1064 struct mlx4_en_dev *mdev = priv->mdev;
93d3e367 1065 int err = 0;
82067281
HHZ		 1066 int i = 0, priority = 0;
1067
1068 if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT ||
1069 cmd->cmd == ETHTOOL_GRXCLSRULE ||
1070 cmd->cmd == ETHTOOL_GRXCLSRLALL) &&
280fce1e
HHZ		 1071 (mdev->dev->caps.steering_mode !=
1072 MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up))
82067281 1073 return -EINVAL;
93d3e367
YP		 1074
1075 switch (cmd->cmd) {
1076 case ETHTOOL_GRXRINGS:
1077 cmd->data = priv->rx_ring_num;
1078 break;
82067281
HHZ		 1079 case ETHTOOL_GRXCLSRLCNT:
1080 cmd->rule_cnt = mlx4_en_get_num_flows(priv);
1081 break;
1082 case ETHTOOL_GRXCLSRULE:
1083 err = mlx4_en_get_flow(dev, cmd, cmd->fs.location);
1084 break;
1085 case ETHTOOL_GRXCLSRLALL:
1086 while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) {
1087 err = mlx4_en_get_flow(dev, cmd, i);
1088 if (!err)
1089 rule_locs[priority++] = i;
1090 i++;
1091 }
1092 err = 0;
1093 break;
93d3e367
YP		 1094 default:
1095 err = -EOPNOTSUPP;
1096 break;
1097 }
1098
1099 return err;
1100}
1101
82067281
HHZ		 1102static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1103{
1104 int err = 0;
1105 struct mlx4_en_priv *priv = netdev_priv(dev);
1106 struct mlx4_en_dev *mdev = priv->mdev;
1107
280fce1e
HHZ		 1108 if (mdev->dev->caps.steering_mode !=
1109 MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)
82067281
HHZ		 1110 return -EINVAL;
1111
1112 switch (cmd->cmd) {
1113 case ETHTOOL_SRXCLSRLINS:
1114 err = mlx4_en_flow_replace(dev, cmd);
1115 break;
1116 case ETHTOOL_SRXCLSRLDEL:
1117 err = mlx4_en_flow_detach(dev, cmd);
1118 break;
1119 default:
1120 en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd);
1121 return -EINVAL;
1122 }
1123
1124 return err;
1125}
1126
d317966b
AV		 1127static void mlx4_en_get_channels(struct net_device *dev,
1128 struct ethtool_channels *channel)
1129{
1130 struct mlx4_en_priv *priv = netdev_priv(dev);
1131
1132 memset(channel, 0, sizeof(*channel));
1133
1134 channel->max_rx = MAX_RX_RINGS;
1135 channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
1136
1137 channel->rx_count = priv->rx_ring_num;
1138 channel->tx_count = priv->tx_ring_num / MLX4_EN_NUM_UP;
1139}
1140
1141static int mlx4_en_set_channels(struct net_device *dev,
1142 struct ethtool_channels *channel)
1143{
1144 struct mlx4_en_priv *priv = netdev_priv(dev);
1145 struct mlx4_en_dev *mdev = priv->mdev;
da26a625 1146 int port_up = 0;
d317966b
AV		 1147 int err = 0;
1148
1149 if (channel->other_count || channel->combined_count ||
1150 channel->tx_count > MLX4_EN_MAX_TX_RING_P_UP ||
1151 channel->rx_count > MAX_RX_RINGS ||
1152 !channel->tx_count || !channel->rx_count)
1153 return -EINVAL;
1154
1155 mutex_lock(&mdev->state_lock);
1156 if (priv->port_up) {
1157 port_up = 1;
3484aac1 1158 mlx4_en_stop_port(dev, 1);
d317966b
AV		 1159 }
1160
1161 mlx4_en_free_resources(priv);
1162
1163 priv->num_tx_rings_p_up = channel->tx_count;
1164 priv->tx_ring_num = channel->tx_count * MLX4_EN_NUM_UP;
1165 priv->rx_ring_num = channel->rx_count;
1166
1167 err = mlx4_en_alloc_resources(priv);
1168 if (err) {
1169 en_err(priv, "Failed reallocating port resources\n");
1170 goto out;
1171 }
1172
1173 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
1174 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
1175
f5b6345b
IS		 1176 if (dev->num_tc)
1177 mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP);
d317966b
AV		 1178
1179 en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num);
1180 en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
1181
1182 if (port_up) {
1183 err = mlx4_en_start_port(dev);
1184 if (err)
1185 en_err(priv, "Failed starting port\n");
1186 }
1187
1188 err = mlx4_en_moderation_update(priv);
1189
1190out:
1191 mutex_unlock(&mdev->state_lock);
1192 return err;
1193}
1194
ec693d47
AV		 1195static int mlx4_en_get_ts_info(struct net_device *dev,
1196 struct ethtool_ts_info *info)
1197{
1198 struct mlx4_en_priv *priv = netdev_priv(dev);
1199 struct mlx4_en_dev *mdev = priv->mdev;
1200 int ret;
1201
1202 ret = ethtool_op_get_ts_info(dev, info);
1203 if (ret)
1204 return ret;
1205
1206 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1207 info->so_timestamping |=
1208 SOF_TIMESTAMPING_TX_HARDWARE |
1209 SOF_TIMESTAMPING_RX_HARDWARE |
1210 SOF_TIMESTAMPING_RAW_HARDWARE;
1211
1212 info->tx_types =
1213 (1 << HWTSTAMP_TX_OFF) |
1214 (1 << HWTSTAMP_TX_ON);
1215
1216 info->rx_filters =
1217 (1 << HWTSTAMP_FILTER_NONE) |
1218 (1 << HWTSTAMP_FILTER_ALL);
ad7d4eae
SB		 1219
1220 if (mdev->ptp_clock)
1221 info->phc_index = ptp_clock_index(mdev->ptp_clock);
ec693d47
AV		 1222 }
1223
1224 return ret;
1225}
1226
3f6148e7 1227static int mlx4_en_set_priv_flags(struct net_device *dev, u32 flags)
0fef9d03
AV		 1228{
1229 struct mlx4_en_priv *priv = netdev_priv(dev);
1230 bool bf_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1231 bool bf_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1232 int i;
1233
1234 if (bf_enabled_new == bf_enabled_old)
1235 return 0; /* Nothing to do */
1236
1237 if (bf_enabled_new) {
1238 bool bf_supported = true;
1239
1240 for (i = 0; i < priv->tx_ring_num; i++)
1241 bf_supported &= priv->tx_ring[i]->bf_alloced;
1242
1243 if (!bf_supported) {
1244 en_err(priv, "BlueFlame is not supported\n");
1245 return -EINVAL;
1246 }
1247
1248 priv->pflags |= MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1249 } else {
1250 priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1251 }
1252
1253 for (i = 0; i < priv->tx_ring_num; i++)
1254 priv->tx_ring[i]->bf_enabled = bf_enabled_new;
1255
1256 en_info(priv, "BlueFlame %s\n",
1257 bf_enabled_new ? "Enabled" : "Disabled");
1258
1259 return 0;
1260}
1261
3f6148e7 1262static u32 mlx4_en_get_priv_flags(struct net_device *dev)
0fef9d03
AV		 1263{
1264 struct mlx4_en_priv *priv = netdev_priv(dev);
1265
1266 return priv->pflags;
1267}
1268
1269
c27a02cd
YP		 1270const struct ethtool_ops mlx4_en_ethtool_ops = {
1271 .get_drvinfo = mlx4_en_get_drvinfo,
1272 .get_settings = mlx4_en_get_settings,
1273 .set_settings = mlx4_en_set_settings,
c27a02cd 1274 .get_link = ethtool_op_get_link,
c27a02cd
YP		 1275 .get_strings = mlx4_en_get_strings,
1276 .get_sset_count = mlx4_en_get_sset_count,
1277 .get_ethtool_stats = mlx4_en_get_ethtool_stats,
e7c1c2c4 1278 .self_test = mlx4_en_self_test,
c27a02cd 1279 .get_wol = mlx4_en_get_wol,
14c07b13 1280 .set_wol = mlx4_en_set_wol,
c27a02cd
YP		 1281 .get_msglevel = mlx4_en_get_msglevel,
1282 .set_msglevel = mlx4_en_set_msglevel,
1283 .get_coalesce = mlx4_en_get_coalesce,
1284 .set_coalesce = mlx4_en_set_coalesce,
1285 .get_pauseparam = mlx4_en_get_pauseparam,
1286 .set_pauseparam = mlx4_en_set_pauseparam,
1287 .get_ringparam = mlx4_en_get_ringparam,
18cc42a3 1288 .set_ringparam = mlx4_en_set_ringparam,
93d3e367 1289 .get_rxnfc = mlx4_en_get_rxnfc,
82067281 1290 .set_rxnfc = mlx4_en_set_rxnfc,
93d3e367 1291 .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
fe62d001
BH		 1292 .get_rxfh = mlx4_en_get_rxfh,
1293 .set_rxfh = mlx4_en_set_rxfh,
d317966b
AV		 1294 .get_channels = mlx4_en_get_channels,
1295 .set_channels = mlx4_en_set_channels,
ec693d47 1296 .get_ts_info = mlx4_en_get_ts_info,
0fef9d03
AV		 1297 .set_priv_flags = mlx4_en_set_priv_flags,
1298 .get_priv_flags = mlx4_en_get_priv_flags,
c27a02cd
YP		 1299};
1300
1301
1302
1303
1304
Linux 6.x block layer and io_uring tree(s)