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Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
ae06c70b 1// SPDX-License-Identifier: GPL-2.0
51dce24b 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
5c3c48ac
JB		 3
4#include "i40e.h"
5
532b0455
MW		 6/*********************notification routines***********************/
7
8/**
9 * i40e_vc_vf_broadcast
10 * @pf: pointer to the PF structure
f5254429
JK		 11 * @v_opcode: operation code
12 * @v_retval: return value
532b0455
MW		 13 * @msg: pointer to the msg buffer
14 * @msglen: msg length
15 *
16 * send a message to all VFs on a given PF
17 **/
18static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
310a2ad9 19 enum virtchnl_ops v_opcode,
532b0455
MW		 20 i40e_status v_retval, u8 *msg,
21 u16 msglen)
22{
23 struct i40e_hw *hw = &pf->hw;
24 struct i40e_vf *vf = pf->vf;
25 int i;
26
27 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 28 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 29 /* Not all vfs are enabled so skip the ones that are not */
6322e63c
JK		 30 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
31 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 32 continue;
33
34 /* Ignore return value on purpose - a given VF may fail, but
35 * we need to keep going and send to all of them
36 */
37 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
38 msg, msglen, NULL);
39 }
40}
41
42/**
55f7d723 43 * i40e_vc_notify_vf_link_state
532b0455
MW		 44 * @vf: pointer to the VF structure
45 *
46 * send a link status message to a single VF
47 **/
48static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
49{
310a2ad9 50 struct virtchnl_pf_event pfe;
532b0455
MW		 51 struct i40e_pf *pf = vf->pf;
52 struct i40e_hw *hw = &pf->hw;
53 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 54 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 55
310a2ad9 56 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 57 pfe.severity = PF_EVENT_SEVERITY_INFO;
2ad1274f
JK		 58
59 /* Always report link is down if the VF queues aren't enabled */
60 if (!vf->queues_enabled) {
61 pfe.event_data.link_event.link_status = false;
62 pfe.event_data.link_event.link_speed = 0;
63 } else if (vf->link_forced) {
532b0455
MW		 64 pfe.event_data.link_event.link_status = vf->link_up;
65 pfe.event_data.link_event.link_speed =
5b643479 66 (vf->link_up ? VIRTCHNL_LINK_SPEED_40GB : 0);
532b0455
MW		 67 } else {
68 pfe.event_data.link_event.link_status =
69 ls->link_info & I40E_AQ_LINK_UP;
ff3f4cc2 70 pfe.event_data.link_event.link_speed =
5b643479 71 i40e_virtchnl_link_speed(ls->link_speed);
532b0455 72 }
2ad1274f 73
310a2ad9 74 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455
MW		 75 0, (u8 *)&pfe, sizeof(pfe), NULL);
76}
77
78/**
79 * i40e_vc_notify_link_state
80 * @pf: pointer to the PF structure
81 *
82 * send a link status message to all VFs on a given PF
83 **/
84void i40e_vc_notify_link_state(struct i40e_pf *pf)
85{
86 int i;
87
88 for (i = 0; i < pf->num_alloc_vfs; i++)
89 i40e_vc_notify_vf_link_state(&pf->vf[i]);
90}
91
92/**
93 * i40e_vc_notify_reset
94 * @pf: pointer to the PF structure
95 *
96 * indicate a pending reset to all VFs on a given PF
97 **/
98void i40e_vc_notify_reset(struct i40e_pf *pf)
99{
310a2ad9 100 struct virtchnl_pf_event pfe;
532b0455 101
310a2ad9 102 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 103 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9
JB		 104 i40e_vc_vf_broadcast(pf, VIRTCHNL_OP_EVENT, 0,
105 (u8 *)&pfe, sizeof(struct virtchnl_pf_event));
532b0455
MW		 106}
107
108/**
109 * i40e_vc_notify_vf_reset
110 * @vf: pointer to the VF structure
111 *
112 * indicate a pending reset to the given VF
113 **/
114void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
115{
310a2ad9 116 struct virtchnl_pf_event pfe;
532b0455
MW		 117 int abs_vf_id;
118
119 /* validate the request */
120 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
121 return;
122
123 /* verify if the VF is in either init or active before proceeding */
6322e63c
JK		 124 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
125 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 126 return;
127
a1b5a24f 128 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455 129
310a2ad9 130 pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
ff3f4cc2 131 pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
310a2ad9 132 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, VIRTCHNL_OP_EVENT,
532b0455 133 0, (u8 *)&pfe,
310a2ad9 134 sizeof(struct virtchnl_pf_event), NULL);
532b0455 135}
5c3c48ac
JB		 136/***********************misc routines*****************************/
137
f9b4b627
GR		 138/**
139 * i40e_vc_disable_vf
b40c82e6 140 * @vf: pointer to the VF info
f9b4b627 141 *
d43d60e5 142 * Disable the VF through a SW reset.
f9b4b627 143 **/
eeeddbb8 144static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
f9b4b627 145{
d43d60e5
JK		 146 int i;
147
54f455ee 148 i40e_vc_notify_vf_reset(vf);
d43d60e5
JK		 149
150 /* We want to ensure that an actual reset occurs initiated after this
151 * function was called. However, we do not want to wait forever, so
152 * we'll give a reasonable time and print a message if we failed to
153 * ensure a reset.
154 */
155 for (i = 0; i < 20; i++) {
156 if (i40e_reset_vf(vf, false))
157 return;
158 usleep_range(10000, 20000);
159 }
160
161 dev_warn(&vf->pf->pdev->dev,
162 "Failed to initiate reset for VF %d after 200 milliseconds\n",
163 vf->vf_id);
f9b4b627
GR		 164}
165
5c3c48ac
JB		 166/**
167 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 168 * @vf: pointer to the VF info
169 * @vsi_id: VF relative VSI id
5c3c48ac 170 *
b40c82e6 171 * check for the valid VSI id
5c3c48ac 172 **/
fdf0e0bf 173static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 174{
175 struct i40e_pf *pf = vf->pf;
fdf0e0bf 176 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 177
fdf0e0bf 178 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 179}
180
181/**
182 * i40e_vc_isvalid_queue_id
b40c82e6 183 * @vf: pointer to the VF info
5c3c48ac
JB		 184 * @vsi_id: vsi id
185 * @qid: vsi relative queue id
186 *
187 * check for the valid queue id
188 **/
fdf0e0bf 189static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
24474f27 190 u16 qid)
5c3c48ac
JB		 191{
192 struct i40e_pf *pf = vf->pf;
fdf0e0bf 193 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 194
fdf0e0bf 195 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 196}
197
198/**
199 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 200 * @vf: pointer to the VF info
201 * @vector_id: VF relative vector id
5c3c48ac
JB		 202 *
203 * check for the valid vector id
204 **/
c004804d 205static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u32 vector_id)
5c3c48ac
JB		 206{
207 struct i40e_pf *pf = vf->pf;
208
9347eb77 209 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 210}
211
212/***********************vf resource mgmt routines*****************/
213
214/**
215 * i40e_vc_get_pf_queue_id
b40c82e6 216 * @vf: pointer to the VF info
fdf0e0bf 217 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 218 * @vsi_queue_id: vsi relative queue id
219 *
b40c82e6 220 * return PF relative queue id
5c3c48ac 221 **/
fdf0e0bf 222static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 223 u8 vsi_queue_id)
224{
225 struct i40e_pf *pf = vf->pf;
fdf0e0bf 226 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 227 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
228
fdf0e0bf
ASJ		 229 if (!vsi)
230 return pf_queue_id;
231
5c3c48ac
JB		 232 if (le16_to_cpu(vsi->info.mapping_flags) &
233 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
234 pf_queue_id =
235 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
236 else
237 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
238 vsi_queue_id;
239
240 return pf_queue_id;
241}
242
c27eac48
AD		 243/**
244 * i40e_get_real_pf_qid
245 * @vf: pointer to the VF info
246 * @vsi_id: vsi id
247 * @queue_id: queue number
248 *
249 * wrapper function to get pf_queue_id handling ADq code as well
250 **/
251static u16 i40e_get_real_pf_qid(struct i40e_vf *vf, u16 vsi_id, u16 queue_id)
252{
253 int i;
254
255 if (vf->adq_enabled) {
256 /* Although VF considers all the queues(can be 1 to 16) as its
257 * own but they may actually belong to different VSIs(up to 4).
258 * We need to find which queues belongs to which VSI.
259 */
260 for (i = 0; i < vf->num_tc; i++) {
261 if (queue_id < vf->ch[i].num_qps) {
262 vsi_id = vf->ch[i].vsi_id;
263 break;
264 }
265 /* find right queue id which is relative to a
266 * given VSI.
267 */
268 queue_id -= vf->ch[i].num_qps;
269 }
270 }
271
272 return i40e_vc_get_pf_queue_id(vf, vsi_id, queue_id);
273}
274
5c3c48ac
JB		 275/**
276 * i40e_config_irq_link_list
b40c82e6 277 * @vf: pointer to the VF info
fdf0e0bf 278 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 279 * @vecmap: irq map info
280 *
281 * configure irq link list from the map
282 **/
fdf0e0bf 283static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
310a2ad9 284 struct virtchnl_vector_map *vecmap)
5c3c48ac
JB		 285{
286 unsigned long linklistmap = 0, tempmap;
287 struct i40e_pf *pf = vf->pf;
288 struct i40e_hw *hw = &pf->hw;
289 u16 vsi_queue_id, pf_queue_id;
290 enum i40e_queue_type qtype;
9bcc07f0 291 u16 next_q, vector_id, size;
5c3c48ac
JB		 292 u32 reg, reg_idx;
293 u16 itr_idx = 0;
294
295 vector_id = vecmap->vector_id;
296 /* setup the head */
297 if (0 == vector_id)
298 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
299 else
300 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 301 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
302 (vector_id - 1));
5c3c48ac
JB		 303
304 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
305 /* Special case - No queues mapped on this vector */
306 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
307 goto irq_list_done;
308 }
309 tempmap = vecmap->rxq_map;
4836650b 310 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 311 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
312 vsi_queue_id));
5c3c48ac
JB		 313 }
314
315 tempmap = vecmap->txq_map;
4836650b 316 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 317 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
318 vsi_queue_id + 1));
5c3c48ac
JB		 319 }
320
9bcc07f0
LY		 321 size = I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES;
322 next_q = find_first_bit(&linklistmap, size);
323 if (unlikely(next_q == size))
b861fb76
LY		 324 goto irq_list_done;
325
b82bc49e
MW		 326 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
327 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48 328 pf_queue_id = i40e_get_real_pf_qid(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 329 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
330
331 wr32(hw, reg_idx, reg);
332
9bcc07f0 333 while (next_q < size) {
5c3c48ac
JB		 334 switch (qtype) {
335 case I40E_QUEUE_TYPE_RX:
336 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
337 itr_idx = vecmap->rxitr_idx;
338 break;
339 case I40E_QUEUE_TYPE_TX:
340 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
341 itr_idx = vecmap->txitr_idx;
342 break;
343 default:
344 break;
345 }
346
9bcc07f0
LY		 347 next_q = find_next_bit(&linklistmap, size, next_q + 1);
348 if (next_q < size) {
5c3c48ac
JB		 349 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
350 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
c27eac48
AD		 351 pf_queue_id = i40e_get_real_pf_qid(vf,
352 vsi_id,
353 vsi_queue_id);
5c3c48ac
JB		 354 } else {
355 pf_queue_id = I40E_QUEUE_END_OF_LIST;
356 qtype = 0;
357 }
358
359 /* format for the RQCTL & TQCTL regs is same */
360 reg = (vector_id) |
361 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
362 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 363 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 364 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
365 wr32(hw, reg_idx, reg);
366 }
367
b8262a6d
ASJ		 368 /* if the vf is running in polling mode and using interrupt zero,
369 * need to disable auto-mask on enabling zero interrupt for VFs.
370 */
310a2ad9 371 if ((vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
b8262a6d
ASJ		 372 (vector_id == 0)) {
373 reg = rd32(hw, I40E_GLINT_CTL);
374 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
375 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
376 wr32(hw, I40E_GLINT_CTL, reg);
377 }
378 }
379
5c3c48ac
JB		 380irq_list_done:
381 i40e_flush(hw);
382}
383
e3219ce6
ASJ		 384/**
385 * i40e_release_iwarp_qvlist
386 * @vf: pointer to the VF.
387 *
388 **/
389static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
390{
391 struct i40e_pf *pf = vf->pf;
310a2ad9 392 struct virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
e3219ce6
ASJ		 393 u32 msix_vf;
394 u32 i;
395
396 if (!vf->qvlist_info)
397 return;
398
399 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
400 for (i = 0; i < qvlist_info->num_vectors; i++) {
310a2ad9 401 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 402 u32 next_q_index, next_q_type;
403 struct i40e_hw *hw = &pf->hw;
404 u32 v_idx, reg_idx, reg;
405
406 qv_info = &qvlist_info->qv_info[i];
407 if (!qv_info)
408 continue;
409 v_idx = qv_info->v_idx;
410 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
411 /* Figure out the queue after CEQ and make that the
412 * first queue.
413 */
414 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
415 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
416 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
417 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
418 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
419 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
420
421 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
422 reg = (next_q_index &
423 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
424 (next_q_type <<
425 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
426
427 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
428 }
429 }
430 kfree(vf->qvlist_info);
431 vf->qvlist_info = NULL;
432}
433
434/**
435 * i40e_config_iwarp_qvlist
436 * @vf: pointer to the VF info
437 * @qvlist_info: queue and vector list
438 *
439 * Return 0 on success or < 0 on error
440 **/
441static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
310a2ad9 442 struct virtchnl_iwarp_qvlist_info *qvlist_info)
e3219ce6
ASJ		 443{
444 struct i40e_pf *pf = vf->pf;
445 struct i40e_hw *hw = &pf->hw;
310a2ad9 446 struct virtchnl_iwarp_qv_info *qv_info;
e3219ce6
ASJ		 447 u32 v_idx, i, reg_idx, reg;
448 u32 next_q_idx, next_q_type;
fae6cad1 449 u32 msix_vf;
0b636446 450 int ret = 0;
e3219ce6 451
7015ca3d
SN		 452 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
453
454 if (qvlist_info->num_vectors > msix_vf) {
455 dev_warn(&pf->pdev->dev,
456 "Incorrect number of iwarp vectors %u. Maximum %u allowed.\n",
457 qvlist_info->num_vectors,
458 msix_vf);
0b636446
MS		 459 ret = -EINVAL;
460 goto err_out;
7015ca3d
SN		 461 }
462
0b636446 463 kfree(vf->qvlist_info);
fae6cad1
GS		 464 vf->qvlist_info = kzalloc(struct_size(vf->qvlist_info, qv_info,
465 qvlist_info->num_vectors - 1),
466 GFP_KERNEL);
0b636446
MS		 467 if (!vf->qvlist_info) {
468 ret = -ENOMEM;
469 goto err_out;
470 }
e3219ce6
ASJ		 471 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
472
473 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
474 for (i = 0; i < qvlist_info->num_vectors; i++) {
475 qv_info = &qvlist_info->qv_info[i];
476 if (!qv_info)
477 continue;
e3219ce6
ASJ		 478
479 /* Validate vector id belongs to this vf */
d510497b 480 if (!i40e_vc_isvalid_vector_id(vf, qv_info->v_idx)) {
0b636446
MS		 481 ret = -EINVAL;
482 goto err_free;
483 }
e3219ce6 484
d510497b
SN		 485 v_idx = qv_info->v_idx;
486
e3219ce6
ASJ		 487 vf->qvlist_info->qv_info[i] = *qv_info;
488
489 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
490 /* We might be sharing the interrupt, so get the first queue
491 * index and type, push it down the list by adding the new
492 * queue on top. Also link it with the new queue in CEQCTL.
493 */
494 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
495 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
496 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
497 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
498 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
499
500 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
501 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
502 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
503 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
504 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
505 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
506 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
507 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
508
509 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
510 reg = (qv_info->ceq_idx &
511 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
512 (I40E_QUEUE_TYPE_PE_CEQ <<
513 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
514 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
515 }
516
517 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
518 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
519 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
520 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
521
522 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
523 }
524 }
525
526 return 0;
0b636446 527err_free:
e3219ce6
ASJ		 528 kfree(vf->qvlist_info);
529 vf->qvlist_info = NULL;
0b636446
MS		 530err_out:
531 return ret;
e3219ce6
ASJ		 532}
533
5c3c48ac
JB		 534/**
535 * i40e_config_vsi_tx_queue
b40c82e6 536 * @vf: pointer to the VF info
fdf0e0bf 537 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 538 * @vsi_queue_id: vsi relative queue index
539 * @info: config. info
540 *
541 * configure tx queue
542 **/
fdf0e0bf 543static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 544 u16 vsi_queue_id,
310a2ad9 545 struct virtchnl_txq_info *info)
5c3c48ac
JB		 546{
547 struct i40e_pf *pf = vf->pf;
548 struct i40e_hw *hw = &pf->hw;
549 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 550 struct i40e_vsi *vsi;
5c3c48ac
JB		 551 u16 pf_queue_id;
552 u32 qtx_ctl;
553 int ret = 0;
554
d4a0658d
CW		 555 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
556 ret = -ENOENT;
557 goto error_context;
558 }
fdf0e0bf
ASJ		 559 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
560 vsi = i40e_find_vsi_from_id(pf, vsi_id);
d4a0658d
CW		 561 if (!vsi) {
562 ret = -ENOENT;
563 goto error_context;
564 }
5c3c48ac
JB		 565
566 /* clear the context structure first */
567 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
568
569 /* only set the required fields */
570 tx_ctx.base = info->dma_ring_addr / 128;
571 tx_ctx.qlen = info->ring_len;
fdf0e0bf 572 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 573 tx_ctx.rdylist_act = 0;
5d29896a
AS		 574 tx_ctx.head_wb_ena = info->headwb_enabled;
575 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 576
577 /* clear the context in the HMC */
578 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
579 if (ret) {
580 dev_err(&pf->pdev->dev,
581 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
582 pf_queue_id, ret);
583 ret = -ENOENT;
584 goto error_context;
585 }
586
587 /* set the context in the HMC */
588 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
589 if (ret) {
590 dev_err(&pf->pdev->dev,
591 "Failed to set VF LAN Tx queue context %d error: %d\n",
592 pf_queue_id, ret);
593 ret = -ENOENT;
594 goto error_context;
595 }
596
597 /* associate this queue with the PCI VF function */
598 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 599 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 600 & I40E_QTX_CTL_PF_INDX_MASK);
601 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
602 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
603 & I40E_QTX_CTL_VFVM_INDX_MASK);
604 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
605 i40e_flush(hw);
606
607error_context:
608 return ret;
609}
610
611/**
612 * i40e_config_vsi_rx_queue
b40c82e6 613 * @vf: pointer to the VF info
fdf0e0bf 614 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 615 * @vsi_queue_id: vsi relative queue index
616 * @info: config. info
617 *
618 * configure rx queue
619 **/
fdf0e0bf 620static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac 621 u16 vsi_queue_id,
310a2ad9 622 struct virtchnl_rxq_info *info)
5c3c48ac
JB		 623{
624 struct i40e_pf *pf = vf->pf;
625 struct i40e_hw *hw = &pf->hw;
626 struct i40e_hmc_obj_rxq rx_ctx;
627 u16 pf_queue_id;
628 int ret = 0;
629
fdf0e0bf 630 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 631
632 /* clear the context structure first */
633 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
634
635 /* only set the required fields */
636 rx_ctx.base = info->dma_ring_addr / 128;
637 rx_ctx.qlen = info->ring_len;
638
639 if (info->splithdr_enabled) {
640 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
641 I40E_RX_SPLIT_IP |
642 I40E_RX_SPLIT_TCP_UDP |
643 I40E_RX_SPLIT_SCTP;
644 /* header length validation */
645 if (info->hdr_size > ((2 * 1024) - 64)) {
646 ret = -EINVAL;
647 goto error_param;
648 }
649 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
650
19b85e67 651 /* set split mode 10b */
d6b3bca1 652 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 653 }
654
655 /* databuffer length validation */
656 if (info->databuffer_size > ((16 * 1024) - 128)) {
657 ret = -EINVAL;
658 goto error_param;
659 }
660 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
661
662 /* max pkt. length validation */
663 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
664 ret = -EINVAL;
665 goto error_param;
666 }
667 rx_ctx.rxmax = info->max_pkt_size;
668
669 /* enable 32bytes desc always */
670 rx_ctx.dsize = 1;
671
672 /* default values */
7362be9e 673 rx_ctx.lrxqthresh = 1;
5c3c48ac 674 rx_ctx.crcstrip = 1;
50d41659 675 rx_ctx.prefena = 1;
c1d11cef 676 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 677
678 /* clear the context in the HMC */
679 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
680 if (ret) {
681 dev_err(&pf->pdev->dev,
682 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
683 pf_queue_id, ret);
684 ret = -ENOENT;
685 goto error_param;
686 }
687
688 /* set the context in the HMC */
689 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
690 if (ret) {
691 dev_err(&pf->pdev->dev,
692 "Failed to set VF LAN Rx queue context %d error: %d\n",
693 pf_queue_id, ret);
694 ret = -ENOENT;
695 goto error_param;
696 }
697
698error_param:
699 return ret;
700}
701
702/**
703 * i40e_alloc_vsi_res
b40c82e6 704 * @vf: pointer to the VF info
c27eac48 705 * @idx: VSI index, applies only for ADq mode, zero otherwise
5c3c48ac 706 *
b40c82e6 707 * alloc VF vsi context & resources
5c3c48ac 708 **/
c27eac48 709static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)
5c3c48ac
JB		 710{
711 struct i40e_mac_filter *f = NULL;
712 struct i40e_pf *pf = vf->pf;
5c3c48ac 713 struct i40e_vsi *vsi;
0c483bd4 714 u64 max_tx_rate = 0;
5c3c48ac
JB		 715 int ret = 0;
716
c27eac48
AD		 717 vsi = i40e_vsi_setup(pf, I40E_VSI_SRIOV, pf->vsi[pf->lan_vsi]->seid,
718 vf->vf_id);
5c3c48ac
JB		 719
720 if (!vsi) {
721 dev_err(&pf->pdev->dev,
b40c82e6 722 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 723 vf->vf_id, pf->hw.aq.asq_last_status);
724 ret = -ENOENT;
725 goto error_alloc_vsi_res;
726 }
c27eac48
AD		 727
728 if (!idx) {
bb360717 729 u64 hena = i40e_pf_get_default_rss_hena(pf);
435c084a 730 u8 broadcast[ETH_ALEN];
bb360717 731
fdf0e0bf 732 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 733 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 734 /* If the port VLAN has been configured and then the
735 * VF driver was removed then the VSI port VLAN
736 * configuration was destroyed. Check if there is
737 * a port VLAN and restore the VSI configuration if
738 * needed.
739 */
740 if (vf->port_vlan_id)
741 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035 742
278e7d0b 743 spin_lock_bh(&vsi->mac_filter_hash_lock);
b7b713a8 744 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
9569a9a4
JK		 745 f = i40e_add_mac_filter(vsi,
746 vf->default_lan_addr.addr);
b7b713a8
MW		 747 if (!f)
748 dev_info(&pf->pdev->dev,
749 "Could not add MAC filter %pM for VF %d\n",
750 vf->default_lan_addr.addr, vf->vf_id);
751 }
435c084a 752 eth_broadcast_addr(broadcast);
9569a9a4 753 f = i40e_add_mac_filter(vsi, broadcast);
435c084a
JK		 754 if (!f)
755 dev_info(&pf->pdev->dev,
756 "Could not allocate VF broadcast filter\n");
278e7d0b 757 spin_unlock_bh(&vsi->mac_filter_hash_lock);
26f77e53
LY		 758 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
759 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
c27eac48
AD		 760 /* program mac filter only for VF VSI */
761 ret = i40e_sync_vsi_filters(vsi);
762 if (ret)
763 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 764 }
6dbbbfb2 765
c27eac48
AD		 766 /* storing VSI index and id for ADq and don't apply the mac filter */
767 if (vf->adq_enabled) {
768 vf->ch[idx].vsi_idx = vsi->idx;
769 vf->ch[idx].vsi_id = vsi->id;
770 }
5c3c48ac 771
6b192891
MW		 772 /* Set VF bandwidth if specified */
773 if (vf->tx_rate) {
0c483bd4
AD		 774 max_tx_rate = vf->tx_rate;
775 } else if (vf->ch[idx].max_tx_rate) {
776 max_tx_rate = vf->ch[idx].max_tx_rate;
777 }
778
779 if (max_tx_rate) {
780 max_tx_rate = div_u64(max_tx_rate, I40E_BW_CREDIT_DIVISOR);
6b192891 781 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
0c483bd4 782 max_tx_rate, 0, NULL);
6b192891
MW		 783 if (ret)
784 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
785 vf->vf_id, ret);
786 }
787
5c3c48ac
JB		 788error_alloc_vsi_res:
789 return ret;
790}
791
c27eac48
AD		 792/**
793 * i40e_map_pf_queues_to_vsi
794 * @vf: pointer to the VF info
795 *
796 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
797 * function takes care of first part VSILAN_QTABLE, mapping pf queues to VSI.
798 **/
799static void i40e_map_pf_queues_to_vsi(struct i40e_vf *vf)
800{
801 struct i40e_pf *pf = vf->pf;
802 struct i40e_hw *hw = &pf->hw;
803 u32 reg, num_tc = 1; /* VF has at least one traffic class */
804 u16 vsi_id, qps;
805 int i, j;
806
807 if (vf->adq_enabled)
808 num_tc = vf->num_tc;
809
810 for (i = 0; i < num_tc; i++) {
811 if (vf->adq_enabled) {
812 qps = vf->ch[i].num_qps;
813 vsi_id = vf->ch[i].vsi_id;
814 } else {
815 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
816 vsi_id = vf->lan_vsi_id;
817 }
818
819 for (j = 0; j < 7; j++) {
820 if (j * 2 >= qps) {
821 /* end of list */
822 reg = 0x07FF07FF;
823 } else {
824 u16 qid = i40e_vc_get_pf_queue_id(vf,
825 vsi_id,
826 j * 2);
827 reg = qid;
828 qid = i40e_vc_get_pf_queue_id(vf, vsi_id,
829 (j * 2) + 1);
830 reg |= qid << 16;
831 }
832 i40e_write_rx_ctl(hw,
833 I40E_VSILAN_QTABLE(j, vsi_id),
834 reg);
835 }
836 }
837}
838
839/**
840 * i40e_map_pf_to_vf_queues
841 * @vf: pointer to the VF info
842 *
843 * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
844 * function takes care of the second part VPLAN_QTABLE & completes VF mappings.
845 **/
846static void i40e_map_pf_to_vf_queues(struct i40e_vf *vf)
847{
848 struct i40e_pf *pf = vf->pf;
849 struct i40e_hw *hw = &pf->hw;
850 u32 reg, total_qps = 0;
851 u32 qps, num_tc = 1; /* VF has at least one traffic class */
852 u16 vsi_id, qid;
853 int i, j;
854
855 if (vf->adq_enabled)
856 num_tc = vf->num_tc;
857
858 for (i = 0; i < num_tc; i++) {
859 if (vf->adq_enabled) {
860 qps = vf->ch[i].num_qps;
861 vsi_id = vf->ch[i].vsi_id;
862 } else {
863 qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
864 vsi_id = vf->lan_vsi_id;
865 }
866
867 for (j = 0; j < qps; j++) {
868 qid = i40e_vc_get_pf_queue_id(vf, vsi_id, j);
869
870 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
871 wr32(hw, I40E_VPLAN_QTABLE(total_qps, vf->vf_id),
872 reg);
873 total_qps++;
874 }
875 }
876}
877
805bd5bd
MW		 878/**
879 * i40e_enable_vf_mappings
b40c82e6 880 * @vf: pointer to the VF info
805bd5bd 881 *
b40c82e6 882 * enable VF mappings
805bd5bd
MW		 883 **/
884static void i40e_enable_vf_mappings(struct i40e_vf *vf)
885{
886 struct i40e_pf *pf = vf->pf;
887 struct i40e_hw *hw = &pf->hw;
c27eac48 888 u32 reg;
805bd5bd
MW		 889
890 /* Tell the hardware we're using noncontiguous mapping. HW requires
891 * that VF queues be mapped using this method, even when they are
892 * contiguous in real life
893 */
272cdaf2
SN		 894 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
895 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 896
897 /* enable VF vplan_qtable mappings */
898 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
899 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
900
c27eac48
AD		 901 i40e_map_pf_to_vf_queues(vf);
902 i40e_map_pf_queues_to_vsi(vf);
805bd5bd
MW		 903
904 i40e_flush(hw);
905}
906
907/**
908 * i40e_disable_vf_mappings
b40c82e6 909 * @vf: pointer to the VF info
805bd5bd 910 *
b40c82e6 911 * disable VF mappings
805bd5bd
MW		 912 **/
913static void i40e_disable_vf_mappings(struct i40e_vf *vf)
914{
915 struct i40e_pf *pf = vf->pf;
916 struct i40e_hw *hw = &pf->hw;
917 int i;
918
919 /* disable qp mappings */
920 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
921 for (i = 0; i < I40E_MAX_VSI_QP; i++)
922 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
923 I40E_QUEUE_END_OF_LIST);
924 i40e_flush(hw);
925}
926
927/**
928 * i40e_free_vf_res
b40c82e6 929 * @vf: pointer to the VF info
805bd5bd 930 *
b40c82e6 931 * free VF resources
805bd5bd
MW		 932 **/
933static void i40e_free_vf_res(struct i40e_vf *vf)
934{
935 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 936 struct i40e_hw *hw = &pf->hw;
937 u32 reg_idx, reg;
c27eac48 938 int i, j, msix_vf;
805bd5bd 939
beff3e9d
RK		 940 /* Start by disabling VF's configuration API to prevent the OS from
941 * accessing the VF's VSI after it's freed / invalidated.
942 */
6322e63c 943 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 944
a3f5aa90
AB		 945 /* It's possible the VF had requeuested more queues than the default so
946 * do the accounting here when we're about to free them.
947 */
948 if (vf->num_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF) {
949 pf->queues_left += vf->num_queue_pairs -
950 I40E_DEFAULT_QUEUES_PER_VF;
951 }
952
805bd5bd 953 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 954 if (vf->lan_vsi_idx) {
955 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
956 vf->lan_vsi_idx = 0;
805bd5bd
MW		 957 vf->lan_vsi_id = 0;
958 }
c27eac48
AD		 959
960 /* do the accounting and remove additional ADq VSI's */
961 if (vf->adq_enabled && vf->ch[0].vsi_idx) {
962 for (j = 0; j < vf->num_tc; j++) {
963 /* At this point VSI0 is already released so don't
964 * release it again and only clear their values in
965 * structure variables
966 */
967 if (j)
968 i40e_vsi_release(pf->vsi[vf->ch[j].vsi_idx]);
969 vf->ch[j].vsi_idx = 0;
970 vf->ch[j].vsi_id = 0;
971 }
972 }
9347eb77
MW		 973 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
974
fc18eaa0
MW		 975 /* disable interrupts so the VF starts in a known state */
976 for (i = 0; i < msix_vf; i++) {
977 /* format is same for both registers */
978 if (0 == i)
979 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
980 else
981 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
982 (vf->vf_id))
983 + (i - 1));
984 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
985 i40e_flush(hw);
986 }
805bd5bd 987
fc18eaa0
MW		 988 /* clear the irq settings */
989 for (i = 0; i < msix_vf; i++) {
990 /* format is same for both registers */
991 if (0 == i)
992 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
993 else
994 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
995 (vf->vf_id))
996 + (i - 1));
997 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
998 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
999 wr32(hw, reg_idx, reg);
1000 i40e_flush(hw);
1001 }
b564d62e 1002 /* reset some of the state variables keeping track of the resources */
805bd5bd 1003 vf->num_queue_pairs = 0;
41d0a4d0
AB		 1004 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
1005 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
805bd5bd
MW		 1006}
1007
1008/**
1009 * i40e_alloc_vf_res
b40c82e6 1010 * @vf: pointer to the VF info
805bd5bd 1011 *
b40c82e6 1012 * allocate VF resources
805bd5bd
MW		 1013 **/
1014static int i40e_alloc_vf_res(struct i40e_vf *vf)
1015{
1016 struct i40e_pf *pf = vf->pf;
1017 int total_queue_pairs = 0;
c27eac48 1018 int ret, idx;
805bd5bd 1019
a3f5aa90
AB		 1020 if (vf->num_req_queues &&
1021 vf->num_req_queues <= pf->queues_left + I40E_DEFAULT_QUEUES_PER_VF)
1022 pf->num_vf_qps = vf->num_req_queues;
1023 else
1024 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
1025
805bd5bd 1026 /* allocate hw vsi context & associated resources */
c27eac48 1027 ret = i40e_alloc_vsi_res(vf, 0);
805bd5bd
MW		 1028 if (ret)
1029 goto error_alloc;
fdf0e0bf 1030 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7 1031
c27eac48
AD		 1032 /* allocate additional VSIs based on tc information for ADq */
1033 if (vf->adq_enabled) {
1034 if (pf->queues_left >=
1035 (I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF)) {
1036 /* TC 0 always belongs to VF VSI */
1037 for (idx = 1; idx < vf->num_tc; idx++) {
1038 ret = i40e_alloc_vsi_res(vf, idx);
1039 if (ret)
1040 goto error_alloc;
1041 }
1042 /* send correct number of queues */
1043 total_queue_pairs = I40E_MAX_VF_QUEUES;
1044 } else {
1045 dev_info(&pf->pdev->dev, "VF %d: Not enough queues to allocate, disabling ADq\n",
1046 vf->vf_id);
1047 vf->adq_enabled = false;
1048 }
1049 }
1050
a3f5aa90
AB		 1051 /* We account for each VF to get a default number of queue pairs. If
1052 * the VF has now requested more, we need to account for that to make
1053 * certain we never request more queues than we actually have left in
1054 * HW.
1055 */
1056 if (total_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF)
1057 pf->queues_left -=
1058 total_queue_pairs - I40E_DEFAULT_QUEUES_PER_VF;
1059
692fb0a7
ASJ		 1060 if (vf->trusted)
1061 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
1062 else
1063 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 1064
1065 /* store the total qps number for the runtime
b40c82e6 1066 * VF req validation
805bd5bd
MW		 1067 */
1068 vf->num_queue_pairs = total_queue_pairs;
1069
b40c82e6 1070 /* VF is now completely initialized */
6322e63c 1071 set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
805bd5bd
MW		 1072
1073error_alloc:
1074 if (ret)
1075 i40e_free_vf_res(vf);
1076
1077 return ret;
1078}
1079
fc18eaa0
MW		 1080#define VF_DEVICE_STATUS 0xAA
1081#define VF_TRANS_PENDING_MASK 0x20
1082/**
1083 * i40e_quiesce_vf_pci
b40c82e6 1084 * @vf: pointer to the VF structure
fc18eaa0
MW		 1085 *
1086 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
1087 * if the transactions never clear.
1088 **/
1089static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
1090{
1091 struct i40e_pf *pf = vf->pf;
1092 struct i40e_hw *hw = &pf->hw;
1093 int vf_abs_id, i;
1094 u32 reg;
1095
b141d619 1096 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 1097
1098 wr32(hw, I40E_PF_PCI_CIAA,
1099 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
1100 for (i = 0; i < 100; i++) {
1101 reg = rd32(hw, I40E_PF_PCI_CIAD);
1102 if ((reg & VF_TRANS_PENDING_MASK) == 0)
1103 return 0;
1104 udelay(1);
1105 }
1106 return -EIO;
1107}
1108
0ce5233e
MS		 1109static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi);
1110
1111/**
1112 * i40e_config_vf_promiscuous_mode
1113 * @vf: pointer to the VF info
1114 * @vsi_id: VSI id
1115 * @allmulti: set MAC L2 layer multicast promiscuous enable/disable
1116 * @alluni: set MAC L2 layer unicast promiscuous enable/disable
1117 *
1118 * Called from the VF to configure the promiscuous mode of
1119 * VF vsis and from the VF reset path to reset promiscuous mode.
1120 **/
1121static i40e_status i40e_config_vf_promiscuous_mode(struct i40e_vf *vf,
1122 u16 vsi_id,
1123 bool allmulti,
1124 bool alluni)
1125{
1126 struct i40e_pf *pf = vf->pf;
1127 struct i40e_hw *hw = &pf->hw;
1128 struct i40e_mac_filter *f;
1129 i40e_status aq_ret = 0;
1130 struct i40e_vsi *vsi;
1131 int bkt;
1132
1133 vsi = i40e_find_vsi_from_id(pf, vsi_id);
1134 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id) || !vsi)
1135 return I40E_ERR_PARAM;
1136
0ce5233e
MS		 1137 if (vf->port_vlan_id) {
1138 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1139 allmulti,
1140 vf->port_vlan_id,
1141 NULL);
1142 if (aq_ret) {
1143 int aq_err = pf->hw.aq.asq_last_status;
1144
1145 dev_err(&pf->pdev->dev,
1146 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1147 vf->vf_id,
1148 i40e_stat_str(&pf->hw, aq_ret),
1149 i40e_aq_str(&pf->hw, aq_err));
1150 return aq_ret;
1151 }
1152
1153 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1154 alluni,
1155 vf->port_vlan_id,
1156 NULL);
1157 if (aq_ret) {
1158 int aq_err = pf->hw.aq.asq_last_status;
1159
1160 dev_err(&pf->pdev->dev,
1161 "VF %d failed to set unicast promiscuous mode err %s aq_err %s\n",
1162 vf->vf_id,
1163 i40e_stat_str(&pf->hw, aq_ret),
1164 i40e_aq_str(&pf->hw, aq_err));
1165 }
1166 return aq_ret;
1167 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
1168 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
1169 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1170 continue;
1171 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1172 vsi->seid,
1173 allmulti,
1174 f->vlan,
1175 NULL);
1176 if (aq_ret) {
1177 int aq_err = pf->hw.aq.asq_last_status;
1178
1179 dev_err(&pf->pdev->dev,
1180 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1181 f->vlan,
1182 i40e_stat_str(&pf->hw, aq_ret),
1183 i40e_aq_str(&pf->hw, aq_err));
1184 }
1185
1186 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1187 vsi->seid,
1188 alluni,
1189 f->vlan,
1190 NULL);
1191 if (aq_ret) {
1192 int aq_err = pf->hw.aq.asq_last_status;
1193
1194 dev_err(&pf->pdev->dev,
1195 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1196 f->vlan,
1197 i40e_stat_str(&pf->hw, aq_ret),
1198 i40e_aq_str(&pf->hw, aq_err));
1199 }
1200 }
1201 return aq_ret;
1202 }
1203 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid, allmulti,
1204 NULL);
1205 if (aq_ret) {
1206 int aq_err = pf->hw.aq.asq_last_status;
1207
1208 dev_err(&pf->pdev->dev,
1209 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1210 vf->vf_id,
1211 i40e_stat_str(&pf->hw, aq_ret),
1212 i40e_aq_str(&pf->hw, aq_err));
1213 return aq_ret;
1214 }
1215
1216 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid, alluni,
1217 NULL, true);
1218 if (aq_ret) {
1219 int aq_err = pf->hw.aq.asq_last_status;
1220
1221 dev_err(&pf->pdev->dev,
1222 "VF %d failed to set unicast promiscuous mode err %s aq_err %s\n",
1223 vf->vf_id,
1224 i40e_stat_str(&pf->hw, aq_ret),
1225 i40e_aq_str(&pf->hw, aq_err));
1226 }
1227
1228 return aq_ret;
1229}
1230
5c3c48ac 1231/**
9dc2e417 1232 * i40e_trigger_vf_reset
b40c82e6 1233 * @vf: pointer to the VF structure
5c3c48ac
JB		 1234 * @flr: VFLR was issued or not
1235 *
9dc2e417
JK		 1236 * Trigger hardware to start a reset for a particular VF. Expects the caller
1237 * to wait the proper amount of time to allow hardware to reset the VF before
1238 * it cleans up and restores VF functionality.
5c3c48ac 1239 **/
9dc2e417 1240static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
5c3c48ac 1241{
5c3c48ac
JB		 1242 struct i40e_pf *pf = vf->pf;
1243 struct i40e_hw *hw = &pf->hw;
7e5a313e 1244 u32 reg, reg_idx, bit_idx;
3ba9bcb4 1245
5c3c48ac 1246 /* warn the VF */
6322e63c 1247 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac 1248
beff3e9d
RK		 1249 /* Disable VF's configuration API during reset. The flag is re-enabled
1250 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
1251 * It's normally disabled in i40e_free_vf_res(), but it's safer
1252 * to do it earlier to give some time to finish to any VF config
1253 * functions that may still be running at this point.
1254 */
6322e63c 1255 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 1256
fc18eaa0
MW		 1257 /* In the case of a VFLR, the HW has already reset the VF and we
1258 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 1259 */
1260 if (!flr) {
b40c82e6 1261 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 1262 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1263 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 1264 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1265 i40e_flush(hw);
1266 }
7369ca87
MW		 1267 /* clear the VFLR bit in GLGEN_VFLRSTAT */
1268 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
1269 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
1270 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 1271 i40e_flush(hw);
5c3c48ac 1272
fc18eaa0
MW		 1273 if (i40e_quiesce_vf_pci(vf))
1274 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
1275 vf->vf_id);
9dc2e417 1276}
fc18eaa0 1277
9dc2e417
JK		 1278/**
1279 * i40e_cleanup_reset_vf
1280 * @vf: pointer to the VF structure
1281 *
1282 * Cleanup a VF after the hardware reset is finished. Expects the caller to
1283 * have verified whether the reset is finished properly, and ensure the
1284 * minimum amount of wait time has passed.
1285 **/
1286static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
1287{
1288 struct i40e_pf *pf = vf->pf;
1289 struct i40e_hw *hw = &pf->hw;
1290 u32 reg;
fc18eaa0 1291
0ce5233e
MS		 1292 /* disable promisc modes in case they were enabled */
1293 i40e_config_vf_promiscuous_mode(vf, vf->lan_vsi_id, false, false);
1294
beff3e9d 1295 /* free VF resources to begin resetting the VSI state */
fc18eaa0 1296 i40e_free_vf_res(vf);
beff3e9d
RK		 1297
1298 /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
1299 * By doing this we allow HW to access VF memory at any point. If we
1300 * did it any sooner, HW could access memory while it was being freed
1301 * in i40e_free_vf_res(), causing an IOMMU fault.
1302 *
1303 * On the other hand, this needs to be done ASAP, because the VF driver
1304 * is waiting for this to happen and may report a timeout. It's
1305 * harmless, but it gets logged into Guest OS kernel log, so best avoid
1306 * it.
1307 */
1308 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1309 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1310 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1311
1312 /* reallocate VF resources to finish resetting the VSI state */
21be99ec 1313 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 1314 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec 1315 i40e_enable_vf_mappings(vf);
6322e63c
JK		 1316 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1317 clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
6a23449a 1318 /* Do not notify the client during VF init */
c53d11f6
AB		 1319 if (!test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
1320 &vf->vf_states))
6a23449a 1321 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
dc5b4e9f 1322 vf->num_vlan = 0;
21be99ec 1323 }
beff3e9d
RK		 1324
1325 /* Tell the VF driver the reset is done. This needs to be done only
1326 * after VF has been fully initialized, because the VF driver may
1327 * request resources immediately after setting this flag.
1328 */
310a2ad9 1329 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
9dc2e417
JK		 1330}
1331
1332/**
1333 * i40e_reset_vf
1334 * @vf: pointer to the VF structure
1335 * @flr: VFLR was issued or not
1336 *
d43d60e5 1337 * Returns true if the VF is reset, false otherwise.
9dc2e417 1338 **/
d43d60e5 1339bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
9dc2e417
JK		 1340{
1341 struct i40e_pf *pf = vf->pf;
1342 struct i40e_hw *hw = &pf->hw;
1343 bool rsd = false;
1344 u32 reg;
1345 int i;
1346
d43d60e5
JK		 1347 /* If the VFs have been disabled, this means something else is
1348 * resetting the VF, so we shouldn't continue.
1349 */
0da36b97 1350 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1351 return false;
9dc2e417
JK		 1352
1353 i40e_trigger_vf_reset(vf, flr);
1354
1355 /* poll VPGEN_VFRSTAT reg to make sure
1356 * that reset is complete
1357 */
1358 for (i = 0; i < 10; i++) {
1359 /* VF reset requires driver to first reset the VF and then
1360 * poll the status register to make sure that the reset
1361 * completed successfully. Due to internal HW FIFO flushes,
1362 * we must wait 10ms before the register will be valid.
1363 */
1364 usleep_range(10000, 20000);
1365 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1366 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
1367 rsd = true;
1368 break;
1369 }
1370 }
1371
1372 if (flr)
1373 usleep_range(10000, 20000);
1374
1375 if (!rsd)
1376 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1377 vf->vf_id);
1378 usleep_range(10000, 20000);
1379
1380 /* On initial reset, we don't have any queues to disable */
1381 if (vf->lan_vsi_idx != 0)
1382 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
1383
1384 i40e_cleanup_reset_vf(vf);
7e5a313e 1385
5c3c48ac 1386 i40e_flush(hw);
0da36b97 1387 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1388
1389 return true;
5c3c48ac 1390}
c354229f 1391
e4b433f4
JK		 1392/**
1393 * i40e_reset_all_vfs
1394 * @pf: pointer to the PF structure
1395 * @flr: VFLR was issued or not
1396 *
1397 * Reset all allocated VFs in one go. First, tell the hardware to reset each
1398 * VF, then do all the waiting in one chunk, and finally finish restoring each
1399 * VF after the wait. This is useful during PF routines which need to reset
1400 * all VFs, as otherwise it must perform these resets in a serialized fashion.
d43d60e5
JK		 1401 *
1402 * Returns true if any VFs were reset, and false otherwise.
e4b433f4 1403 **/
d43d60e5 1404bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
e4b433f4
JK		 1405{
1406 struct i40e_hw *hw = &pf->hw;
1407 struct i40e_vf *vf;
1408 int i, v;
1409 u32 reg;
1410
1411 /* If we don't have any VFs, then there is nothing to reset */
1412 if (!pf->num_alloc_vfs)
d43d60e5 1413 return false;
e4b433f4
JK		 1414
1415 /* If VFs have been disabled, there is no need to reset */
0da36b97 1416 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
d43d60e5 1417 return false;
e4b433f4
JK		 1418
1419 /* Begin reset on all VFs at once */
1420 for (v = 0; v < pf->num_alloc_vfs; v++)
1421 i40e_trigger_vf_reset(&pf->vf[v], flr);
1422
1423 /* HW requires some time to make sure it can flush the FIFO for a VF
1424 * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
1425 * sequence to make sure that it has completed. We'll keep track of
1426 * the VFs using a simple iterator that increments once that VF has
1427 * finished resetting.
1428 */
1429 for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
1430 usleep_range(10000, 20000);
1431
1432 /* Check each VF in sequence, beginning with the VF to fail
1433 * the previous check.
1434 */
1435 while (v < pf->num_alloc_vfs) {
1436 vf = &pf->vf[v];
1437 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1438 if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
1439 break;
1440
1441 /* If the current VF has finished resetting, move on
1442 * to the next VF in sequence.
1443 */
1444 v++;
1445 }
1446 }
1447
1448 if (flr)
1449 usleep_range(10000, 20000);
1450
1451 /* Display a warning if at least one VF didn't manage to reset in
1452 * time, but continue on with the operation.
1453 */
1454 if (v < pf->num_alloc_vfs)
1455 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1456 pf->vf[v].vf_id);
1457 usleep_range(10000, 20000);
1458
1459 /* Begin disabling all the rings associated with VFs, but do not wait
1460 * between each VF.
1461 */
1462 for (v = 0; v < pf->num_alloc_vfs; v++) {
1463 /* On initial reset, we don't have any queues to disable */
1464 if (pf->vf[v].lan_vsi_idx == 0)
1465 continue;
1466
1467 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
1468 }
1469
1470 /* Now that we've notified HW to disable all of the VF rings, wait
1471 * until they finish.
1472 */
1473 for (v = 0; v < pf->num_alloc_vfs; v++) {
1474 /* On initial reset, we don't have any queues to disable */
1475 if (pf->vf[v].lan_vsi_idx == 0)
1476 continue;
1477
1478 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
1479 }
1480
1481 /* Hw may need up to 50ms to finish disabling the RX queues. We
1482 * minimize the wait by delaying only once for all VFs.
1483 */
1484 mdelay(50);
1485
1486 /* Finish the reset on each VF */
1487 for (v = 0; v < pf->num_alloc_vfs; v++)
1488 i40e_cleanup_reset_vf(&pf->vf[v]);
1489
1490 i40e_flush(hw);
0da36b97 1491 clear_bit(__I40E_VF_DISABLE, pf->state);
d43d60e5
JK		 1492
1493 return true;
e4b433f4
JK		 1494}
1495
5c3c48ac
JB		 1496/**
1497 * i40e_free_vfs
b40c82e6 1498 * @pf: pointer to the PF structure
5c3c48ac 1499 *
b40c82e6 1500 * free VF resources
5c3c48ac
JB		 1501 **/
1502void i40e_free_vfs(struct i40e_pf *pf)
1503{
f7414531
MW		 1504 struct i40e_hw *hw = &pf->hw;
1505 u32 reg_idx, bit_idx;
1506 int i, tmp, vf_id;
5c3c48ac
JB		 1507
1508 if (!pf->vf)
1509 return;
0da36b97 1510 while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
3ba9bcb4 1511 usleep_range(1000, 2000);
5c3c48ac 1512
e3219ce6 1513 i40e_notify_client_of_vf_enable(pf, 0);
707d088a
JK		 1514
1515 /* Amortize wait time by stopping all VFs at the same time */
1516 for (i = 0; i < pf->num_alloc_vfs; i++) {
1517 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
1518 continue;
1519
1520 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
1521 }
1522
1523 for (i = 0; i < pf->num_alloc_vfs; i++) {
6322e63c 1524 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
707d088a
JK		 1525 continue;
1526
1527 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
1528 }
44434638 1529
6a9ddb36
MW		 1530 /* Disable IOV before freeing resources. This lets any VF drivers
1531 * running in the host get themselves cleaned up before we yank
1532 * the carpet out from underneath their feet.
1533 */
1534 if (!pci_vfs_assigned(pf->pdev))
1535 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1536 else
1537 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36 1538
b40c82e6 1539 /* free up VF resources */
6c1b5bff
MW		 1540 tmp = pf->num_alloc_vfs;
1541 pf->num_alloc_vfs = 0;
1542 for (i = 0; i < tmp; i++) {
6322e63c 1543 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
5c3c48ac
JB		 1544 i40e_free_vf_res(&pf->vf[i]);
1545 /* disable qp mappings */
1546 i40e_disable_vf_mappings(&pf->vf[i]);
1547 }
1548
1549 kfree(pf->vf);
1550 pf->vf = NULL;
5c3c48ac 1551
9e5634df
MW		 1552 /* This check is for when the driver is unloaded while VFs are
1553 * assigned. Setting the number of VFs to 0 through sysfs is caught
1554 * before this function ever gets called.
1555 */
c24817b6 1556 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1557 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1558 * work correctly when SR-IOV gets re-enabled.
1559 */
1560 for (vf_id = 0; vf_id < tmp; vf_id++) {
1561 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1562 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1563 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1564 }
c354229f 1565 }
0da36b97 1566 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac
JB		 1567}
1568
1569#ifdef CONFIG_PCI_IOV
1570/**
1571 * i40e_alloc_vfs
b40c82e6
JK		 1572 * @pf: pointer to the PF structure
1573 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1574 *
b40c82e6 1575 * allocate VF resources
5c3c48ac 1576 **/
4aeec010 1577int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1578{
1579 struct i40e_vf *vfs;
1580 int i, ret = 0;
1581
6c1b5bff 1582 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1583 i40e_irq_dynamic_disable_icr0(pf);
1584
4aeec010
MW		 1585 /* Check to see if we're just allocating resources for extant VFs */
1586 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1587 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1588 if (ret) {
de445b3d 1589 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1590 pf->num_alloc_vfs = 0;
1591 goto err_iov;
1592 }
5c3c48ac 1593 }
5c3c48ac 1594 /* allocate memory */
cc6456af 1595 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1596 if (!vfs) {
1597 ret = -ENOMEM;
1598 goto err_alloc;
1599 }
c674d125 1600 pf->vf = vfs;
5c3c48ac
JB		 1601
1602 /* apply default profile */
1603 for (i = 0; i < num_alloc_vfs; i++) {
1604 vfs[i].pf = pf;
1605 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1606 vfs[i].vf_id = i;
1607
1608 /* assign default capabilities */
1609 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1610 vfs[i].spoofchk = true;
1b484370
JK		 1611
1612 set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
5c3c48ac 1613
5c3c48ac 1614 }
5c3c48ac
JB		 1615 pf->num_alloc_vfs = num_alloc_vfs;
1616
1b484370
JK		 1617 /* VF resources get allocated during reset */
1618 i40e_reset_all_vfs(pf, false);
1619
6a23449a
AD		 1620 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1621
5c3c48ac
JB		 1622err_alloc:
1623 if (ret)
1624 i40e_free_vfs(pf);
1625err_iov:
6c1b5bff 1626 /* Re-enable interrupt 0. */
dbadbbe2 1627 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 1628 return ret;
1629}
1630
1631#endif
1632/**
1633 * i40e_pci_sriov_enable
1634 * @pdev: pointer to a pci_dev structure
b40c82e6 1635 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1636 *
1637 * Enable or change the number of VFs
1638 **/
1639static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1640{
1641#ifdef CONFIG_PCI_IOV
1642 struct i40e_pf *pf = pci_get_drvdata(pdev);
1643 int pre_existing_vfs = pci_num_vf(pdev);
1644 int err = 0;
1645
0da36b97 1646 if (test_bit(__I40E_TESTING, pf->state)) {
e17bc411
GR		 1647 dev_warn(&pdev->dev,
1648 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1649 err = -EPERM;
1650 goto err_out;
1651 }
1652
5c3c48ac
JB		 1653 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1654 i40e_free_vfs(pf);
1655 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1656 goto out;
1657
1658 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1659 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1660 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1661 err = -EPERM;
1662 goto err_out;
1663 }
1664
96c8d073 1665 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1666 err = i40e_alloc_vfs(pf, num_vfs);
1667 if (err) {
1668 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1669 goto err_out;
1670 }
1671
1672out:
1673 return num_vfs;
1674
1675err_out:
1676 return err;
1677#endif
1678 return 0;
1679}
1680
1681/**
1682 * i40e_pci_sriov_configure
1683 * @pdev: pointer to a pci_dev structure
b40c82e6 1684 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1685 *
1686 * Enable or change the number of VFs. Called when the user updates the number
1687 * of VFs in sysfs.
1688 **/
1689int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1690{
1691 struct i40e_pf *pf = pci_get_drvdata(pdev);
f5a7b21b
JS		 1692 int ret = 0;
1693
1694 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
1695 dev_warn(&pdev->dev, "Unable to configure VFs, other operation is pending.\n");
1696 return -EAGAIN;
1697 }
5c3c48ac 1698
fc60861e
ASJ		 1699 if (num_vfs) {
1700 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1701 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1702 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
fc60861e 1703 }
f5a7b21b
JS		 1704 ret = i40e_pci_sriov_enable(pdev, num_vfs);
1705 goto sriov_configure_out;
fc60861e 1706 }
5c3c48ac 1707
c24817b6 1708 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1709 i40e_free_vfs(pf);
fc60861e 1710 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
ff424188 1711 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
9e5634df
MW		 1712 } else {
1713 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
f5a7b21b
JS		 1714 ret = -EINVAL;
1715 goto sriov_configure_out;
9e5634df 1716 }
f5a7b21b
JS		 1717sriov_configure_out:
1718 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
1719 return ret;
5c3c48ac
JB		 1720}
1721
1722/***********************virtual channel routines******************/
1723
1724/**
1725 * i40e_vc_send_msg_to_vf
b40c82e6 1726 * @vf: pointer to the VF info
5c3c48ac
JB		 1727 * @v_opcode: virtual channel opcode
1728 * @v_retval: virtual channel return value
1729 * @msg: pointer to the msg buffer
1730 * @msglen: msg length
1731 *
b40c82e6 1732 * send msg to VF
5c3c48ac
JB		 1733 **/
1734static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1735 u32 v_retval, u8 *msg, u16 msglen)
1736{
6e7b5bd3
ASJ		 1737 struct i40e_pf *pf;
1738 struct i40e_hw *hw;
1739 int abs_vf_id;
5c3c48ac
JB		 1740 i40e_status aq_ret;
1741
6e7b5bd3
ASJ		 1742 /* validate the request */
1743 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1744 return -EINVAL;
1745
1746 pf = vf->pf;
1747 hw = &pf->hw;
1748 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1749
5c3c48ac
JB		 1750 /* single place to detect unsuccessful return values */
1751 if (v_retval) {
1752 vf->num_invalid_msgs++;
18b7af57
MW		 1753 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1754 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1755 if (vf->num_invalid_msgs >
1756 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1757 dev_err(&pf->pdev->dev,
1758 "Number of invalid messages exceeded for VF %d\n",
1759 vf->vf_id);
1760 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
6322e63c 1761 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
5c3c48ac
JB		 1762 }
1763 } else {
1764 vf->num_valid_msgs++;
5d38c93e
JW		 1765 /* reset the invalid counter, if a valid message is received. */
1766 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1767 }
1768
f19efbb5 1769 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1770 msg, msglen, NULL);
5c3c48ac 1771 if (aq_ret) {
18b7af57
MW		 1772 dev_info(&pf->pdev->dev,
1773 "Unable to send the message to VF %d aq_err %d\n",
1774 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1775 return -EIO;
1776 }
1777
1778 return 0;
1779}
1780
1781/**
1782 * i40e_vc_send_resp_to_vf
b40c82e6 1783 * @vf: pointer to the VF info
5c3c48ac
JB		 1784 * @opcode: operation code
1785 * @retval: return value
1786 *
b40c82e6 1787 * send resp msg to VF
5c3c48ac
JB		 1788 **/
1789static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
310a2ad9 1790 enum virtchnl_ops opcode,
5c3c48ac
JB		 1791 i40e_status retval)
1792{
1793 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1794}
1795
1796/**
1797 * i40e_vc_get_version_msg
b40c82e6 1798 * @vf: pointer to the VF info
f5254429 1799 * @msg: pointer to the msg buffer
5c3c48ac 1800 *
b40c82e6 1801 * called from the VF to request the API version used by the PF
5c3c48ac 1802 **/
f4ca1a22 1803static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1804{
310a2ad9
JB		 1805 struct virtchnl_version_info info = {
1806 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR
5c3c48ac
JB		 1807 };
1808
310a2ad9 1809 vf->vf_ver = *(struct virtchnl_version_info *)msg;
606a5488 1810 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
eedcfef8 1811 if (VF_IS_V10(&vf->vf_ver))
310a2ad9
JB		 1812 info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
1813 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
5c3c48ac 1814 I40E_SUCCESS, (u8 *)&info,
f0adc6e8 1815 sizeof(struct virtchnl_version_info));
5c3c48ac
JB		 1816}
1817
c4998aa3
AD		 1818/**
1819 * i40e_del_qch - delete all the additional VSIs created as a part of ADq
1820 * @vf: pointer to VF structure
1821 **/
1822static void i40e_del_qch(struct i40e_vf *vf)
1823{
1824 struct i40e_pf *pf = vf->pf;
1825 int i;
1826
1827 /* first element in the array belongs to primary VF VSI and we shouldn't
1828 * delete it. We should however delete the rest of the VSIs created
1829 */
1830 for (i = 1; i < vf->num_tc; i++) {
1831 if (vf->ch[i].vsi_idx) {
1832 i40e_vsi_release(pf->vsi[vf->ch[i].vsi_idx]);
1833 vf->ch[i].vsi_idx = 0;
1834 vf->ch[i].vsi_id = 0;
1835 }
1836 }
1837}
1838
5c3c48ac
JB		 1839/**
1840 * i40e_vc_get_vf_resources_msg
b40c82e6 1841 * @vf: pointer to the VF info
5c3c48ac 1842 * @msg: pointer to the msg buffer
5c3c48ac 1843 *
b40c82e6 1844 * called from the VF to request its resources
5c3c48ac 1845 **/
f4ca1a22 1846static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 1847{
310a2ad9 1848 struct virtchnl_vf_resource *vfres = NULL;
5c3c48ac
JB		 1849 struct i40e_pf *pf = vf->pf;
1850 i40e_status aq_ret = 0;
1851 struct i40e_vsi *vsi;
5c3c48ac 1852 int num_vsis = 1;
fae6cad1 1853 size_t len = 0;
5c3c48ac
JB		 1854 int ret;
1855
6322e63c 1856 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
5c3c48ac
JB		 1857 aq_ret = I40E_ERR_PARAM;
1858 goto err;
1859 }
1860
fae6cad1 1861 len = struct_size(vfres, vsi_res, num_vsis);
5c3c48ac
JB		 1862 vfres = kzalloc(len, GFP_KERNEL);
1863 if (!vfres) {
1864 aq_ret = I40E_ERR_NO_MEMORY;
1865 len = 0;
1866 goto err;
1867 }
eedcfef8 1868 if (VF_IS_V11(&vf->vf_ver))
f4ca1a22
MW		 1869 vf->driver_caps = *(u32 *)msg;
1870 else
310a2ad9
JB		 1871 vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
1872 VIRTCHNL_VF_OFFLOAD_RSS_REG |
1873 VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac 1874
fbb113f7 1875 vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1876 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1877 if (!vsi->info.pvid)
fbb113f7 1878 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6 1879
0ef2d5af 1880 if (i40e_vf_client_capable(pf, vf->vf_id) &&
310a2ad9 1881 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_IWARP)) {
fbb113f7 1882 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_IWARP;
6322e63c 1883 set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
41d0a4d0
AB		 1884 } else {
1885 clear_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
e3219ce6
ASJ		 1886 }
1887
310a2ad9 1888 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
fbb113f7 1889 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1890 } else {
d36e41dc 1891 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
310a2ad9 1892 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
fbb113f7 1893 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
c4e1868c 1894 else
fbb113f7 1895 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1896 }
1f012279 1897
d36e41dc 1898 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
310a2ad9 1899 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
fbb113f7 1900 vfres->vf_cap_flags |=
310a2ad9 1901 VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
3d0da5b7
ASJ		 1902 }
1903
310a2ad9 1904 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
fbb113f7 1905 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
bacd75cf 1906
d36e41dc 1907 if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
310a2ad9 1908 (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
fbb113f7 1909 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
bacd75cf 1910
310a2ad9 1911 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
14c5f5d2
SN		 1912 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1913 dev_err(&pf->pdev->dev,
1914 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1915 vf->vf_id);
db1a8f8e 1916 aq_ret = I40E_ERR_PARAM;
14c5f5d2
SN		 1917 goto err;
1918 }
fbb113f7 1919 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1920 }
1f012279 1921
d36e41dc 1922 if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
310a2ad9 1923 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
fbb113f7 1924 vfres->vf_cap_flags |=
310a2ad9 1925 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
f6d83d13
ASJ		 1926 }
1927
a3f5aa90
AB		 1928 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
1929 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
1930
c27eac48
AD		 1931 if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)
1932 vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ADQ;
1933
5c3c48ac
JB		 1934 vfres->num_vsis = num_vsis;
1935 vfres->num_queue_pairs = vf->num_queue_pairs;
1936 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1937 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1938 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1939
fdf0e0bf 1940 if (vf->lan_vsi_idx) {
442b25e4 1941 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
ff3f4cc2 1942 vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
442b25e4 1943 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1944 /* VFs only use TC 0 */
442b25e4 1945 vfres->vsi_res[0].qset_handle
f578f5f4 1946 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1947 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1948 vf->default_lan_addr.addr);
5c3c48ac 1949 }
6322e63c 1950 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac
JB		 1951
1952err:
b40c82e6 1953 /* send the response back to the VF */
310a2ad9 1954 ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
5c3c48ac
JB		 1955 aq_ret, (u8 *)vfres, len);
1956
1957 kfree(vfres);
1958 return ret;
1959}
1960
1961/**
1962 * i40e_vc_reset_vf_msg
b40c82e6 1963 * @vf: pointer to the VF info
5c3c48ac 1964 *
b40c82e6
JK		 1965 * called from the VF to reset itself,
1966 * unlike other virtchnl messages, PF driver
1967 * doesn't send the response back to the VF
5c3c48ac 1968 **/
fc18eaa0 1969static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1970{
6322e63c 1971 if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
fc18eaa0 1972 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1973}
1974
5676a8b9
ASJ		 1975/**
1976 * i40e_getnum_vf_vsi_vlan_filters
1977 * @vsi: pointer to the vsi
1978 *
1979 * called to get the number of VLANs offloaded on this VF
1980 **/
1981static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1982{
1983 struct i40e_mac_filter *f;
278e7d0b 1984 int num_vlans = 0, bkt;
5676a8b9 1985
278e7d0b 1986 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
5676a8b9
ASJ		 1987 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1988 num_vlans++;
1989 }
1990
1991 return num_vlans;
1992}
1993
5c3c48ac
JB		 1994/**
1995 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1996 * @vf: pointer to the VF info
5c3c48ac 1997 * @msg: pointer to the msg buffer
5c3c48ac 1998 *
b40c82e6
JK		 1999 * called from the VF to configure the promiscuous mode of
2000 * VF vsis
5c3c48ac 2001 **/
679b05c0 2002static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2003{
310a2ad9
JB		 2004 struct virtchnl_promisc_info *info =
2005 (struct virtchnl_promisc_info *)msg;
5c3c48ac 2006 struct i40e_pf *pf = vf->pf;
5676a8b9 2007 i40e_status aq_ret = 0;
5c3c48ac 2008 bool allmulti = false;
5676a8b9 2009 bool alluni = false;
5c3c48ac 2010
1e846827
HR		 2011 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
2012 aq_ret = I40E_ERR_PARAM;
2013 goto err_out;
2014 }
2015 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2016 dev_err(&pf->pdev->dev,
2017 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
2018 vf->vf_id);
2019
2020 /* Lie to the VF on purpose, because this is an error we can
2021 * ignore. Unprivileged VF is not a virtual channel error.
2022 */
2023 aq_ret = 0;
2024 goto err_out;
2025 }
0ce5233e 2026
d29e0d23
MS		 2027 if (info->flags > I40E_MAX_VF_PROMISC_FLAGS) {
2028 aq_ret = I40E_ERR_PARAM;
2029 goto err_out;
2030 }
2031
2032 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
2033 aq_ret = I40E_ERR_PARAM;
2034 goto err_out;
2035 }
2036
5676a8b9 2037 /* Multicast promiscuous handling*/
ff3f4cc2 2038 if (info->flags & FLAG_VF_MULTICAST_PROMISC)
5c3c48ac 2039 allmulti = true;
5676a8b9 2040
0ce5233e
MS		 2041 if (info->flags & FLAG_VF_UNICAST_PROMISC)
2042 alluni = true;
2043 aq_ret = i40e_config_vf_promiscuous_mode(vf, info->vsi_id, allmulti,
2044 alluni);
558e93c9
CZ		 2045 if (aq_ret)
2046 goto err_out;
2047
2048 if (allmulti) {
2049 if (!test_and_set_bit(I40E_VF_STATE_MC_PROMISC,
2050 &vf->vf_states))
0ce5233e
MS		 2051 dev_info(&pf->pdev->dev,
2052 "VF %d successfully set multicast promiscuous mode\n",
2053 vf->vf_id);
558e93c9
CZ		 2054 } else if (test_and_clear_bit(I40E_VF_STATE_MC_PROMISC,
2055 &vf->vf_states))
2056 dev_info(&pf->pdev->dev,
2057 "VF %d successfully unset multicast promiscuous mode\n",
2058 vf->vf_id);
2059
2060 if (alluni) {
2061 if (!test_and_set_bit(I40E_VF_STATE_UC_PROMISC,
2062 &vf->vf_states))
0ce5233e
MS		 2063 dev_info(&pf->pdev->dev,
2064 "VF %d successfully set unicast promiscuous mode\n",
2065 vf->vf_id);
558e93c9
CZ		 2066 } else if (test_and_clear_bit(I40E_VF_STATE_UC_PROMISC,
2067 &vf->vf_states))
2068 dev_info(&pf->pdev->dev,
2069 "VF %d successfully unset unicast promiscuous mode\n",
2070 vf->vf_id);
2071
1e846827 2072err_out:
b40c82e6 2073 /* send the response to the VF */
5c3c48ac 2074 return i40e_vc_send_resp_to_vf(vf,
310a2ad9 2075 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
5c3c48ac
JB		 2076 aq_ret);
2077}
2078
2079/**
2080 * i40e_vc_config_queues_msg
b40c82e6 2081 * @vf: pointer to the VF info
5c3c48ac 2082 * @msg: pointer to the msg buffer
5c3c48ac 2083 *
b40c82e6 2084 * called from the VF to configure the rx/tx
5c3c48ac
JB		 2085 * queues
2086 **/
679b05c0 2087static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2088{
310a2ad9
JB		 2089 struct virtchnl_vsi_queue_config_info *qci =
2090 (struct virtchnl_vsi_queue_config_info *)msg;
2091 struct virtchnl_queue_pair_info *qpi;
5f5e33b6 2092 struct i40e_pf *pf = vf->pf;
c27eac48 2093 u16 vsi_id, vsi_queue_id = 0;
d29e0d23 2094 u16 num_qps_all = 0;
5c3c48ac 2095 i40e_status aq_ret = 0;
c27eac48
AD		 2096 int i, j = 0, idx = 0;
2097
6322e63c 2098 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2099 aq_ret = I40E_ERR_PARAM;
2100 goto error_param;
2101 }
2102
d29e0d23 2103 if (!i40e_vc_isvalid_vsi_id(vf, qci->vsi_id)) {
5c3c48ac
JB		 2104 aq_ret = I40E_ERR_PARAM;
2105 goto error_param;
2106 }
c27eac48 2107
3f8af412
SN		 2108 if (qci->num_queue_pairs > I40E_MAX_VF_QUEUES) {
2109 aq_ret = I40E_ERR_PARAM;
2110 goto error_param;
2111 }
2112
d29e0d23
MS		 2113 if (vf->adq_enabled) {
2114 for (i = 0; i < I40E_MAX_VF_VSI; i++)
2115 num_qps_all += vf->ch[i].num_qps;
2116 if (num_qps_all != qci->num_queue_pairs) {
2117 aq_ret = I40E_ERR_PARAM;
2118 goto error_param;
2119 }
2120 }
2121
2122 vsi_id = qci->vsi_id;
2123
5c3c48ac
JB		 2124 for (i = 0; i < qci->num_queue_pairs; i++) {
2125 qpi = &qci->qpair[i];
c27eac48
AD		 2126
2127 if (!vf->adq_enabled) {
d29e0d23
MS		 2128 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
2129 qpi->txq.queue_id)) {
2130 aq_ret = I40E_ERR_PARAM;
2131 goto error_param;
2132 }
2133
c27eac48
AD		 2134 vsi_queue_id = qpi->txq.queue_id;
2135
2136 if (qpi->txq.vsi_id != qci->vsi_id ||
2137 qpi->rxq.vsi_id != qci->vsi_id ||
2138 qpi->rxq.queue_id != vsi_queue_id) {
2139 aq_ret = I40E_ERR_PARAM;
2140 goto error_param;
2141 }
2142 }
2143
f5a2b3ff
PK		 2144 if (vf->adq_enabled) {
2145 if (idx >= ARRAY_SIZE(vf->ch)) {
2146 aq_ret = I40E_ERR_NO_AVAILABLE_VSI;
2147 goto error_param;
2148 }
d29e0d23 2149 vsi_id = vf->ch[idx].vsi_id;
f5a2b3ff 2150 }
5c3c48ac
JB		 2151
2152 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
2153 &qpi->rxq) ||
2154 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
2155 &qpi->txq)) {
2156 aq_ret = I40E_ERR_PARAM;
2157 goto error_param;
2158 }
c27eac48
AD		 2159
2160 /* For ADq there can be up to 4 VSIs with max 4 queues each.
2161 * VF does not know about these additional VSIs and all
2162 * it cares is about its own queues. PF configures these queues
2163 * to its appropriate VSIs based on TC mapping
6db60322 2164 */
c27eac48 2165 if (vf->adq_enabled) {
f5a2b3ff
PK		 2166 if (idx >= ARRAY_SIZE(vf->ch)) {
2167 aq_ret = I40E_ERR_NO_AVAILABLE_VSI;
2168 goto error_param;
2169 }
c27eac48
AD		 2170 if (j == (vf->ch[idx].num_qps - 1)) {
2171 idx++;
2172 j = 0; /* resetting the queue count */
2173 vsi_queue_id = 0;
2174 } else {
2175 j++;
2176 vsi_queue_id++;
2177 }
c27eac48 2178 }
5c3c48ac 2179 }
b40c82e6 2180 /* set vsi num_queue_pairs in use to num configured by VF */
c27eac48
AD		 2181 if (!vf->adq_enabled) {
2182 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs =
2183 qci->num_queue_pairs;
2184 } else {
2185 for (i = 0; i < vf->num_tc; i++)
2186 pf->vsi[vf->ch[i].vsi_idx]->num_queue_pairs =
2187 vf->ch[i].num_qps;
2188 }
5c3c48ac
JB		 2189
2190error_param:
b40c82e6 2191 /* send the response to the VF */
310a2ad9 2192 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
5c3c48ac
JB		 2193 aq_ret);
2194}
2195
c27eac48
AD		 2196/**
2197 * i40e_validate_queue_map
2198 * @vsi_id: vsi id
2199 * @queuemap: Tx or Rx queue map
2200 *
2201 * check if Tx or Rx queue map is valid
2202 **/
2203static int i40e_validate_queue_map(struct i40e_vf *vf, u16 vsi_id,
2204 unsigned long queuemap)
2205{
2206 u16 vsi_queue_id, queue_id;
2207
2208 for_each_set_bit(vsi_queue_id, &queuemap, I40E_MAX_VSI_QP) {
2209 if (vf->adq_enabled) {
2210 vsi_id = vf->ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;
2211 queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);
2212 } else {
2213 queue_id = vsi_queue_id;
2214 }
2215
2216 if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id))
2217 return -EINVAL;
2218 }
2219
2220 return 0;
2221}
2222
5c3c48ac
JB		 2223/**
2224 * i40e_vc_config_irq_map_msg
b40c82e6 2225 * @vf: pointer to the VF info
5c3c48ac 2226 * @msg: pointer to the msg buffer
5c3c48ac 2227 *
b40c82e6 2228 * called from the VF to configure the irq to
5c3c48ac
JB		 2229 * queue map
2230 **/
679b05c0 2231static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2232{
310a2ad9
JB		 2233 struct virtchnl_irq_map_info *irqmap_info =
2234 (struct virtchnl_irq_map_info *)msg;
2235 struct virtchnl_vector_map *map;
d29e0d23 2236 u16 vsi_id;
5c3c48ac 2237 i40e_status aq_ret = 0;
5c3c48ac
JB		 2238 int i;
2239
6322e63c 2240 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2241 aq_ret = I40E_ERR_PARAM;
2242 goto error_param;
2243 }
2244
d29e0d23
MS		 2245 if (irqmap_info->num_vectors >
2246 vf->pf->hw.func_caps.num_msix_vectors_vf) {
2247 aq_ret = I40E_ERR_PARAM;
2248 goto error_param;
2249 }
2250
5c3c48ac
JB		 2251 for (i = 0; i < irqmap_info->num_vectors; i++) {
2252 map = &irqmap_info->vecmap[i];
5c3c48ac 2253 /* validate msg params */
d29e0d23
MS		 2254 if (!i40e_vc_isvalid_vector_id(vf, map->vector_id) ||
2255 !i40e_vc_isvalid_vsi_id(vf, map->vsi_id)) {
5c3c48ac
JB		 2256 aq_ret = I40E_ERR_PARAM;
2257 goto error_param;
2258 }
d29e0d23 2259 vsi_id = map->vsi_id;
5c3c48ac 2260
c27eac48
AD		 2261 if (i40e_validate_queue_map(vf, vsi_id, map->rxq_map)) {
2262 aq_ret = I40E_ERR_PARAM;
2263 goto error_param;
5c3c48ac
JB		 2264 }
2265
c27eac48
AD		 2266 if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) {
2267 aq_ret = I40E_ERR_PARAM;
2268 goto error_param;
5c3c48ac
JB		 2269 }
2270
2271 i40e_config_irq_link_list(vf, vsi_id, map);
2272 }
2273error_param:
b40c82e6 2274 /* send the response to the VF */
310a2ad9 2275 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
5c3c48ac
JB		 2276 aq_ret);
2277}
2278
d0fda04d
HR		 2279/**
2280 * i40e_ctrl_vf_tx_rings
2281 * @vsi: the SRIOV VSI being configured
2282 * @q_map: bit map of the queues to be enabled
2283 * @enable: start or stop the queue
2284 **/
2285static int i40e_ctrl_vf_tx_rings(struct i40e_vsi *vsi, unsigned long q_map,
2286 bool enable)
2287{
2288 struct i40e_pf *pf = vsi->back;
2289 int ret = 0;
2290 u16 q_id;
2291
2292 for_each_set_bit(q_id, &q_map, I40E_MAX_VF_QUEUES) {
2293 ret = i40e_control_wait_tx_q(vsi->seid, pf,
2294 vsi->base_queue + q_id,
2295 false /*is xdp*/, enable);
2296 if (ret)
2297 break;
2298 }
2299 return ret;
2300}
2301
2302/**
2303 * i40e_ctrl_vf_rx_rings
2304 * @vsi: the SRIOV VSI being configured
2305 * @q_map: bit map of the queues to be enabled
2306 * @enable: start or stop the queue
2307 **/
2308static int i40e_ctrl_vf_rx_rings(struct i40e_vsi *vsi, unsigned long q_map,
2309 bool enable)
2310{
2311 struct i40e_pf *pf = vsi->back;
2312 int ret = 0;
2313 u16 q_id;
2314
2315 for_each_set_bit(q_id, &q_map, I40E_MAX_VF_QUEUES) {
2316 ret = i40e_control_wait_rx_q(pf, vsi->base_queue + q_id,
2317 enable);
2318 if (ret)
2319 break;
2320 }
2321 return ret;
2322}
2323
5c3c48ac
JB		 2324/**
2325 * i40e_vc_enable_queues_msg
b40c82e6 2326 * @vf: pointer to the VF info
5c3c48ac 2327 * @msg: pointer to the msg buffer
5c3c48ac 2328 *
b40c82e6 2329 * called from the VF to enable all or specific queue(s)
5c3c48ac 2330 **/
679b05c0 2331static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2332{
310a2ad9
JB		 2333 struct virtchnl_queue_select *vqs =
2334 (struct virtchnl_queue_select *)msg;
5c3c48ac 2335 struct i40e_pf *pf = vf->pf;
5c3c48ac 2336 i40e_status aq_ret = 0;
c27eac48 2337 int i;
5c3c48ac 2338
6322e63c 2339 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2340 aq_ret = I40E_ERR_PARAM;
2341 goto error_param;
2342 }
2343
d510497b 2344 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
5c3c48ac
JB		 2345 aq_ret = I40E_ERR_PARAM;
2346 goto error_param;
2347 }
2348
2349 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
2350 aq_ret = I40E_ERR_PARAM;
2351 goto error_param;
2352 }
fdf0e0bf 2353
d0fda04d
HR		 2354 /* Use the queue bit map sent by the VF */
2355 if (i40e_ctrl_vf_rx_rings(pf->vsi[vf->lan_vsi_idx], vqs->rx_queues,
2356 true)) {
88f6563d 2357 aq_ret = I40E_ERR_TIMEOUT;
d0fda04d
HR		 2358 goto error_param;
2359 }
2360 if (i40e_ctrl_vf_tx_rings(pf->vsi[vf->lan_vsi_idx], vqs->tx_queues,
2361 true)) {
2362 aq_ret = I40E_ERR_TIMEOUT;
2363 goto error_param;
2364 }
c27eac48
AD		 2365
2366 /* need to start the rings for additional ADq VSI's as well */
2367 if (vf->adq_enabled) {
2368 /* zero belongs to LAN VSI */
2369 for (i = 1; i < vf->num_tc; i++) {
2370 if (i40e_vsi_start_rings(pf->vsi[vf->ch[i].vsi_idx]))
2371 aq_ret = I40E_ERR_TIMEOUT;
2372 }
2373 }
2374
2ad1274f
JK		 2375 vf->queues_enabled = true;
2376
5c3c48ac 2377error_param:
b40c82e6 2378 /* send the response to the VF */
310a2ad9 2379 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
5c3c48ac
JB		 2380 aq_ret);
2381}
2382
2383/**
2384 * i40e_vc_disable_queues_msg
b40c82e6 2385 * @vf: pointer to the VF info
5c3c48ac 2386 * @msg: pointer to the msg buffer
5c3c48ac 2387 *
b40c82e6 2388 * called from the VF to disable all or specific
5c3c48ac
JB		 2389 * queue(s)
2390 **/
679b05c0 2391static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2392{
310a2ad9
JB		 2393 struct virtchnl_queue_select *vqs =
2394 (struct virtchnl_queue_select *)msg;
5c3c48ac 2395 struct i40e_pf *pf = vf->pf;
5c3c48ac 2396 i40e_status aq_ret = 0;
5c3c48ac 2397
2ad1274f
JK		 2398 /* Immediately mark queues as disabled */
2399 vf->queues_enabled = false;
2400
6322e63c 2401 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2402 aq_ret = I40E_ERR_PARAM;
2403 goto error_param;
2404 }
2405
2406 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2407 aq_ret = I40E_ERR_PARAM;
2408 goto error_param;
2409 }
2410
d29e0d23
MS		 2411 if ((vqs->rx_queues == 0 && vqs->tx_queues == 0) ||
2412 vqs->rx_queues > I40E_MAX_VF_QUEUES ||
2413 vqs->tx_queues > I40E_MAX_VF_QUEUES) {
5c3c48ac
JB		 2414 aq_ret = I40E_ERR_PARAM;
2415 goto error_param;
2416 }
fdf0e0bf 2417
d0fda04d
HR		 2418 /* Use the queue bit map sent by the VF */
2419 if (i40e_ctrl_vf_tx_rings(pf->vsi[vf->lan_vsi_idx], vqs->tx_queues,
2420 false)) {
2421 aq_ret = I40E_ERR_TIMEOUT;
2422 goto error_param;
2423 }
2424 if (i40e_ctrl_vf_rx_rings(pf->vsi[vf->lan_vsi_idx], vqs->rx_queues,
2425 false)) {
2426 aq_ret = I40E_ERR_TIMEOUT;
2427 goto error_param;
2428 }
5c3c48ac 2429error_param:
b40c82e6 2430 /* send the response to the VF */
310a2ad9 2431 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
5c3c48ac
JB		 2432 aq_ret);
2433}
2434
a3f5aa90
AB		 2435/**
2436 * i40e_vc_request_queues_msg
2437 * @vf: pointer to the VF info
2438 * @msg: pointer to the msg buffer
a3f5aa90
AB		 2439 *
2440 * VFs get a default number of queues but can use this message to request a
17a9422d
AB		 2441 * different number. If the request is successful, PF will reset the VF and
2442 * return 0. If unsuccessful, PF will send message informing VF of number of
2443 * available queues and return result of sending VF a message.
a3f5aa90 2444 **/
679b05c0 2445static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg)
a3f5aa90
AB		 2446{
2447 struct virtchnl_vf_res_request *vfres =
2448 (struct virtchnl_vf_res_request *)msg;
d510497b
SN		 2449 u16 req_pairs = vfres->num_queue_pairs;
2450 u8 cur_pairs = vf->num_queue_pairs;
a3f5aa90
AB		 2451 struct i40e_pf *pf = vf->pf;
2452
2453 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
2454 return -EINVAL;
2455
d510497b 2456 if (req_pairs > I40E_MAX_VF_QUEUES) {
a3f5aa90
AB		 2457 dev_err(&pf->pdev->dev,
2458 "VF %d tried to request more than %d queues.\n",
2459 vf->vf_id,
2460 I40E_MAX_VF_QUEUES);
2461 vfres->num_queue_pairs = I40E_MAX_VF_QUEUES;
2462 } else if (req_pairs - cur_pairs > pf->queues_left) {
2463 dev_warn(&pf->pdev->dev,
2464 "VF %d requested %d more queues, but only %d left.\n",
2465 vf->vf_id,
2466 req_pairs - cur_pairs,
2467 pf->queues_left);
2468 vfres->num_queue_pairs = pf->queues_left + cur_pairs;
2469 } else {
17a9422d 2470 /* successful request */
a3f5aa90 2471 vf->num_req_queues = req_pairs;
17a9422d
AB		 2472 i40e_vc_notify_vf_reset(vf);
2473 i40e_reset_vf(vf, false);
2474 return 0;
a3f5aa90
AB		 2475 }
2476
2477 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
c30bf8ce 2478 (u8 *)vfres, sizeof(*vfres));
a3f5aa90
AB		 2479}
2480
5c3c48ac
JB		 2481/**
2482 * i40e_vc_get_stats_msg
b40c82e6 2483 * @vf: pointer to the VF info
5c3c48ac 2484 * @msg: pointer to the msg buffer
5c3c48ac 2485 *
b40c82e6 2486 * called from the VF to get vsi stats
5c3c48ac 2487 **/
679b05c0 2488static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2489{
310a2ad9
JB		 2490 struct virtchnl_queue_select *vqs =
2491 (struct virtchnl_queue_select *)msg;
5c3c48ac
JB		 2492 struct i40e_pf *pf = vf->pf;
2493 struct i40e_eth_stats stats;
2494 i40e_status aq_ret = 0;
2495 struct i40e_vsi *vsi;
2496
2497 memset(&stats, 0, sizeof(struct i40e_eth_stats));
2498
6322e63c 2499 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2500 aq_ret = I40E_ERR_PARAM;
2501 goto error_param;
2502 }
2503
2504 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2505 aq_ret = I40E_ERR_PARAM;
2506 goto error_param;
2507 }
2508
fdf0e0bf 2509 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2510 if (!vsi) {
2511 aq_ret = I40E_ERR_PARAM;
2512 goto error_param;
2513 }
2514 i40e_update_eth_stats(vsi);
5a9769c8 2515 stats = vsi->eth_stats;
5c3c48ac
JB		 2516
2517error_param:
b40c82e6 2518 /* send the response back to the VF */
310a2ad9 2519 return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS, aq_ret,
5c3c48ac
JB		 2520 (u8 *)&stats, sizeof(stats));
2521}
2522
06b6e2a2
AL		 2523/* If the VF is not trusted restrict the number of MAC/VLAN it can program
2524 * MAC filters: 16 for multicast, 1 for MAC, 1 for broadcast
2525 */
2526#define I40E_VC_MAX_MAC_ADDR_PER_VF (16 + 1 + 1)
51110f16 2527#define I40E_VC_MAX_VLAN_PER_VF 16
5f527ba9 2528
f657a6e1
GR		 2529/**
2530 * i40e_check_vf_permission
b40c82e6 2531 * @vf: pointer to the VF info
03ce7b1d 2532 * @al: MAC address list from virtchnl
f657a6e1 2533 *
03ce7b1d
FS		 2534 * Check that the given list of MAC addresses is allowed. Will return -EPERM
2535 * if any address in the list is not valid. Checks the following conditions:
2536 *
2537 * 1) broadcast and zero addresses are never valid
2538 * 2) unicast addresses are not allowed if the VMM has administratively set
2539 * the VF MAC address, unless the VF is marked as privileged.
2540 * 3) There is enough space to add all the addresses.
2541 *
2542 * Note that to guarantee consistency, it is expected this function be called
2543 * while holding the mac_filter_hash_lock, as otherwise the current number of
2544 * addresses might not be accurate.
f657a6e1 2545 **/
03ce7b1d
FS		 2546static inline int i40e_check_vf_permission(struct i40e_vf *vf,
2547 struct virtchnl_ether_addr_list *al)
f657a6e1
GR		 2548{
2549 struct i40e_pf *pf = vf->pf;
621650ca
AL		 2550 struct i40e_vsi *vsi = pf->vsi[vf->lan_vsi_idx];
2551 int mac2add_cnt = 0;
03ce7b1d
FS		 2552 int i;
2553
03ce7b1d 2554 for (i = 0; i < al->num_elements; i++) {
621650ca 2555 struct i40e_mac_filter *f;
03ce7b1d
FS		 2556 u8 *addr = al->list[i].addr;
2557
2558 if (is_broadcast_ether_addr(addr) ||
2559 is_zero_ether_addr(addr)) {
2560 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n",
2561 addr);
2562 return I40E_ERR_INVALID_MAC_ADDR;
2563 }
f657a6e1 2564
f657a6e1
GR		 2565 /* If the host VMM administrator has set the VF MAC address
2566 * administratively via the ndo_set_vf_mac command then deny
2567 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 2568 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 2569 * The VF may request to set the MAC address filter already
2570 * assigned to it so do not return an error in that case.
f657a6e1 2571 */
03ce7b1d
FS		 2572 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
2573 !is_multicast_ether_addr(addr) && vf->pf_set_mac &&
2574 !ether_addr_equal(addr, vf->default_lan_addr.addr)) {
2575 dev_err(&pf->pdev->dev,
ae1e29f6 2576 "VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");
03ce7b1d
FS		 2577 return -EPERM;
2578 }
621650ca
AL		 2579
2580 /*count filters that really will be added*/
2581 f = i40e_find_mac(vsi, addr);
2582 if (!f)
2583 ++mac2add_cnt;
f657a6e1 2584 }
03ce7b1d 2585
621650ca
AL		 2586 /* If this VF is not privileged, then we can't add more than a limited
2587 * number of addresses. Check to make sure that the additions do not
2588 * push us over the limit.
2589 */
2590 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
2591 (i40e_count_filters(vsi) + mac2add_cnt) >
2592 I40E_VC_MAX_MAC_ADDR_PER_VF) {
2593 dev_err(&pf->pdev->dev,
2594 "Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");
2595 return -EPERM;
2596 }
03ce7b1d 2597 return 0;
f657a6e1
GR		 2598}
2599
5c3c48ac
JB		 2600/**
2601 * i40e_vc_add_mac_addr_msg
b40c82e6 2602 * @vf: pointer to the VF info
5c3c48ac 2603 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2604 *
2605 * add guest mac address filter
2606 **/
679b05c0 2607static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2608{
310a2ad9
JB		 2609 struct virtchnl_ether_addr_list *al =
2610 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2611 struct i40e_pf *pf = vf->pf;
2612 struct i40e_vsi *vsi = NULL;
f657a6e1 2613 i40e_status ret = 0;
5c3c48ac
JB		 2614 int i;
2615
6322e63c 2616 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2617 !i40e_vc_isvalid_vsi_id(vf, al->vsi_id)) {
f657a6e1 2618 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2619 goto error_param;
2620 }
2621
fdf0e0bf 2622 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2623
21659035
KP		 2624 /* Lock once, because all function inside for loop accesses VSI's
2625 * MAC filter list which needs to be protected using same lock.
2626 */
278e7d0b 2627 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2628
03ce7b1d
FS		 2629 ret = i40e_check_vf_permission(vf, al);
2630 if (ret) {
2631 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2632 goto error_param;
2633 }
2634
5c3c48ac
JB		 2635 /* add new addresses to the list */
2636 for (i = 0; i < al->num_elements; i++) {
2637 struct i40e_mac_filter *f;
2638
1bc87e80 2639 f = i40e_find_mac(vsi, al->list[i].addr);
34c164de 2640 if (!f) {
feffdbe4 2641 f = i40e_add_mac_filter(vsi, al->list[i].addr);
5c3c48ac 2642
34c164de
ZP		 2643 if (!f) {
2644 dev_err(&pf->pdev->dev,
2645 "Unable to add MAC filter %pM for VF %d\n",
2646 al->list[i].addr, vf->vf_id);
2647 ret = I40E_ERR_PARAM;
2648 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2649 goto error_param;
34c164de 2650 }
5c3c48ac
JB		 2651 }
2652 }
278e7d0b 2653 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2654
2655 /* program the updated filter list */
ea02e90b
MW		 2656 ret = i40e_sync_vsi_filters(vsi);
2657 if (ret)
2658 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2659 vf->vf_id, ret);
5c3c48ac
JB		 2660
2661error_param:
b40c82e6 2662 /* send the response to the VF */
310a2ad9 2663 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
f657a6e1 2664 ret);
5c3c48ac
JB		 2665}
2666
2667/**
2668 * i40e_vc_del_mac_addr_msg
b40c82e6 2669 * @vf: pointer to the VF info
5c3c48ac 2670 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2671 *
2672 * remove guest mac address filter
2673 **/
679b05c0 2674static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2675{
310a2ad9
JB		 2676 struct virtchnl_ether_addr_list *al =
2677 (struct virtchnl_ether_addr_list *)msg;
5c3c48ac
JB		 2678 struct i40e_pf *pf = vf->pf;
2679 struct i40e_vsi *vsi = NULL;
f657a6e1 2680 i40e_status ret = 0;
5c3c48ac
JB		 2681 int i;
2682
6322e63c 2683 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2684 !i40e_vc_isvalid_vsi_id(vf, al->vsi_id)) {
f657a6e1 2685 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2686 goto error_param;
2687 }
f657a6e1
GR		 2688
2689 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 2690 if (is_broadcast_ether_addr(al->list[i].addr) ||
2691 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 2692 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
2693 al->list[i].addr, vf->vf_id);
700bbf6c 2694 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 2695 goto error_param;
700bbf6c 2696 }
f657a6e1 2697 }
fdf0e0bf 2698 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2699
278e7d0b 2700 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2701 /* delete addresses from the list */
2702 for (i = 0; i < al->num_elements; i++)
feffdbe4 2703 if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
b36e9ab5 2704 ret = I40E_ERR_INVALID_MAC_ADDR;
278e7d0b 2705 spin_unlock_bh(&vsi->mac_filter_hash_lock);
b36e9ab5
MW		 2706 goto error_param;
2707 }
2708
278e7d0b 2709 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2710
2711 /* program the updated filter list */
ea02e90b
MW		 2712 ret = i40e_sync_vsi_filters(vsi);
2713 if (ret)
2714 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2715 vf->vf_id, ret);
5c3c48ac
JB		 2716
2717error_param:
b40c82e6 2718 /* send the response to the VF */
310a2ad9 2719 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
f657a6e1 2720 ret);
5c3c48ac
JB		 2721}
2722
2723/**
2724 * i40e_vc_add_vlan_msg
b40c82e6 2725 * @vf: pointer to the VF info
5c3c48ac 2726 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2727 *
2728 * program guest vlan id
2729 **/
679b05c0 2730static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2731{
310a2ad9
JB		 2732 struct virtchnl_vlan_filter_list *vfl =
2733 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2734 struct i40e_pf *pf = vf->pf;
2735 struct i40e_vsi *vsi = NULL;
5c3c48ac
JB		 2736 i40e_status aq_ret = 0;
2737 int i;
2738
5f527ba9
ASJ		 2739 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2740 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2741 dev_err(&pf->pdev->dev,
2742 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2743 goto error_param;
2744 }
6322e63c 2745 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2746 !i40e_vc_isvalid_vsi_id(vf, vfl->vsi_id)) {
5c3c48ac
JB		 2747 aq_ret = I40E_ERR_PARAM;
2748 goto error_param;
2749 }
2750
2751 for (i = 0; i < vfl->num_elements; i++) {
2752 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2753 aq_ret = I40E_ERR_PARAM;
2754 dev_err(&pf->pdev->dev,
2755 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2756 goto error_param;
2757 }
2758 }
fdf0e0bf 2759 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2760 if (vsi->info.pvid) {
2761 aq_ret = I40E_ERR_PARAM;
2762 goto error_param;
2763 }
2764
2765 i40e_vlan_stripping_enable(vsi);
2766 for (i = 0; i < vfl->num_elements; i++) {
2767 /* add new VLAN filter */
2768 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2769 if (!ret)
2770 vf->num_vlan++;
6995b36c 2771
6322e63c 2772 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2773 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2774 true,
2775 vfl->vlan_id[i],
2776 NULL);
6322e63c 2777 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2778 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2779 true,
2780 vfl->vlan_id[i],
2781 NULL);
2782
5c3c48ac
JB		 2783 if (ret)
2784 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2785 "Unable to add VLAN filter %d for VF %d, error %d\n",
2786 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2787 }
2788
2789error_param:
b40c82e6 2790 /* send the response to the VF */
310a2ad9 2791 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_VLAN, aq_ret);
5c3c48ac
JB		 2792}
2793
2794/**
2795 * i40e_vc_remove_vlan_msg
b40c82e6 2796 * @vf: pointer to the VF info
5c3c48ac 2797 * @msg: pointer to the msg buffer
5c3c48ac
JB		 2798 *
2799 * remove programmed guest vlan id
2800 **/
679b05c0 2801static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac 2802{
310a2ad9
JB		 2803 struct virtchnl_vlan_filter_list *vfl =
2804 (struct virtchnl_vlan_filter_list *)msg;
5c3c48ac
JB		 2805 struct i40e_pf *pf = vf->pf;
2806 struct i40e_vsi *vsi = NULL;
5c3c48ac
JB		 2807 i40e_status aq_ret = 0;
2808 int i;
2809
6322e63c 2810 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2811 !i40e_vc_isvalid_vsi_id(vf, vfl->vsi_id)) {
5c3c48ac
JB		 2812 aq_ret = I40E_ERR_PARAM;
2813 goto error_param;
2814 }
2815
2816 for (i = 0; i < vfl->num_elements; i++) {
2817 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2818 aq_ret = I40E_ERR_PARAM;
2819 goto error_param;
2820 }
2821 }
2822
fdf0e0bf 2823 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2824 if (vsi->info.pvid) {
5a189f15
AL		 2825 if (vfl->num_elements > 1 || vfl->vlan_id[0])
2826 aq_ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2827 goto error_param;
2828 }
2829
2830 for (i = 0; i < vfl->num_elements; i++) {
3aa7b74d
FS		 2831 i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
2832 vf->num_vlan--;
6995b36c 2833
6322e63c 2834 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2835 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2836 false,
2837 vfl->vlan_id[i],
2838 NULL);
6322e63c 2839 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2840 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2841 false,
2842 vfl->vlan_id[i],
2843 NULL);
5c3c48ac
JB		 2844 }
2845
2846error_param:
b40c82e6 2847 /* send the response to the VF */
310a2ad9 2848 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_VLAN, aq_ret);
5c3c48ac
JB		 2849}
2850
e3219ce6
ASJ		 2851/**
2852 * i40e_vc_iwarp_msg
2853 * @vf: pointer to the VF info
2854 * @msg: pointer to the msg buffer
2855 * @msglen: msg length
2856 *
2857 * called from the VF for the iwarp msgs
2858 **/
2859static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2860{
2861 struct i40e_pf *pf = vf->pf;
2862 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2863 i40e_status aq_ret = 0;
2864
6322e63c
JK		 2865 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2866 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2867 aq_ret = I40E_ERR_PARAM;
2868 goto error_param;
2869 }
2870
2871 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2872 msg, msglen);
2873
2874error_param:
2875 /* send the response to the VF */
310a2ad9 2876 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_IWARP,
e3219ce6
ASJ		 2877 aq_ret);
2878}
2879
2880/**
2881 * i40e_vc_iwarp_qvmap_msg
2882 * @vf: pointer to the VF info
2883 * @msg: pointer to the msg buffer
e3219ce6
ASJ		 2884 * @config: config qvmap or release it
2885 *
2886 * called from the VF for the iwarp msgs
2887 **/
679b05c0 2888static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, bool config)
e3219ce6 2889{
310a2ad9
JB		 2890 struct virtchnl_iwarp_qvlist_info *qvlist_info =
2891 (struct virtchnl_iwarp_qvlist_info *)msg;
e3219ce6
ASJ		 2892 i40e_status aq_ret = 0;
2893
6322e63c
JK		 2894 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2895 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2896 aq_ret = I40E_ERR_PARAM;
2897 goto error_param;
2898 }
2899
2900 if (config) {
2901 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2902 aq_ret = I40E_ERR_PARAM;
2903 } else {
2904 i40e_release_iwarp_qvlist(vf);
2905 }
2906
2907error_param:
2908 /* send the response to the VF */
2909 return i40e_vc_send_resp_to_vf(vf,
310a2ad9
JB		 2910 config ? VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
2911 VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
e3219ce6
ASJ		 2912 aq_ret);
2913}
2914
c4e1868c
MW		 2915/**
2916 * i40e_vc_config_rss_key
2917 * @vf: pointer to the VF info
2918 * @msg: pointer to the msg buffer
c4e1868c
MW		 2919 *
2920 * Configure the VF's RSS key
2921 **/
679b05c0 2922static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg)
c4e1868c 2923{
310a2ad9
JB		 2924 struct virtchnl_rss_key *vrk =
2925 (struct virtchnl_rss_key *)msg;
c4e1868c
MW		 2926 struct i40e_pf *pf = vf->pf;
2927 struct i40e_vsi *vsi = NULL;
c4e1868c
MW		 2928 i40e_status aq_ret = 0;
2929
6322e63c 2930 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2931 !i40e_vc_isvalid_vsi_id(vf, vrk->vsi_id) ||
c4e1868c
MW		 2932 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2933 aq_ret = I40E_ERR_PARAM;
2934 goto err;
2935 }
2936
2937 vsi = pf->vsi[vf->lan_vsi_idx];
2938 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2939err:
2940 /* send the response to the VF */
310a2ad9 2941 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
c4e1868c
MW		 2942 aq_ret);
2943}
2944
2945/**
2946 * i40e_vc_config_rss_lut
2947 * @vf: pointer to the VF info
2948 * @msg: pointer to the msg buffer
c4e1868c
MW		 2949 *
2950 * Configure the VF's RSS LUT
2951 **/
679b05c0 2952static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg)
c4e1868c 2953{
310a2ad9
JB		 2954 struct virtchnl_rss_lut *vrl =
2955 (struct virtchnl_rss_lut *)msg;
c4e1868c
MW		 2956 struct i40e_pf *pf = vf->pf;
2957 struct i40e_vsi *vsi = NULL;
c4e1868c 2958 i40e_status aq_ret = 0;
d510497b 2959 u16 i;
c4e1868c 2960
6322e63c 2961 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d510497b 2962 !i40e_vc_isvalid_vsi_id(vf, vrl->vsi_id) ||
c4e1868c
MW		 2963 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2964 aq_ret = I40E_ERR_PARAM;
2965 goto err;
2966 }
2967
d510497b
SN		 2968 for (i = 0; i < vrl->lut_entries; i++)
2969 if (vrl->lut[i] >= vf->num_queue_pairs) {
2970 aq_ret = I40E_ERR_PARAM;
2971 goto err;
2972 }
2973
c4e1868c
MW		 2974 vsi = pf->vsi[vf->lan_vsi_idx];
2975 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2976 /* send the response to the VF */
2977err:
310a2ad9 2978 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
c4e1868c
MW		 2979 aq_ret);
2980}
2981
2982/**
2983 * i40e_vc_get_rss_hena
2984 * @vf: pointer to the VF info
2985 * @msg: pointer to the msg buffer
c4e1868c
MW		 2986 *
2987 * Return the RSS HENA bits allowed by the hardware
2988 **/
679b05c0 2989static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg)
c4e1868c 2990{
310a2ad9 2991 struct virtchnl_rss_hena *vrh = NULL;
c4e1868c
MW		 2992 struct i40e_pf *pf = vf->pf;
2993 i40e_status aq_ret = 0;
2994 int len = 0;
2995
6322e63c 2996 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2997 aq_ret = I40E_ERR_PARAM;
2998 goto err;
2999 }
310a2ad9 3000 len = sizeof(struct virtchnl_rss_hena);
c4e1868c
MW		 3001
3002 vrh = kzalloc(len, GFP_KERNEL);
3003 if (!vrh) {
3004 aq_ret = I40E_ERR_NO_MEMORY;
3005 len = 0;
3006 goto err;
3007 }
3008 vrh->hena = i40e_pf_get_default_rss_hena(pf);
3009err:
3010 /* send the response back to the VF */
310a2ad9 3011 aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
c4e1868c 3012 aq_ret, (u8 *)vrh, len);
b7d2cd95 3013 kfree(vrh);
c4e1868c
MW		 3014 return aq_ret;
3015}
3016
3017/**
3018 * i40e_vc_set_rss_hena
3019 * @vf: pointer to the VF info
3020 * @msg: pointer to the msg buffer
c4e1868c
MW		 3021 *
3022 * Set the RSS HENA bits for the VF
3023 **/
679b05c0 3024static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg)
c4e1868c 3025{
310a2ad9
JB		 3026 struct virtchnl_rss_hena *vrh =
3027 (struct virtchnl_rss_hena *)msg;
c4e1868c
MW		 3028 struct i40e_pf *pf = vf->pf;
3029 struct i40e_hw *hw = &pf->hw;
3030 i40e_status aq_ret = 0;
3031
6322e63c 3032 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 3033 aq_ret = I40E_ERR_PARAM;
3034 goto err;
3035 }
3036 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
3037 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
3038 (u32)(vrh->hena >> 32));
3039
3040 /* send the response to the VF */
3041err:
f0adc6e8 3042 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);
c4e1868c
MW		 3043}
3044
8774370d
MS		 3045/**
3046 * i40e_vc_enable_vlan_stripping
3047 * @vf: pointer to the VF info
3048 * @msg: pointer to the msg buffer
8774370d
MS		 3049 *
3050 * Enable vlan header stripping for the VF
3051 **/
679b05c0 3052static int i40e_vc_enable_vlan_stripping(struct i40e_vf *vf, u8 *msg)
8774370d 3053{
8774370d 3054 i40e_status aq_ret = 0;
d510497b 3055 struct i40e_vsi *vsi;
8774370d
MS		 3056
3057 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3058 aq_ret = I40E_ERR_PARAM;
3059 goto err;
3060 }
3061
d510497b 3062 vsi = vf->pf->vsi[vf->lan_vsi_idx];
8774370d
MS		 3063 i40e_vlan_stripping_enable(vsi);
3064
3065 /* send the response to the VF */
3066err:
3067 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
3068 aq_ret);
3069}
3070
3071/**
3072 * i40e_vc_disable_vlan_stripping
3073 * @vf: pointer to the VF info
3074 * @msg: pointer to the msg buffer
8774370d
MS		 3075 *
3076 * Disable vlan header stripping for the VF
3077 **/
679b05c0 3078static int i40e_vc_disable_vlan_stripping(struct i40e_vf *vf, u8 *msg)
8774370d 3079{
8774370d 3080 i40e_status aq_ret = 0;
d510497b 3081 struct i40e_vsi *vsi;
8774370d
MS		 3082
3083 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3084 aq_ret = I40E_ERR_PARAM;
3085 goto err;
3086 }
3087
d510497b 3088 vsi = vf->pf->vsi[vf->lan_vsi_idx];
8774370d
MS		 3089 i40e_vlan_stripping_disable(vsi);
3090
3091 /* send the response to the VF */
3092err:
3093 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
3094 aq_ret);
3095}
3096
e284fc28
AD		 3097/**
3098 * i40e_validate_cloud_filter
3099 * @mask: mask for TC filter
3100 * @data: data for TC filter
3101 *
3102 * This function validates cloud filter programmed as TC filter for ADq
3103 **/
3104static int i40e_validate_cloud_filter(struct i40e_vf *vf,
3105 struct virtchnl_filter *tc_filter)
3106{
3107 struct virtchnl_l4_spec mask = tc_filter->mask.tcp_spec;
3108 struct virtchnl_l4_spec data = tc_filter->data.tcp_spec;
3109 struct i40e_pf *pf = vf->pf;
3110 struct i40e_vsi *vsi = NULL;
3111 struct i40e_mac_filter *f;
3112 struct hlist_node *h;
3113 bool found = false;
3114 int bkt;
3115
3116 if (!tc_filter->action) {
3117 dev_info(&pf->pdev->dev,
3118 "VF %d: Currently ADq doesn't support Drop Action\n",
3119 vf->vf_id);
3120 goto err;
3121 }
3122
3123 /* action_meta is TC number here to which the filter is applied */
3124 if (!tc_filter->action_meta ||
3125 tc_filter->action_meta > I40E_MAX_VF_VSI) {
3126 dev_info(&pf->pdev->dev, "VF %d: Invalid TC number %u\n",
3127 vf->vf_id, tc_filter->action_meta);
3128 goto err;
3129 }
3130
3131 /* Check filter if it's programmed for advanced mode or basic mode.
3132 * There are two ADq modes (for VF only),
3133 * 1. Basic mode: intended to allow as many filter options as possible
3134 * to be added to a VF in Non-trusted mode. Main goal is
3135 * to add filters to its own MAC and VLAN id.
3136 * 2. Advanced mode: is for allowing filters to be applied other than
3137 * its own MAC or VLAN. This mode requires the VF to be
3138 * Trusted.
3139 */
3140 if (mask.dst_mac[0] && !mask.dst_ip[0]) {
3141 vsi = pf->vsi[vf->lan_vsi_idx];
3142 f = i40e_find_mac(vsi, data.dst_mac);
3143
3144 if (!f) {
3145 dev_info(&pf->pdev->dev,
3146 "Destination MAC %pM doesn't belong to VF %d\n",
3147 data.dst_mac, vf->vf_id);
3148 goto err;
3149 }
3150
3151 if (mask.vlan_id) {
3152 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f,
3153 hlist) {
3154 if (f->vlan == ntohs(data.vlan_id)) {
3155 found = true;
3156 break;
3157 }
3158 }
3159 if (!found) {
3160 dev_info(&pf->pdev->dev,
3161 "VF %d doesn't have any VLAN id %u\n",
3162 vf->vf_id, ntohs(data.vlan_id));
3163 goto err;
3164 }
3165 }
3166 } else {
3167 /* Check if VF is trusted */
3168 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
3169 dev_err(&pf->pdev->dev,
3170 "VF %d not trusted, make VF trusted to add advanced mode ADq cloud filters\n",
3171 vf->vf_id);
3172 return I40E_ERR_CONFIG;
3173 }
3174 }
3175
3176 if (mask.dst_mac[0] & data.dst_mac[0]) {
3177 if (is_broadcast_ether_addr(data.dst_mac) ||
3178 is_zero_ether_addr(data.dst_mac)) {
3179 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest MAC addr %pM\n",
3180 vf->vf_id, data.dst_mac);
3181 goto err;
3182 }
3183 }
3184
3185 if (mask.src_mac[0] & data.src_mac[0]) {
3186 if (is_broadcast_ether_addr(data.src_mac) ||
3187 is_zero_ether_addr(data.src_mac)) {
3188 dev_info(&pf->pdev->dev, "VF %d: Invalid Source MAC addr %pM\n",
3189 vf->vf_id, data.src_mac);
3190 goto err;
3191 }
3192 }
3193
3194 if (mask.dst_port & data.dst_port) {
a01e5f22 3195 if (!data.dst_port) {
e284fc28
AD		 3196 dev_info(&pf->pdev->dev, "VF %d: Invalid Dest port\n",
3197 vf->vf_id);
3198 goto err;
3199 }
3200 }
3201
3202 if (mask.src_port & data.src_port) {
a01e5f22 3203 if (!data.src_port) {
e284fc28
AD		 3204 dev_info(&pf->pdev->dev, "VF %d: Invalid Source port\n",
3205 vf->vf_id);
3206 goto err;
3207 }
3208 }
3209
3210 if (tc_filter->flow_type != VIRTCHNL_TCP_V6_FLOW &&
3211 tc_filter->flow_type != VIRTCHNL_TCP_V4_FLOW) {
3212 dev_info(&pf->pdev->dev, "VF %d: Invalid Flow type\n",
3213 vf->vf_id);
3214 goto err;
3215 }
3216
3217 if (mask.vlan_id & data.vlan_id) {
3218 if (ntohs(data.vlan_id) > I40E_MAX_VLANID) {
3219 dev_info(&pf->pdev->dev, "VF %d: invalid VLAN ID\n",
3220 vf->vf_id);
3221 goto err;
3222 }
3223 }
3224
3225 return I40E_SUCCESS;
3226err:
3227 return I40E_ERR_CONFIG;
3228}
3229
3230/**
3231 * i40e_find_vsi_from_seid - searches for the vsi with the given seid
3232 * @vf: pointer to the VF info
3233 * @seid - seid of the vsi it is searching for
3234 **/
3235static struct i40e_vsi *i40e_find_vsi_from_seid(struct i40e_vf *vf, u16 seid)
3236{
3237 struct i40e_pf *pf = vf->pf;
3238 struct i40e_vsi *vsi = NULL;
3239 int i;
3240
3241 for (i = 0; i < vf->num_tc ; i++) {
3242 vsi = i40e_find_vsi_from_id(pf, vf->ch[i].vsi_id);
46345b38 3243 if (vsi && vsi->seid == seid)
e284fc28
AD		 3244 return vsi;
3245 }
3246 return NULL;
3247}
3248
3249/**
3250 * i40e_del_all_cloud_filters
3251 * @vf: pointer to the VF info
3252 *
3253 * This function deletes all cloud filters
3254 **/
3255static void i40e_del_all_cloud_filters(struct i40e_vf *vf)
3256{
3257 struct i40e_cloud_filter *cfilter = NULL;
3258 struct i40e_pf *pf = vf->pf;
3259 struct i40e_vsi *vsi = NULL;
3260 struct hlist_node *node;
3261 int ret;
3262
3263 hlist_for_each_entry_safe(cfilter, node,
3264 &vf->cloud_filter_list, cloud_node) {
3265 vsi = i40e_find_vsi_from_seid(vf, cfilter->seid);
3266
3267 if (!vsi) {
3268 dev_err(&pf->pdev->dev, "VF %d: no VSI found for matching %u seid, can't delete cloud filter\n",
3269 vf->vf_id, cfilter->seid);
3270 continue;
3271 }
3272
3273 if (cfilter->dst_port)
3274 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
3275 false);
3276 else
3277 ret = i40e_add_del_cloud_filter(vsi, cfilter, false);
3278 if (ret)
3279 dev_err(&pf->pdev->dev,
3280 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3281 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3282 i40e_aq_str(&pf->hw,
3283 pf->hw.aq.asq_last_status));
3284
3285 hlist_del(&cfilter->cloud_node);
3286 kfree(cfilter);
3287 vf->num_cloud_filters--;
3288 }
3289}
3290
3291/**
3292 * i40e_vc_del_cloud_filter
3293 * @vf: pointer to the VF info
3294 * @msg: pointer to the msg buffer
3295 *
3296 * This function deletes a cloud filter programmed as TC filter for ADq
3297 **/
3298static int i40e_vc_del_cloud_filter(struct i40e_vf *vf, u8 *msg)
3299{
3300 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3301 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3302 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3303 struct i40e_cloud_filter cfilter, *cf = NULL;
3304 struct i40e_pf *pf = vf->pf;
3305 struct i40e_vsi *vsi = NULL;
3306 struct hlist_node *node;
3307 i40e_status aq_ret = 0;
3308 int i, ret;
3309
3310 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3311 aq_ret = I40E_ERR_PARAM;
3312 goto err;
3313 }
3314
3315 if (!vf->adq_enabled) {
3316 dev_info(&pf->pdev->dev,
3317 "VF %d: ADq not enabled, can't apply cloud filter\n",
3318 vf->vf_id);
3319 aq_ret = I40E_ERR_PARAM;
3320 goto err;
3321 }
3322
3323 if (i40e_validate_cloud_filter(vf, vcf)) {
3324 dev_info(&pf->pdev->dev,
3325 "VF %d: Invalid input, can't apply cloud filter\n",
3326 vf->vf_id);
5dd3691c
DC		 3327 aq_ret = I40E_ERR_PARAM;
3328 goto err;
e284fc28
AD		 3329 }
3330
3331 memset(&cfilter, 0, sizeof(cfilter));
3332 /* parse destination mac address */
3333 for (i = 0; i < ETH_ALEN; i++)
3334 cfilter.dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3335
3336 /* parse source mac address */
3337 for (i = 0; i < ETH_ALEN; i++)
3338 cfilter.src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3339
3340 cfilter.vlan_id = mask.vlan_id & tcf.vlan_id;
3341 cfilter.dst_port = mask.dst_port & tcf.dst_port;
3342 cfilter.src_port = mask.src_port & tcf.src_port;
3343
3344 switch (vcf->flow_type) {
3345 case VIRTCHNL_TCP_V4_FLOW:
3346 cfilter.n_proto = ETH_P_IP;
3347 if (mask.dst_ip[0] & tcf.dst_ip[0])
3348 memcpy(&cfilter.ip.v4.dst_ip, tcf.dst_ip,
3349 ARRAY_SIZE(tcf.dst_ip));
3350 else if (mask.src_ip[0] & tcf.dst_ip[0])
3351 memcpy(&cfilter.ip.v4.src_ip, tcf.src_ip,
3352 ARRAY_SIZE(tcf.dst_ip));
3353 break;
3354 case VIRTCHNL_TCP_V6_FLOW:
3355 cfilter.n_proto = ETH_P_IPV6;
3356 if (mask.dst_ip[3] & tcf.dst_ip[3])
3357 memcpy(&cfilter.ip.v6.dst_ip6, tcf.dst_ip,
3358 sizeof(cfilter.ip.v6.dst_ip6));
3359 if (mask.src_ip[3] & tcf.src_ip[3])
3360 memcpy(&cfilter.ip.v6.src_ip6, tcf.src_ip,
3361 sizeof(cfilter.ip.v6.src_ip6));
3362 break;
3363 default:
3364 /* TC filter can be configured based on different combinations
3365 * and in this case IP is not a part of filter config
3366 */
3367 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3368 vf->vf_id);
3369 }
3370
3371 /* get the vsi to which the tc belongs to */
3372 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3373 cfilter.seid = vsi->seid;
3374 cfilter.flags = vcf->field_flags;
3375
3376 /* Deleting TC filter */
3377 if (tcf.dst_port)
3378 ret = i40e_add_del_cloud_filter_big_buf(vsi, &cfilter, false);
3379 else
3380 ret = i40e_add_del_cloud_filter(vsi, &cfilter, false);
3381 if (ret) {
3382 dev_err(&pf->pdev->dev,
3383 "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
3384 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3385 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
3386 goto err;
3387 }
3388
3389 hlist_for_each_entry_safe(cf, node,
3390 &vf->cloud_filter_list, cloud_node) {
3391 if (cf->seid != cfilter.seid)
3392 continue;
3393 if (mask.dst_port)
3394 if (cfilter.dst_port != cf->dst_port)
3395 continue;
3396 if (mask.dst_mac[0])
3397 if (!ether_addr_equal(cf->src_mac, cfilter.src_mac))
3398 continue;
3399 /* for ipv4 data to be valid, only first byte of mask is set */
3400 if (cfilter.n_proto == ETH_P_IP && mask.dst_ip[0])
3401 if (memcmp(&cfilter.ip.v4.dst_ip, &cf->ip.v4.dst_ip,
3402 ARRAY_SIZE(tcf.dst_ip)))
3403 continue;
3404 /* for ipv6, mask is set for all sixteen bytes (4 words) */
3405 if (cfilter.n_proto == ETH_P_IPV6 && mask.dst_ip[3])
3406 if (memcmp(&cfilter.ip.v6.dst_ip6, &cf->ip.v6.dst_ip6,
3407 sizeof(cfilter.ip.v6.src_ip6)))
3408 continue;
3409 if (mask.vlan_id)
3410 if (cfilter.vlan_id != cf->vlan_id)
3411 continue;
3412
3413 hlist_del(&cf->cloud_node);
3414 kfree(cf);
3415 vf->num_cloud_filters--;
3416 }
3417
3418err:
3419 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_CLOUD_FILTER,
3420 aq_ret);
3421}
3422
3423/**
3424 * i40e_vc_add_cloud_filter
3425 * @vf: pointer to the VF info
3426 * @msg: pointer to the msg buffer
3427 *
3428 * This function adds a cloud filter programmed as TC filter for ADq
3429 **/
3430static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg)
3431{
3432 struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
3433 struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
3434 struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
3435 struct i40e_cloud_filter *cfilter = NULL;
3436 struct i40e_pf *pf = vf->pf;
3437 struct i40e_vsi *vsi = NULL;
3438 i40e_status aq_ret = 0;
3439 int i, ret;
3440
3441 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3442 aq_ret = I40E_ERR_PARAM;
24474f27 3443 goto err_out;
e284fc28
AD		 3444 }
3445
3446 if (!vf->adq_enabled) {
3447 dev_info(&pf->pdev->dev,
3448 "VF %d: ADq is not enabled, can't apply cloud filter\n",
3449 vf->vf_id);
3450 aq_ret = I40E_ERR_PARAM;
24474f27 3451 goto err_out;
e284fc28
AD		 3452 }
3453
3454 if (i40e_validate_cloud_filter(vf, vcf)) {
3455 dev_info(&pf->pdev->dev,
3456 "VF %d: Invalid input/s, can't apply cloud filter\n",
3457 vf->vf_id);
d1b3fa86 3458 aq_ret = I40E_ERR_PARAM;
24474f27 3459 goto err_out;
e284fc28
AD		 3460 }
3461
3462 cfilter = kzalloc(sizeof(*cfilter), GFP_KERNEL);
3463 if (!cfilter)
3464 return -ENOMEM;
3465
3466 /* parse destination mac address */
3467 for (i = 0; i < ETH_ALEN; i++)
3468 cfilter->dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
3469
3470 /* parse source mac address */
3471 for (i = 0; i < ETH_ALEN; i++)
3472 cfilter->src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
3473
3474 cfilter->vlan_id = mask.vlan_id & tcf.vlan_id;
3475 cfilter->dst_port = mask.dst_port & tcf.dst_port;
3476 cfilter->src_port = mask.src_port & tcf.src_port;
3477
3478 switch (vcf->flow_type) {
3479 case VIRTCHNL_TCP_V4_FLOW:
3480 cfilter->n_proto = ETH_P_IP;
3481 if (mask.dst_ip[0] & tcf.dst_ip[0])
3482 memcpy(&cfilter->ip.v4.dst_ip, tcf.dst_ip,
3483 ARRAY_SIZE(tcf.dst_ip));
3484 else if (mask.src_ip[0] & tcf.dst_ip[0])
3485 memcpy(&cfilter->ip.v4.src_ip, tcf.src_ip,
3486 ARRAY_SIZE(tcf.dst_ip));
3487 break;
3488 case VIRTCHNL_TCP_V6_FLOW:
3489 cfilter->n_proto = ETH_P_IPV6;
3490 if (mask.dst_ip[3] & tcf.dst_ip[3])
3491 memcpy(&cfilter->ip.v6.dst_ip6, tcf.dst_ip,
3492 sizeof(cfilter->ip.v6.dst_ip6));
3493 if (mask.src_ip[3] & tcf.src_ip[3])
3494 memcpy(&cfilter->ip.v6.src_ip6, tcf.src_ip,
3495 sizeof(cfilter->ip.v6.src_ip6));
3496 break;
3497 default:
3498 /* TC filter can be configured based on different combinations
3499 * and in this case IP is not a part of filter config
3500 */
3501 dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
3502 vf->vf_id);
3503 }
3504
3505 /* get the VSI to which the TC belongs to */
3506 vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
3507 cfilter->seid = vsi->seid;
3508 cfilter->flags = vcf->field_flags;
3509
3510 /* Adding cloud filter programmed as TC filter */
3511 if (tcf.dst_port)
3512 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, true);
3513 else
3514 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
3515 if (ret) {
3516 dev_err(&pf->pdev->dev,
3517 "VF %d: Failed to add cloud filter, err %s aq_err %s\n",
3518 vf->vf_id, i40e_stat_str(&pf->hw, ret),
3519 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
24474f27 3520 goto err_free;
e284fc28
AD		 3521 }
3522
3523 INIT_HLIST_NODE(&cfilter->cloud_node);
3524 hlist_add_head(&cfilter->cloud_node, &vf->cloud_filter_list);
24474f27
MS		 3525 /* release the pointer passing it to the collection */
3526 cfilter = NULL;
e284fc28 3527 vf->num_cloud_filters++;
24474f27
MS		 3528err_free:
3529 kfree(cfilter);
3530err_out:
e284fc28
AD		 3531 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_CLOUD_FILTER,
3532 aq_ret);
3533}
3534
c27eac48
AD		 3535/**
3536 * i40e_vc_add_qch_msg: Add queue channel and enable ADq
3537 * @vf: pointer to the VF info
3538 * @msg: pointer to the msg buffer
3539 **/
3540static int i40e_vc_add_qch_msg(struct i40e_vf *vf, u8 *msg)
3541{
3542 struct virtchnl_tc_info *tci =
3543 (struct virtchnl_tc_info *)msg;
3544 struct i40e_pf *pf = vf->pf;
0c483bd4 3545 struct i40e_link_status *ls = &pf->hw.phy.link_info;
d510497b 3546 int i, adq_request_qps = 0;
c27eac48 3547 i40e_status aq_ret = 0;
d510497b 3548 u64 speed = 0;
c27eac48
AD		 3549
3550 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3551 aq_ret = I40E_ERR_PARAM;
3552 goto err;
3553 }
3554
3555 /* ADq cannot be applied if spoof check is ON */
3556 if (vf->spoofchk) {
3557 dev_err(&pf->pdev->dev,
3558 "Spoof check is ON, turn it OFF to enable ADq\n");
3559 aq_ret = I40E_ERR_PARAM;
3560 goto err;
3561 }
3562
3563 if (!(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)) {
3564 dev_err(&pf->pdev->dev,
3565 "VF %d attempting to enable ADq, but hasn't properly negotiated that capability\n",
3566 vf->vf_id);
3567 aq_ret = I40E_ERR_PARAM;
3568 goto err;
3569 }
3570
3571 /* max number of traffic classes for VF currently capped at 4 */
3572 if (!tci->num_tc || tci->num_tc > I40E_MAX_VF_VSI) {
3573 dev_err(&pf->pdev->dev,
d510497b
SN		 3574 "VF %d trying to set %u TCs, valid range 1-%u TCs per VF\n",
3575 vf->vf_id, tci->num_tc, I40E_MAX_VF_VSI);
c27eac48
AD		 3576 aq_ret = I40E_ERR_PARAM;
3577 goto err;
3578 }
3579
3580 /* validate queues for each TC */
3581 for (i = 0; i < tci->num_tc; i++)
3582 if (!tci->list[i].count ||
3583 tci->list[i].count > I40E_DEFAULT_QUEUES_PER_VF) {
3584 dev_err(&pf->pdev->dev,
d510497b
SN		 3585 "VF %d: TC %d trying to set %u queues, valid range 1-%u queues per TC\n",
3586 vf->vf_id, i, tci->list[i].count,
3587 I40E_DEFAULT_QUEUES_PER_VF);
c27eac48
AD		 3588 aq_ret = I40E_ERR_PARAM;
3589 goto err;
3590 }
3591
3592 /* need Max VF queues but already have default number of queues */
3593 adq_request_qps = I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF;
3594
3595 if (pf->queues_left < adq_request_qps) {
3596 dev_err(&pf->pdev->dev,
3597 "No queues left to allocate to VF %d\n",
3598 vf->vf_id);
3599 aq_ret = I40E_ERR_PARAM;
3600 goto err;
3601 } else {
3602 /* we need to allocate max VF queues to enable ADq so as to
3603 * make sure ADq enabled VF always gets back queues when it
3604 * goes through a reset.
3605 */
3606 vf->num_queue_pairs = I40E_MAX_VF_QUEUES;
3607 }
3608
0c483bd4
AD		 3609 /* get link speed in MB to validate rate limit */
3610 switch (ls->link_speed) {
3611 case VIRTCHNL_LINK_SPEED_100MB:
3612 speed = SPEED_100;
3613 break;
3614 case VIRTCHNL_LINK_SPEED_1GB:
3615 speed = SPEED_1000;
3616 break;
3617 case VIRTCHNL_LINK_SPEED_10GB:
3618 speed = SPEED_10000;
3619 break;
3620 case VIRTCHNL_LINK_SPEED_20GB:
3621 speed = SPEED_20000;
3622 break;
3623 case VIRTCHNL_LINK_SPEED_25GB:
3624 speed = SPEED_25000;
3625 break;
3626 case VIRTCHNL_LINK_SPEED_40GB:
3627 speed = SPEED_40000;
3628 break;
3629 default:
3630 dev_err(&pf->pdev->dev,
3631 "Cannot detect link speed\n");
3632 aq_ret = I40E_ERR_PARAM;
3633 goto err;
3634 }
3635
c27eac48
AD		 3636 /* parse data from the queue channel info */
3637 vf->num_tc = tci->num_tc;
0c483bd4
AD		 3638 for (i = 0; i < vf->num_tc; i++) {
3639 if (tci->list[i].max_tx_rate) {
3640 if (tci->list[i].max_tx_rate > speed) {
3641 dev_err(&pf->pdev->dev,
3642 "Invalid max tx rate %llu specified for VF %d.",
3643 tci->list[i].max_tx_rate,
3644 vf->vf_id);
3645 aq_ret = I40E_ERR_PARAM;
3646 goto err;
3647 } else {
3648 vf->ch[i].max_tx_rate =
3649 tci->list[i].max_tx_rate;
3650 }
3651 }
c27eac48 3652 vf->ch[i].num_qps = tci->list[i].count;
0c483bd4 3653 }
c27eac48
AD		 3654
3655 /* set this flag only after making sure all inputs are sane */
3656 vf->adq_enabled = true;
e284fc28
AD		 3657 /* num_req_queues is set when user changes number of queues via ethtool
3658 * and this causes issue for default VSI(which depends on this variable)
3659 * when ADq is enabled, hence reset it.
3660 */
3661 vf->num_req_queues = 0;
c27eac48
AD		 3662
3663 /* reset the VF in order to allocate resources */
3664 i40e_vc_notify_vf_reset(vf);
3665 i40e_reset_vf(vf, false);
3666
3667 return I40E_SUCCESS;
3668
3669 /* send the response to the VF */
3670err:
3671 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_CHANNELS,
3672 aq_ret);
3673}
3674
c4998aa3
AD		 3675/**
3676 * i40e_vc_del_qch_msg
3677 * @vf: pointer to the VF info
3678 * @msg: pointer to the msg buffer
3679 **/
3680static int i40e_vc_del_qch_msg(struct i40e_vf *vf, u8 *msg)
3681{
3682 struct i40e_pf *pf = vf->pf;
3683 i40e_status aq_ret = 0;
3684
3685 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
3686 aq_ret = I40E_ERR_PARAM;
3687 goto err;
3688 }
3689
3690 if (vf->adq_enabled) {
e284fc28 3691 i40e_del_all_cloud_filters(vf);
c4998aa3
AD		 3692 i40e_del_qch(vf);
3693 vf->adq_enabled = false;
3694 vf->num_tc = 0;
3695 dev_info(&pf->pdev->dev,
e284fc28 3696 "Deleting Queue Channels and cloud filters for ADq on VF %d\n",
c4998aa3
AD		 3697 vf->vf_id);
3698 } else {
3699 dev_info(&pf->pdev->dev, "VF %d trying to delete queue channels but ADq isn't enabled\n",
3700 vf->vf_id);
3701 aq_ret = I40E_ERR_PARAM;
3702 }
3703
3704 /* reset the VF in order to allocate resources */
3705 i40e_vc_notify_vf_reset(vf);
3706 i40e_reset_vf(vf, false);
3707
3708 return I40E_SUCCESS;
3709
3710err:
3711 return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_CHANNELS,
3712 aq_ret);
3713}
3714
5c3c48ac
JB		 3715/**
3716 * i40e_vc_process_vf_msg
b40c82e6
JK		 3717 * @pf: pointer to the PF structure
3718 * @vf_id: source VF id
f5254429
JK		 3719 * @v_opcode: operation code
3720 * @v_retval: unused return value code
5c3c48ac
JB		 3721 * @msg: pointer to the msg buffer
3722 * @msglen: msg length
5c3c48ac
JB		 3723 *
3724 * called from the common aeq/arq handler to
b40c82e6 3725 * process request from VF
5c3c48ac 3726 **/
a1b5a24f 3727int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
f5254429 3728 u32 __always_unused v_retval, u8 *msg, u16 msglen)
5c3c48ac 3729{
5c3c48ac 3730 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3731 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 3732 struct i40e_vf *vf;
5c3c48ac
JB		 3733 int ret;
3734
3735 pf->vf_aq_requests++;
3f8af412 3736 if (local_vf_id < 0 || local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 3737 return -EINVAL;
7efa84b7 3738 vf = &(pf->vf[local_vf_id]);
260e9382
JB		 3739
3740 /* Check if VF is disabled. */
3741 if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
3742 return I40E_ERR_PARAM;
3743
5c3c48ac 3744 /* perform basic checks on the msg */
735e35c5 3745 ret = virtchnl_vc_validate_vf_msg(&vf->vf_ver, v_opcode, msg, msglen);
5c3c48ac
JB		 3746
3747 if (ret) {
764430ce 3748 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
b40c82e6 3749 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 3750 local_vf_id, v_opcode, msglen);
764430ce 3751 switch (ret) {
bb58fd7e 3752 case VIRTCHNL_STATUS_ERR_PARAM:
764430ce
JB		 3753 return -EPERM;
3754 default:
3755 return -EINVAL;
3756 }
5c3c48ac 3757 }
bae3cae4 3758
5c3c48ac 3759 switch (v_opcode) {
310a2ad9 3760 case VIRTCHNL_OP_VERSION:
f4ca1a22 3761 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac 3762 break;
310a2ad9 3763 case VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 3764 ret = i40e_vc_get_vf_resources_msg(vf, msg);
d3d657a9 3765 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3766 break;
310a2ad9 3767 case VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 3768 i40e_vc_reset_vf_msg(vf);
3769 ret = 0;
5c3c48ac 3770 break;
310a2ad9 3771 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
679b05c0 3772 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg);
5c3c48ac 3773 break;
310a2ad9 3774 case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
679b05c0 3775 ret = i40e_vc_config_queues_msg(vf, msg);
5c3c48ac 3776 break;
310a2ad9 3777 case VIRTCHNL_OP_CONFIG_IRQ_MAP:
679b05c0 3778 ret = i40e_vc_config_irq_map_msg(vf, msg);
5c3c48ac 3779 break;
310a2ad9 3780 case VIRTCHNL_OP_ENABLE_QUEUES:
679b05c0 3781 ret = i40e_vc_enable_queues_msg(vf, msg);
055b295d 3782 i40e_vc_notify_vf_link_state(vf);
5c3c48ac 3783 break;
310a2ad9 3784 case VIRTCHNL_OP_DISABLE_QUEUES:
679b05c0 3785 ret = i40e_vc_disable_queues_msg(vf, msg);
5c3c48ac 3786 break;
310a2ad9 3787 case VIRTCHNL_OP_ADD_ETH_ADDR:
679b05c0 3788 ret = i40e_vc_add_mac_addr_msg(vf, msg);
5c3c48ac 3789 break;
310a2ad9 3790 case VIRTCHNL_OP_DEL_ETH_ADDR:
679b05c0 3791 ret = i40e_vc_del_mac_addr_msg(vf, msg);
5c3c48ac 3792 break;
310a2ad9 3793 case VIRTCHNL_OP_ADD_VLAN:
679b05c0 3794 ret = i40e_vc_add_vlan_msg(vf, msg);
5c3c48ac 3795 break;
310a2ad9 3796 case VIRTCHNL_OP_DEL_VLAN:
679b05c0 3797 ret = i40e_vc_remove_vlan_msg(vf, msg);
5c3c48ac 3798 break;
310a2ad9 3799 case VIRTCHNL_OP_GET_STATS:
679b05c0 3800 ret = i40e_vc_get_stats_msg(vf, msg);
5c3c48ac 3801 break;
310a2ad9 3802 case VIRTCHNL_OP_IWARP:
e3219ce6
ASJ		 3803 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
3804 break;
310a2ad9 3805 case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
679b05c0 3806 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, true);
e3219ce6 3807 break;
310a2ad9 3808 case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
679b05c0 3809 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, false);
e3219ce6 3810 break;
310a2ad9 3811 case VIRTCHNL_OP_CONFIG_RSS_KEY:
679b05c0 3812 ret = i40e_vc_config_rss_key(vf, msg);
c4e1868c 3813 break;
310a2ad9 3814 case VIRTCHNL_OP_CONFIG_RSS_LUT:
679b05c0 3815 ret = i40e_vc_config_rss_lut(vf, msg);
c4e1868c 3816 break;
310a2ad9 3817 case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
679b05c0 3818 ret = i40e_vc_get_rss_hena(vf, msg);
c4e1868c 3819 break;
310a2ad9 3820 case VIRTCHNL_OP_SET_RSS_HENA:
679b05c0 3821 ret = i40e_vc_set_rss_hena(vf, msg);
c4e1868c 3822 break;
8774370d 3823 case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
679b05c0 3824 ret = i40e_vc_enable_vlan_stripping(vf, msg);
8774370d
MS		 3825 break;
3826 case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
679b05c0 3827 ret = i40e_vc_disable_vlan_stripping(vf, msg);
8774370d 3828 break;
a3f5aa90 3829 case VIRTCHNL_OP_REQUEST_QUEUES:
679b05c0 3830 ret = i40e_vc_request_queues_msg(vf, msg);
a3f5aa90 3831 break;
c27eac48
AD		 3832 case VIRTCHNL_OP_ENABLE_CHANNELS:
3833 ret = i40e_vc_add_qch_msg(vf, msg);
3834 break;
c4998aa3
AD		 3835 case VIRTCHNL_OP_DISABLE_CHANNELS:
3836 ret = i40e_vc_del_qch_msg(vf, msg);
3837 break;
e284fc28
AD		 3838 case VIRTCHNL_OP_ADD_CLOUD_FILTER:
3839 ret = i40e_vc_add_cloud_filter(vf, msg);
3840 break;
3841 case VIRTCHNL_OP_DEL_CLOUD_FILTER:
3842 ret = i40e_vc_del_cloud_filter(vf, msg);
3843 break;
310a2ad9 3844 case VIRTCHNL_OP_UNKNOWN:
5c3c48ac 3845 default:
b40c82e6 3846 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 3847 v_opcode, local_vf_id);
5c3c48ac
JB		 3848 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
3849 I40E_ERR_NOT_IMPLEMENTED);
3850 break;
3851 }
3852
3853 return ret;
3854}
3855
3856/**
3857 * i40e_vc_process_vflr_event
b40c82e6 3858 * @pf: pointer to the PF structure
5c3c48ac
JB		 3859 *
3860 * called from the vlfr irq handler to
b40c82e6 3861 * free up VF resources and state variables
5c3c48ac
JB		 3862 **/
3863int i40e_vc_process_vflr_event(struct i40e_pf *pf)
3864{
5c3c48ac 3865 struct i40e_hw *hw = &pf->hw;
a1b5a24f 3866 u32 reg, reg_idx, bit_idx;
5c3c48ac 3867 struct i40e_vf *vf;
a1b5a24f 3868 int vf_id;
5c3c48ac 3869
0da36b97 3870 if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
5c3c48ac
JB		 3871 return 0;
3872
0d790327
MW		 3873 /* Re-enable the VFLR interrupt cause here, before looking for which
3874 * VF got reset. Otherwise, if another VF gets a reset while the
3875 * first one is being processed, that interrupt will be lost, and
3876 * that VF will be stuck in reset forever.
3877 */
c5c2f7c3
MW		 3878 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
3879 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
3880 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
3881 i40e_flush(hw);
3882
0da36b97 3883 clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
5c3c48ac
JB		 3884 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
3885 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
3886 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 3887 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 3888 vf = &pf->vf[vf_id];
3889 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 3890 if (reg & BIT(bit_idx))
7e5a313e 3891 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 3892 i40e_reset_vf(vf, true);
5c3c48ac
JB		 3893 }
3894
5c3c48ac
JB		 3895 return 0;
3896}
3897
ed277c50
HR		 3898/**
3899 * i40e_validate_vf
3900 * @pf: the physical function
3901 * @vf_id: VF identifier
3902 *
3903 * Check that the VF is enabled and the VSI exists.
3904 *
3905 * Returns 0 on success, negative on failure
3906 **/
3907static int i40e_validate_vf(struct i40e_pf *pf, int vf_id)
3908{
3909 struct i40e_vsi *vsi;
3910 struct i40e_vf *vf;
3911 int ret = 0;
3912
3913 if (vf_id >= pf->num_alloc_vfs) {
3914 dev_err(&pf->pdev->dev,
3915 "Invalid VF Identifier %d\n", vf_id);
3916 ret = -EINVAL;
3917 goto err_out;
3918 }
3919 vf = &pf->vf[vf_id];
3920 vsi = i40e_find_vsi_from_id(pf, vf->lan_vsi_id);
3921 if (!vsi)
3922 ret = -EINVAL;
3923err_out:
3924 return ret;
3925}
3926
5c3c48ac
JB		 3927/**
3928 * i40e_ndo_set_vf_mac
3929 * @netdev: network interface device structure
b40c82e6 3930 * @vf_id: VF identifier
5c3c48ac
JB		 3931 * @mac: mac address
3932 *
b40c82e6 3933 * program VF mac address
5c3c48ac
JB		 3934 **/
3935int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
3936{
3937 struct i40e_netdev_priv *np = netdev_priv(netdev);
3938 struct i40e_vsi *vsi = np->vsi;
3939 struct i40e_pf *pf = vsi->back;
3940 struct i40e_mac_filter *f;
3941 struct i40e_vf *vf;
3942 int ret = 0;
784548c4 3943 struct hlist_node *h;
278e7d0b 3944 int bkt;
028daf80 3945 u8 i;
5c3c48ac 3946
80598e62
LY		 3947 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
3948 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
3949 return -EAGAIN;
3950 }
3951
5c3c48ac 3952 /* validate the request */
ed277c50
HR		 3953 ret = i40e_validate_vf(pf, vf_id);
3954 if (ret)
5c3c48ac 3955 goto error_param;
5c3c48ac 3956
ed277c50 3957 vf = &pf->vf[vf_id];
fdf0e0bf 3958 vsi = pf->vsi[vf->lan_vsi_idx];
028daf80
PJ		 3959
3960 /* When the VF is resetting wait until it is done.
3961 * It can take up to 200 milliseconds,
3962 * but wait for up to 300 milliseconds to be safe.
9889707b
SL		 3963 * If the VF is indeed in reset, the vsi pointer has
3964 * to show on the newly loaded vsi under pf->vsi[id].
028daf80
PJ		 3965 */
3966 for (i = 0; i < 15; i++) {
9889707b
SL		 3967 if (test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
3968 if (i > 0)
3969 vsi = pf->vsi[vf->lan_vsi_idx];
028daf80 3970 break;
9889707b 3971 }
028daf80
PJ		 3972 msleep(20);
3973 }
6322e63c 3974 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3975 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3976 vf_id);
3977 ret = -EAGAIN;
5c3c48ac
JB		 3978 goto error_param;
3979 }
3980
efd8e39a 3981 if (is_multicast_ether_addr(mac)) {
5c3c48ac 3982 dev_err(&pf->pdev->dev,
efd8e39a 3983 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 3984 ret = -EINVAL;
3985 goto error_param;
3986 }
3987
21659035 3988 /* Lock once because below invoked function add/del_filter requires
278e7d0b 3989 * mac_filter_hash_lock to be held
21659035 3990 */
278e7d0b 3991 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 3992
5c3c48ac 3993 /* delete the temporary mac address */
efd8e39a 3994 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
9569a9a4 3995 i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
5c3c48ac 3996
29f71bb0
GR		 3997 /* Delete all the filters for this VSI - we're going to kill it
3998 * anyway.
3999 */
784548c4 4000 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
148141bb 4001 __i40e_del_filter(vsi, f);
5c3c48ac 4002
278e7d0b 4003 spin_unlock_bh(&vsi->mac_filter_hash_lock);
21659035 4004
5c3c48ac 4005 /* program mac filter */
17652c63 4006 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 4007 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
4008 ret = -EIO;
4009 goto error_param;
4010 }
9a173901 4011 ether_addr_copy(vf->default_lan_addr.addr, mac);
2f1d86e4
SA		 4012
4013 if (is_zero_ether_addr(mac)) {
4014 vf->pf_set_mac = false;
4015 dev_info(&pf->pdev->dev, "Removing MAC on VF %d\n", vf_id);
4016 } else {
4017 vf->pf_set_mac = true;
4018 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n",
4019 mac, vf_id);
4020 }
4021
ae1e29f6
PJ		 4022 /* Force the VF interface down so it has to bring up with new MAC
4023 * address
4024 */
eeeddbb8 4025 i40e_vc_disable_vf(vf);
ae1e29f6 4026 dev_info(&pf->pdev->dev, "Bring down and up the VF interface to make this change effective.\n");
5c3c48ac
JB		 4027
4028error_param:
f5a7b21b 4029 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 4030 return ret;
4031}
4032
ba4e003d
JK		 4033/**
4034 * i40e_vsi_has_vlans - True if VSI has configured VLANs
4035 * @vsi: pointer to the vsi
4036 *
4037 * Check if a VSI has configured any VLANs. False if we have a port VLAN or if
4038 * we have no configured VLANs. Do not call while holding the
4039 * mac_filter_hash_lock.
4040 */
4041static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
4042{
4043 bool have_vlans;
4044
4045 /* If we have a port VLAN, then the VSI cannot have any VLANs
4046 * configured, as all MAC/VLAN filters will be assigned to the PVID.
4047 */
4048 if (vsi->info.pvid)
4049 return false;
4050
4051 /* Since we don't have a PVID, we know that if the device is in VLAN
4052 * mode it must be because of a VLAN filter configured on this VSI.
4053 */
4054 spin_lock_bh(&vsi->mac_filter_hash_lock);
4055 have_vlans = i40e_is_vsi_in_vlan(vsi);
4056 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4057
4058 return have_vlans;
4059}
4060
5c3c48ac
JB		 4061/**
4062 * i40e_ndo_set_vf_port_vlan
4063 * @netdev: network interface device structure
b40c82e6 4064 * @vf_id: VF identifier
5c3c48ac
JB		 4065 * @vlan_id: mac address
4066 * @qos: priority setting
79aab093 4067 * @vlan_proto: vlan protocol
5c3c48ac 4068 *
b40c82e6 4069 * program VF vlan id and/or qos
5c3c48ac 4070 **/
79aab093
MS		 4071int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
4072 u16 vlan_id, u8 qos, __be16 vlan_proto)
5c3c48ac 4073{
f7fc2f2e 4074 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac 4075 struct i40e_netdev_priv *np = netdev_priv(netdev);
937f599a 4076 bool allmulti = false, alluni = false;
5c3c48ac
JB		 4077 struct i40e_pf *pf = np->vsi->back;
4078 struct i40e_vsi *vsi;
4079 struct i40e_vf *vf;
4080 int ret = 0;
4081
f5a7b21b
JS		 4082 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4083 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4084 return -EAGAIN;
4085 }
4086
5c3c48ac 4087 /* validate the request */
ed277c50
HR		 4088 ret = i40e_validate_vf(pf, vf_id);
4089 if (ret)
5c3c48ac 4090 goto error_pvid;
5c3c48ac
JB		 4091
4092 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
4093 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
4094 ret = -EINVAL;
4095 goto error_pvid;
4096 }
4097
79aab093
MS		 4098 if (vlan_proto != htons(ETH_P_8021Q)) {
4099 dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
4100 ret = -EPROTONOSUPPORT;
4101 goto error_pvid;
4102 }
4103
ed277c50 4104 vf = &pf->vf[vf_id];
fdf0e0bf 4105 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4106 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4107 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4108 vf_id);
4109 ret = -EAGAIN;
5c3c48ac
JB		 4110 goto error_pvid;
4111 }
4112
f7fc2f2e 4113 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 4114 /* duplicate request, so just return success */
4115 goto error_pvid;
4116
ba4e003d 4117 if (i40e_vsi_has_vlans(vsi)) {
99a4973c
GR		 4118 dev_err(&pf->pdev->dev,
4119 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
4120 vf_id);
f9b4b627
GR		 4121 /* Administrator Error - knock the VF offline until he does
4122 * the right thing by reconfiguring his network correctly
4123 * and then reloading the VF driver.
4124 */
eeeddbb8 4125 i40e_vc_disable_vf(vf);
35f3472a
MW		 4126 /* During reset the VF got a new VSI, so refresh the pointer. */
4127 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 4128 }
99a4973c 4129
ba4e003d
JK		 4130 /* Locked once because multiple functions below iterate list */
4131 spin_lock_bh(&vsi->mac_filter_hash_lock);
4132
8d82a7c5
GR		 4133 /* Check for condition where there was already a port VLAN ID
4134 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 4135 * Additionally check for the condition where there was a port
4136 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 4137 * Before deleting all the old VLAN filters we must add new ones
4138 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
4139 * MAC addresses deleted.
4140 */
1315f7c3 4141 if ((!(vlan_id || qos) ||
f7fc2f2e 4142 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
9af52f60
JK		 4143 vsi->info.pvid) {
4144 ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
4145 if (ret) {
4146 dev_info(&vsi->back->pdev->dev,
4147 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
4148 vsi->back->hw.aq.asq_last_status);
4149 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4150 goto error_pvid;
4151 }
4152 }
8d82a7c5 4153
5c3c48ac 4154 if (vsi->info.pvid) {
9af52f60
JK		 4155 /* remove all filters on the old VLAN */
4156 i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
4157 VLAN_VID_MASK));
5c3c48ac 4158 }
9af52f60 4159
640f93cc 4160 spin_unlock_bh(&vsi->mac_filter_hash_lock);
937f599a
GS		 4161
4162 /* disable promisc modes in case they were enabled */
4163 ret = i40e_config_vf_promiscuous_mode(vf, vf->lan_vsi_id,
4164 allmulti, alluni);
4165 if (ret) {
4166 dev_err(&pf->pdev->dev, "Unable to config VF promiscuous mode\n");
4167 goto error_pvid;
4168 }
4169
5c3c48ac 4170 if (vlan_id || qos)
f7fc2f2e 4171 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 4172 else
6c12fcbf 4173 i40e_vsi_remove_pvid(vsi);
640f93cc 4174 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 4175
4176 if (vlan_id) {
4177 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
4178 vlan_id, qos, vf_id);
4179
9af52f60
JK		 4180 /* add new VLAN filter for each MAC */
4181 ret = i40e_add_vlan_all_mac(vsi, vlan_id);
5c3c48ac
JB		 4182 if (ret) {
4183 dev_info(&vsi->back->pdev->dev,
4184 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
4185 vsi->back->hw.aq.asq_last_status);
9af52f60 4186 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 4187 goto error_pvid;
4188 }
9af52f60
JK		 4189
4190 /* remove the previously added non-VLAN MAC filters */
4191 i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 4192 }
4193
9af52f60
JK		 4194 spin_unlock_bh(&vsi->mac_filter_hash_lock);
4195
937f599a
GS		 4196 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
4197 alluni = true;
4198
4199 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
4200 allmulti = true;
4201
9af52f60
JK		 4202 /* Schedule the worker thread to take care of applying changes */
4203 i40e_service_event_schedule(vsi->back);
4204
5c3c48ac
JB		 4205 if (ret) {
4206 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
4207 goto error_pvid;
4208 }
9af52f60 4209
6c12fcbf
GR		 4210 /* The Port VLAN needs to be saved across resets the same as the
4211 * default LAN MAC address.
4212 */
4213 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
937f599a
GS		 4214
4215 ret = i40e_config_vf_promiscuous_mode(vf, vsi->id, allmulti, alluni);
4216 if (ret) {
4217 dev_err(&pf->pdev->dev, "Unable to config vf promiscuous mode\n");
4218 goto error_pvid;
4219 }
4220
5c3c48ac
JB		 4221 ret = 0;
4222
4223error_pvid:
f5a7b21b 4224 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 4225 return ret;
4226}
4227
4228/**
4229 * i40e_ndo_set_vf_bw
4230 * @netdev: network interface device structure
b40c82e6 4231 * @vf_id: VF identifier
f5254429
JK		 4232 * @min_tx_rate: Minimum Tx rate
4233 * @max_tx_rate: Maximum Tx rate
5c3c48ac 4234 *
b40c82e6 4235 * configure VF Tx rate
5c3c48ac 4236 **/
ed616689
SC		 4237int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
4238 int max_tx_rate)
5c3c48ac 4239{
6b192891
MW		 4240 struct i40e_netdev_priv *np = netdev_priv(netdev);
4241 struct i40e_pf *pf = np->vsi->back;
4242 struct i40e_vsi *vsi;
4243 struct i40e_vf *vf;
6b192891
MW		 4244 int ret = 0;
4245
f5a7b21b
JS		 4246 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4247 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4248 return -EAGAIN;
4249 }
4250
6b192891 4251 /* validate the request */
ed277c50
HR		 4252 ret = i40e_validate_vf(pf, vf_id);
4253 if (ret)
6b192891 4254 goto error;
6b192891 4255
ed616689 4256 if (min_tx_rate) {
b40c82e6 4257 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689 4258 min_tx_rate, vf_id);
8ad2e298
SA		 4259 ret = -EINVAL;
4260 goto error;
ed616689
SC		 4261 }
4262
ed277c50 4263 vf = &pf->vf[vf_id];
fdf0e0bf 4264 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 4265 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4266 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4267 vf_id);
4268 ret = -EAGAIN;
6b192891
MW		 4269 goto error;
4270 }
4271
5ecae412
AN		 4272 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
4273 if (ret)
6b192891 4274 goto error;
dac9b31a 4275
ed616689 4276 vf->tx_rate = max_tx_rate;
6b192891 4277error:
f5a7b21b 4278 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
6b192891 4279 return ret;
5c3c48ac
JB		 4280}
4281
4282/**
4283 * i40e_ndo_get_vf_config
4284 * @netdev: network interface device structure
b40c82e6
JK		 4285 * @vf_id: VF identifier
4286 * @ivi: VF configuration structure
5c3c48ac 4287 *
b40c82e6 4288 * return VF configuration
5c3c48ac
JB		 4289 **/
4290int i40e_ndo_get_vf_config(struct net_device *netdev,
4291 int vf_id, struct ifla_vf_info *ivi)
4292{
4293 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 4294 struct i40e_vsi *vsi = np->vsi;
4295 struct i40e_pf *pf = vsi->back;
4296 struct i40e_vf *vf;
4297 int ret = 0;
4298
f5a7b21b
JS		 4299 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4300 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4301 return -EAGAIN;
4302 }
4303
5c3c48ac 4304 /* validate the request */
ed277c50
HR		 4305 ret = i40e_validate_vf(pf, vf_id);
4306 if (ret)
5c3c48ac 4307 goto error_param;
5c3c48ac 4308
ed277c50 4309 vf = &pf->vf[vf_id];
5c3c48ac 4310 /* first vsi is always the LAN vsi */
fdf0e0bf 4311 vsi = pf->vsi[vf->lan_vsi_idx];
745b32c1
LY		 4312 if (!vsi) {
4313 ret = -ENOENT;
5c3c48ac
JB		 4314 goto error_param;
4315 }
4316
4317 ivi->vf = vf_id;
4318
6995b36c 4319 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 4320
ed616689
SC		 4321 ivi->max_tx_rate = vf->tx_rate;
4322 ivi->min_tx_rate = 0;
5c3c48ac
JB		 4323 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
4324 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
4325 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 4326 if (vf->link_forced == false)
4327 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
4328 else if (vf->link_up == true)
4329 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
4330 else
4331 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 4332 ivi->spoofchk = vf->spoofchk;
d40062f3 4333 ivi->trusted = vf->trusted;
5c3c48ac
JB		 4334 ret = 0;
4335
4336error_param:
f5a7b21b 4337 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
5c3c48ac
JB		 4338 return ret;
4339}
588aefa0
MW		 4340
4341/**
4342 * i40e_ndo_set_vf_link_state
4343 * @netdev: network interface device structure
b40c82e6 4344 * @vf_id: VF identifier
588aefa0
MW		 4345 * @link: required link state
4346 *
4347 * Set the link state of a specified VF, regardless of physical link state
4348 **/
4349int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
4350{
4351 struct i40e_netdev_priv *np = netdev_priv(netdev);
4352 struct i40e_pf *pf = np->vsi->back;
310a2ad9 4353 struct virtchnl_pf_event pfe;
588aefa0
MW		 4354 struct i40e_hw *hw = &pf->hw;
4355 struct i40e_vf *vf;
f19efbb5 4356 int abs_vf_id;
588aefa0
MW		 4357 int ret = 0;
4358
f5a7b21b
JS		 4359 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4360 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4361 return -EAGAIN;
4362 }
4363
588aefa0
MW		 4364 /* validate the request */
4365 if (vf_id >= pf->num_alloc_vfs) {
4366 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4367 ret = -EINVAL;
4368 goto error_out;
4369 }
4370
4371 vf = &pf->vf[vf_id];
f19efbb5 4372 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0 4373
310a2ad9 4374 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
ff3f4cc2 4375 pfe.severity = PF_EVENT_SEVERITY_INFO;
588aefa0
MW		 4376
4377 switch (link) {
4378 case IFLA_VF_LINK_STATE_AUTO:
4379 vf->link_forced = false;
4380 pfe.event_data.link_event.link_status =
4381 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
4382 pfe.event_data.link_event.link_speed =
ff3f4cc2 4383 (enum virtchnl_link_speed)
588aefa0
MW		 4384 pf->hw.phy.link_info.link_speed;
4385 break;
4386 case IFLA_VF_LINK_STATE_ENABLE:
4387 vf->link_forced = true;
4388 vf->link_up = true;
4389 pfe.event_data.link_event.link_status = true;
43ade6ad 4390 pfe.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_40GB;
588aefa0
MW		 4391 break;
4392 case IFLA_VF_LINK_STATE_DISABLE:
4393 vf->link_forced = true;
4394 vf->link_up = false;
4395 pfe.event_data.link_event.link_status = false;
4396 pfe.event_data.link_event.link_speed = 0;
4397 break;
4398 default:
4399 ret = -EINVAL;
4400 goto error_out;
4401 }
4402 /* Notify the VF of its new link state */
310a2ad9 4403 i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
588aefa0
MW		 4404 0, (u8 *)&pfe, sizeof(pfe), NULL);
4405
4406error_out:
f5a7b21b 4407 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
588aefa0
MW		 4408 return ret;
4409}
c674d125
MW		 4410
4411/**
4412 * i40e_ndo_set_vf_spoofchk
4413 * @netdev: network interface device structure
b40c82e6 4414 * @vf_id: VF identifier
c674d125
MW		 4415 * @enable: flag to enable or disable feature
4416 *
4417 * Enable or disable VF spoof checking
4418 **/
e6d9004d 4419int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 4420{
4421 struct i40e_netdev_priv *np = netdev_priv(netdev);
4422 struct i40e_vsi *vsi = np->vsi;
4423 struct i40e_pf *pf = vsi->back;
4424 struct i40e_vsi_context ctxt;
4425 struct i40e_hw *hw = &pf->hw;
4426 struct i40e_vf *vf;
4427 int ret = 0;
4428
f5a7b21b
JS		 4429 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4430 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4431 return -EAGAIN;
4432 }
4433
c674d125
MW		 4434 /* validate the request */
4435 if (vf_id >= pf->num_alloc_vfs) {
4436 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
4437 ret = -EINVAL;
4438 goto out;
4439 }
4440
4441 vf = &(pf->vf[vf_id]);
6322e63c 4442 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 4443 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
4444 vf_id);
4445 ret = -EAGAIN;
4446 goto out;
4447 }
c674d125
MW		 4448
4449 if (enable == vf->spoofchk)
4450 goto out;
4451
4452 vf->spoofchk = enable;
4453 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 4454 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 4455 ctxt.pf_num = pf->hw.pf_id;
4456 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
4457 if (enable)
30d71af5
GR		 4458 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
4459 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 4460 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
4461 if (ret) {
4462 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
4463 ret);
4464 ret = -EIO;
4465 }
4466out:
f5a7b21b 4467 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
c674d125
MW		 4468 return ret;
4469}
c3bbbd20
ASJ		 4470
4471/**
4472 * i40e_ndo_set_vf_trust
4473 * @netdev: network interface device structure of the pf
4474 * @vf_id: VF identifier
4475 * @setting: trust setting
4476 *
4477 * Enable or disable VF trust setting
4478 **/
4479int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
4480{
4481 struct i40e_netdev_priv *np = netdev_priv(netdev);
4482 struct i40e_pf *pf = np->vsi->back;
4483 struct i40e_vf *vf;
4484 int ret = 0;
4485
f5a7b21b
JS		 4486 if (test_and_set_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state)) {
4487 dev_warn(&pf->pdev->dev, "Unable to configure VFs, other operation is pending.\n");
4488 return -EAGAIN;
4489 }
4490
c3bbbd20
ASJ		 4491 /* validate the request */
4492 if (vf_id >= pf->num_alloc_vfs) {
4493 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
f5a7b21b
JS		 4494 ret = -EINVAL;
4495 goto out;
c3bbbd20
ASJ		 4496 }
4497
4498 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4499 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
f5a7b21b
JS		 4500 ret = -EINVAL;
4501 goto out;
c3bbbd20
ASJ		 4502 }
4503
4504 vf = &pf->vf[vf_id];
4505
c3bbbd20
ASJ		 4506 if (setting == vf->trusted)
4507 goto out;
4508
4509 vf->trusted = setting;
f18d2021 4510 i40e_vc_disable_vf(vf);
c3bbbd20
ASJ		 4511 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
4512 vf_id, setting ? "" : "un");
e284fc28
AD		 4513
4514 if (vf->adq_enabled) {
4515 if (!vf->trusted) {
4516 dev_info(&pf->pdev->dev,
4517 "VF %u no longer Trusted, deleting all cloud filters\n",
4518 vf_id);
4519 i40e_del_all_cloud_filters(vf);
4520 }
4521 }
4522
c3bbbd20 4523out:
f5a7b21b 4524 clear_bit(__I40E_VIRTCHNL_OP_PENDING, pf->state);
c3bbbd20
ASJ		 4525 return ret;
4526}
dc645dae
JB		 4527
4528/**
4529 * i40e_get_vf_stats - populate some stats for the VF
4530 * @netdev: the netdev of the PF
4531 * @vf_id: the host OS identifier (0-127)
4532 * @vf_stats: pointer to the OS memory to be initialized
4533 */
4534int i40e_get_vf_stats(struct net_device *netdev, int vf_id,
4535 struct ifla_vf_stats *vf_stats)
4536{
4537 struct i40e_netdev_priv *np = netdev_priv(netdev);
4538 struct i40e_pf *pf = np->vsi->back;
4539 struct i40e_eth_stats *stats;
4540 struct i40e_vsi *vsi;
4541 struct i40e_vf *vf;
4542
4543 /* validate the request */
4544 if (i40e_validate_vf(pf, vf_id))
4545 return -EINVAL;
4546
4547 vf = &pf->vf[vf_id];
4548 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
4549 dev_err(&pf->pdev->dev, "VF %d in reset. Try again.\n", vf_id);
4550 return -EBUSY;
4551 }
4552
4553 vsi = pf->vsi[vf->lan_vsi_idx];
4554 if (!vsi)
4555 return -EINVAL;
4556
4557 i40e_update_eth_stats(vsi);
4558 stats = &vsi->eth_stats;
4559
4560 memset(vf_stats, 0, sizeof(*vf_stats));
4561
4562 vf_stats->rx_packets = stats->rx_unicast + stats->rx_broadcast +
4563 stats->rx_multicast;
4564 vf_stats->tx_packets = stats->tx_unicast + stats->tx_broadcast +
4565 stats->tx_multicast;
4566 vf_stats->rx_bytes = stats->rx_bytes;
4567 vf_stats->tx_bytes = stats->tx_bytes;
4568 vf_stats->broadcast = stats->rx_broadcast;
4569 vf_stats->multicast = stats->rx_multicast;
4570 vf_stats->rx_dropped = stats->rx_discards;
4571 vf_stats->tx_dropped = stats->tx_discards;
4572
4573 return 0;
4574}
Linux 6.x block layer and io_uring tree(s)