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be2net: refactor error detect/recovery function
[linux-2.6-block.git] / drivers / net / ethernet / emulex / benet / be_main.c
CommitLineData
6b7c5b94 1/*
40263820 2 * Copyright (C) 2005 - 2014 Emulex
6b7c5b94
SP		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
d2145cde 11 * linux-drivers@emulex.com
6b7c5b94 12 *
d2145cde
AK		 13 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
6b7c5b94
SP		 16 */
17
70c71606 18#include <linux/prefetch.h>
9d9779e7 19#include <linux/module.h>
6b7c5b94 20#include "be.h"
8788fdc2 21#include "be_cmds.h"
65f71b8b 22#include <asm/div64.h>
d6b6d987 23#include <linux/aer.h>
a77dcb8c 24#include <linux/if_bridge.h>
6384a4d0 25#include <net/busy_poll.h>
c9c47142 26#include <net/vxlan.h>
6b7c5b94
SP		 27
28MODULE_VERSION(DRV_VER);
6b7c5b94 29MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
00d3d51e 30MODULE_AUTHOR("Emulex Corporation");
6b7c5b94
SP		 31MODULE_LICENSE("GPL");
32
ba343c77 33static unsigned int num_vfs;
ba343c77 34module_param(num_vfs, uint, S_IRUGO);
ba343c77 35MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
6b7c5b94 36
11ac75ed
SP		 37static ushort rx_frag_size = 2048;
38module_param(rx_frag_size, ushort, S_IRUGO);
39MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
40
9baa3c34 41static const struct pci_device_id be_dev_ids[] = {
c4ca2374 42 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 43 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 44 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
45 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
fe6d2a38 46 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
12f4d0a8 47 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID4)},
ecedb6ae 48 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID5)},
76b73530 49 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID6)},
6b7c5b94
SP		 50 { 0 }
51};
52MODULE_DEVICE_TABLE(pci, be_dev_ids);
7c185276 53/* UE Status Low CSR */
42c8b11e 54static const char * const ue_status_low_desc[] = {
7c185276
AK		 55 "CEV",
56 "CTX",
57 "DBUF",
58 "ERX",
59 "Host",
60 "MPU",
61 "NDMA",
62 "PTC ",
63 "RDMA ",
64 "RXF ",
65 "RXIPS ",
66 "RXULP0 ",
67 "RXULP1 ",
68 "RXULP2 ",
69 "TIM ",
70 "TPOST ",
71 "TPRE ",
72 "TXIPS ",
73 "TXULP0 ",
74 "TXULP1 ",
75 "UC ",
76 "WDMA ",
77 "TXULP2 ",
78 "HOST1 ",
79 "P0_OB_LINK ",
80 "P1_OB_LINK ",
81 "HOST_GPIO ",
82 "MBOX ",
6bdf8f55
VV		 83 "ERX2 ",
84 "SPARE ",
85 "JTAG ",
86 "MPU_INTPEND "
7c185276 87};
e2fb1afa 88
7c185276 89/* UE Status High CSR */
42c8b11e 90static const char * const ue_status_hi_desc[] = {
7c185276
AK		 91 "LPCMEMHOST",
92 "MGMT_MAC",
93 "PCS0ONLINE",
94 "MPU_IRAM",
95 "PCS1ONLINE",
96 "PCTL0",
97 "PCTL1",
98 "PMEM",
99 "RR",
100 "TXPB",
101 "RXPP",
102 "XAUI",
103 "TXP",
104 "ARM",
105 "IPC",
106 "HOST2",
107 "HOST3",
108 "HOST4",
109 "HOST5",
110 "HOST6",
111 "HOST7",
6bdf8f55
VV		 112 "ECRC",
113 "Poison TLP",
42c8b11e 114 "NETC",
6bdf8f55
VV		 115 "PERIPH",
116 "LLTXULP",
117 "D2P",
118 "RCON",
119 "LDMA",
120 "LLTXP",
121 "LLTXPB",
7c185276
AK		 122 "Unknown"
123};
6b7c5b94
SP		 124
125static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
126{
127 struct be_dma_mem *mem = &q->dma_mem;
03d28ffe 128
1cfafab9 129 if (mem->va) {
2b7bcebf
IV		 130 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
131 mem->dma);
1cfafab9
SP		 132 mem->va = NULL;
133 }
6b7c5b94
SP		 134}
135
136static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
748b539a 137 u16 len, u16 entry_size)
6b7c5b94
SP		 138{
139 struct be_dma_mem *mem = &q->dma_mem;
140
141 memset(q, 0, sizeof(*q));
142 q->len = len;
143 q->entry_size = entry_size;
144 mem->size = len * entry_size;
ede23fa8
JP		 145 mem->va = dma_zalloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma,
146 GFP_KERNEL);
6b7c5b94 147 if (!mem->va)
10ef9ab4 148 return -ENOMEM;
6b7c5b94
SP		 149 return 0;
150}
151
68c45a2d 152static void be_reg_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 153{
db3ea781 154 u32 reg, enabled;
5f0b849e 155
db3ea781 156 pci_read_config_dword(adapter->pdev, PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET,
748b539a 157 &reg);
db3ea781
SP		 158 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
159
5f0b849e 160 if (!enabled && enable)
6b7c5b94 161 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 162 else if (enabled && !enable)
6b7c5b94 163 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 164 else
6b7c5b94 165 return;
5f0b849e 166
db3ea781 167 pci_write_config_dword(adapter->pdev,
748b539a 168 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, reg);
6b7c5b94
SP		 169}
170
68c45a2d
SK		 171static void be_intr_set(struct be_adapter *adapter, bool enable)
172{
173 int status = 0;
174
175 /* On lancer interrupts can't be controlled via this register */
176 if (lancer_chip(adapter))
177 return;
178
179 if (adapter->eeh_error)
180 return;
181
182 status = be_cmd_intr_set(adapter, enable);
183 if (status)
184 be_reg_intr_set(adapter, enable);
185}
186
8788fdc2 187static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 188{
189 u32 val = 0;
03d28ffe 190
6b7c5b94
SP		 191 val |= qid & DB_RQ_RING_ID_MASK;
192 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
f3eb62d2
SP		 193
194 wmb();
8788fdc2 195 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 196}
197
94d73aaa
VV		 198static void be_txq_notify(struct be_adapter *adapter, struct be_tx_obj *txo,
199 u16 posted)
6b7c5b94
SP		 200{
201 u32 val = 0;
03d28ffe 202
94d73aaa 203 val |= txo->q.id & DB_TXULP_RING_ID_MASK;
6b7c5b94 204 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
f3eb62d2
SP		 205
206 wmb();
94d73aaa 207 iowrite32(val, adapter->db + txo->db_offset);
6b7c5b94
SP		 208}
209
8788fdc2 210static void be_eq_notify(struct be_adapter *adapter, u16 qid,
748b539a 211 bool arm, bool clear_int, u16 num_popped)
6b7c5b94
SP		 212{
213 u32 val = 0;
03d28ffe 214
6b7c5b94 215 val |= qid & DB_EQ_RING_ID_MASK;
748b539a 216 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) << DB_EQ_RING_ID_EXT_MASK_SHIFT);
cf588477 217
f67ef7ba 218 if (adapter->eeh_error)
cf588477
SP		 219 return;
220
6b7c5b94
SP		 221 if (arm)
222 val |= 1 << DB_EQ_REARM_SHIFT;
223 if (clear_int)
224 val |= 1 << DB_EQ_CLR_SHIFT;
225 val |= 1 << DB_EQ_EVNT_SHIFT;
226 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 227 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 228}
229
8788fdc2 230void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 231{
232 u32 val = 0;
03d28ffe 233
6b7c5b94 234 val |= qid & DB_CQ_RING_ID_MASK;
fe6d2a38
SP		 235 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
236 DB_CQ_RING_ID_EXT_MASK_SHIFT);
cf588477 237
f67ef7ba 238 if (adapter->eeh_error)
cf588477
SP		 239 return;
240
6b7c5b94
SP		 241 if (arm)
242 val |= 1 << DB_CQ_REARM_SHIFT;
243 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 244 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 245}
246
6b7c5b94
SP		 247static int be_mac_addr_set(struct net_device *netdev, void *p)
248{
249 struct be_adapter *adapter = netdev_priv(netdev);
5a712c13 250 struct device *dev = &adapter->pdev->dev;
6b7c5b94 251 struct sockaddr *addr = p;
5a712c13
SP		 252 int status;
253 u8 mac[ETH_ALEN];
254 u32 old_pmac_id = adapter->pmac_id[0], curr_pmac_id = 0;
6b7c5b94 255
ca9e4988
AK		 256 if (!is_valid_ether_addr(addr->sa_data))
257 return -EADDRNOTAVAIL;
258
ff32f8ab
VV		 259 /* Proceed further only if, User provided MAC is different
260 * from active MAC
261 */
262 if (ether_addr_equal(addr->sa_data, netdev->dev_addr))
263 return 0;
264
5a712c13
SP		 265 /* The PMAC_ADD cmd may fail if the VF doesn't have FILTMGMT
266 * privilege or if PF did not provision the new MAC address.
267 * On BE3, this cmd will always fail if the VF doesn't have the
268 * FILTMGMT privilege. This failure is OK, only if the PF programmed
269 * the MAC for the VF.
704e4c88 270 */
5a712c13
SP		 271 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
272 adapter->if_handle, &adapter->pmac_id[0], 0);
273 if (!status) {
274 curr_pmac_id = adapter->pmac_id[0];
275
276 /* Delete the old programmed MAC. This call may fail if the
277 * old MAC was already deleted by the PF driver.
278 */
279 if (adapter->pmac_id[0] != old_pmac_id)
280 be_cmd_pmac_del(adapter, adapter->if_handle,
281 old_pmac_id, 0);
704e4c88
PR		 282 }
283
5a712c13
SP		 284 /* Decide if the new MAC is successfully activated only after
285 * querying the FW
704e4c88 286 */
b188f090
SR		 287 status = be_cmd_get_active_mac(adapter, curr_pmac_id, mac,
288 adapter->if_handle, true, 0);
a65027e4 289 if (status)
e3a7ae2c 290 goto err;
6b7c5b94 291
5a712c13
SP		 292 /* The MAC change did not happen, either due to lack of privilege
293 * or PF didn't pre-provision.
294 */
61d23e9f 295 if (!ether_addr_equal(addr->sa_data, mac)) {
5a712c13
SP		 296 status = -EPERM;
297 goto err;
298 }
299
e3a7ae2c 300 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
5a712c13 301 dev_info(dev, "MAC address changed to %pM\n", mac);
e3a7ae2c
SK		 302 return 0;
303err:
5a712c13 304 dev_warn(dev, "MAC address change to %pM failed\n", addr->sa_data);
6b7c5b94
SP		 305 return status;
306}
307
ca34fe38
SP		 308/* BE2 supports only v0 cmd */
309static void *hw_stats_from_cmd(struct be_adapter *adapter)
310{
311 if (BE2_chip(adapter)) {
312 struct be_cmd_resp_get_stats_v0 *cmd = adapter->stats_cmd.va;
313
314 return &cmd->hw_stats;
61000861 315 } else if (BE3_chip(adapter)) {
ca34fe38
SP		 316 struct be_cmd_resp_get_stats_v1 *cmd = adapter->stats_cmd.va;
317
61000861
AK		 318 return &cmd->hw_stats;
319 } else {
320 struct be_cmd_resp_get_stats_v2 *cmd = adapter->stats_cmd.va;
321
ca34fe38
SP		 322 return &cmd->hw_stats;
323 }
324}
325
326/* BE2 supports only v0 cmd */
327static void *be_erx_stats_from_cmd(struct be_adapter *adapter)
328{
329 if (BE2_chip(adapter)) {
330 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
331
332 return &hw_stats->erx;
61000861 333 } else if (BE3_chip(adapter)) {
ca34fe38
SP		 334 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
335
61000861
AK		 336 return &hw_stats->erx;
337 } else {
338 struct be_hw_stats_v2 *hw_stats = hw_stats_from_cmd(adapter);
339
ca34fe38
SP		 340 return &hw_stats->erx;
341 }
342}
343
344static void populate_be_v0_stats(struct be_adapter *adapter)
89a88ab8 345{
ac124ff9
SP		 346 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
347 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
348 struct be_rxf_stats_v0 *rxf_stats = &hw_stats->rxf;
89a88ab8 349 struct be_port_rxf_stats_v0 *port_stats =
ac124ff9
SP		 350 &rxf_stats->port[adapter->port_num];
351 struct be_drv_stats *drvs = &adapter->drv_stats;
89a88ab8 352
ac124ff9 353 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
89a88ab8
AK		 354 drvs->rx_pause_frames = port_stats->rx_pause_frames;
355 drvs->rx_crc_errors = port_stats->rx_crc_errors;
356 drvs->rx_control_frames = port_stats->rx_control_frames;
357 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
358 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
359 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
360 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
361 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
362 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
363 drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow;
364 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
365 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
366 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
367 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
ac124ff9 368 drvs->rx_input_fifo_overflow_drop = port_stats->rx_input_fifo_overflow;
89a88ab8
AK		 369 drvs->rx_dropped_header_too_small =
370 port_stats->rx_dropped_header_too_small;
18fb06a1
SR		 371 drvs->rx_address_filtered =
372 port_stats->rx_address_filtered +
373 port_stats->rx_vlan_filtered;
89a88ab8
AK		 374 drvs->rx_alignment_symbol_errors =
375 port_stats->rx_alignment_symbol_errors;
376
377 drvs->tx_pauseframes = port_stats->tx_pauseframes;
378 drvs->tx_controlframes = port_stats->tx_controlframes;
379
380 if (adapter->port_num)
ac124ff9 381 drvs->jabber_events = rxf_stats->port1_jabber_events;
89a88ab8 382 else
ac124ff9 383 drvs->jabber_events = rxf_stats->port0_jabber_events;
89a88ab8 384 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
89a88ab8 385 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
89a88ab8
AK		 386 drvs->forwarded_packets = rxf_stats->forwarded_packets;
387 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
ac124ff9
SP		 388 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
389 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
89a88ab8
AK		 390 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
391}
392
ca34fe38 393static void populate_be_v1_stats(struct be_adapter *adapter)
89a88ab8 394{
ac124ff9
SP		 395 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
396 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
397 struct be_rxf_stats_v1 *rxf_stats = &hw_stats->rxf;
89a88ab8 398 struct be_port_rxf_stats_v1 *port_stats =
ac124ff9
SP		 399 &rxf_stats->port[adapter->port_num];
400 struct be_drv_stats *drvs = &adapter->drv_stats;
89a88ab8 401
ac124ff9 402 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
02fe7027
AK		 403 drvs->pmem_fifo_overflow_drop = port_stats->pmem_fifo_overflow_drop;
404 drvs->rx_priority_pause_frames = port_stats->rx_priority_pause_frames;
89a88ab8
AK		 405 drvs->rx_pause_frames = port_stats->rx_pause_frames;
406 drvs->rx_crc_errors = port_stats->rx_crc_errors;
407 drvs->rx_control_frames = port_stats->rx_control_frames;
408 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
409 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
410 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
411 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
412 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
413 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
414 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
415 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
416 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
417 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
418 drvs->rx_dropped_header_too_small =
419 port_stats->rx_dropped_header_too_small;
420 drvs->rx_input_fifo_overflow_drop =
421 port_stats->rx_input_fifo_overflow_drop;
18fb06a1 422 drvs->rx_address_filtered = port_stats->rx_address_filtered;
89a88ab8
AK		 423 drvs->rx_alignment_symbol_errors =
424 port_stats->rx_alignment_symbol_errors;
ac124ff9 425 drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop;
89a88ab8
AK		 426 drvs->tx_pauseframes = port_stats->tx_pauseframes;
427 drvs->tx_controlframes = port_stats->tx_controlframes;
b5adffc4 428 drvs->tx_priority_pauseframes = port_stats->tx_priority_pauseframes;
89a88ab8
AK		 429 drvs->jabber_events = port_stats->jabber_events;
430 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
89a88ab8 431 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
89a88ab8
AK		 432 drvs->forwarded_packets = rxf_stats->forwarded_packets;
433 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
ac124ff9
SP		 434 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
435 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
89a88ab8
AK		 436 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
437}
438
61000861
AK		 439static void populate_be_v2_stats(struct be_adapter *adapter)
440{
441 struct be_hw_stats_v2 *hw_stats = hw_stats_from_cmd(adapter);
442 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
443 struct be_rxf_stats_v2 *rxf_stats = &hw_stats->rxf;
444 struct be_port_rxf_stats_v2 *port_stats =
445 &rxf_stats->port[adapter->port_num];
446 struct be_drv_stats *drvs = &adapter->drv_stats;
447
448 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
449 drvs->pmem_fifo_overflow_drop = port_stats->pmem_fifo_overflow_drop;
450 drvs->rx_priority_pause_frames = port_stats->rx_priority_pause_frames;
451 drvs->rx_pause_frames = port_stats->rx_pause_frames;
452 drvs->rx_crc_errors = port_stats->rx_crc_errors;
453 drvs->rx_control_frames = port_stats->rx_control_frames;
454 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
455 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
456 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
457 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
458 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
459 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
460 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
461 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
462 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
463 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
464 drvs->rx_dropped_header_too_small =
465 port_stats->rx_dropped_header_too_small;
466 drvs->rx_input_fifo_overflow_drop =
467 port_stats->rx_input_fifo_overflow_drop;
468 drvs->rx_address_filtered = port_stats->rx_address_filtered;
469 drvs->rx_alignment_symbol_errors =
470 port_stats->rx_alignment_symbol_errors;
471 drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop;
472 drvs->tx_pauseframes = port_stats->tx_pauseframes;
473 drvs->tx_controlframes = port_stats->tx_controlframes;
474 drvs->tx_priority_pauseframes = port_stats->tx_priority_pauseframes;
475 drvs->jabber_events = port_stats->jabber_events;
476 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
477 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
478 drvs->forwarded_packets = rxf_stats->forwarded_packets;
479 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
480 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
481 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
482 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
748b539a 483 if (be_roce_supported(adapter)) {
461ae379
AK		 484 drvs->rx_roce_bytes_lsd = port_stats->roce_bytes_received_lsd;
485 drvs->rx_roce_bytes_msd = port_stats->roce_bytes_received_msd;
486 drvs->rx_roce_frames = port_stats->roce_frames_received;
487 drvs->roce_drops_crc = port_stats->roce_drops_crc;
488 drvs->roce_drops_payload_len =
489 port_stats->roce_drops_payload_len;
490 }
61000861
AK		 491}
492
005d5696
SX		 493static void populate_lancer_stats(struct be_adapter *adapter)
494{
005d5696 495 struct be_drv_stats *drvs = &adapter->drv_stats;
748b539a 496 struct lancer_pport_stats *pport_stats = pport_stats_from_cmd(adapter);
ac124ff9
SP		 497
498 be_dws_le_to_cpu(pport_stats, sizeof(*pport_stats));
499 drvs->rx_pause_frames = pport_stats->rx_pause_frames_lo;
500 drvs->rx_crc_errors = pport_stats->rx_crc_errors_lo;
501 drvs->rx_control_frames = pport_stats->rx_control_frames_lo;
005d5696 502 drvs->rx_in_range_errors = pport_stats->rx_in_range_errors;
ac124ff9 503 drvs->rx_frame_too_long = pport_stats->rx_frames_too_long_lo;
005d5696
SX		 504 drvs->rx_dropped_runt = pport_stats->rx_dropped_runt;
505 drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors;
506 drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors;
507 drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors;
508 drvs->rx_dropped_tcp_length =
509 pport_stats->rx_dropped_invalid_tcp_length;
510 drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small;
511 drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short;
512 drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors;
513 drvs->rx_dropped_header_too_small =
514 pport_stats->rx_dropped_header_too_small;
515 drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
18fb06a1
SR		 516 drvs->rx_address_filtered =
517 pport_stats->rx_address_filtered +
518 pport_stats->rx_vlan_filtered;
ac124ff9 519 drvs->rx_alignment_symbol_errors = pport_stats->rx_symbol_errors_lo;
005d5696 520 drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
ac124ff9
SP		 521 drvs->tx_pauseframes = pport_stats->tx_pause_frames_lo;
522 drvs->tx_controlframes = pport_stats->tx_control_frames_lo;
005d5696 523 drvs->jabber_events = pport_stats->rx_jabbers;
ac124ff9
SP		 524 drvs->forwarded_packets = pport_stats->num_forwards_lo;
525 drvs->rx_drops_mtu = pport_stats->rx_drops_mtu_lo;
005d5696 526 drvs->rx_drops_too_many_frags =
ac124ff9 527 pport_stats->rx_drops_too_many_frags_lo;
005d5696 528}
89a88ab8 529
09c1c68f
SP		 530static void accumulate_16bit_val(u32 *acc, u16 val)
531{
532#define lo(x) (x & 0xFFFF)
533#define hi(x) (x & 0xFFFF0000)
534 bool wrapped = val < lo(*acc);
535 u32 newacc = hi(*acc) + val;
536
537 if (wrapped)
538 newacc += 65536;
539 ACCESS_ONCE(*acc) = newacc;
540}
541
4188e7df 542static void populate_erx_stats(struct be_adapter *adapter,
748b539a 543 struct be_rx_obj *rxo, u32 erx_stat)
a6c578ef
AK		 544{
545 if (!BEx_chip(adapter))
546 rx_stats(rxo)->rx_drops_no_frags = erx_stat;
547 else
548 /* below erx HW counter can actually wrap around after
549 * 65535. Driver accumulates a 32-bit value
550 */
551 accumulate_16bit_val(&rx_stats(rxo)->rx_drops_no_frags,
552 (u16)erx_stat);
553}
554
89a88ab8
AK		 555void be_parse_stats(struct be_adapter *adapter)
556{
61000861 557 struct be_erx_stats_v2 *erx = be_erx_stats_from_cmd(adapter);
ac124ff9
SP		 558 struct be_rx_obj *rxo;
559 int i;
a6c578ef 560 u32 erx_stat;
ac124ff9 561
ca34fe38
SP		 562 if (lancer_chip(adapter)) {
563 populate_lancer_stats(adapter);
005d5696 564 } else {
ca34fe38
SP		 565 if (BE2_chip(adapter))
566 populate_be_v0_stats(adapter);
61000861
AK		 567 else if (BE3_chip(adapter))
568 /* for BE3 */
ca34fe38 569 populate_be_v1_stats(adapter);
61000861
AK		 570 else
571 populate_be_v2_stats(adapter);
d51ebd33 572
61000861 573 /* erx_v2 is longer than v0, v1. use v2 for v0, v1 access */
ca34fe38 574 for_all_rx_queues(adapter, rxo, i) {
a6c578ef
AK		 575 erx_stat = erx->rx_drops_no_fragments[rxo->q.id];
576 populate_erx_stats(adapter, rxo, erx_stat);
ca34fe38 577 }
09c1c68f 578 }
89a88ab8
AK		 579}
580
ab1594e9 581static struct rtnl_link_stats64 *be_get_stats64(struct net_device *netdev,
748b539a 582 struct rtnl_link_stats64 *stats)
6b7c5b94 583{
ab1594e9 584 struct be_adapter *adapter = netdev_priv(netdev);
89a88ab8 585 struct be_drv_stats *drvs = &adapter->drv_stats;
3abcdeda 586 struct be_rx_obj *rxo;
3c8def97 587 struct be_tx_obj *txo;
ab1594e9
SP		 588 u64 pkts, bytes;
589 unsigned int start;
3abcdeda 590 int i;
6b7c5b94 591
3abcdeda 592 for_all_rx_queues(adapter, rxo, i) {
ab1594e9 593 const struct be_rx_stats *rx_stats = rx_stats(rxo);
03d28ffe 594
ab1594e9 595 do {
57a7744e 596 start = u64_stats_fetch_begin_irq(&rx_stats->sync);
ab1594e9
SP		 597 pkts = rx_stats(rxo)->rx_pkts;
598 bytes = rx_stats(rxo)->rx_bytes;
57a7744e 599 } while (u64_stats_fetch_retry_irq(&rx_stats->sync, start));
ab1594e9
SP		 600 stats->rx_packets += pkts;
601 stats->rx_bytes += bytes;
602 stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
603 stats->rx_dropped += rx_stats(rxo)->rx_drops_no_skbs +
604 rx_stats(rxo)->rx_drops_no_frags;
3abcdeda
SP		 605 }
606
3c8def97 607 for_all_tx_queues(adapter, txo, i) {
ab1594e9 608 const struct be_tx_stats *tx_stats = tx_stats(txo);
03d28ffe 609
ab1594e9 610 do {
57a7744e 611 start = u64_stats_fetch_begin_irq(&tx_stats->sync);
ab1594e9
SP		 612 pkts = tx_stats(txo)->tx_pkts;
613 bytes = tx_stats(txo)->tx_bytes;
57a7744e 614 } while (u64_stats_fetch_retry_irq(&tx_stats->sync, start));
ab1594e9
SP		 615 stats->tx_packets += pkts;
616 stats->tx_bytes += bytes;
3c8def97 617 }
6b7c5b94
SP		 618
619 /* bad pkts received */
ab1594e9 620 stats->rx_errors = drvs->rx_crc_errors +
89a88ab8
AK		 621 drvs->rx_alignment_symbol_errors +
622 drvs->rx_in_range_errors +
623 drvs->rx_out_range_errors +
624 drvs->rx_frame_too_long +
625 drvs->rx_dropped_too_small +
626 drvs->rx_dropped_too_short +
627 drvs->rx_dropped_header_too_small +
628 drvs->rx_dropped_tcp_length +
ab1594e9 629 drvs->rx_dropped_runt;
68110868 630
6b7c5b94 631 /* detailed rx errors */
ab1594e9 632 stats->rx_length_errors = drvs->rx_in_range_errors +
89a88ab8
AK		 633 drvs->rx_out_range_errors +
634 drvs->rx_frame_too_long;
68110868 635
ab1594e9 636 stats->rx_crc_errors = drvs->rx_crc_errors;
6b7c5b94
SP		 637
638 /* frame alignment errors */
ab1594e9 639 stats->rx_frame_errors = drvs->rx_alignment_symbol_errors;
68110868 640
6b7c5b94
SP		 641 /* receiver fifo overrun */
642 /* drops_no_pbuf is no per i/f, it's per BE card */
ab1594e9 643 stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop +
89a88ab8
AK		 644 drvs->rx_input_fifo_overflow_drop +
645 drvs->rx_drops_no_pbuf;
ab1594e9 646 return stats;
6b7c5b94
SP		 647}
648
b236916a 649void be_link_status_update(struct be_adapter *adapter, u8 link_status)
6b7c5b94 650{
6b7c5b94
SP		 651 struct net_device *netdev = adapter->netdev;
652
b236916a 653 if (!(adapter->flags & BE_FLAGS_LINK_STATUS_INIT)) {
ea172a01 654 netif_carrier_off(netdev);
b236916a 655 adapter->flags |= BE_FLAGS_LINK_STATUS_INIT;
6b7c5b94 656 }
b236916a 657
bdce2ad7 658 if (link_status)
b236916a
AK		 659 netif_carrier_on(netdev);
660 else
661 netif_carrier_off(netdev);
6b7c5b94
SP		 662}
663
5f07b3c5 664static void be_tx_stats_update(struct be_tx_obj *txo, struct sk_buff *skb)
6b7c5b94 665{
3c8def97
SP		 666 struct be_tx_stats *stats = tx_stats(txo);
667
ab1594e9 668 u64_stats_update_begin(&stats->sync);
ac124ff9 669 stats->tx_reqs++;
5f07b3c5
SP		 670 stats->tx_bytes += skb->len;
671 stats->tx_pkts += (skb_shinfo(skb)->gso_segs ? : 1);
ab1594e9 672 u64_stats_update_end(&stats->sync);
6b7c5b94
SP		 673}
674
5f07b3c5
SP		 675/* Returns number of WRBs needed for the skb */
676static u32 skb_wrb_cnt(struct sk_buff *skb)
6b7c5b94 677{
5f07b3c5
SP		 678 /* +1 for the header wrb */
679 return 1 + (skb_headlen(skb) ? 1 : 0) + skb_shinfo(skb)->nr_frags;
6b7c5b94
SP		 680}
681
682static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
683{
f986afcb
SP		 684 wrb->frag_pa_hi = cpu_to_le32(upper_32_bits(addr));
685 wrb->frag_pa_lo = cpu_to_le32(lower_32_bits(addr));
686 wrb->frag_len = cpu_to_le32(len & ETH_WRB_FRAG_LEN_MASK);
687 wrb->rsvd0 = 0;
688}
689
690/* A dummy wrb is just all zeros. Using a separate routine for dummy-wrb
691 * to avoid the swap and shift/mask operations in wrb_fill().
692 */
693static inline void wrb_fill_dummy(struct be_eth_wrb *wrb)
694{
695 wrb->frag_pa_hi = 0;
696 wrb->frag_pa_lo = 0;
697 wrb->frag_len = 0;
89b1f496 698 wrb->rsvd0 = 0;
6b7c5b94
SP		 699}
700
1ded132d 701static inline u16 be_get_tx_vlan_tag(struct be_adapter *adapter,
748b539a 702 struct sk_buff *skb)
1ded132d
AK		 703{
704 u8 vlan_prio;
705 u16 vlan_tag;
706
df8a39de 707 vlan_tag = skb_vlan_tag_get(skb);
1ded132d
AK		 708 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
709 /* If vlan priority provided by OS is NOT in available bmap */
710 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
711 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
712 adapter->recommended_prio;
713
714 return vlan_tag;
715}
716
c9c47142
SP		 717/* Used only for IP tunnel packets */
718static u16 skb_inner_ip_proto(struct sk_buff *skb)
719{
720 return (inner_ip_hdr(skb)->version == 4) ?
721 inner_ip_hdr(skb)->protocol : inner_ipv6_hdr(skb)->nexthdr;
722}
723
724static u16 skb_ip_proto(struct sk_buff *skb)
725{
726 return (ip_hdr(skb)->version == 4) ?
727 ip_hdr(skb)->protocol : ipv6_hdr(skb)->nexthdr;
728}
729
cf5671e6
SB		 730static inline bool be_is_txq_full(struct be_tx_obj *txo)
731{
732 return atomic_read(&txo->q.used) + BE_MAX_TX_FRAG_COUNT >= txo->q.len;
733}
734
735static inline bool be_can_txq_wake(struct be_tx_obj *txo)
736{
737 return atomic_read(&txo->q.used) < txo->q.len / 2;
738}
739
740static inline bool be_is_tx_compl_pending(struct be_tx_obj *txo)
741{
742 return atomic_read(&txo->q.used) > txo->pend_wrb_cnt;
743}
744
804abcdb
SB		 745static void be_get_wrb_params_from_skb(struct be_adapter *adapter,
746 struct sk_buff *skb,
747 struct be_wrb_params *wrb_params)
6b7c5b94 748{
804abcdb 749 u16 proto;
6b7c5b94 750
49e4b847 751 if (skb_is_gso(skb)) {
804abcdb
SB		 752 BE_WRB_F_SET(wrb_params->features, LSO, 1);
753 wrb_params->lso_mss = skb_shinfo(skb)->gso_size;
fe6d2a38 754 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
804abcdb 755 BE_WRB_F_SET(wrb_params->features, LSO6, 1);
6b7c5b94 756 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
c9c47142 757 if (skb->encapsulation) {
804abcdb 758 BE_WRB_F_SET(wrb_params->features, IPCS, 1);
c9c47142
SP		 759 proto = skb_inner_ip_proto(skb);
760 } else {
761 proto = skb_ip_proto(skb);
762 }
763 if (proto == IPPROTO_TCP)
804abcdb 764 BE_WRB_F_SET(wrb_params->features, TCPCS, 1);
c9c47142 765 else if (proto == IPPROTO_UDP)
804abcdb 766 BE_WRB_F_SET(wrb_params->features, UDPCS, 1);
6b7c5b94
SP		 767 }
768
df8a39de 769 if (skb_vlan_tag_present(skb)) {
804abcdb
SB		 770 BE_WRB_F_SET(wrb_params->features, VLAN, 1);
771 wrb_params->vlan_tag = be_get_tx_vlan_tag(adapter, skb);
6b7c5b94
SP		 772 }
773
804abcdb
SB		 774 BE_WRB_F_SET(wrb_params->features, CRC, 1);
775}
5f07b3c5 776
804abcdb
SB		 777static void wrb_fill_hdr(struct be_adapter *adapter,
778 struct be_eth_hdr_wrb *hdr,
779 struct be_wrb_params *wrb_params,
780 struct sk_buff *skb)
781{
782 memset(hdr, 0, sizeof(*hdr));
783
784 SET_TX_WRB_HDR_BITS(crc, hdr,
785 BE_WRB_F_GET(wrb_params->features, CRC));
786 SET_TX_WRB_HDR_BITS(ipcs, hdr,
787 BE_WRB_F_GET(wrb_params->features, IPCS));
788 SET_TX_WRB_HDR_BITS(tcpcs, hdr,
789 BE_WRB_F_GET(wrb_params->features, TCPCS));
790 SET_TX_WRB_HDR_BITS(udpcs, hdr,
791 BE_WRB_F_GET(wrb_params->features, UDPCS));
792
793 SET_TX_WRB_HDR_BITS(lso, hdr,
794 BE_WRB_F_GET(wrb_params->features, LSO));
795 SET_TX_WRB_HDR_BITS(lso6, hdr,
796 BE_WRB_F_GET(wrb_params->features, LSO6));
797 SET_TX_WRB_HDR_BITS(lso_mss, hdr, wrb_params->lso_mss);
798
799 /* Hack to skip HW VLAN tagging needs evt = 1, compl = 0. When this
800 * hack is not needed, the evt bit is set while ringing DB.
5f07b3c5 801 */
804abcdb
SB		 802 SET_TX_WRB_HDR_BITS(event, hdr,
803 BE_WRB_F_GET(wrb_params->features, VLAN_SKIP_HW));
804 SET_TX_WRB_HDR_BITS(vlan, hdr,
805 BE_WRB_F_GET(wrb_params->features, VLAN));
806 SET_TX_WRB_HDR_BITS(vlan_tag, hdr, wrb_params->vlan_tag);
807
808 SET_TX_WRB_HDR_BITS(num_wrb, hdr, skb_wrb_cnt(skb));
809 SET_TX_WRB_HDR_BITS(len, hdr, skb->len);
6b7c5b94
SP		 810}
811
2b7bcebf 812static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb,
748b539a 813 bool unmap_single)
7101e111
SP		 814{
815 dma_addr_t dma;
f986afcb 816 u32 frag_len = le32_to_cpu(wrb->frag_len);
7101e111 817
7101e111 818
f986afcb
SP		 819 dma = (u64)le32_to_cpu(wrb->frag_pa_hi) << 32 |
820 (u64)le32_to_cpu(wrb->frag_pa_lo);
821 if (frag_len) {
7101e111 822 if (unmap_single)
f986afcb 823 dma_unmap_single(dev, dma, frag_len, DMA_TO_DEVICE);
7101e111 824 else
f986afcb 825 dma_unmap_page(dev, dma, frag_len, DMA_TO_DEVICE);
7101e111
SP		 826 }
827}
6b7c5b94 828
79a0d7d8
SB		 829/* Grab a WRB header for xmit */
830static u16 be_tx_get_wrb_hdr(struct be_tx_obj *txo)
831{
832 u16 head = txo->q.head;
833
834 queue_head_inc(&txo->q);
835 return head;
836}
837
838/* Set up the WRB header for xmit */
839static void be_tx_setup_wrb_hdr(struct be_adapter *adapter,
840 struct be_tx_obj *txo,
841 struct be_wrb_params *wrb_params,
842 struct sk_buff *skb, u16 head)
843{
844 u32 num_frags = skb_wrb_cnt(skb);
845 struct be_queue_info *txq = &txo->q;
846 struct be_eth_hdr_wrb *hdr = queue_index_node(txq, head);
847
848 wrb_fill_hdr(adapter, hdr, wrb_params, skb);
849 be_dws_cpu_to_le(hdr, sizeof(*hdr));
850
851 BUG_ON(txo->sent_skb_list[head]);
852 txo->sent_skb_list[head] = skb;
853 txo->last_req_hdr = head;
854 atomic_add(num_frags, &txq->used);
855 txo->last_req_wrb_cnt = num_frags;
856 txo->pend_wrb_cnt += num_frags;
857}
858
859/* Setup a WRB fragment (buffer descriptor) for xmit */
860static void be_tx_setup_wrb_frag(struct be_tx_obj *txo, dma_addr_t busaddr,
861 int len)
862{
863 struct be_eth_wrb *wrb;
864 struct be_queue_info *txq = &txo->q;
865
866 wrb = queue_head_node(txq);
867 wrb_fill(wrb, busaddr, len);
868 queue_head_inc(txq);
869}
870
871/* Bring the queue back to the state it was in before be_xmit_enqueue() routine
872 * was invoked. The producer index is restored to the previous packet and the
873 * WRBs of the current packet are unmapped. Invoked to handle tx setup errors.
874 */
875static void be_xmit_restore(struct be_adapter *adapter,
876 struct be_tx_obj *txo, u16 head, bool map_single,
877 u32 copied)
878{
879 struct device *dev;
880 struct be_eth_wrb *wrb;
881 struct be_queue_info *txq = &txo->q;
882
883 dev = &adapter->pdev->dev;
884 txq->head = head;
885
886 /* skip the first wrb (hdr); it's not mapped */
887 queue_head_inc(txq);
888 while (copied) {
889 wrb = queue_head_node(txq);
890 unmap_tx_frag(dev, wrb, map_single);
891 map_single = false;
892 copied -= le32_to_cpu(wrb->frag_len);
893 queue_head_inc(txq);
894 }
895
896 txq->head = head;
897}
898
899/* Enqueue the given packet for transmit. This routine allocates WRBs for the
900 * packet, dma maps the packet buffers and sets up the WRBs. Returns the number
901 * of WRBs used up by the packet.
902 */
5f07b3c5 903static u32 be_xmit_enqueue(struct be_adapter *adapter, struct be_tx_obj *txo,
804abcdb
SB		 904 struct sk_buff *skb,
905 struct be_wrb_params *wrb_params)
6b7c5b94 906{
5f07b3c5 907 u32 i, copied = 0, wrb_cnt = skb_wrb_cnt(skb);
2b7bcebf 908 struct device *dev = &adapter->pdev->dev;
5f07b3c5 909 struct be_queue_info *txq = &txo->q;
7101e111 910 bool map_single = false;
5f07b3c5 911 u16 head = txq->head;
79a0d7d8
SB		 912 dma_addr_t busaddr;
913 int len;
6b7c5b94 914
79a0d7d8 915 head = be_tx_get_wrb_hdr(txo);
6b7c5b94 916
ebc8d2ab 917 if (skb->len > skb->data_len) {
79a0d7d8 918 len = skb_headlen(skb);
03d28ffe 919
2b7bcebf
IV		 920 busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE);
921 if (dma_mapping_error(dev, busaddr))
7101e111
SP		 922 goto dma_err;
923 map_single = true;
79a0d7d8 924 be_tx_setup_wrb_frag(txo, busaddr, len);
ebc8d2ab
DM		 925 copied += len;
926 }
6b7c5b94 927
ebc8d2ab 928 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
748b539a 929 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
79a0d7d8 930 len = skb_frag_size(frag);
03d28ffe 931
79a0d7d8 932 busaddr = skb_frag_dma_map(dev, frag, 0, len, DMA_TO_DEVICE);
2b7bcebf 933 if (dma_mapping_error(dev, busaddr))
7101e111 934 goto dma_err;
79a0d7d8
SB		 935 be_tx_setup_wrb_frag(txo, busaddr, len);
936 copied += len;
6b7c5b94
SP		 937 }
938
79a0d7d8 939 be_tx_setup_wrb_hdr(adapter, txo, wrb_params, skb, head);
6b7c5b94 940
5f07b3c5
SP		 941 be_tx_stats_update(txo, skb);
942 return wrb_cnt;
6b7c5b94 943
7101e111 944dma_err:
79a0d7d8
SB		 945 adapter->drv_stats.dma_map_errors++;
946 be_xmit_restore(adapter, txo, head, map_single, copied);
7101e111 947 return 0;
6b7c5b94
SP		 948}
949
f7062ee5
SP		 950static inline int qnq_async_evt_rcvd(struct be_adapter *adapter)
951{
952 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
953}
954
93040ae5 955static struct sk_buff *be_insert_vlan_in_pkt(struct be_adapter *adapter,
bc0c3405 956 struct sk_buff *skb,
804abcdb
SB		 957 struct be_wrb_params
958 *wrb_params)
93040ae5
SK		 959{
960 u16 vlan_tag = 0;
961
962 skb = skb_share_check(skb, GFP_ATOMIC);
963 if (unlikely(!skb))
964 return skb;
965
df8a39de 966 if (skb_vlan_tag_present(skb))
93040ae5 967 vlan_tag = be_get_tx_vlan_tag(adapter, skb);
52fe29e4
SB		 968
969 if (qnq_async_evt_rcvd(adapter) && adapter->pvid) {
970 if (!vlan_tag)
971 vlan_tag = adapter->pvid;
972 /* f/w workaround to set skip_hw_vlan = 1, informs the F/W to
973 * skip VLAN insertion
974 */
804abcdb 975 BE_WRB_F_SET(wrb_params->features, VLAN_SKIP_HW, 1);
52fe29e4 976 }
bc0c3405
AK		 977
978 if (vlan_tag) {
62749e2c
JP		 979 skb = vlan_insert_tag_set_proto(skb, htons(ETH_P_8021Q),
980 vlan_tag);
bc0c3405
AK		 981 if (unlikely(!skb))
982 return skb;
bc0c3405
AK		 983 skb->vlan_tci = 0;
984 }
985
986 /* Insert the outer VLAN, if any */
987 if (adapter->qnq_vid) {
988 vlan_tag = adapter->qnq_vid;
62749e2c
JP		 989 skb = vlan_insert_tag_set_proto(skb, htons(ETH_P_8021Q),
990 vlan_tag);
bc0c3405
AK		 991 if (unlikely(!skb))
992 return skb;
804abcdb 993 BE_WRB_F_SET(wrb_params->features, VLAN_SKIP_HW, 1);
bc0c3405
AK		 994 }
995
93040ae5
SK		 996 return skb;
997}
998
bc0c3405
AK		 999static bool be_ipv6_exthdr_check(struct sk_buff *skb)
1000{
1001 struct ethhdr *eh = (struct ethhdr *)skb->data;
1002 u16 offset = ETH_HLEN;
1003
1004 if (eh->h_proto == htons(ETH_P_IPV6)) {
1005 struct ipv6hdr *ip6h = (struct ipv6hdr *)(skb->data + offset);
1006
1007 offset += sizeof(struct ipv6hdr);
1008 if (ip6h->nexthdr != NEXTHDR_TCP &&
1009 ip6h->nexthdr != NEXTHDR_UDP) {
1010 struct ipv6_opt_hdr *ehdr =
504fbf1e 1011 (struct ipv6_opt_hdr *)(skb->data + offset);
bc0c3405
AK		 1012
1013 /* offending pkt: 2nd byte following IPv6 hdr is 0xff */
1014 if (ehdr->hdrlen == 0xff)
1015 return true;
1016 }
1017 }
1018 return false;
1019}
1020
1021static int be_vlan_tag_tx_chk(struct be_adapter *adapter, struct sk_buff *skb)
1022{
df8a39de 1023 return skb_vlan_tag_present(skb) || adapter->pvid || adapter->qnq_vid;
bc0c3405
AK		 1024}
1025
748b539a 1026static int be_ipv6_tx_stall_chk(struct be_adapter *adapter, struct sk_buff *skb)
bc0c3405 1027{
ee9c799c 1028 return BE3_chip(adapter) && be_ipv6_exthdr_check(skb);
bc0c3405
AK		 1029}
1030
ec495fac
VV		 1031static struct sk_buff *be_lancer_xmit_workarounds(struct be_adapter *adapter,
1032 struct sk_buff *skb,
804abcdb
SB		 1033 struct be_wrb_params
1034 *wrb_params)
6b7c5b94 1035{
d2cb6ce7 1036 struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data;
ee9c799c
SP		 1037 unsigned int eth_hdr_len;
1038 struct iphdr *ip;
93040ae5 1039
1297f9db
AK		 1040 /* For padded packets, BE HW modifies tot_len field in IP header
1041 * incorrecly when VLAN tag is inserted by HW.
3904dcc4 1042 * For padded packets, Lancer computes incorrect checksum.
1ded132d 1043 */
ee9c799c
SP		 1044 eth_hdr_len = ntohs(skb->protocol) == ETH_P_8021Q ?
1045 VLAN_ETH_HLEN : ETH_HLEN;
3904dcc4 1046 if (skb->len <= 60 &&
df8a39de 1047 (lancer_chip(adapter) || skb_vlan_tag_present(skb)) &&
ee9c799c 1048 is_ipv4_pkt(skb)) {
93040ae5
SK		 1049 ip = (struct iphdr *)ip_hdr(skb);
1050 pskb_trim(skb, eth_hdr_len + ntohs(ip->tot_len));
1051 }
1ded132d 1052
d2cb6ce7 1053 /* If vlan tag is already inlined in the packet, skip HW VLAN
f93f160b 1054 * tagging in pvid-tagging mode
d2cb6ce7 1055 */
f93f160b 1056 if (be_pvid_tagging_enabled(adapter) &&
d2cb6ce7 1057 veh->h_vlan_proto == htons(ETH_P_8021Q))
804abcdb 1058 BE_WRB_F_SET(wrb_params->features, VLAN_SKIP_HW, 1);
d2cb6ce7 1059
93040ae5
SK		 1060 /* HW has a bug wherein it will calculate CSUM for VLAN
1061 * pkts even though it is disabled.
1062 * Manually insert VLAN in pkt.
1063 */
1064 if (skb->ip_summed != CHECKSUM_PARTIAL &&
df8a39de 1065 skb_vlan_tag_present(skb)) {
804abcdb 1066 skb = be_insert_vlan_in_pkt(adapter, skb, wrb_params);
bc0c3405 1067 if (unlikely(!skb))
c9128951 1068 goto err;
bc0c3405
AK		 1069 }
1070
1071 /* HW may lockup when VLAN HW tagging is requested on
1072 * certain ipv6 packets. Drop such pkts if the HW workaround to
1073 * skip HW tagging is not enabled by FW.
1074 */
1075 if (unlikely(be_ipv6_tx_stall_chk(adapter, skb) &&
cd3307aa
KA		 1076 (adapter->pvid || adapter->qnq_vid) &&
1077 !qnq_async_evt_rcvd(adapter)))
bc0c3405
AK		 1078 goto tx_drop;
1079
1080 /* Manual VLAN tag insertion to prevent:
1081 * ASIC lockup when the ASIC inserts VLAN tag into
1082 * certain ipv6 packets. Insert VLAN tags in driver,
1083 * and set event, completion, vlan bits accordingly
1084 * in the Tx WRB.
1085 */
1086 if (be_ipv6_tx_stall_chk(adapter, skb) &&
1087 be_vlan_tag_tx_chk(adapter, skb)) {
804abcdb 1088 skb = be_insert_vlan_in_pkt(adapter, skb, wrb_params);
1ded132d 1089 if (unlikely(!skb))
c9128951 1090 goto err;
1ded132d
AK		 1091 }
1092
ee9c799c
SP		 1093 return skb;
1094tx_drop:
1095 dev_kfree_skb_any(skb);
c9128951 1096err:
ee9c799c
SP		 1097 return NULL;
1098}
1099
ec495fac
VV		 1100static struct sk_buff *be_xmit_workarounds(struct be_adapter *adapter,
1101 struct sk_buff *skb,
804abcdb 1102 struct be_wrb_params *wrb_params)
ec495fac
VV		 1103{
1104 /* Lancer, SH-R ASICs have a bug wherein Packets that are 32 bytes or
1105 * less may cause a transmit stall on that port. So the work-around is
1106 * to pad short packets (<= 32 bytes) to a 36-byte length.
1107 */
1108 if (unlikely(!BEx_chip(adapter) && skb->len <= 32)) {
74b6939d 1109 if (skb_put_padto(skb, 36))
ec495fac 1110 return NULL;
ec495fac
VV		 1111 }
1112
1113 if (BEx_chip(adapter) || lancer_chip(adapter)) {
804abcdb 1114 skb = be_lancer_xmit_workarounds(adapter, skb, wrb_params);
ec495fac
VV		 1115 if (!skb)
1116 return NULL;
1117 }
1118
1119 return skb;
1120}
1121
5f07b3c5
SP		 1122static void be_xmit_flush(struct be_adapter *adapter, struct be_tx_obj *txo)
1123{
1124 struct be_queue_info *txq = &txo->q;
1125 struct be_eth_hdr_wrb *hdr = queue_index_node(txq, txo->last_req_hdr);
1126
1127 /* Mark the last request eventable if it hasn't been marked already */
1128 if (!(hdr->dw[2] & cpu_to_le32(TX_HDR_WRB_EVT)))
1129 hdr->dw[2] |= cpu_to_le32(TX_HDR_WRB_EVT | TX_HDR_WRB_COMPL);
1130
1131 /* compose a dummy wrb if there are odd set of wrbs to notify */
1132 if (!lancer_chip(adapter) && (txo->pend_wrb_cnt & 1)) {
f986afcb 1133 wrb_fill_dummy(queue_head_node(txq));
5f07b3c5
SP		 1134 queue_head_inc(txq);
1135 atomic_inc(&txq->used);
1136 txo->pend_wrb_cnt++;
1137 hdr->dw[2] &= ~cpu_to_le32(TX_HDR_WRB_NUM_MASK <<
1138 TX_HDR_WRB_NUM_SHIFT);
1139 hdr->dw[2] |= cpu_to_le32((txo->last_req_wrb_cnt + 1) <<
1140 TX_HDR_WRB_NUM_SHIFT);
1141 }
1142 be_txq_notify(adapter, txo, txo->pend_wrb_cnt);
1143 txo->pend_wrb_cnt = 0;
1144}
1145
ee9c799c
SP		 1146static netdev_tx_t be_xmit(struct sk_buff *skb, struct net_device *netdev)
1147{
1148 struct be_adapter *adapter = netdev_priv(netdev);
5f07b3c5
SP		 1149 u16 q_idx = skb_get_queue_mapping(skb);
1150 struct be_tx_obj *txo = &adapter->tx_obj[q_idx];
804abcdb 1151 struct be_wrb_params wrb_params = { 0 };
804abcdb 1152 bool flush = !skb->xmit_more;
5f07b3c5 1153 u16 wrb_cnt;
ee9c799c 1154
804abcdb 1155 skb = be_xmit_workarounds(adapter, skb, &wrb_params);
5f07b3c5
SP		 1156 if (unlikely(!skb))
1157 goto drop;
6b7c5b94 1158
804abcdb
SB		 1159 be_get_wrb_params_from_skb(adapter, skb, &wrb_params);
1160
1161 wrb_cnt = be_xmit_enqueue(adapter, txo, skb, &wrb_params);
5f07b3c5
SP		 1162 if (unlikely(!wrb_cnt)) {
1163 dev_kfree_skb_any(skb);
1164 goto drop;
1165 }
cd8f76c0 1166
cf5671e6 1167 if (be_is_txq_full(txo)) {
5f07b3c5
SP		 1168 netif_stop_subqueue(netdev, q_idx);
1169 tx_stats(txo)->tx_stops++;
1170 }
c190e3c8 1171
5f07b3c5
SP		 1172 if (flush || __netif_subqueue_stopped(netdev, q_idx))
1173 be_xmit_flush(adapter, txo);
6b7c5b94 1174
5f07b3c5
SP		 1175 return NETDEV_TX_OK;
1176drop:
1177 tx_stats(txo)->tx_drv_drops++;
1178 /* Flush the already enqueued tx requests */
1179 if (flush && txo->pend_wrb_cnt)
1180 be_xmit_flush(adapter, txo);
6b7c5b94 1181
6b7c5b94
SP		 1182 return NETDEV_TX_OK;
1183}
1184
1185static int be_change_mtu(struct net_device *netdev, int new_mtu)
1186{
1187 struct be_adapter *adapter = netdev_priv(netdev);
0d3f5cce
KA		 1188 struct device *dev = &adapter->pdev->dev;
1189
1190 if (new_mtu < BE_MIN_MTU || new_mtu > BE_MAX_MTU) {
1191 dev_info(dev, "MTU must be between %d and %d bytes\n",
1192 BE_MIN_MTU, BE_MAX_MTU);
6b7c5b94
SP		 1193 return -EINVAL;
1194 }
0d3f5cce
KA		 1195
1196 dev_info(dev, "MTU changed from %d to %d bytes\n",
748b539a 1197 netdev->mtu, new_mtu);
6b7c5b94
SP		 1198 netdev->mtu = new_mtu;
1199 return 0;
1200}
1201
f66b7cfd
SP		 1202static inline bool be_in_all_promisc(struct be_adapter *adapter)
1203{
1204 return (adapter->if_flags & BE_IF_FLAGS_ALL_PROMISCUOUS) ==
1205 BE_IF_FLAGS_ALL_PROMISCUOUS;
1206}
1207
1208static int be_set_vlan_promisc(struct be_adapter *adapter)
1209{
1210 struct device *dev = &adapter->pdev->dev;
1211 int status;
1212
1213 if (adapter->if_flags & BE_IF_FLAGS_VLAN_PROMISCUOUS)
1214 return 0;
1215
1216 status = be_cmd_rx_filter(adapter, BE_IF_FLAGS_VLAN_PROMISCUOUS, ON);
1217 if (!status) {
1218 dev_info(dev, "Enabled VLAN promiscuous mode\n");
1219 adapter->if_flags |= BE_IF_FLAGS_VLAN_PROMISCUOUS;
1220 } else {
1221 dev_err(dev, "Failed to enable VLAN promiscuous mode\n");
1222 }
1223 return status;
1224}
1225
1226static int be_clear_vlan_promisc(struct be_adapter *adapter)
1227{
1228 struct device *dev = &adapter->pdev->dev;
1229 int status;
1230
1231 status = be_cmd_rx_filter(adapter, BE_IF_FLAGS_VLAN_PROMISCUOUS, OFF);
1232 if (!status) {
1233 dev_info(dev, "Disabling VLAN promiscuous mode\n");
1234 adapter->if_flags &= ~BE_IF_FLAGS_VLAN_PROMISCUOUS;
1235 }
1236 return status;
1237}
1238
6b7c5b94 1239/*
82903e4b
AK		 1240 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
1241 * If the user configures more, place BE in vlan promiscuous mode.
6b7c5b94 1242 */
10329df8 1243static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 1244{
50762667 1245 struct device *dev = &adapter->pdev->dev;
10329df8 1246 u16 vids[BE_NUM_VLANS_SUPPORTED];
f6cbd364 1247 u16 num = 0, i = 0;
82903e4b 1248 int status = 0;
1da87b7f 1249
c0e64ef4 1250 /* No need to further configure vids if in promiscuous mode */
f66b7cfd 1251 if (be_in_all_promisc(adapter))
c0e64ef4
SP		 1252 return 0;
1253
92bf14ab 1254 if (adapter->vlans_added > be_max_vlans(adapter))
f66b7cfd 1255 return be_set_vlan_promisc(adapter);
0fc16ebf
PR		 1256
1257 /* Construct VLAN Table to give to HW */
f6cbd364
RN		 1258 for_each_set_bit(i, adapter->vids, VLAN_N_VID)
1259 vids[num++] = cpu_to_le16(i);
0fc16ebf 1260
4d567d97 1261 status = be_cmd_vlan_config(adapter, adapter->if_handle, vids, num);
0fc16ebf 1262 if (status) {
f66b7cfd 1263 dev_err(dev, "Setting HW VLAN filtering failed\n");
d9d604f8 1264 /* Set to VLAN promisc mode as setting VLAN filter failed */
4c60005f
KA		 1265 if (addl_status(status) ==
1266 MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES)
f66b7cfd
SP		 1267 return be_set_vlan_promisc(adapter);
1268 } else if (adapter->if_flags & BE_IF_FLAGS_VLAN_PROMISCUOUS) {
1269 status = be_clear_vlan_promisc(adapter);
6b7c5b94 1270 }
0fc16ebf 1271 return status;
6b7c5b94
SP		 1272}
1273
80d5c368 1274static int be_vlan_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
6b7c5b94
SP		 1275{
1276 struct be_adapter *adapter = netdev_priv(netdev);
80817cbf 1277 int status = 0;
6b7c5b94 1278
a85e9986
PR		 1279 /* Packets with VID 0 are always received by Lancer by default */
1280 if (lancer_chip(adapter) && vid == 0)
48291c22
VV		 1281 return status;
1282
f6cbd364 1283 if (test_bit(vid, adapter->vids))
48291c22 1284 return status;
a85e9986 1285
f6cbd364 1286 set_bit(vid, adapter->vids);
a6b74e01 1287 adapter->vlans_added++;
8e586137 1288
a6b74e01
SK		 1289 status = be_vid_config(adapter);
1290 if (status) {
1291 adapter->vlans_added--;
f6cbd364 1292 clear_bit(vid, adapter->vids);
a6b74e01 1293 }
48291c22 1294
80817cbf 1295 return status;
6b7c5b94
SP		 1296}
1297
80d5c368 1298static int be_vlan_rem_vid(struct net_device *netdev, __be16 proto, u16 vid)
6b7c5b94
SP		 1299{
1300 struct be_adapter *adapter = netdev_priv(netdev);
1301
a85e9986
PR		 1302 /* Packets with VID 0 are always received by Lancer by default */
1303 if (lancer_chip(adapter) && vid == 0)
9d4dfe4a 1304 return 0;
a85e9986 1305
f6cbd364 1306 clear_bit(vid, adapter->vids);
9d4dfe4a
KA		 1307 adapter->vlans_added--;
1308
1309 return be_vid_config(adapter);
6b7c5b94
SP		 1310}
1311
f66b7cfd 1312static void be_clear_all_promisc(struct be_adapter *adapter)
7ad09458 1313{
ac34b743 1314 be_cmd_rx_filter(adapter, BE_IF_FLAGS_ALL_PROMISCUOUS, OFF);
f66b7cfd 1315 adapter->if_flags &= ~BE_IF_FLAGS_ALL_PROMISCUOUS;
7ad09458
S		 1316}
1317
f66b7cfd
SP		 1318static void be_set_all_promisc(struct be_adapter *adapter)
1319{
1320 be_cmd_rx_filter(adapter, BE_IF_FLAGS_ALL_PROMISCUOUS, ON);
1321 adapter->if_flags |= BE_IF_FLAGS_ALL_PROMISCUOUS;
1322}
1323
1324static void be_set_mc_promisc(struct be_adapter *adapter)
6b7c5b94 1325{
0fc16ebf 1326 int status;
6b7c5b94 1327
f66b7cfd
SP		 1328 if (adapter->if_flags & BE_IF_FLAGS_MCAST_PROMISCUOUS)
1329 return;
6b7c5b94 1330
f66b7cfd
SP		 1331 status = be_cmd_rx_filter(adapter, BE_IF_FLAGS_MCAST_PROMISCUOUS, ON);
1332 if (!status)
1333 adapter->if_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS;
1334}
1335
1336static void be_set_mc_list(struct be_adapter *adapter)
1337{
1338 int status;
1339
1340 status = be_cmd_rx_filter(adapter, BE_IF_FLAGS_MULTICAST, ON);
1341 if (!status)
1342 adapter->if_flags &= ~BE_IF_FLAGS_MCAST_PROMISCUOUS;
1343 else
1344 be_set_mc_promisc(adapter);
1345}
1346
1347static void be_set_uc_list(struct be_adapter *adapter)
1348{
1349 struct netdev_hw_addr *ha;
1350 int i = 1; /* First slot is claimed by the Primary MAC */
1351
1352 for (; adapter->uc_macs > 0; adapter->uc_macs--, i++)
1353 be_cmd_pmac_del(adapter, adapter->if_handle,
1354 adapter->pmac_id[i], 0);
1355
1356 if (netdev_uc_count(adapter->netdev) > be_max_uc(adapter)) {
1357 be_set_all_promisc(adapter);
1358 return;
6b7c5b94
SP		 1359 }
1360
f66b7cfd
SP		 1361 netdev_for_each_uc_addr(ha, adapter->netdev) {
1362 adapter->uc_macs++; /* First slot is for Primary MAC */
1363 be_cmd_pmac_add(adapter, (u8 *)ha->addr, adapter->if_handle,
1364 &adapter->pmac_id[adapter->uc_macs], 0);
1365 }
1366}
6b7c5b94 1367
f66b7cfd
SP		 1368static void be_clear_uc_list(struct be_adapter *adapter)
1369{
1370 int i;
fbc13f01 1371
f66b7cfd
SP		 1372 for (i = 1; i < (adapter->uc_macs + 1); i++)
1373 be_cmd_pmac_del(adapter, adapter->if_handle,
1374 adapter->pmac_id[i], 0);
1375 adapter->uc_macs = 0;
1376}
fbc13f01 1377
f66b7cfd
SP		 1378static void be_set_rx_mode(struct net_device *netdev)
1379{
1380 struct be_adapter *adapter = netdev_priv(netdev);
fbc13f01 1381
f66b7cfd
SP		 1382 if (netdev->flags & IFF_PROMISC) {
1383 be_set_all_promisc(adapter);
1384 return;
fbc13f01
AK		 1385 }
1386
f66b7cfd
SP		 1387 /* Interface was previously in promiscuous mode; disable it */
1388 if (be_in_all_promisc(adapter)) {
1389 be_clear_all_promisc(adapter);
1390 if (adapter->vlans_added)
1391 be_vid_config(adapter);
0fc16ebf 1392 }
a0794885 1393
f66b7cfd
SP		 1394 /* Enable multicast promisc if num configured exceeds what we support */
1395 if (netdev->flags & IFF_ALLMULTI ||
1396 netdev_mc_count(netdev) > be_max_mc(adapter)) {
1397 be_set_mc_promisc(adapter);
a0794885 1398 return;
f66b7cfd 1399 }
a0794885 1400
f66b7cfd
SP		 1401 if (netdev_uc_count(netdev) != adapter->uc_macs)
1402 be_set_uc_list(adapter);
1403
1404 be_set_mc_list(adapter);
6b7c5b94
SP		 1405}
1406
ba343c77
SB		 1407static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1408{
1409 struct be_adapter *adapter = netdev_priv(netdev);
11ac75ed 1410 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
ba343c77
SB		 1411 int status;
1412
11ac75ed 1413 if (!sriov_enabled(adapter))
ba343c77
SB		 1414 return -EPERM;
1415
11ac75ed 1416 if (!is_valid_ether_addr(mac) || vf >= adapter->num_vfs)
ba343c77
SB		 1417 return -EINVAL;
1418
3c31aaf3
VV		 1419 /* Proceed further only if user provided MAC is different
1420 * from active MAC
1421 */
1422 if (ether_addr_equal(mac, vf_cfg->mac_addr))
1423 return 0;
1424
3175d8c2
SP		 1425 if (BEx_chip(adapter)) {
1426 be_cmd_pmac_del(adapter, vf_cfg->if_handle, vf_cfg->pmac_id,
1427 vf + 1);
ba343c77 1428
11ac75ed
SP		 1429 status = be_cmd_pmac_add(adapter, mac, vf_cfg->if_handle,
1430 &vf_cfg->pmac_id, vf + 1);
3175d8c2
SP		 1431 } else {
1432 status = be_cmd_set_mac(adapter, mac, vf_cfg->if_handle,
1433 vf + 1);
590c391d
PR		 1434 }
1435
abccf23e
KA		 1436 if (status) {
1437 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed: %#x",
1438 mac, vf, status);
1439 return be_cmd_status(status);
1440 }
64600ea5 1441
abccf23e
KA		 1442 ether_addr_copy(vf_cfg->mac_addr, mac);
1443
1444 return 0;
ba343c77
SB		 1445}
1446
64600ea5 1447static int be_get_vf_config(struct net_device *netdev, int vf,
748b539a 1448 struct ifla_vf_info *vi)
64600ea5
AK		 1449{
1450 struct be_adapter *adapter = netdev_priv(netdev);
11ac75ed 1451 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
64600ea5 1452
11ac75ed 1453 if (!sriov_enabled(adapter))
64600ea5
AK		 1454 return -EPERM;
1455
11ac75ed 1456 if (vf >= adapter->num_vfs)
64600ea5
AK		 1457 return -EINVAL;
1458
1459 vi->vf = vf;
ed616689
SC		 1460 vi->max_tx_rate = vf_cfg->tx_rate;
1461 vi->min_tx_rate = 0;
a60b3a13
AK		 1462 vi->vlan = vf_cfg->vlan_tag & VLAN_VID_MASK;
1463 vi->qos = vf_cfg->vlan_tag >> VLAN_PRIO_SHIFT;
11ac75ed 1464 memcpy(&vi->mac, vf_cfg->mac_addr, ETH_ALEN);
bdce2ad7 1465 vi->linkstate = adapter->vf_cfg[vf].plink_tracking;
64600ea5
AK		 1466
1467 return 0;
1468}
1469
748b539a 1470static int be_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos)
1da87b7f
AK		 1471{
1472 struct be_adapter *adapter = netdev_priv(netdev);
b9fc0e53 1473 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
1da87b7f
AK		 1474 int status = 0;
1475
11ac75ed 1476 if (!sriov_enabled(adapter))
1da87b7f
AK		 1477 return -EPERM;
1478
b9fc0e53 1479 if (vf >= adapter->num_vfs || vlan > 4095 || qos > 7)
1da87b7f
AK		 1480 return -EINVAL;
1481
b9fc0e53
AK		 1482 if (vlan || qos) {
1483 vlan |= qos << VLAN_PRIO_SHIFT;
c502224e 1484 if (vf_cfg->vlan_tag != vlan)
b9fc0e53
AK		 1485 status = be_cmd_set_hsw_config(adapter, vlan, vf + 1,
1486 vf_cfg->if_handle, 0);
1da87b7f 1487 } else {
f1f3ee1b 1488 /* Reset Transparent Vlan Tagging. */
c502224e
SK		 1489 status = be_cmd_set_hsw_config(adapter, BE_RESET_VLAN_TAG_ID,
1490 vf + 1, vf_cfg->if_handle, 0);
1da87b7f
AK		 1491 }
1492
abccf23e
KA		 1493 if (status) {
1494 dev_err(&adapter->pdev->dev,
1495 "VLAN %d config on VF %d failed : %#x\n", vlan,
1496 vf, status);
1497 return be_cmd_status(status);
1498 }
1499
1500 vf_cfg->vlan_tag = vlan;
1501
1502 return 0;
1da87b7f
AK		 1503}
1504
ed616689
SC		 1505static int be_set_vf_tx_rate(struct net_device *netdev, int vf,
1506 int min_tx_rate, int max_tx_rate)
e1d18735
AK		 1507{
1508 struct be_adapter *adapter = netdev_priv(netdev);
0f77ba73
RN		 1509 struct device *dev = &adapter->pdev->dev;
1510 int percent_rate, status = 0;
1511 u16 link_speed = 0;
1512 u8 link_status;
e1d18735 1513
11ac75ed 1514 if (!sriov_enabled(adapter))
e1d18735
AK		 1515 return -EPERM;
1516
94f434c2 1517 if (vf >= adapter->num_vfs)
e1d18735
AK		 1518 return -EINVAL;
1519
ed616689
SC		 1520 if (min_tx_rate)
1521 return -EINVAL;
1522
0f77ba73
RN		 1523 if (!max_tx_rate)
1524 goto config_qos;
1525
1526 status = be_cmd_link_status_query(adapter, &link_speed,
1527 &link_status, 0);
1528 if (status)
1529 goto err;
1530
1531 if (!link_status) {
1532 dev_err(dev, "TX-rate setting not allowed when link is down\n");
940a3fcd 1533 status = -ENETDOWN;
0f77ba73
RN		 1534 goto err;
1535 }
1536
1537 if (max_tx_rate < 100 || max_tx_rate > link_speed) {
1538 dev_err(dev, "TX-rate must be between 100 and %d Mbps\n",
1539 link_speed);
1540 status = -EINVAL;
1541 goto err;
1542 }
1543
1544 /* On Skyhawk the QOS setting must be done only as a % value */
1545 percent_rate = link_speed / 100;
1546 if (skyhawk_chip(adapter) && (max_tx_rate % percent_rate)) {
1547 dev_err(dev, "TX-rate must be a multiple of %d Mbps\n",
1548 percent_rate);
1549 status = -EINVAL;
1550 goto err;
94f434c2 1551 }
e1d18735 1552
0f77ba73
RN		 1553config_qos:
1554 status = be_cmd_config_qos(adapter, max_tx_rate, link_speed, vf + 1);
e1d18735 1555 if (status)
0f77ba73
RN		 1556 goto err;
1557
1558 adapter->vf_cfg[vf].tx_rate = max_tx_rate;
1559 return 0;
1560
1561err:
1562 dev_err(dev, "TX-rate setting of %dMbps on VF%d failed\n",
1563 max_tx_rate, vf);
abccf23e 1564 return be_cmd_status(status);
e1d18735 1565}
e2fb1afa 1566
bdce2ad7
SR		 1567static int be_set_vf_link_state(struct net_device *netdev, int vf,
1568 int link_state)
1569{
1570 struct be_adapter *adapter = netdev_priv(netdev);
1571 int status;
1572
1573 if (!sriov_enabled(adapter))
1574 return -EPERM;
1575
1576 if (vf >= adapter->num_vfs)
1577 return -EINVAL;
1578
1579 status = be_cmd_set_logical_link_config(adapter, link_state, vf+1);
abccf23e
KA		 1580 if (status) {
1581 dev_err(&adapter->pdev->dev,
1582 "Link state change on VF %d failed: %#x\n", vf, status);
1583 return be_cmd_status(status);
1584 }
bdce2ad7 1585
abccf23e
KA		 1586 adapter->vf_cfg[vf].plink_tracking = link_state;
1587
1588 return 0;
bdce2ad7 1589}
e1d18735 1590
2632bafd
SP		 1591static void be_aic_update(struct be_aic_obj *aic, u64 rx_pkts, u64 tx_pkts,
1592 ulong now)
6b7c5b94 1593{
2632bafd
SP		 1594 aic->rx_pkts_prev = rx_pkts;
1595 aic->tx_reqs_prev = tx_pkts;
1596 aic->jiffies = now;
1597}
ac124ff9 1598
2632bafd
SP		 1599static void be_eqd_update(struct be_adapter *adapter)
1600{
1601 struct be_set_eqd set_eqd[MAX_EVT_QS];
1602 int eqd, i, num = 0, start;
1603 struct be_aic_obj *aic;
1604 struct be_eq_obj *eqo;
1605 struct be_rx_obj *rxo;
1606 struct be_tx_obj *txo;
1607 u64 rx_pkts, tx_pkts;
1608 ulong now;
1609 u32 pps, delta;
10ef9ab4 1610
2632bafd
SP		 1611 for_all_evt_queues(adapter, eqo, i) {
1612 aic = &adapter->aic_obj[eqo->idx];
1613 if (!aic->enable) {
1614 if (aic->jiffies)
1615 aic->jiffies = 0;
1616 eqd = aic->et_eqd;
1617 goto modify_eqd;
1618 }
6b7c5b94 1619
2632bafd
SP		 1620 rxo = &adapter->rx_obj[eqo->idx];
1621 do {
57a7744e 1622 start = u64_stats_fetch_begin_irq(&rxo->stats.sync);
2632bafd 1623 rx_pkts = rxo->stats.rx_pkts;
57a7744e 1624 } while (u64_stats_fetch_retry_irq(&rxo->stats.sync, start));
10ef9ab4 1625
2632bafd
SP		 1626 txo = &adapter->tx_obj[eqo->idx];
1627 do {
57a7744e 1628 start = u64_stats_fetch_begin_irq(&txo->stats.sync);
2632bafd 1629 tx_pkts = txo->stats.tx_reqs;
57a7744e 1630 } while (u64_stats_fetch_retry_irq(&txo->stats.sync, start));
6b7c5b94 1631
2632bafd
SP		 1632 /* Skip, if wrapped around or first calculation */
1633 now = jiffies;
1634 if (!aic->jiffies || time_before(now, aic->jiffies) ||
1635 rx_pkts < aic->rx_pkts_prev ||
1636 tx_pkts < aic->tx_reqs_prev) {
1637 be_aic_update(aic, rx_pkts, tx_pkts, now);
1638 continue;
1639 }
1640
1641 delta = jiffies_to_msecs(now - aic->jiffies);
1642 pps = (((u32)(rx_pkts - aic->rx_pkts_prev) * 1000) / delta) +
1643 (((u32)(tx_pkts - aic->tx_reqs_prev) * 1000) / delta);
1644 eqd = (pps / 15000) << 2;
10ef9ab4 1645
2632bafd
SP		 1646 if (eqd < 8)
1647 eqd = 0;
1648 eqd = min_t(u32, eqd, aic->max_eqd);
1649 eqd = max_t(u32, eqd, aic->min_eqd);
1650
1651 be_aic_update(aic, rx_pkts, tx_pkts, now);
10ef9ab4 1652modify_eqd:
2632bafd
SP		 1653 if (eqd != aic->prev_eqd) {
1654 set_eqd[num].delay_multiplier = (eqd * 65)/100;
1655 set_eqd[num].eq_id = eqo->q.id;
1656 aic->prev_eqd = eqd;
1657 num++;
1658 }
ac124ff9 1659 }
2632bafd
SP		 1660
1661 if (num)
1662 be_cmd_modify_eqd(adapter, set_eqd, num);
6b7c5b94
SP		 1663}
1664
3abcdeda 1665static void be_rx_stats_update(struct be_rx_obj *rxo,
748b539a 1666 struct be_rx_compl_info *rxcp)
4097f663 1667{
ac124ff9 1668 struct be_rx_stats *stats = rx_stats(rxo);
1ef78abe 1669
ab1594e9 1670 u64_stats_update_begin(&stats->sync);
3abcdeda 1671 stats->rx_compl++;
2e588f84 1672 stats->rx_bytes += rxcp->pkt_size;
3abcdeda 1673 stats->rx_pkts++;
2e588f84 1674 if (rxcp->pkt_type == BE_MULTICAST_PACKET)
3abcdeda 1675 stats->rx_mcast_pkts++;
2e588f84 1676 if (rxcp->err)
ac124ff9 1677 stats->rx_compl_err++;
ab1594e9 1678 u64_stats_update_end(&stats->sync);
4097f663
SP		 1679}
1680
2e588f84 1681static inline bool csum_passed(struct be_rx_compl_info *rxcp)
728a9972 1682{
19fad86f 1683 /* L4 checksum is not reliable for non TCP/UDP packets.
c9c47142
SP		 1684 * Also ignore ipcksm for ipv6 pkts
1685 */
2e588f84 1686 return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum &&
c9c47142 1687 (rxcp->ip_csum || rxcp->ipv6) && !rxcp->err;
728a9972
AK		 1688}
1689
0b0ef1d0 1690static struct be_rx_page_info *get_rx_page_info(struct be_rx_obj *rxo)
6b7c5b94 1691{
10ef9ab4 1692 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1693 struct be_rx_page_info *rx_page_info;
3abcdeda 1694 struct be_queue_info *rxq = &rxo->q;
0b0ef1d0 1695 u16 frag_idx = rxq->tail;
6b7c5b94 1696
3abcdeda 1697 rx_page_info = &rxo->page_info_tbl[frag_idx];
6b7c5b94
SP		 1698 BUG_ON(!rx_page_info->page);
1699
e50287be 1700 if (rx_page_info->last_frag) {
2b7bcebf
IV		 1701 dma_unmap_page(&adapter->pdev->dev,
1702 dma_unmap_addr(rx_page_info, bus),
1703 adapter->big_page_size, DMA_FROM_DEVICE);
e50287be
SP		 1704 rx_page_info->last_frag = false;
1705 } else {
1706 dma_sync_single_for_cpu(&adapter->pdev->dev,
1707 dma_unmap_addr(rx_page_info, bus),
1708 rx_frag_size, DMA_FROM_DEVICE);
205859a2 1709 }
6b7c5b94 1710
0b0ef1d0 1711 queue_tail_inc(rxq);
6b7c5b94
SP		 1712 atomic_dec(&rxq->used);
1713 return rx_page_info;
1714}
1715
1716/* Throwaway the data in the Rx completion */
10ef9ab4
SP		 1717static void be_rx_compl_discard(struct be_rx_obj *rxo,
1718 struct be_rx_compl_info *rxcp)
6b7c5b94 1719{
6b7c5b94 1720 struct be_rx_page_info *page_info;
2e588f84 1721 u16 i, num_rcvd = rxcp->num_rcvd;
6b7c5b94 1722
e80d9da6 1723 for (i = 0; i < num_rcvd; i++) {
0b0ef1d0 1724 page_info = get_rx_page_info(rxo);
e80d9da6
PR		 1725 put_page(page_info->page);
1726 memset(page_info, 0, sizeof(*page_info));
6b7c5b94
SP		 1727 }
1728}
1729
1730/*
1731 * skb_fill_rx_data forms a complete skb for an ether frame
1732 * indicated by rxcp.
1733 */
10ef9ab4
SP		 1734static void skb_fill_rx_data(struct be_rx_obj *rxo, struct sk_buff *skb,
1735 struct be_rx_compl_info *rxcp)
6b7c5b94 1736{
6b7c5b94 1737 struct be_rx_page_info *page_info;
2e588f84
SP		 1738 u16 i, j;
1739 u16 hdr_len, curr_frag_len, remaining;
6b7c5b94 1740 u8 *start;
6b7c5b94 1741
0b0ef1d0 1742 page_info = get_rx_page_info(rxo);
6b7c5b94
SP		 1743 start = page_address(page_info->page) + page_info->page_offset;
1744 prefetch(start);
1745
1746 /* Copy data in the first descriptor of this completion */
2e588f84 1747 curr_frag_len = min(rxcp->pkt_size, rx_frag_size);
6b7c5b94 1748
6b7c5b94
SP		 1749 skb->len = curr_frag_len;
1750 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
ac1ae5f3 1751 memcpy(skb->data, start, curr_frag_len);
6b7c5b94
SP		 1752 /* Complete packet has now been moved to data */
1753 put_page(page_info->page);
1754 skb->data_len = 0;
1755 skb->tail += curr_frag_len;
1756 } else {
ac1ae5f3
ED		 1757 hdr_len = ETH_HLEN;
1758 memcpy(skb->data, start, hdr_len);
6b7c5b94 1759 skb_shinfo(skb)->nr_frags = 1;
b061b39e 1760 skb_frag_set_page(skb, 0, page_info->page);
6b7c5b94
SP		 1761 skb_shinfo(skb)->frags[0].page_offset =
1762 page_info->page_offset + hdr_len;
748b539a
SP		 1763 skb_frag_size_set(&skb_shinfo(skb)->frags[0],
1764 curr_frag_len - hdr_len);
6b7c5b94 1765 skb->data_len = curr_frag_len - hdr_len;
bdb28a97 1766 skb->truesize += rx_frag_size;
6b7c5b94
SP		 1767 skb->tail += hdr_len;
1768 }
205859a2 1769 page_info->page = NULL;
6b7c5b94 1770
2e588f84
SP		 1771 if (rxcp->pkt_size <= rx_frag_size) {
1772 BUG_ON(rxcp->num_rcvd != 1);
1773 return;
6b7c5b94
SP		 1774 }
1775
1776 /* More frags present for this completion */
2e588f84
SP		 1777 remaining = rxcp->pkt_size - curr_frag_len;
1778 for (i = 1, j = 0; i < rxcp->num_rcvd; i++) {
0b0ef1d0 1779 page_info = get_rx_page_info(rxo);
2e588f84 1780 curr_frag_len = min(remaining, rx_frag_size);
6b7c5b94 1781
bd46cb6c
AK		 1782 /* Coalesce all frags from the same physical page in one slot */
1783 if (page_info->page_offset == 0) {
1784 /* Fresh page */
1785 j++;
b061b39e 1786 skb_frag_set_page(skb, j, page_info->page);
bd46cb6c
AK		 1787 skb_shinfo(skb)->frags[j].page_offset =
1788 page_info->page_offset;
9e903e08 1789 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
bd46cb6c
AK		 1790 skb_shinfo(skb)->nr_frags++;
1791 } else {
1792 put_page(page_info->page);
1793 }
1794
9e903e08 1795 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
6b7c5b94
SP		 1796 skb->len += curr_frag_len;
1797 skb->data_len += curr_frag_len;
bdb28a97 1798 skb->truesize += rx_frag_size;
2e588f84 1799 remaining -= curr_frag_len;
205859a2 1800 page_info->page = NULL;
6b7c5b94 1801 }
bd46cb6c 1802 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94
SP		 1803}
1804
5be93b9a 1805/* Process the RX completion indicated by rxcp when GRO is disabled */
6384a4d0 1806static void be_rx_compl_process(struct be_rx_obj *rxo, struct napi_struct *napi,
10ef9ab4 1807 struct be_rx_compl_info *rxcp)
6b7c5b94 1808{
10ef9ab4 1809 struct be_adapter *adapter = rxo->adapter;
6332c8d3 1810 struct net_device *netdev = adapter->netdev;
6b7c5b94 1811 struct sk_buff *skb;
89420424 1812
bb349bb4 1813 skb = netdev_alloc_skb_ip_align(netdev, BE_RX_SKB_ALLOC_SIZE);
a058a632 1814 if (unlikely(!skb)) {
ac124ff9 1815 rx_stats(rxo)->rx_drops_no_skbs++;
10ef9ab4 1816 be_rx_compl_discard(rxo, rxcp);
6b7c5b94
SP		 1817 return;
1818 }
1819
10ef9ab4 1820 skb_fill_rx_data(rxo, skb, rxcp);
6b7c5b94 1821
6332c8d3 1822 if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp)))
728a9972 1823 skb->ip_summed = CHECKSUM_UNNECESSARY;
c6ce2f4b
SK		 1824 else
1825 skb_checksum_none_assert(skb);
6b7c5b94 1826
6332c8d3 1827 skb->protocol = eth_type_trans(skb, netdev);
aaa6daec 1828 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
10ef9ab4 1829 if (netdev->features & NETIF_F_RXHASH)
d2464c8c 1830 skb_set_hash(skb, rxcp->rss_hash, PKT_HASH_TYPE_L3);
c9c47142 1831
b6c0e89d 1832 skb->csum_level = rxcp->tunneled;
6384a4d0 1833 skb_mark_napi_id(skb, napi);
6b7c5b94 1834
343e43c0 1835 if (rxcp->vlanf)
86a9bad3 1836 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rxcp->vlan_tag);
4c5102f9
AK		 1837
1838 netif_receive_skb(skb);
6b7c5b94
SP		 1839}
1840
5be93b9a 1841/* Process the RX completion indicated by rxcp when GRO is enabled */
4188e7df
JH		 1842static void be_rx_compl_process_gro(struct be_rx_obj *rxo,
1843 struct napi_struct *napi,
1844 struct be_rx_compl_info *rxcp)
6b7c5b94 1845{
10ef9ab4 1846 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1847 struct be_rx_page_info *page_info;
5be93b9a 1848 struct sk_buff *skb = NULL;
2e588f84
SP		 1849 u16 remaining, curr_frag_len;
1850 u16 i, j;
3968fa1e 1851
10ef9ab4 1852 skb = napi_get_frags(napi);
5be93b9a 1853 if (!skb) {
10ef9ab4 1854 be_rx_compl_discard(rxo, rxcp);
5be93b9a
AK		 1855 return;
1856 }
1857
2e588f84
SP		 1858 remaining = rxcp->pkt_size;
1859 for (i = 0, j = -1; i < rxcp->num_rcvd; i++) {
0b0ef1d0 1860 page_info = get_rx_page_info(rxo);
6b7c5b94
SP		 1861
1862 curr_frag_len = min(remaining, rx_frag_size);
1863
bd46cb6c
AK		 1864 /* Coalesce all frags from the same physical page in one slot */
1865 if (i == 0 || page_info->page_offset == 0) {
1866 /* First frag or Fresh page */
1867 j++;
b061b39e 1868 skb_frag_set_page(skb, j, page_info->page);
5be93b9a
AK		 1869 skb_shinfo(skb)->frags[j].page_offset =
1870 page_info->page_offset;
9e903e08 1871 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
bd46cb6c
AK		 1872 } else {
1873 put_page(page_info->page);
1874 }
9e903e08 1875 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
bdb28a97 1876 skb->truesize += rx_frag_size;
bd46cb6c 1877 remaining -= curr_frag_len;
6b7c5b94
SP		 1878 memset(page_info, 0, sizeof(*page_info));
1879 }
bd46cb6c 1880 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 1881
5be93b9a 1882 skb_shinfo(skb)->nr_frags = j + 1;
2e588f84
SP		 1883 skb->len = rxcp->pkt_size;
1884 skb->data_len = rxcp->pkt_size;
5be93b9a 1885 skb->ip_summed = CHECKSUM_UNNECESSARY;
aaa6daec 1886 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
4b972914 1887 if (adapter->netdev->features & NETIF_F_RXHASH)
d2464c8c 1888 skb_set_hash(skb, rxcp->rss_hash, PKT_HASH_TYPE_L3);
c9c47142 1889
b6c0e89d 1890 skb->csum_level = rxcp->tunneled;
6384a4d0 1891 skb_mark_napi_id(skb, napi);
5be93b9a 1892
343e43c0 1893 if (rxcp->vlanf)
86a9bad3 1894 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rxcp->vlan_tag);
4c5102f9 1895
10ef9ab4 1896 napi_gro_frags(napi);
2e588f84
SP		 1897}
1898
10ef9ab4
SP		 1899static void be_parse_rx_compl_v1(struct be_eth_rx_compl *compl,
1900 struct be_rx_compl_info *rxcp)
2e588f84 1901{
c3c18bc1
SP		 1902 rxcp->pkt_size = GET_RX_COMPL_V1_BITS(pktsize, compl);
1903 rxcp->vlanf = GET_RX_COMPL_V1_BITS(vtp, compl);
1904 rxcp->err = GET_RX_COMPL_V1_BITS(err, compl);
1905 rxcp->tcpf = GET_RX_COMPL_V1_BITS(tcpf, compl);
1906 rxcp->udpf = GET_RX_COMPL_V1_BITS(udpf, compl);
1907 rxcp->ip_csum = GET_RX_COMPL_V1_BITS(ipcksm, compl);
1908 rxcp->l4_csum = GET_RX_COMPL_V1_BITS(l4_cksm, compl);
1909 rxcp->ipv6 = GET_RX_COMPL_V1_BITS(ip_version, compl);
1910 rxcp->num_rcvd = GET_RX_COMPL_V1_BITS(numfrags, compl);
1911 rxcp->pkt_type = GET_RX_COMPL_V1_BITS(cast_enc, compl);
1912 rxcp->rss_hash = GET_RX_COMPL_V1_BITS(rsshash, compl);
15d72184 1913 if (rxcp->vlanf) {
c3c18bc1
SP		 1914 rxcp->qnq = GET_RX_COMPL_V1_BITS(qnq, compl);
1915 rxcp->vlan_tag = GET_RX_COMPL_V1_BITS(vlan_tag, compl);
15d72184 1916 }
c3c18bc1 1917 rxcp->port = GET_RX_COMPL_V1_BITS(port, compl);
c9c47142 1918 rxcp->tunneled =
c3c18bc1 1919 GET_RX_COMPL_V1_BITS(tunneled, compl);
2e588f84
SP		 1920}
1921
10ef9ab4
SP		 1922static void be_parse_rx_compl_v0(struct be_eth_rx_compl *compl,
1923 struct be_rx_compl_info *rxcp)
2e588f84 1924{
c3c18bc1
SP		 1925 rxcp->pkt_size = GET_RX_COMPL_V0_BITS(pktsize, compl);
1926 rxcp->vlanf = GET_RX_COMPL_V0_BITS(vtp, compl);
1927 rxcp->err = GET_RX_COMPL_V0_BITS(err, compl);
1928 rxcp->tcpf = GET_RX_COMPL_V0_BITS(tcpf, compl);
1929 rxcp->udpf = GET_RX_COMPL_V0_BITS(udpf, compl);
1930 rxcp->ip_csum = GET_RX_COMPL_V0_BITS(ipcksm, compl);
1931 rxcp->l4_csum = GET_RX_COMPL_V0_BITS(l4_cksm, compl);
1932 rxcp->ipv6 = GET_RX_COMPL_V0_BITS(ip_version, compl);
1933 rxcp->num_rcvd = GET_RX_COMPL_V0_BITS(numfrags, compl);
1934 rxcp->pkt_type = GET_RX_COMPL_V0_BITS(cast_enc, compl);
1935 rxcp->rss_hash = GET_RX_COMPL_V0_BITS(rsshash, compl);
15d72184 1936 if (rxcp->vlanf) {
c3c18bc1
SP		 1937 rxcp->qnq = GET_RX_COMPL_V0_BITS(qnq, compl);
1938 rxcp->vlan_tag = GET_RX_COMPL_V0_BITS(vlan_tag, compl);
15d72184 1939 }
c3c18bc1
SP		 1940 rxcp->port = GET_RX_COMPL_V0_BITS(port, compl);
1941 rxcp->ip_frag = GET_RX_COMPL_V0_BITS(ip_frag, compl);
2e588f84
SP		 1942}
1943
1944static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo)
1945{
1946 struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq);
1947 struct be_rx_compl_info *rxcp = &rxo->rxcp;
1948 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1949
2e588f84
SP		 1950 /* For checking the valid bit it is Ok to use either definition as the
1951 * valid bit is at the same position in both v0 and v1 Rx compl */
1952 if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0)
1953 return NULL;
6b7c5b94 1954
2e588f84
SP		 1955 rmb();
1956 be_dws_le_to_cpu(compl, sizeof(*compl));
6b7c5b94 1957
2e588f84 1958 if (adapter->be3_native)
10ef9ab4 1959 be_parse_rx_compl_v1(compl, rxcp);
2e588f84 1960 else
10ef9ab4 1961 be_parse_rx_compl_v0(compl, rxcp);
6b7c5b94 1962
e38b1706
SK		 1963 if (rxcp->ip_frag)
1964 rxcp->l4_csum = 0;
1965
15d72184 1966 if (rxcp->vlanf) {
f93f160b
VV		 1967 /* In QNQ modes, if qnq bit is not set, then the packet was
1968 * tagged only with the transparent outer vlan-tag and must
1969 * not be treated as a vlan packet by host
1970 */
1971 if (be_is_qnq_mode(adapter) && !rxcp->qnq)
15d72184 1972 rxcp->vlanf = 0;
6b7c5b94 1973
15d72184 1974 if (!lancer_chip(adapter))
3c709f8f 1975 rxcp->vlan_tag = swab16(rxcp->vlan_tag);
6b7c5b94 1976
939cf306 1977 if (adapter->pvid == (rxcp->vlan_tag & VLAN_VID_MASK) &&
f6cbd364 1978 !test_bit(rxcp->vlan_tag, adapter->vids))
15d72184
SP		 1979 rxcp->vlanf = 0;
1980 }
2e588f84
SP		 1981
1982 /* As the compl has been parsed, reset it; we wont touch it again */
1983 compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0;
6b7c5b94 1984
3abcdeda 1985 queue_tail_inc(&rxo->cq);
6b7c5b94
SP		 1986 return rxcp;
1987}
1988
1829b086 1989static inline struct page *be_alloc_pages(u32 size, gfp_t gfp)
6b7c5b94 1990{
6b7c5b94 1991 u32 order = get_order(size);
1829b086 1992
6b7c5b94 1993 if (order > 0)
1829b086
ED		 1994 gfp |= __GFP_COMP;
1995 return alloc_pages(gfp, order);
6b7c5b94
SP		 1996}
1997
1998/*
1999 * Allocate a page, split it to fragments of size rx_frag_size and post as
2000 * receive buffers to BE
2001 */
c30d7266 2002static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp, u32 frags_needed)
6b7c5b94 2003{
3abcdeda 2004 struct be_adapter *adapter = rxo->adapter;
26d92f92 2005 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
3abcdeda 2006 struct be_queue_info *rxq = &rxo->q;
6b7c5b94 2007 struct page *pagep = NULL;
ba42fad0 2008 struct device *dev = &adapter->pdev->dev;
6b7c5b94
SP		 2009 struct be_eth_rx_d *rxd;
2010 u64 page_dmaaddr = 0, frag_dmaaddr;
c30d7266 2011 u32 posted, page_offset = 0, notify = 0;
6b7c5b94 2012
3abcdeda 2013 page_info = &rxo->page_info_tbl[rxq->head];
c30d7266 2014 for (posted = 0; posted < frags_needed && !page_info->page; posted++) {
6b7c5b94 2015 if (!pagep) {
1829b086 2016 pagep = be_alloc_pages(adapter->big_page_size, gfp);
6b7c5b94 2017 if (unlikely(!pagep)) {
ac124ff9 2018 rx_stats(rxo)->rx_post_fail++;
6b7c5b94
SP		 2019 break;
2020 }
ba42fad0
IV		 2021 page_dmaaddr = dma_map_page(dev, pagep, 0,
2022 adapter->big_page_size,
2b7bcebf 2023 DMA_FROM_DEVICE);
ba42fad0
IV		 2024 if (dma_mapping_error(dev, page_dmaaddr)) {
2025 put_page(pagep);
2026 pagep = NULL;
d3de1540 2027 adapter->drv_stats.dma_map_errors++;
ba42fad0
IV		 2028 break;
2029 }
e50287be 2030 page_offset = 0;
6b7c5b94
SP		 2031 } else {
2032 get_page(pagep);
e50287be 2033 page_offset += rx_frag_size;
6b7c5b94 2034 }
e50287be 2035 page_info->page_offset = page_offset;
6b7c5b94 2036 page_info->page = pagep;
6b7c5b94
SP		 2037
2038 rxd = queue_head_node(rxq);
e50287be 2039 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
6b7c5b94
SP		 2040 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
2041 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
6b7c5b94
SP		 2042
2043 /* Any space left in the current big page for another frag? */
2044 if ((page_offset + rx_frag_size + rx_frag_size) >
2045 adapter->big_page_size) {
2046 pagep = NULL;
e50287be
SP		 2047 page_info->last_frag = true;
2048 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
2049 } else {
2050 dma_unmap_addr_set(page_info, bus, frag_dmaaddr);
6b7c5b94 2051 }
26d92f92
SP		 2052
2053 prev_page_info = page_info;
2054 queue_head_inc(rxq);
10ef9ab4 2055 page_info = &rxo->page_info_tbl[rxq->head];
6b7c5b94 2056 }
e50287be
SP		 2057
2058 /* Mark the last frag of a page when we break out of the above loop
2059 * with no more slots available in the RXQ
2060 */
2061 if (pagep) {
2062 prev_page_info->last_frag = true;
2063 dma_unmap_addr_set(prev_page_info, bus, page_dmaaddr);
2064 }
6b7c5b94
SP		 2065
2066 if (posted) {
6b7c5b94 2067 atomic_add(posted, &rxq->used);
6384a4d0
SP		 2068 if (rxo->rx_post_starved)
2069 rxo->rx_post_starved = false;
c30d7266
AK		 2070 do {
2071 notify = min(256u, posted);
2072 be_rxq_notify(adapter, rxq->id, notify);
2073 posted -= notify;
2074 } while (posted);
ea1dae11
SP		 2075 } else if (atomic_read(&rxq->used) == 0) {
2076 /* Let be_worker replenish when memory is available */
3abcdeda 2077 rxo->rx_post_starved = true;
6b7c5b94 2078 }
6b7c5b94
SP		 2079}
2080
152ffe5b 2081static struct be_tx_compl_info *be_tx_compl_get(struct be_tx_obj *txo)
6b7c5b94 2082{
152ffe5b
SB		 2083 struct be_queue_info *tx_cq = &txo->cq;
2084 struct be_tx_compl_info *txcp = &txo->txcp;
2085 struct be_eth_tx_compl *compl = queue_tail_node(tx_cq);
6b7c5b94 2086
152ffe5b 2087 if (compl->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
6b7c5b94
SP		 2088 return NULL;
2089
152ffe5b 2090 /* Ensure load ordering of valid bit dword and other dwords below */
f3eb62d2 2091 rmb();
152ffe5b 2092 be_dws_le_to_cpu(compl, sizeof(*compl));
6b7c5b94 2093
152ffe5b
SB		 2094 txcp->status = GET_TX_COMPL_BITS(status, compl);
2095 txcp->end_index = GET_TX_COMPL_BITS(wrb_index, compl);
6b7c5b94 2096
152ffe5b 2097 compl->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
6b7c5b94
SP		 2098 queue_tail_inc(tx_cq);
2099 return txcp;
2100}
2101
3c8def97 2102static u16 be_tx_compl_process(struct be_adapter *adapter,
748b539a 2103 struct be_tx_obj *txo, u16 last_index)
6b7c5b94 2104{
5f07b3c5 2105 struct sk_buff **sent_skbs = txo->sent_skb_list;
3c8def97 2106 struct be_queue_info *txq = &txo->q;
5f07b3c5
SP		 2107 u16 frag_index, num_wrbs = 0;
2108 struct sk_buff *skb = NULL;
2109 bool unmap_skb_hdr = false;
a73b796e 2110 struct be_eth_wrb *wrb;
6b7c5b94 2111
ec43b1a6 2112 do {
5f07b3c5
SP		 2113 if (sent_skbs[txq->tail]) {
2114 /* Free skb from prev req */
2115 if (skb)
2116 dev_consume_skb_any(skb);
2117 skb = sent_skbs[txq->tail];
2118 sent_skbs[txq->tail] = NULL;
2119 queue_tail_inc(txq); /* skip hdr wrb */
2120 num_wrbs++;
2121 unmap_skb_hdr = true;
2122 }
a73b796e 2123 wrb = queue_tail_node(txq);
5f07b3c5 2124 frag_index = txq->tail;
2b7bcebf 2125 unmap_tx_frag(&adapter->pdev->dev, wrb,
5f07b3c5 2126 (unmap_skb_hdr && skb_headlen(skb)));
ec43b1a6 2127 unmap_skb_hdr = false;
6b7c5b94 2128 queue_tail_inc(txq);
5f07b3c5
SP		 2129 num_wrbs++;
2130 } while (frag_index != last_index);
2131 dev_consume_skb_any(skb);
6b7c5b94 2132
4d586b82 2133 return num_wrbs;
6b7c5b94
SP		 2134}
2135
10ef9ab4
SP		 2136/* Return the number of events in the event queue */
2137static inline int events_get(struct be_eq_obj *eqo)
859b1e4e 2138{
10ef9ab4
SP		 2139 struct be_eq_entry *eqe;
2140 int num = 0;
859b1e4e 2141
10ef9ab4
SP		 2142 do {
2143 eqe = queue_tail_node(&eqo->q);
2144 if (eqe->evt == 0)
2145 break;
859b1e4e 2146
10ef9ab4
SP		 2147 rmb();
2148 eqe->evt = 0;
2149 num++;
2150 queue_tail_inc(&eqo->q);
2151 } while (true);
2152
2153 return num;
859b1e4e
SP		 2154}
2155
10ef9ab4
SP		 2156/* Leaves the EQ is disarmed state */
2157static void be_eq_clean(struct be_eq_obj *eqo)
859b1e4e 2158{
10ef9ab4 2159 int num = events_get(eqo);
859b1e4e 2160
10ef9ab4 2161 be_eq_notify(eqo->adapter, eqo->q.id, false, true, num);
859b1e4e
SP		 2162}
2163
10ef9ab4 2164static void be_rx_cq_clean(struct be_rx_obj *rxo)
6b7c5b94
SP		 2165{
2166 struct be_rx_page_info *page_info;
3abcdeda
SP		 2167 struct be_queue_info *rxq = &rxo->q;
2168 struct be_queue_info *rx_cq = &rxo->cq;
2e588f84 2169 struct be_rx_compl_info *rxcp;
d23e946c
SP		 2170 struct be_adapter *adapter = rxo->adapter;
2171 int flush_wait = 0;
6b7c5b94 2172
d23e946c
SP		 2173 /* Consume pending rx completions.
2174 * Wait for the flush completion (identified by zero num_rcvd)
2175 * to arrive. Notify CQ even when there are no more CQ entries
2176 * for HW to flush partially coalesced CQ entries.
2177 * In Lancer, there is no need to wait for flush compl.
2178 */
2179 for (;;) {
2180 rxcp = be_rx_compl_get(rxo);
ddf1169f 2181 if (!rxcp) {
d23e946c
SP		 2182 if (lancer_chip(adapter))
2183 break;
2184
2185 if (flush_wait++ > 10 || be_hw_error(adapter)) {
2186 dev_warn(&adapter->pdev->dev,
2187 "did not receive flush compl\n");
2188 break;
2189 }
2190 be_cq_notify(adapter, rx_cq->id, true, 0);
2191 mdelay(1);
2192 } else {
2193 be_rx_compl_discard(rxo, rxcp);
3f5dffe6 2194 be_cq_notify(adapter, rx_cq->id, false, 1);
d23e946c
SP		 2195 if (rxcp->num_rcvd == 0)
2196 break;
2197 }
6b7c5b94
SP		 2198 }
2199
d23e946c
SP		 2200 /* After cleanup, leave the CQ in unarmed state */
2201 be_cq_notify(adapter, rx_cq->id, false, 0);
2202
2203 /* Then free posted rx buffers that were not used */
0b0ef1d0
SR		 2204 while (atomic_read(&rxq->used) > 0) {
2205 page_info = get_rx_page_info(rxo);
6b7c5b94
SP		 2206 put_page(page_info->page);
2207 memset(page_info, 0, sizeof(*page_info));
2208 }
2209 BUG_ON(atomic_read(&rxq->used));
5f820b6c
KA		 2210 rxq->tail = 0;
2211 rxq->head = 0;
6b7c5b94
SP		 2212}
2213
0ae57bb3 2214static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 2215{
5f07b3c5
SP		 2216 u16 end_idx, notified_idx, cmpl = 0, timeo = 0, num_wrbs = 0;
2217 struct device *dev = &adapter->pdev->dev;
152ffe5b 2218 struct be_tx_compl_info *txcp;
0ae57bb3 2219 struct be_queue_info *txq;
152ffe5b 2220 struct be_tx_obj *txo;
0ae57bb3 2221 int i, pending_txqs;
a8e9179a 2222
1a3d0717 2223 /* Stop polling for compls when HW has been silent for 10ms */
a8e9179a 2224 do {
0ae57bb3
SP		 2225 pending_txqs = adapter->num_tx_qs;
2226
2227 for_all_tx_queues(adapter, txo, i) {
1a3d0717
VV		 2228 cmpl = 0;
2229 num_wrbs = 0;
0ae57bb3 2230 txq = &txo->q;
152ffe5b
SB		 2231 while ((txcp = be_tx_compl_get(txo))) {
2232 num_wrbs +=
2233 be_tx_compl_process(adapter, txo,
2234 txcp->end_index);
0ae57bb3
SP		 2235 cmpl++;
2236 }
2237 if (cmpl) {
2238 be_cq_notify(adapter, txo->cq.id, false, cmpl);
2239 atomic_sub(num_wrbs, &txq->used);
1a3d0717 2240 timeo = 0;
0ae57bb3 2241 }
cf5671e6 2242 if (!be_is_tx_compl_pending(txo))
0ae57bb3 2243 pending_txqs--;
a8e9179a
SP		 2244 }
2245
1a3d0717 2246 if (pending_txqs == 0 || ++timeo > 10 || be_hw_error(adapter))
a8e9179a
SP		 2247 break;
2248
2249 mdelay(1);
2250 } while (true);
2251
5f07b3c5 2252 /* Free enqueued TX that was never notified to HW */
0ae57bb3
SP		 2253 for_all_tx_queues(adapter, txo, i) {
2254 txq = &txo->q;
0ae57bb3 2255
5f07b3c5
SP		 2256 if (atomic_read(&txq->used)) {
2257 dev_info(dev, "txq%d: cleaning %d pending tx-wrbs\n",
2258 i, atomic_read(&txq->used));
2259 notified_idx = txq->tail;
0ae57bb3 2260 end_idx = txq->tail;
5f07b3c5
SP		 2261 index_adv(&end_idx, atomic_read(&txq->used) - 1,
2262 txq->len);
2263 /* Use the tx-compl process logic to handle requests
2264 * that were not sent to the HW.
2265 */
0ae57bb3
SP		 2266 num_wrbs = be_tx_compl_process(adapter, txo, end_idx);
2267 atomic_sub(num_wrbs, &txq->used);
5f07b3c5
SP		 2268 BUG_ON(atomic_read(&txq->used));
2269 txo->pend_wrb_cnt = 0;
2270 /* Since hw was never notified of these requests,
2271 * reset TXQ indices
2272 */
2273 txq->head = notified_idx;
2274 txq->tail = notified_idx;
0ae57bb3 2275 }
b03388d6 2276 }
6b7c5b94
SP		 2277}
2278
10ef9ab4
SP		 2279static void be_evt_queues_destroy(struct be_adapter *adapter)
2280{
2281 struct be_eq_obj *eqo;
2282 int i;
2283
2284 for_all_evt_queues(adapter, eqo, i) {
19d59aa7
PR		 2285 if (eqo->q.created) {
2286 be_eq_clean(eqo);
10ef9ab4 2287 be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);
6384a4d0 2288 napi_hash_del(&eqo->napi);
68d7bdcb 2289 netif_napi_del(&eqo->napi);
19d59aa7 2290 }
10ef9ab4
SP		 2291 be_queue_free(adapter, &eqo->q);
2292 }
2293}
2294
2295static int be_evt_queues_create(struct be_adapter *adapter)
2296{
2297 struct be_queue_info *eq;
2298 struct be_eq_obj *eqo;
2632bafd 2299 struct be_aic_obj *aic;
10ef9ab4
SP		 2300 int i, rc;
2301
92bf14ab
SP		 2302 adapter->num_evt_qs = min_t(u16, num_irqs(adapter),
2303 adapter->cfg_num_qs);
10ef9ab4
SP		 2304
2305 for_all_evt_queues(adapter, eqo, i) {
68d7bdcb
SP		 2306 netif_napi_add(adapter->netdev, &eqo->napi, be_poll,
2307 BE_NAPI_WEIGHT);
6384a4d0 2308 napi_hash_add(&eqo->napi);
2632bafd 2309 aic = &adapter->aic_obj[i];
10ef9ab4 2310 eqo->adapter = adapter;
10ef9ab4 2311 eqo->idx = i;
2632bafd
SP		 2312 aic->max_eqd = BE_MAX_EQD;
2313 aic->enable = true;
10ef9ab4
SP		 2314
2315 eq = &eqo->q;
2316 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
748b539a 2317 sizeof(struct be_eq_entry));
10ef9ab4
SP		 2318 if (rc)
2319 return rc;
2320
f2f781a7 2321 rc = be_cmd_eq_create(adapter, eqo);
10ef9ab4
SP		 2322 if (rc)
2323 return rc;
2324 }
1cfafab9 2325 return 0;
10ef9ab4
SP		 2326}
2327
5fb379ee
SP		 2328static void be_mcc_queues_destroy(struct be_adapter *adapter)
2329{
2330 struct be_queue_info *q;
5fb379ee 2331
8788fdc2 2332 q = &adapter->mcc_obj.q;
5fb379ee 2333 if (q->created)
8788fdc2 2334 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 2335 be_queue_free(adapter, q);
2336
8788fdc2 2337 q = &adapter->mcc_obj.cq;
5fb379ee 2338 if (q->created)
8788fdc2 2339 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 2340 be_queue_free(adapter, q);
2341}
2342
2343/* Must be called only after TX qs are created as MCC shares TX EQ */
2344static int be_mcc_queues_create(struct be_adapter *adapter)
2345{
2346 struct be_queue_info *q, *cq;
5fb379ee 2347
8788fdc2 2348 cq = &adapter->mcc_obj.cq;
5fb379ee 2349 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
748b539a 2350 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 2351 goto err;
2352
10ef9ab4
SP		 2353 /* Use the default EQ for MCC completions */
2354 if (be_cmd_cq_create(adapter, cq, &mcc_eqo(adapter)->q, true, 0))
5fb379ee
SP		 2355 goto mcc_cq_free;
2356
8788fdc2 2357 q = &adapter->mcc_obj.q;
5fb379ee
SP		 2358 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
2359 goto mcc_cq_destroy;
2360
8788fdc2 2361 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 2362 goto mcc_q_free;
2363
2364 return 0;
2365
2366mcc_q_free:
2367 be_queue_free(adapter, q);
2368mcc_cq_destroy:
8788fdc2 2369 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 2370mcc_cq_free:
2371 be_queue_free(adapter, cq);
2372err:
2373 return -1;
2374}
2375
6b7c5b94
SP		 2376static void be_tx_queues_destroy(struct be_adapter *adapter)
2377{
2378 struct be_queue_info *q;
3c8def97
SP		 2379 struct be_tx_obj *txo;
2380 u8 i;
6b7c5b94 2381
3c8def97
SP		 2382 for_all_tx_queues(adapter, txo, i) {
2383 q = &txo->q;
2384 if (q->created)
2385 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
2386 be_queue_free(adapter, q);
6b7c5b94 2387
3c8def97
SP		 2388 q = &txo->cq;
2389 if (q->created)
2390 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
2391 be_queue_free(adapter, q);
2392 }
6b7c5b94
SP		 2393}
2394
7707133c 2395static int be_tx_qs_create(struct be_adapter *adapter)
6b7c5b94 2396{
10ef9ab4 2397 struct be_queue_info *cq, *eq;
3c8def97 2398 struct be_tx_obj *txo;
92bf14ab 2399 int status, i;
6b7c5b94 2400
92bf14ab 2401 adapter->num_tx_qs = min(adapter->num_evt_qs, be_max_txqs(adapter));
dafc0fe3 2402
10ef9ab4
SP		 2403 for_all_tx_queues(adapter, txo, i) {
2404 cq = &txo->cq;
2405 status = be_queue_alloc(adapter, cq, TX_CQ_LEN,
2406 sizeof(struct be_eth_tx_compl));
2407 if (status)
2408 return status;
3c8def97 2409
827da44c
JS		 2410 u64_stats_init(&txo->stats.sync);
2411 u64_stats_init(&txo->stats.sync_compl);
2412
10ef9ab4
SP		 2413 /* If num_evt_qs is less than num_tx_qs, then more than
2414 * one txq share an eq
2415 */
2416 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
2417 status = be_cmd_cq_create(adapter, cq, eq, false, 3);
2418 if (status)
2419 return status;
6b7c5b94 2420
10ef9ab4
SP		 2421 status = be_queue_alloc(adapter, &txo->q, TX_Q_LEN,
2422 sizeof(struct be_eth_wrb));
2423 if (status)
2424 return status;
6b7c5b94 2425
94d73aaa 2426 status = be_cmd_txq_create(adapter, txo);
10ef9ab4
SP		 2427 if (status)
2428 return status;
3c8def97 2429 }
6b7c5b94 2430
d379142b
SP		 2431 dev_info(&adapter->pdev->dev, "created %d TX queue(s)\n",
2432 adapter->num_tx_qs);
10ef9ab4 2433 return 0;
6b7c5b94
SP		 2434}
2435
10ef9ab4 2436static void be_rx_cqs_destroy(struct be_adapter *adapter)
6b7c5b94
SP		 2437{
2438 struct be_queue_info *q;
3abcdeda
SP		 2439 struct be_rx_obj *rxo;
2440 int i;
2441
2442 for_all_rx_queues(adapter, rxo, i) {
3abcdeda
SP		 2443 q = &rxo->cq;
2444 if (q->created)
2445 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
2446 be_queue_free(adapter, q);
ac6a0c4a
SP		 2447 }
2448}
2449
10ef9ab4 2450static int be_rx_cqs_create(struct be_adapter *adapter)
6b7c5b94 2451{
10ef9ab4 2452 struct be_queue_info *eq, *cq;
3abcdeda
SP		 2453 struct be_rx_obj *rxo;
2454 int rc, i;
6b7c5b94 2455
92bf14ab
SP		 2456 /* We can create as many RSS rings as there are EQs. */
2457 adapter->num_rx_qs = adapter->num_evt_qs;
2458
2459 /* We'll use RSS only if atleast 2 RSS rings are supported.
2460 * When RSS is used, we'll need a default RXQ for non-IP traffic.
10ef9ab4 2461 */
92bf14ab
SP		 2462 if (adapter->num_rx_qs > 1)
2463 adapter->num_rx_qs++;
2464
6b7c5b94 2465 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
3abcdeda
SP		 2466 for_all_rx_queues(adapter, rxo, i) {
2467 rxo->adapter = adapter;
3abcdeda
SP		 2468 cq = &rxo->cq;
2469 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
748b539a 2470 sizeof(struct be_eth_rx_compl));
3abcdeda 2471 if (rc)
10ef9ab4 2472 return rc;
3abcdeda 2473
827da44c 2474 u64_stats_init(&rxo->stats.sync);
10ef9ab4
SP		 2475 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
2476 rc = be_cmd_cq_create(adapter, cq, eq, false, 3);
3abcdeda 2477 if (rc)
10ef9ab4 2478 return rc;
3abcdeda 2479 }
6b7c5b94 2480
d379142b
SP		 2481 dev_info(&adapter->pdev->dev,
2482 "created %d RSS queue(s) and 1 default RX queue\n",
2483 adapter->num_rx_qs - 1);
10ef9ab4 2484 return 0;
b628bde2
SP		 2485}
2486
6b7c5b94
SP		 2487static irqreturn_t be_intx(int irq, void *dev)
2488{
e49cc34f
SP		 2489 struct be_eq_obj *eqo = dev;
2490 struct be_adapter *adapter = eqo->adapter;
2491 int num_evts = 0;
6b7c5b94 2492
d0b9cec3
SP		 2493 /* IRQ is not expected when NAPI is scheduled as the EQ
2494 * will not be armed.
2495 * But, this can happen on Lancer INTx where it takes
2496 * a while to de-assert INTx or in BE2 where occasionaly
2497 * an interrupt may be raised even when EQ is unarmed.
2498 * If NAPI is already scheduled, then counting & notifying
2499 * events will orphan them.
e49cc34f 2500 */
d0b9cec3 2501 if (napi_schedule_prep(&eqo->napi)) {
e49cc34f 2502 num_evts = events_get(eqo);
d0b9cec3
SP		 2503 __napi_schedule(&eqo->napi);
2504 if (num_evts)
2505 eqo->spurious_intr = 0;
2506 }
2507 be_eq_notify(adapter, eqo->q.id, false, true, num_evts);
e49cc34f 2508
d0b9cec3
SP		 2509 /* Return IRQ_HANDLED only for the the first spurious intr
2510 * after a valid intr to stop the kernel from branding
2511 * this irq as a bad one!
e49cc34f 2512 */
d0b9cec3
SP		 2513 if (num_evts || eqo->spurious_intr++ == 0)
2514 return IRQ_HANDLED;
2515 else
2516 return IRQ_NONE;
6b7c5b94
SP		 2517}
2518
10ef9ab4 2519static irqreturn_t be_msix(int irq, void *dev)
6b7c5b94 2520{
10ef9ab4 2521 struct be_eq_obj *eqo = dev;
6b7c5b94 2522
0b545a62
SP		 2523 be_eq_notify(eqo->adapter, eqo->q.id, false, true, 0);
2524 napi_schedule(&eqo->napi);
6b7c5b94
SP		 2525 return IRQ_HANDLED;
2526}
2527
2e588f84 2528static inline bool do_gro(struct be_rx_compl_info *rxcp)
6b7c5b94 2529{
e38b1706 2530 return (rxcp->tcpf && !rxcp->err && rxcp->l4_csum) ? true : false;
6b7c5b94
SP		 2531}
2532
10ef9ab4 2533static int be_process_rx(struct be_rx_obj *rxo, struct napi_struct *napi,
748b539a 2534 int budget, int polling)
6b7c5b94 2535{
3abcdeda
SP		 2536 struct be_adapter *adapter = rxo->adapter;
2537 struct be_queue_info *rx_cq = &rxo->cq;
2e588f84 2538 struct be_rx_compl_info *rxcp;
6b7c5b94 2539 u32 work_done;
c30d7266 2540 u32 frags_consumed = 0;
6b7c5b94
SP		 2541
2542 for (work_done = 0; work_done < budget; work_done++) {
3abcdeda 2543 rxcp = be_rx_compl_get(rxo);
6b7c5b94
SP		 2544 if (!rxcp)
2545 break;
2546
12004ae9
SP		 2547 /* Is it a flush compl that has no data */
2548 if (unlikely(rxcp->num_rcvd == 0))
2549 goto loop_continue;
2550
2551 /* Discard compl with partial DMA Lancer B0 */
2552 if (unlikely(!rxcp->pkt_size)) {
10ef9ab4 2553 be_rx_compl_discard(rxo, rxcp);
12004ae9
SP		 2554 goto loop_continue;
2555 }
2556
2557 /* On BE drop pkts that arrive due to imperfect filtering in
2558 * promiscuous mode on some skews
2559 */
2560 if (unlikely(rxcp->port != adapter->port_num &&
748b539a 2561 !lancer_chip(adapter))) {
10ef9ab4 2562 be_rx_compl_discard(rxo, rxcp);
12004ae9 2563 goto loop_continue;
64642811 2564 }
009dd872 2565
6384a4d0
SP		 2566 /* Don't do gro when we're busy_polling */
2567 if (do_gro(rxcp) && polling != BUSY_POLLING)
10ef9ab4 2568 be_rx_compl_process_gro(rxo, napi, rxcp);
12004ae9 2569 else
6384a4d0
SP		 2570 be_rx_compl_process(rxo, napi, rxcp);
2571
12004ae9 2572loop_continue:
c30d7266 2573 frags_consumed += rxcp->num_rcvd;
2e588f84 2574 be_rx_stats_update(rxo, rxcp);
6b7c5b94
SP		 2575 }
2576
10ef9ab4
SP		 2577 if (work_done) {
2578 be_cq_notify(adapter, rx_cq->id, true, work_done);
9372cacb 2579
6384a4d0
SP		 2580 /* When an rx-obj gets into post_starved state, just
2581 * let be_worker do the posting.
2582 */
2583 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM &&
2584 !rxo->rx_post_starved)
c30d7266
AK		 2585 be_post_rx_frags(rxo, GFP_ATOMIC,
2586 max_t(u32, MAX_RX_POST,
2587 frags_consumed));
6b7c5b94 2588 }
10ef9ab4 2589
6b7c5b94
SP		 2590 return work_done;
2591}
2592
152ffe5b 2593static inline void be_update_tx_err(struct be_tx_obj *txo, u8 status)
512bb8a2
KA		 2594{
2595 switch (status) {
2596 case BE_TX_COMP_HDR_PARSE_ERR:
2597 tx_stats(txo)->tx_hdr_parse_err++;
2598 break;
2599 case BE_TX_COMP_NDMA_ERR:
2600 tx_stats(txo)->tx_dma_err++;
2601 break;
2602 case BE_TX_COMP_ACL_ERR:
2603 tx_stats(txo)->tx_spoof_check_err++;
2604 break;
2605 }
2606}
2607
152ffe5b 2608static inline void lancer_update_tx_err(struct be_tx_obj *txo, u8 status)
512bb8a2
KA		 2609{
2610 switch (status) {
2611 case LANCER_TX_COMP_LSO_ERR:
2612 tx_stats(txo)->tx_tso_err++;
2613 break;
2614 case LANCER_TX_COMP_HSW_DROP_MAC_ERR:
2615 case LANCER_TX_COMP_HSW_DROP_VLAN_ERR:
2616 tx_stats(txo)->tx_spoof_check_err++;
2617 break;
2618 case LANCER_TX_COMP_QINQ_ERR:
2619 tx_stats(txo)->tx_qinq_err++;
2620 break;
2621 case LANCER_TX_COMP_PARITY_ERR:
2622 tx_stats(txo)->tx_internal_parity_err++;
2623 break;
2624 case LANCER_TX_COMP_DMA_ERR:
2625 tx_stats(txo)->tx_dma_err++;
2626 break;
2627 }
2628}
2629
c8f64615
SP		 2630static void be_process_tx(struct be_adapter *adapter, struct be_tx_obj *txo,
2631 int idx)
6b7c5b94 2632{
c8f64615 2633 int num_wrbs = 0, work_done = 0;
152ffe5b 2634 struct be_tx_compl_info *txcp;
c8f64615 2635
152ffe5b
SB		 2636 while ((txcp = be_tx_compl_get(txo))) {
2637 num_wrbs += be_tx_compl_process(adapter, txo, txcp->end_index);
c8f64615 2638 work_done++;
3c8def97 2639
152ffe5b 2640 if (txcp->status) {
512bb8a2 2641 if (lancer_chip(adapter))
152ffe5b 2642 lancer_update_tx_err(txo, txcp->status);
512bb8a2 2643 else
152ffe5b 2644 be_update_tx_err(txo, txcp->status);
512bb8a2 2645 }
10ef9ab4 2646 }
6b7c5b94 2647
10ef9ab4
SP		 2648 if (work_done) {
2649 be_cq_notify(adapter, txo->cq.id, true, work_done);
2650 atomic_sub(num_wrbs, &txo->q.used);
3c8def97 2651
10ef9ab4
SP		 2652 /* As Tx wrbs have been freed up, wake up netdev queue
2653 * if it was stopped due to lack of tx wrbs. */
2654 if (__netif_subqueue_stopped(adapter->netdev, idx) &&
cf5671e6 2655 be_can_txq_wake(txo)) {
10ef9ab4 2656 netif_wake_subqueue(adapter->netdev, idx);
3c8def97 2657 }
10ef9ab4
SP		 2658
2659 u64_stats_update_begin(&tx_stats(txo)->sync_compl);
2660 tx_stats(txo)->tx_compl += work_done;
2661 u64_stats_update_end(&tx_stats(txo)->sync_compl);
6b7c5b94 2662 }
10ef9ab4 2663}
6b7c5b94 2664
f7062ee5
SP		 2665#ifdef CONFIG_NET_RX_BUSY_POLL
2666static inline bool be_lock_napi(struct be_eq_obj *eqo)
2667{
2668 bool status = true;
2669
2670 spin_lock(&eqo->lock); /* BH is already disabled */
2671 if (eqo->state & BE_EQ_LOCKED) {
2672 WARN_ON(eqo->state & BE_EQ_NAPI);
2673 eqo->state |= BE_EQ_NAPI_YIELD;
2674 status = false;
2675 } else {
2676 eqo->state = BE_EQ_NAPI;
2677 }
2678 spin_unlock(&eqo->lock);
2679 return status;
2680}
2681
2682static inline void be_unlock_napi(struct be_eq_obj *eqo)
2683{
2684 spin_lock(&eqo->lock); /* BH is already disabled */
2685
2686 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD));
2687 eqo->state = BE_EQ_IDLE;
2688
2689 spin_unlock(&eqo->lock);
2690}
2691
2692static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
2693{
2694 bool status = true;
2695
2696 spin_lock_bh(&eqo->lock);
2697 if (eqo->state & BE_EQ_LOCKED) {
2698 eqo->state |= BE_EQ_POLL_YIELD;
2699 status = false;
2700 } else {
2701 eqo->state |= BE_EQ_POLL;
2702 }
2703 spin_unlock_bh(&eqo->lock);
2704 return status;
2705}
2706
2707static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
2708{
2709 spin_lock_bh(&eqo->lock);
2710
2711 WARN_ON(eqo->state & (BE_EQ_NAPI));
2712 eqo->state = BE_EQ_IDLE;
2713
2714 spin_unlock_bh(&eqo->lock);
2715}
2716
2717static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
2718{
2719 spin_lock_init(&eqo->lock);
2720 eqo->state = BE_EQ_IDLE;
2721}
2722
2723static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
2724{
2725 local_bh_disable();
2726
2727 /* It's enough to just acquire napi lock on the eqo to stop
2728 * be_busy_poll() from processing any queueus.
2729 */
2730 while (!be_lock_napi(eqo))
2731 mdelay(1);
2732
2733 local_bh_enable();
2734}
2735
2736#else /* CONFIG_NET_RX_BUSY_POLL */
2737
2738static inline bool be_lock_napi(struct be_eq_obj *eqo)
2739{
2740 return true;
2741}
2742
2743static inline void be_unlock_napi(struct be_eq_obj *eqo)
2744{
2745}
2746
2747static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
2748{
2749 return false;
2750}
2751
2752static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
2753{
2754}
2755
2756static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
2757{
2758}
2759
2760static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
2761{
2762}
2763#endif /* CONFIG_NET_RX_BUSY_POLL */
2764
68d7bdcb 2765int be_poll(struct napi_struct *napi, int budget)
10ef9ab4
SP		 2766{
2767 struct be_eq_obj *eqo = container_of(napi, struct be_eq_obj, napi);
2768 struct be_adapter *adapter = eqo->adapter;
0b545a62 2769 int max_work = 0, work, i, num_evts;
6384a4d0 2770 struct be_rx_obj *rxo;
a4906ea0 2771 struct be_tx_obj *txo;
f31e50a8 2772
0b545a62
SP		 2773 num_evts = events_get(eqo);
2774
a4906ea0
SP		 2775 for_all_tx_queues_on_eq(adapter, eqo, txo, i)
2776 be_process_tx(adapter, txo, i);
f31e50a8 2777
6384a4d0
SP		 2778 if (be_lock_napi(eqo)) {
2779 /* This loop will iterate twice for EQ0 in which
2780 * completions of the last RXQ (default one) are also processed
2781 * For other EQs the loop iterates only once
2782 */
2783 for_all_rx_queues_on_eq(adapter, eqo, rxo, i) {
2784 work = be_process_rx(rxo, napi, budget, NAPI_POLLING);
2785 max_work = max(work, max_work);
2786 }
2787 be_unlock_napi(eqo);
2788 } else {
2789 max_work = budget;
10ef9ab4 2790 }
6b7c5b94 2791
10ef9ab4
SP		 2792 if (is_mcc_eqo(eqo))
2793 be_process_mcc(adapter);
93c86700 2794
10ef9ab4
SP		 2795 if (max_work < budget) {
2796 napi_complete(napi);
0b545a62 2797 be_eq_notify(adapter, eqo->q.id, true, false, num_evts);
10ef9ab4
SP		 2798 } else {
2799 /* As we'll continue in polling mode, count and clear events */
0b545a62 2800 be_eq_notify(adapter, eqo->q.id, false, false, num_evts);
93c86700 2801 }
10ef9ab4 2802 return max_work;
6b7c5b94
SP		 2803}
2804
6384a4d0
SP		 2805#ifdef CONFIG_NET_RX_BUSY_POLL
2806static int be_busy_poll(struct napi_struct *napi)
2807{
2808 struct be_eq_obj *eqo = container_of(napi, struct be_eq_obj, napi);
2809 struct be_adapter *adapter = eqo->adapter;
2810 struct be_rx_obj *rxo;
2811 int i, work = 0;
2812
2813 if (!be_lock_busy_poll(eqo))
2814 return LL_FLUSH_BUSY;
2815
2816 for_all_rx_queues_on_eq(adapter, eqo, rxo, i) {
2817 work = be_process_rx(rxo, napi, 4, BUSY_POLLING);
2818 if (work)
2819 break;
2820 }
2821
2822 be_unlock_busy_poll(eqo);
2823 return work;
2824}
2825#endif
2826
f67ef7ba 2827void be_detect_error(struct be_adapter *adapter)
7c185276 2828{
e1cfb67a
PR		 2829 u32 ue_lo = 0, ue_hi = 0, ue_lo_mask = 0, ue_hi_mask = 0;
2830 u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
7c185276 2831 u32 i;
eb0eecc1
SK		 2832 bool error_detected = false;
2833 struct device *dev = &adapter->pdev->dev;
2834 struct net_device *netdev = adapter->netdev;
7c185276 2835
d23e946c 2836 if (be_hw_error(adapter))
72f02485
SP		 2837 return;
2838
e1cfb67a
PR		 2839 if (lancer_chip(adapter)) {
2840 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
2841 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2842 sliport_err1 = ioread32(adapter->db +
748b539a 2843 SLIPORT_ERROR1_OFFSET);
e1cfb67a 2844 sliport_err2 = ioread32(adapter->db +
748b539a 2845 SLIPORT_ERROR2_OFFSET);
eb0eecc1 2846 adapter->hw_error = true;
d0e1b319 2847 error_detected = true;
eb0eecc1
SK		 2848 /* Do not log error messages if its a FW reset */
2849 if (sliport_err1 == SLIPORT_ERROR_FW_RESET1 &&
2850 sliport_err2 == SLIPORT_ERROR_FW_RESET2) {
2851 dev_info(dev, "Firmware update in progress\n");
2852 } else {
eb0eecc1
SK		 2853 dev_err(dev, "Error detected in the card\n");
2854 dev_err(dev, "ERR: sliport status 0x%x\n",
2855 sliport_status);
2856 dev_err(dev, "ERR: sliport error1 0x%x\n",
2857 sliport_err1);
2858 dev_err(dev, "ERR: sliport error2 0x%x\n",
2859 sliport_err2);
2860 }
e1cfb67a
PR		 2861 }
2862 } else {
2863 pci_read_config_dword(adapter->pdev,
748b539a 2864 PCICFG_UE_STATUS_LOW, &ue_lo);
e1cfb67a 2865 pci_read_config_dword(adapter->pdev,
748b539a 2866 PCICFG_UE_STATUS_HIGH, &ue_hi);
e1cfb67a 2867 pci_read_config_dword(adapter->pdev,
748b539a 2868 PCICFG_UE_STATUS_LOW_MASK, &ue_lo_mask);
e1cfb67a 2869 pci_read_config_dword(adapter->pdev,
748b539a 2870 PCICFG_UE_STATUS_HI_MASK, &ue_hi_mask);
e1cfb67a 2871
f67ef7ba
PR		 2872 ue_lo = (ue_lo & ~ue_lo_mask);
2873 ue_hi = (ue_hi & ~ue_hi_mask);
7c185276 2874
eb0eecc1
SK		 2875 /* On certain platforms BE hardware can indicate spurious UEs.
2876 * Allow HW to stop working completely in case of a real UE.
2877 * Hence not setting the hw_error for UE detection.
2878 */
f67ef7ba 2879
eb0eecc1
SK		 2880 if (ue_lo || ue_hi) {
2881 error_detected = true;
2882 dev_err(dev,
2883 "Unrecoverable Error detected in the adapter");
2884 dev_err(dev, "Please reboot server to recover");
2885 if (skyhawk_chip(adapter))
2886 adapter->hw_error = true;
2887 for (i = 0; ue_lo; ue_lo >>= 1, i++) {
2888 if (ue_lo & 1)
2889 dev_err(dev, "UE: %s bit set\n",
2890 ue_status_low_desc[i]);
2891 }
2892 for (i = 0; ue_hi; ue_hi >>= 1, i++) {
2893 if (ue_hi & 1)
2894 dev_err(dev, "UE: %s bit set\n",
2895 ue_status_hi_desc[i]);
2896 }
7c185276
AK		 2897 }
2898 }
eb0eecc1
SK		 2899 if (error_detected)
2900 netif_carrier_off(netdev);
7c185276
AK		 2901}
2902
8d56ff11
SP		 2903static void be_msix_disable(struct be_adapter *adapter)
2904{
ac6a0c4a 2905 if (msix_enabled(adapter)) {
8d56ff11 2906 pci_disable_msix(adapter->pdev);
ac6a0c4a 2907 adapter->num_msix_vec = 0;
68d7bdcb 2908 adapter->num_msix_roce_vec = 0;
3abcdeda
SP		 2909 }
2910}
2911
c2bba3df 2912static int be_msix_enable(struct be_adapter *adapter)
6b7c5b94 2913{
7dc4c064 2914 int i, num_vec;
d379142b 2915 struct device *dev = &adapter->pdev->dev;
6b7c5b94 2916
92bf14ab
SP		 2917 /* If RoCE is supported, program the max number of NIC vectors that
2918 * may be configured via set-channels, along with vectors needed for
2919 * RoCe. Else, just program the number we'll use initially.
2920 */
2921 if (be_roce_supported(adapter))
2922 num_vec = min_t(int, 2 * be_max_eqs(adapter),
2923 2 * num_online_cpus());
2924 else
2925 num_vec = adapter->cfg_num_qs;
3abcdeda 2926
ac6a0c4a 2927 for (i = 0; i < num_vec; i++)
6b7c5b94
SP		 2928 adapter->msix_entries[i].entry = i;
2929
7dc4c064
AG		 2930 num_vec = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2931 MIN_MSIX_VECTORS, num_vec);
2932 if (num_vec < 0)
2933 goto fail;
92bf14ab 2934
92bf14ab
SP		 2935 if (be_roce_supported(adapter) && num_vec > MIN_MSIX_VECTORS) {
2936 adapter->num_msix_roce_vec = num_vec / 2;
2937 dev_info(dev, "enabled %d MSI-x vector(s) for RoCE\n",
2938 adapter->num_msix_roce_vec);
2939 }
2940
2941 adapter->num_msix_vec = num_vec - adapter->num_msix_roce_vec;
2942
2943 dev_info(dev, "enabled %d MSI-x vector(s) for NIC\n",
2944 adapter->num_msix_vec);
c2bba3df 2945 return 0;
7dc4c064
AG		 2946
2947fail:
2948 dev_warn(dev, "MSIx enable failed\n");
2949
2950 /* INTx is not supported in VFs, so fail probe if enable_msix fails */
2951 if (!be_physfn(adapter))
2952 return num_vec;
2953 return 0;
6b7c5b94
SP		 2954}
2955
fe6d2a38 2956static inline int be_msix_vec_get(struct be_adapter *adapter,
748b539a 2957 struct be_eq_obj *eqo)
b628bde2 2958{
f2f781a7 2959 return adapter->msix_entries[eqo->msix_idx].vector;
b628bde2 2960}
6b7c5b94 2961
b628bde2
SP		 2962static int be_msix_register(struct be_adapter *adapter)
2963{
10ef9ab4
SP		 2964 struct net_device *netdev = adapter->netdev;
2965 struct be_eq_obj *eqo;
2966 int status, i, vec;
6b7c5b94 2967
10ef9ab4
SP		 2968 for_all_evt_queues(adapter, eqo, i) {
2969 sprintf(eqo->desc, "%s-q%d", netdev->name, i);
2970 vec = be_msix_vec_get(adapter, eqo);
2971 status = request_irq(vec, be_msix, 0, eqo->desc, eqo);
3abcdeda
SP		 2972 if (status)
2973 goto err_msix;
2974 }
b628bde2 2975
6b7c5b94 2976 return 0;
3abcdeda 2977err_msix:
10ef9ab4
SP		 2978 for (i--, eqo = &adapter->eq_obj[i]; i >= 0; i--, eqo--)
2979 free_irq(be_msix_vec_get(adapter, eqo), eqo);
2980 dev_warn(&adapter->pdev->dev, "MSIX Request IRQ failed - err %d\n",
748b539a 2981 status);
ac6a0c4a 2982 be_msix_disable(adapter);
6b7c5b94
SP		 2983 return status;
2984}
2985
2986static int be_irq_register(struct be_adapter *adapter)
2987{
2988 struct net_device *netdev = adapter->netdev;
2989 int status;
2990
ac6a0c4a 2991 if (msix_enabled(adapter)) {
6b7c5b94
SP		 2992 status = be_msix_register(adapter);
2993 if (status == 0)
2994 goto done;
ba343c77
SB		 2995 /* INTx is not supported for VF */
2996 if (!be_physfn(adapter))
2997 return status;
6b7c5b94
SP		 2998 }
2999
e49cc34f 3000 /* INTx: only the first EQ is used */
6b7c5b94
SP		 3001 netdev->irq = adapter->pdev->irq;
3002 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
e49cc34f 3003 &adapter->eq_obj[0]);
6b7c5b94
SP		 3004 if (status) {
3005 dev_err(&adapter->pdev->dev,
3006 "INTx request IRQ failed - err %d\n", status);
3007 return status;
3008 }
3009done:
3010 adapter->isr_registered = true;
3011 return 0;
3012}
3013
3014static void be_irq_unregister(struct be_adapter *adapter)
3015{
3016 struct net_device *netdev = adapter->netdev;
10ef9ab4 3017 struct be_eq_obj *eqo;
3abcdeda 3018 int i;
6b7c5b94
SP		 3019
3020 if (!adapter->isr_registered)
3021 return;
3022
3023 /* INTx */
ac6a0c4a 3024 if (!msix_enabled(adapter)) {
e49cc34f 3025 free_irq(netdev->irq, &adapter->eq_obj[0]);
6b7c5b94
SP		 3026 goto done;
3027 }
3028
3029 /* MSIx */
10ef9ab4
SP		 3030 for_all_evt_queues(adapter, eqo, i)
3031 free_irq(be_msix_vec_get(adapter, eqo), eqo);
3abcdeda 3032
6b7c5b94
SP		 3033done:
3034 adapter->isr_registered = false;
6b7c5b94
SP		 3035}
3036
10ef9ab4 3037static void be_rx_qs_destroy(struct be_adapter *adapter)
482c9e79
SP		 3038{
3039 struct be_queue_info *q;
3040 struct be_rx_obj *rxo;
3041 int i;
3042
3043 for_all_rx_queues(adapter, rxo, i) {
3044 q = &rxo->q;
3045 if (q->created) {
3046 be_cmd_rxq_destroy(adapter, q);
10ef9ab4 3047 be_rx_cq_clean(rxo);
482c9e79 3048 }
10ef9ab4 3049 be_queue_free(adapter, q);
482c9e79
SP		 3050 }
3051}
3052
889cd4b2
SP		 3053static int be_close(struct net_device *netdev)
3054{
3055 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4
SP		 3056 struct be_eq_obj *eqo;
3057 int i;
889cd4b2 3058
e1ad8e33
KA		 3059 /* This protection is needed as be_close() may be called even when the
3060 * adapter is in cleared state (after eeh perm failure)
3061 */
3062 if (!(adapter->flags & BE_FLAGS_SETUP_DONE))
3063 return 0;
3064
045508a8
PP		 3065 be_roce_dev_close(adapter);
3066
dff345c5
IV		 3067 if (adapter->flags & BE_FLAGS_NAPI_ENABLED) {
3068 for_all_evt_queues(adapter, eqo, i) {
04d3d624 3069 napi_disable(&eqo->napi);
6384a4d0
SP		 3070 be_disable_busy_poll(eqo);
3071 }
71237b6f 3072 adapter->flags &= ~BE_FLAGS_NAPI_ENABLED;
04d3d624 3073 }
a323d9bf
SP		 3074
3075 be_async_mcc_disable(adapter);
3076
3077 /* Wait for all pending tx completions to arrive so that
3078 * all tx skbs are freed.
3079 */
fba87559 3080 netif_tx_disable(netdev);
6e1f9975 3081 be_tx_compl_clean(adapter);
a323d9bf
SP		 3082
3083 be_rx_qs_destroy(adapter);
f66b7cfd 3084 be_clear_uc_list(adapter);
d11a347d 3085
a323d9bf 3086 for_all_evt_queues(adapter, eqo, i) {
10ef9ab4
SP		 3087 if (msix_enabled(adapter))
3088 synchronize_irq(be_msix_vec_get(adapter, eqo));
3089 else
3090 synchronize_irq(netdev->irq);
3091 be_eq_clean(eqo);
63fcb27f
PR		 3092 }
3093
889cd4b2
SP		 3094 be_irq_unregister(adapter);
3095
482c9e79
SP		 3096 return 0;
3097}
3098
10ef9ab4 3099static int be_rx_qs_create(struct be_adapter *adapter)
482c9e79 3100{
1dcf7b1c
ED		 3101 struct rss_info *rss = &adapter->rss_info;
3102 u8 rss_key[RSS_HASH_KEY_LEN];
482c9e79 3103 struct be_rx_obj *rxo;
e9008ee9 3104 int rc, i, j;
482c9e79
SP		 3105
3106 for_all_rx_queues(adapter, rxo, i) {
10ef9ab4
SP		 3107 rc = be_queue_alloc(adapter, &rxo->q, RX_Q_LEN,
3108 sizeof(struct be_eth_rx_d));
3109 if (rc)
3110 return rc;
3111 }
3112
3113 /* The FW would like the default RXQ to be created first */
3114 rxo = default_rxo(adapter);
3115 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id, rx_frag_size,
3116 adapter->if_handle, false, &rxo->rss_id);
3117 if (rc)
3118 return rc;
3119
3120 for_all_rss_queues(adapter, rxo, i) {
482c9e79 3121 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id,
10ef9ab4
SP		 3122 rx_frag_size, adapter->if_handle,
3123 true, &rxo->rss_id);
482c9e79
SP		 3124 if (rc)
3125 return rc;
3126 }
3127
3128 if (be_multi_rxq(adapter)) {
e2557877
VD		 3129 for (j = 0; j < RSS_INDIR_TABLE_LEN;
3130 j += adapter->num_rx_qs - 1) {
e9008ee9 3131 for_all_rss_queues(adapter, rxo, i) {
e2557877 3132 if ((j + i) >= RSS_INDIR_TABLE_LEN)
e9008ee9 3133 break;
e2557877
VD		 3134 rss->rsstable[j + i] = rxo->rss_id;
3135 rss->rss_queue[j + i] = i;
e9008ee9
PR		 3136 }
3137 }
e2557877
VD		 3138 rss->rss_flags = RSS_ENABLE_TCP_IPV4 | RSS_ENABLE_IPV4 |
3139 RSS_ENABLE_TCP_IPV6 | RSS_ENABLE_IPV6;
594ad54a
SR		 3140
3141 if (!BEx_chip(adapter))
e2557877
VD		 3142 rss->rss_flags |= RSS_ENABLE_UDP_IPV4 |
3143 RSS_ENABLE_UDP_IPV6;
da1388d6
VV		 3144 } else {
3145 /* Disable RSS, if only default RX Q is created */
e2557877 3146 rss->rss_flags = RSS_ENABLE_NONE;
da1388d6 3147 }
594ad54a 3148
1dcf7b1c 3149 netdev_rss_key_fill(rss_key, RSS_HASH_KEY_LEN);
748b539a 3150 rc = be_cmd_rss_config(adapter, rss->rsstable, rss->rss_flags,
1dcf7b1c 3151 128, rss_key);
da1388d6 3152 if (rc) {
e2557877 3153 rss->rss_flags = RSS_ENABLE_NONE;
da1388d6 3154 return rc;
482c9e79
SP		 3155 }
3156
1dcf7b1c 3157 memcpy(rss->rss_hkey, rss_key, RSS_HASH_KEY_LEN);
e2557877 3158
482c9e79 3159 /* First time posting */
10ef9ab4 3160 for_all_rx_queues(adapter, rxo, i)
c30d7266 3161 be_post_rx_frags(rxo, GFP_KERNEL, MAX_RX_POST);
889cd4b2
SP		 3162 return 0;
3163}
3164
6b7c5b94
SP		 3165static int be_open(struct net_device *netdev)
3166{
3167 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4 3168 struct be_eq_obj *eqo;
3abcdeda 3169 struct be_rx_obj *rxo;
10ef9ab4 3170 struct be_tx_obj *txo;
b236916a 3171 u8 link_status;
3abcdeda 3172 int status, i;
5fb379ee 3173
10ef9ab4 3174 status = be_rx_qs_create(adapter);
482c9e79
SP		 3175 if (status)
3176 goto err;
3177
c2bba3df
SK		 3178 status = be_irq_register(adapter);
3179 if (status)
3180 goto err;
5fb379ee 3181
10ef9ab4 3182 for_all_rx_queues(adapter, rxo, i)
3abcdeda 3183 be_cq_notify(adapter, rxo->cq.id, true, 0);
5fb379ee 3184
10ef9ab4
SP		 3185 for_all_tx_queues(adapter, txo, i)
3186 be_cq_notify(adapter, txo->cq.id, true, 0);
3187
7a1e9b20
SP		 3188 be_async_mcc_enable(adapter);
3189
10ef9ab4
SP		 3190 for_all_evt_queues(adapter, eqo, i) {
3191 napi_enable(&eqo->napi);
6384a4d0 3192 be_enable_busy_poll(eqo);
4cad9f3b 3193 be_eq_notify(adapter, eqo->q.id, true, true, 0);
10ef9ab4 3194 }
04d3d624 3195 adapter->flags |= BE_FLAGS_NAPI_ENABLED;
10ef9ab4 3196
323ff71e 3197 status = be_cmd_link_status_query(adapter, NULL, &link_status, 0);
b236916a
AK		 3198 if (!status)
3199 be_link_status_update(adapter, link_status);
3200
fba87559 3201 netif_tx_start_all_queues(netdev);
045508a8 3202 be_roce_dev_open(adapter);
c9c47142 3203
c5abe7c0 3204#ifdef CONFIG_BE2NET_VXLAN
c9c47142
SP		 3205 if (skyhawk_chip(adapter))
3206 vxlan_get_rx_port(netdev);
c5abe7c0
SP		 3207#endif
3208
889cd4b2
SP		 3209 return 0;
3210err:
3211 be_close(adapter->netdev);
3212 return -EIO;
5fb379ee
SP		 3213}
3214
71d8d1b5
AK		 3215static int be_setup_wol(struct be_adapter *adapter, bool enable)
3216{
3217 struct be_dma_mem cmd;
3218 int status = 0;
3219 u8 mac[ETH_ALEN];
3220
3221 memset(mac, 0, ETH_ALEN);
3222
3223 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
ede23fa8
JP		 3224 cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma,
3225 GFP_KERNEL);
ddf1169f 3226 if (!cmd.va)
6b568689 3227 return -ENOMEM;
71d8d1b5
AK		 3228
3229 if (enable) {
3230 status = pci_write_config_dword(adapter->pdev,
748b539a
SP		 3231 PCICFG_PM_CONTROL_OFFSET,
3232 PCICFG_PM_CONTROL_MASK);
71d8d1b5
AK		 3233 if (status) {
3234 dev_err(&adapter->pdev->dev,
2381a55c 3235 "Could not enable Wake-on-lan\n");
2b7bcebf
IV		 3236 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va,
3237 cmd.dma);
71d8d1b5
AK		 3238 return status;
3239 }
3240 status = be_cmd_enable_magic_wol(adapter,
748b539a
SP		 3241 adapter->netdev->dev_addr,
3242 &cmd);
71d8d1b5
AK		 3243 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
3244 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
3245 } else {
3246 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
3247 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
3248 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
3249 }
3250
2b7bcebf 3251 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
71d8d1b5
AK		 3252 return status;
3253}
3254
f7062ee5
SP		 3255static void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
3256{
3257 u32 addr;
3258
3259 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
3260
3261 mac[5] = (u8)(addr & 0xFF);
3262 mac[4] = (u8)((addr >> 8) & 0xFF);
3263 mac[3] = (u8)((addr >> 16) & 0xFF);
3264 /* Use the OUI from the current MAC address */
3265 memcpy(mac, adapter->netdev->dev_addr, 3);
3266}
3267
6d87f5c3
AK		 3268/*
3269 * Generate a seed MAC address from the PF MAC Address using jhash.
3270 * MAC Address for VFs are assigned incrementally starting from the seed.
3271 * These addresses are programmed in the ASIC by the PF and the VF driver
3272 * queries for the MAC address during its probe.
3273 */
4c876616 3274static int be_vf_eth_addr_config(struct be_adapter *adapter)
6d87f5c3 3275{
f9449ab7 3276 u32 vf;
3abcdeda 3277 int status = 0;
6d87f5c3 3278 u8 mac[ETH_ALEN];
11ac75ed 3279 struct be_vf_cfg *vf_cfg;
6d87f5c3
AK		 3280
3281 be_vf_eth_addr_generate(adapter, mac);
3282
11ac75ed 3283 for_all_vfs(adapter, vf_cfg, vf) {
3175d8c2 3284 if (BEx_chip(adapter))
590c391d 3285 status = be_cmd_pmac_add(adapter, mac,
11ac75ed
SP		 3286 vf_cfg->if_handle,
3287 &vf_cfg->pmac_id, vf + 1);
3175d8c2
SP		 3288 else
3289 status = be_cmd_set_mac(adapter, mac, vf_cfg->if_handle,
3290 vf + 1);
590c391d 3291
6d87f5c3
AK		 3292 if (status)
3293 dev_err(&adapter->pdev->dev,
748b539a
SP		 3294 "Mac address assignment failed for VF %d\n",
3295 vf);
6d87f5c3 3296 else
11ac75ed 3297 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
6d87f5c3
AK		 3298
3299 mac[5] += 1;
3300 }
3301 return status;
3302}
3303
4c876616
SP		 3304static int be_vfs_mac_query(struct be_adapter *adapter)
3305{
3306 int status, vf;
3307 u8 mac[ETH_ALEN];
3308 struct be_vf_cfg *vf_cfg;
4c876616
SP		 3309
3310 for_all_vfs(adapter, vf_cfg, vf) {
b188f090
SR		 3311 status = be_cmd_get_active_mac(adapter, vf_cfg->pmac_id,
3312 mac, vf_cfg->if_handle,
3313 false, vf+1);
4c876616
SP		 3314 if (status)
3315 return status;
3316 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
3317 }
3318 return 0;
3319}
3320
f9449ab7 3321static void be_vf_clear(struct be_adapter *adapter)
6d87f5c3 3322{
11ac75ed 3323 struct be_vf_cfg *vf_cfg;
6d87f5c3
AK		 3324 u32 vf;
3325
257a3feb 3326 if (pci_vfs_assigned(adapter->pdev)) {
4c876616
SP		 3327 dev_warn(&adapter->pdev->dev,
3328 "VFs are assigned to VMs: not disabling VFs\n");
39f1d94d
SP		 3329 goto done;
3330 }
3331
b4c1df93
SP		 3332 pci_disable_sriov(adapter->pdev);
3333
11ac75ed 3334 for_all_vfs(adapter, vf_cfg, vf) {
3175d8c2 3335 if (BEx_chip(adapter))
11ac75ed
SP		 3336 be_cmd_pmac_del(adapter, vf_cfg->if_handle,
3337 vf_cfg->pmac_id, vf + 1);
3175d8c2
SP		 3338 else
3339 be_cmd_set_mac(adapter, NULL, vf_cfg->if_handle,
3340 vf + 1);
f9449ab7 3341
11ac75ed
SP		 3342 be_cmd_if_destroy(adapter, vf_cfg->if_handle, vf + 1);
3343 }
39f1d94d
SP		 3344done:
3345 kfree(adapter->vf_cfg);
3346 adapter->num_vfs = 0;
f174c7ec 3347 adapter->flags &= ~BE_FLAGS_SRIOV_ENABLED;
6d87f5c3
AK		 3348}
3349
7707133c
SP		 3350static void be_clear_queues(struct be_adapter *adapter)
3351{
3352 be_mcc_queues_destroy(adapter);
3353 be_rx_cqs_destroy(adapter);
3354 be_tx_queues_destroy(adapter);
3355 be_evt_queues_destroy(adapter);
3356}
3357
68d7bdcb 3358static void be_cancel_worker(struct be_adapter *adapter)
a54769f5 3359{
191eb756
SP		 3360 if (adapter->flags & BE_FLAGS_WORKER_SCHEDULED) {
3361 cancel_delayed_work_sync(&adapter->work);
3362 adapter->flags &= ~BE_FLAGS_WORKER_SCHEDULED;
3363 }
68d7bdcb
SP		 3364}
3365
eb7dd46c
SP		 3366static void be_cancel_err_detection(struct be_adapter *adapter)
3367{
3368 if (adapter->flags & BE_FLAGS_ERR_DETECTION_SCHEDULED) {
3369 cancel_delayed_work_sync(&adapter->be_err_detection_work);
3370 adapter->flags &= ~BE_FLAGS_ERR_DETECTION_SCHEDULED;
3371 }
3372}
3373
b05004ad 3374static void be_mac_clear(struct be_adapter *adapter)
68d7bdcb 3375{
b05004ad 3376 if (adapter->pmac_id) {
f66b7cfd
SP		 3377 be_cmd_pmac_del(adapter, adapter->if_handle,
3378 adapter->pmac_id[0], 0);
b05004ad
SK		 3379 kfree(adapter->pmac_id);
3380 adapter->pmac_id = NULL;
3381 }
3382}
3383
c5abe7c0 3384#ifdef CONFIG_BE2NET_VXLAN
c9c47142
SP		 3385static void be_disable_vxlan_offloads(struct be_adapter *adapter)
3386{
630f4b70
SB		 3387 struct net_device *netdev = adapter->netdev;
3388
c9c47142
SP		 3389 if (adapter->flags & BE_FLAGS_VXLAN_OFFLOADS)
3390 be_cmd_manage_iface(adapter, adapter->if_handle,
3391 OP_CONVERT_TUNNEL_TO_NORMAL);
3392
3393 if (adapter->vxlan_port)
3394 be_cmd_set_vxlan_port(adapter, 0);
3395
3396 adapter->flags &= ~BE_FLAGS_VXLAN_OFFLOADS;
3397 adapter->vxlan_port = 0;
630f4b70
SB		 3398
3399 netdev->hw_enc_features = 0;
3400 netdev->hw_features &= ~(NETIF_F_GSO_UDP_TUNNEL);
ac9a3d84 3401 netdev->features &= ~(NETIF_F_GSO_UDP_TUNNEL);
c9c47142 3402}
c5abe7c0 3403#endif
c9c47142 3404
b05004ad
SK		 3405static int be_clear(struct be_adapter *adapter)
3406{
68d7bdcb 3407 be_cancel_worker(adapter);
191eb756 3408
11ac75ed 3409 if (sriov_enabled(adapter))
f9449ab7
SP		 3410 be_vf_clear(adapter);
3411
bec84e6b
VV		 3412 /* Re-configure FW to distribute resources evenly across max-supported
3413 * number of VFs, only when VFs are not already enabled.
3414 */
3415 if (be_physfn(adapter) && !pci_vfs_assigned(adapter->pdev))
3416 be_cmd_set_sriov_config(adapter, adapter->pool_res,
3417 pci_sriov_get_totalvfs(adapter->pdev));
3418
c5abe7c0 3419#ifdef CONFIG_BE2NET_VXLAN
c9c47142 3420 be_disable_vxlan_offloads(adapter);
c5abe7c0 3421#endif
2d17f403 3422 /* delete the primary mac along with the uc-mac list */
b05004ad 3423 be_mac_clear(adapter);
fbc13f01 3424
f9449ab7 3425 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
a54769f5 3426
7707133c 3427 be_clear_queues(adapter);
a54769f5 3428
10ef9ab4 3429 be_msix_disable(adapter);
e1ad8e33 3430 adapter->flags &= ~BE_FLAGS_SETUP_DONE;
a54769f5
SP		 3431 return 0;
3432}
3433
0700d816
KA		 3434static int be_if_create(struct be_adapter *adapter, u32 *if_handle,
3435 u32 cap_flags, u32 vf)
3436{
3437 u32 en_flags;
3438 int status;
3439
3440 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
3441 BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS |
3442 BE_IF_FLAGS_RSS;
3443
3444 en_flags &= cap_flags;
3445
3446 status = be_cmd_if_create(adapter, cap_flags, en_flags,
3447 if_handle, vf);
3448
3449 return status;
3450}
3451
4c876616 3452static int be_vfs_if_create(struct be_adapter *adapter)
abb93951 3453{
92bf14ab 3454 struct be_resources res = {0};
4c876616 3455 struct be_vf_cfg *vf_cfg;
0700d816
KA		 3456 u32 cap_flags, vf;
3457 int status;
abb93951 3458
0700d816 3459 /* If a FW profile exists, then cap_flags are updated */
4c876616
SP		 3460 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
3461 BE_IF_FLAGS_MULTICAST;
abb93951 3462
4c876616 3463 for_all_vfs(adapter, vf_cfg, vf) {
92bf14ab
SP		 3464 if (!BE3_chip(adapter)) {
3465 status = be_cmd_get_profile_config(adapter, &res,
3466 vf + 1);
3467 if (!status)
3468 cap_flags = res.if_cap_flags;
3469 }
4c876616 3470
0700d816
KA		 3471 status = be_if_create(adapter, &vf_cfg->if_handle,
3472 cap_flags, vf + 1);
4c876616 3473 if (status)
0700d816 3474 return status;
4c876616 3475 }
0700d816
KA		 3476
3477 return 0;
abb93951
PR		 3478}
3479
39f1d94d 3480static int be_vf_setup_init(struct be_adapter *adapter)
30128031 3481{
11ac75ed 3482 struct be_vf_cfg *vf_cfg;
30128031
SP		 3483 int vf;
3484
39f1d94d
SP		 3485 adapter->vf_cfg = kcalloc(adapter->num_vfs, sizeof(*vf_cfg),
3486 GFP_KERNEL);
3487 if (!adapter->vf_cfg)
3488 return -ENOMEM;
3489
11ac75ed
SP		 3490 for_all_vfs(adapter, vf_cfg, vf) {
3491 vf_cfg->if_handle = -1;
3492 vf_cfg->pmac_id = -1;
30128031 3493 }
39f1d94d 3494 return 0;
30128031
SP		 3495}
3496
f9449ab7
SP		 3497static int be_vf_setup(struct be_adapter *adapter)
3498{
c502224e 3499 struct device *dev = &adapter->pdev->dev;
11ac75ed 3500 struct be_vf_cfg *vf_cfg;
4c876616 3501 int status, old_vfs, vf;
04a06028 3502 u32 privileges;
39f1d94d 3503
257a3feb 3504 old_vfs = pci_num_vf(adapter->pdev);
39f1d94d
SP		 3505
3506 status = be_vf_setup_init(adapter);
3507 if (status)
3508 goto err;
30128031 3509
4c876616
SP		 3510 if (old_vfs) {
3511 for_all_vfs(adapter, vf_cfg, vf) {
3512 status = be_cmd_get_if_id(adapter, vf_cfg, vf);
3513 if (status)
3514 goto err;
3515 }
f9449ab7 3516
4c876616
SP		 3517 status = be_vfs_mac_query(adapter);
3518 if (status)
3519 goto err;
3520 } else {
bec84e6b
VV		 3521 status = be_vfs_if_create(adapter);
3522 if (status)
3523 goto err;
3524
39f1d94d
SP		 3525 status = be_vf_eth_addr_config(adapter);
3526 if (status)
3527 goto err;
3528 }
f9449ab7 3529
11ac75ed 3530 for_all_vfs(adapter, vf_cfg, vf) {
04a06028
SP		 3531 /* Allow VFs to programs MAC/VLAN filters */
3532 status = be_cmd_get_fn_privileges(adapter, &privileges, vf + 1);
3533 if (!status && !(privileges & BE_PRIV_FILTMGMT)) {
3534 status = be_cmd_set_fn_privileges(adapter,
3535 privileges |
3536 BE_PRIV_FILTMGMT,
3537 vf + 1);
3538 if (!status)
3539 dev_info(dev, "VF%d has FILTMGMT privilege\n",
3540 vf);
3541 }
3542
0f77ba73
RN		 3543 /* Allow full available bandwidth */
3544 if (!old_vfs)
3545 be_cmd_config_qos(adapter, 0, 0, vf + 1);
f1f3ee1b 3546
bdce2ad7 3547 if (!old_vfs) {
0599863d 3548 be_cmd_enable_vf(adapter, vf + 1);
bdce2ad7
SR		 3549 be_cmd_set_logical_link_config(adapter,
3550 IFLA_VF_LINK_STATE_AUTO,
3551 vf+1);
3552 }
f9449ab7 3553 }
b4c1df93
SP		 3554
3555 if (!old_vfs) {
3556 status = pci_enable_sriov(adapter->pdev, adapter->num_vfs);
3557 if (status) {
3558 dev_err(dev, "SRIOV enable failed\n");
3559 adapter->num_vfs = 0;
3560 goto err;
3561 }
3562 }
f174c7ec
VV		 3563
3564 adapter->flags |= BE_FLAGS_SRIOV_ENABLED;
f9449ab7
SP		 3565 return 0;
3566err:
4c876616
SP		 3567 dev_err(dev, "VF setup failed\n");
3568 be_vf_clear(adapter);
f9449ab7
SP		 3569 return status;
3570}
3571
f93f160b
VV		 3572/* Converting function_mode bits on BE3 to SH mc_type enums */
3573
3574static u8 be_convert_mc_type(u32 function_mode)
3575{
66064dbc 3576 if (function_mode & VNIC_MODE && function_mode & QNQ_MODE)
f93f160b 3577 return vNIC1;
66064dbc 3578 else if (function_mode & QNQ_MODE)
f93f160b
VV		 3579 return FLEX10;
3580 else if (function_mode & VNIC_MODE)
3581 return vNIC2;
3582 else if (function_mode & UMC_ENABLED)
3583 return UMC;
3584 else
3585 return MC_NONE;
3586}
3587
92bf14ab
SP		 3588/* On BE2/BE3 FW does not suggest the supported limits */
3589static void BEx_get_resources(struct be_adapter *adapter,
3590 struct be_resources *res)
3591{
bec84e6b 3592 bool use_sriov = adapter->num_vfs ? 1 : 0;
92bf14ab
SP		 3593
3594 if (be_physfn(adapter))
3595 res->max_uc_mac = BE_UC_PMAC_COUNT;
3596 else
3597 res->max_uc_mac = BE_VF_UC_PMAC_COUNT;
3598
f93f160b
VV		 3599 adapter->mc_type = be_convert_mc_type(adapter->function_mode);
3600
3601 if (be_is_mc(adapter)) {
3602 /* Assuming that there are 4 channels per port,
3603 * when multi-channel is enabled
3604 */
3605 if (be_is_qnq_mode(adapter))
3606 res->max_vlans = BE_NUM_VLANS_SUPPORTED/8;
3607 else
3608 /* In a non-qnq multichannel mode, the pvid
3609 * takes up one vlan entry
3610 */
3611 res->max_vlans = (BE_NUM_VLANS_SUPPORTED / 4) - 1;
3612 } else {
92bf14ab 3613 res->max_vlans = BE_NUM_VLANS_SUPPORTED;
f93f160b
VV		 3614 }
3615
92bf14ab
SP		 3616 res->max_mcast_mac = BE_MAX_MC;
3617
a5243dab
VV		 3618 /* 1) For BE3 1Gb ports, FW does not support multiple TXQs
3619 * 2) Create multiple TX rings on a BE3-R multi-channel interface
3620 * *only* if it is RSS-capable.
3621 */
3622 if (BE2_chip(adapter) || use_sriov || (adapter->port_num > 1) ||
3623 !be_physfn(adapter) || (be_is_mc(adapter) &&
a28277dc 3624 !(adapter->function_caps & BE_FUNCTION_CAPS_RSS))) {
92bf14ab 3625 res->max_tx_qs = 1;
a28277dc
SR		 3626 } else if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) {
3627 struct be_resources super_nic_res = {0};
3628
3629 /* On a SuperNIC profile, the driver needs to use the
3630 * GET_PROFILE_CONFIG cmd to query the per-function TXQ limits
3631 */
3632 be_cmd_get_profile_config(adapter, &super_nic_res, 0);
3633 /* Some old versions of BE3 FW don't report max_tx_qs value */
3634 res->max_tx_qs = super_nic_res.max_tx_qs ? : BE3_MAX_TX_QS;
3635 } else {
92bf14ab 3636 res->max_tx_qs = BE3_MAX_TX_QS;
a28277dc 3637 }
92bf14ab
SP		 3638
3639 if ((adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
3640 !use_sriov && be_physfn(adapter))
3641 res->max_rss_qs = (adapter->be3_native) ?
3642 BE3_MAX_RSS_QS : BE2_MAX_RSS_QS;
3643 res->max_rx_qs = res->max_rss_qs + 1;
3644
e3dc867c 3645 if (be_physfn(adapter))
d3518e21 3646 res->max_evt_qs = (be_max_vfs(adapter) > 0) ?
e3dc867c
SR		 3647 BE3_SRIOV_MAX_EVT_QS : BE3_MAX_EVT_QS;
3648 else
3649 res->max_evt_qs = 1;
92bf14ab
SP		 3650
3651 res->if_cap_flags = BE_IF_CAP_FLAGS_WANT;
3652 if (!(adapter->function_caps & BE_FUNCTION_CAPS_RSS))
3653 res->if_cap_flags &= ~BE_IF_FLAGS_RSS;
3654}
3655
30128031
SP		 3656static void be_setup_init(struct be_adapter *adapter)
3657{
3658 adapter->vlan_prio_bmap = 0xff;
42f11cf2 3659 adapter->phy.link_speed = -1;
30128031
SP		 3660 adapter->if_handle = -1;
3661 adapter->be3_native = false;
f66b7cfd 3662 adapter->if_flags = 0;
f25b119c
PR		 3663 if (be_physfn(adapter))
3664 adapter->cmd_privileges = MAX_PRIVILEGES;
3665 else
3666 adapter->cmd_privileges = MIN_PRIVILEGES;
30128031
SP		 3667}
3668
bec84e6b
VV		 3669static int be_get_sriov_config(struct be_adapter *adapter)
3670{
3671 struct device *dev = &adapter->pdev->dev;
3672 struct be_resources res = {0};
d3d18312 3673 int max_vfs, old_vfs;
bec84e6b
VV		 3674
3675 /* Some old versions of BE3 FW don't report max_vfs value */
d3d18312
SP		 3676 be_cmd_get_profile_config(adapter, &res, 0);
3677
bec84e6b
VV		 3678 if (BE3_chip(adapter) && !res.max_vfs) {
3679 max_vfs = pci_sriov_get_totalvfs(adapter->pdev);
3680 res.max_vfs = max_vfs > 0 ? min(MAX_VFS, max_vfs) : 0;
3681 }
3682
d3d18312 3683 adapter->pool_res = res;
bec84e6b
VV		 3684
3685 if (!be_max_vfs(adapter)) {
3686 if (num_vfs)
50762667 3687 dev_warn(dev, "SRIOV is disabled. Ignoring num_vfs\n");
bec84e6b
VV		 3688 adapter->num_vfs = 0;
3689 return 0;
3690 }
3691
d3d18312
SP		 3692 pci_sriov_set_totalvfs(adapter->pdev, be_max_vfs(adapter));
3693
bec84e6b
VV		 3694 /* validate num_vfs module param */
3695 old_vfs = pci_num_vf(adapter->pdev);
3696 if (old_vfs) {
3697 dev_info(dev, "%d VFs are already enabled\n", old_vfs);
3698 if (old_vfs != num_vfs)
3699 dev_warn(dev, "Ignoring num_vfs=%d setting\n", num_vfs);
3700 adapter->num_vfs = old_vfs;
3701 } else {
3702 if (num_vfs > be_max_vfs(adapter)) {
3703 dev_info(dev, "Resources unavailable to init %d VFs\n",
3704 num_vfs);
3705 dev_info(dev, "Limiting to %d VFs\n",
3706 be_max_vfs(adapter));
3707 }
3708 adapter->num_vfs = min_t(u16, num_vfs, be_max_vfs(adapter));
3709 }
3710
3711 return 0;
3712}
3713
92bf14ab 3714static int be_get_resources(struct be_adapter *adapter)
abb93951 3715{
92bf14ab
SP		 3716 struct device *dev = &adapter->pdev->dev;
3717 struct be_resources res = {0};
3718 int status;
abb93951 3719
92bf14ab
SP		 3720 if (BEx_chip(adapter)) {
3721 BEx_get_resources(adapter, &res);
3722 adapter->res = res;
abb93951
PR		 3723 }
3724
92bf14ab
SP		 3725 /* For Lancer, SH etc read per-function resource limits from FW.
3726 * GET_FUNC_CONFIG returns per function guaranteed limits.
3727 * GET_PROFILE_CONFIG returns PCI-E related limits PF-pool limits
3728 */
3729 if (!BEx_chip(adapter)) {
3730 status = be_cmd_get_func_config(adapter, &res);
3731 if (status)
3732 return status;
abb93951 3733
92bf14ab
SP		 3734 /* If RoCE may be enabled stash away half the EQs for RoCE */
3735 if (be_roce_supported(adapter))
3736 res.max_evt_qs /= 2;
3737 adapter->res = res;
abb93951 3738 }
4c876616 3739
acbafeb1
SP		 3740 dev_info(dev, "Max: txqs %d, rxqs %d, rss %d, eqs %d, vfs %d\n",
3741 be_max_txqs(adapter), be_max_rxqs(adapter),
3742 be_max_rss(adapter), be_max_eqs(adapter),
3743 be_max_vfs(adapter));
3744 dev_info(dev, "Max: uc-macs %d, mc-macs %d, vlans %d\n",
3745 be_max_uc(adapter), be_max_mc(adapter),
3746 be_max_vlans(adapter));
3747
92bf14ab 3748 return 0;
abb93951
PR		 3749}
3750
d3d18312
SP		 3751static void be_sriov_config(struct be_adapter *adapter)
3752{
3753 struct device *dev = &adapter->pdev->dev;
3754 int status;
3755
3756 status = be_get_sriov_config(adapter);
3757 if (status) {
3758 dev_err(dev, "Failed to query SR-IOV configuration\n");
3759 dev_err(dev, "SR-IOV cannot be enabled\n");
3760 return;
3761 }
3762
3763 /* When the HW is in SRIOV capable configuration, the PF-pool
3764 * resources are equally distributed across the max-number of
3765 * VFs. The user may request only a subset of the max-vfs to be
3766 * enabled. Based on num_vfs, redistribute the resources across
3767 * num_vfs so that each VF will have access to more number of
3768 * resources. This facility is not available in BE3 FW.
3769 * Also, this is done by FW in Lancer chip.
3770 */
3771 if (be_max_vfs(adapter) && !pci_num_vf(adapter->pdev)) {
3772 status = be_cmd_set_sriov_config(adapter,
3773 adapter->pool_res,
3774 adapter->num_vfs);
3775 if (status)
3776 dev_err(dev, "Failed to optimize SR-IOV resources\n");
3777 }
3778}
3779
39f1d94d
SP		 3780static int be_get_config(struct be_adapter *adapter)
3781{
6b085ba9 3782 int status, level;
542963b7 3783 u16 profile_id;
6b085ba9
SP		 3784
3785 status = be_cmd_get_cntl_attributes(adapter);
3786 if (status)
3787 return status;
39f1d94d 3788
e97e3cda 3789 status = be_cmd_query_fw_cfg(adapter);
abb93951 3790 if (status)
92bf14ab 3791 return status;
abb93951 3792
6b085ba9
SP		 3793 if (BEx_chip(adapter)) {
3794 level = be_cmd_get_fw_log_level(adapter);
3795 adapter->msg_enable =
3796 level <= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0;
3797 }
3798
3799 be_cmd_get_acpi_wol_cap(adapter);
3800
21252377
VV		 3801 be_cmd_query_port_name(adapter);
3802
3803 if (be_physfn(adapter)) {
542963b7
VV		 3804 status = be_cmd_get_active_profile(adapter, &profile_id);
3805 if (!status)
3806 dev_info(&adapter->pdev->dev,
3807 "Using profile 0x%x\n", profile_id);
962bcb75 3808 }
bec84e6b 3809
d3d18312
SP		 3810 if (!BE2_chip(adapter) && be_physfn(adapter))
3811 be_sriov_config(adapter);
542963b7 3812
92bf14ab
SP		 3813 status = be_get_resources(adapter);
3814 if (status)
3815 return status;
abb93951 3816
46ee9c14
RN		 3817 adapter->pmac_id = kcalloc(be_max_uc(adapter),
3818 sizeof(*adapter->pmac_id), GFP_KERNEL);
92bf14ab
SP		 3819 if (!adapter->pmac_id)
3820 return -ENOMEM;
abb93951 3821
92bf14ab
SP		 3822 /* Sanitize cfg_num_qs based on HW and platform limits */
3823 adapter->cfg_num_qs = min(adapter->cfg_num_qs, be_max_qs(adapter));
3824
3825 return 0;
39f1d94d
SP		 3826}
3827
95046b92
SP		 3828static int be_mac_setup(struct be_adapter *adapter)
3829{
3830 u8 mac[ETH_ALEN];
3831 int status;
3832
3833 if (is_zero_ether_addr(adapter->netdev->dev_addr)) {
3834 status = be_cmd_get_perm_mac(adapter, mac);
3835 if (status)
3836 return status;
3837
3838 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
3839 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
3840 } else {
3841 /* Maybe the HW was reset; dev_addr must be re-programmed */
3842 memcpy(mac, adapter->netdev->dev_addr, ETH_ALEN);
3843 }
3844
2c7a9dc1
AK		 3845 /* For BE3-R VFs, the PF programs the initial MAC address */
3846 if (!(BEx_chip(adapter) && be_virtfn(adapter)))
3847 be_cmd_pmac_add(adapter, mac, adapter->if_handle,
3848 &adapter->pmac_id[0], 0);
95046b92
SP		 3849 return 0;
3850}
3851
68d7bdcb
SP		 3852static void be_schedule_worker(struct be_adapter *adapter)
3853{
3854 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
3855 adapter->flags |= BE_FLAGS_WORKER_SCHEDULED;
3856}
3857
eb7dd46c
SP		 3858static void be_schedule_err_detection(struct be_adapter *adapter)
3859{
3860 schedule_delayed_work(&adapter->be_err_detection_work,
3861 msecs_to_jiffies(1000));
3862 adapter->flags |= BE_FLAGS_ERR_DETECTION_SCHEDULED;
3863}
3864
7707133c 3865static int be_setup_queues(struct be_adapter *adapter)
5fb379ee 3866{
68d7bdcb 3867 struct net_device *netdev = adapter->netdev;
10ef9ab4 3868 int status;
ba343c77 3869
7707133c 3870 status = be_evt_queues_create(adapter);
abb93951
PR		 3871 if (status)
3872 goto err;
73d540f2 3873
7707133c 3874 status = be_tx_qs_create(adapter);
c2bba3df
SK		 3875 if (status)
3876 goto err;
10ef9ab4 3877
7707133c 3878 status = be_rx_cqs_create(adapter);
10ef9ab4 3879 if (status)
a54769f5 3880 goto err;
6b7c5b94 3881
7707133c 3882 status = be_mcc_queues_create(adapter);
10ef9ab4
SP		 3883 if (status)
3884 goto err;
3885
68d7bdcb
SP		 3886 status = netif_set_real_num_rx_queues(netdev, adapter->num_rx_qs);
3887 if (status)
3888 goto err;
3889
3890 status = netif_set_real_num_tx_queues(netdev, adapter->num_tx_qs);
3891 if (status)
3892 goto err;
3893
7707133c
SP		 3894 return 0;
3895err:
3896 dev_err(&adapter->pdev->dev, "queue_setup failed\n");
3897 return status;
3898}
3899
68d7bdcb
SP		 3900int be_update_queues(struct be_adapter *adapter)
3901{
3902 struct net_device *netdev = adapter->netdev;
3903 int status;
3904
3905 if (netif_running(netdev))
3906 be_close(netdev);
3907
3908 be_cancel_worker(adapter);
3909
3910 /* If any vectors have been shared with RoCE we cannot re-program
3911 * the MSIx table.
3912 */
3913 if (!adapter->num_msix_roce_vec)
3914 be_msix_disable(adapter);
3915
3916 be_clear_queues(adapter);
3917
3918 if (!msix_enabled(adapter)) {
3919 status = be_msix_enable(adapter);
3920 if (status)
3921 return status;
3922 }
3923
3924 status = be_setup_queues(adapter);
3925 if (status)
3926 return status;
3927
3928 be_schedule_worker(adapter);
3929
3930 if (netif_running(netdev))
3931 status = be_open(netdev);
3932
3933 return status;
3934}
3935
f7062ee5
SP		 3936static inline int fw_major_num(const char *fw_ver)
3937{
3938 int fw_major = 0, i;
3939
3940 i = sscanf(fw_ver, "%d.", &fw_major);
3941 if (i != 1)
3942 return 0;
3943
3944 return fw_major;
3945}
3946
7707133c
SP		 3947static int be_setup(struct be_adapter *adapter)
3948{
3949 struct device *dev = &adapter->pdev->dev;
7707133c
SP		 3950 int status;
3951
3952 be_setup_init(adapter);
3953
3954 if (!lancer_chip(adapter))
3955 be_cmd_req_native_mode(adapter);
3956
3957 status = be_get_config(adapter);
10ef9ab4 3958 if (status)
a54769f5 3959 goto err;
6b7c5b94 3960
7707133c 3961 status = be_msix_enable(adapter);
10ef9ab4 3962 if (status)
a54769f5 3963 goto err;
6b7c5b94 3964
0700d816
KA		 3965 status = be_if_create(adapter, &adapter->if_handle,
3966 be_if_cap_flags(adapter), 0);
7707133c 3967 if (status)
a54769f5 3968 goto err;
6b7c5b94 3969
68d7bdcb
SP		 3970 /* Updating real_num_tx/rx_queues() requires rtnl_lock() */
3971 rtnl_lock();
7707133c 3972 status = be_setup_queues(adapter);
68d7bdcb 3973 rtnl_unlock();
95046b92 3974 if (status)
1578e777
PR		 3975 goto err;
3976
7707133c 3977 be_cmd_get_fn_privileges(adapter, &adapter->cmd_privileges, 0);
7707133c
SP		 3978
3979 status = be_mac_setup(adapter);
10ef9ab4
SP		 3980 if (status)
3981 goto err;
3982
e97e3cda 3983 be_cmd_get_fw_ver(adapter);
acbafeb1 3984 dev_info(dev, "FW version is %s\n", adapter->fw_ver);
5a56eb10 3985
e9e2a904 3986 if (BE2_chip(adapter) && fw_major_num(adapter->fw_ver) < 4) {
50762667 3987 dev_err(dev, "Firmware on card is old(%s), IRQs may not work",
e9e2a904
SK		 3988 adapter->fw_ver);
3989 dev_err(dev, "Please upgrade firmware to version >= 4.0\n");
3990 }
3991
1d1e9a46 3992 if (adapter->vlans_added)
10329df8 3993 be_vid_config(adapter);
7ab8b0b4 3994
a54769f5 3995 be_set_rx_mode(adapter->netdev);
5fb379ee 3996
00d594c3
KA		 3997 status = be_cmd_set_flow_control(adapter, adapter->tx_fc,
3998 adapter->rx_fc);
3999 if (status)
4000 be_cmd_get_flow_control(adapter, &adapter->tx_fc,
4001 &adapter->rx_fc);
590c391d 4002
00d594c3
KA		 4003 dev_info(&adapter->pdev->dev, "HW Flow control - TX:%d RX:%d\n",
4004 adapter->tx_fc, adapter->rx_fc);
2dc1deb6 4005
bdce2ad7
SR		 4006 if (be_physfn(adapter))
4007 be_cmd_set_logical_link_config(adapter,
4008 IFLA_VF_LINK_STATE_AUTO, 0);
4009
bec84e6b
VV		 4010 if (adapter->num_vfs)
4011 be_vf_setup(adapter);
f9449ab7 4012
f25b119c
PR		 4013 status = be_cmd_get_phy_info(adapter);
4014 if (!status && be_pause_supported(adapter))
42f11cf2
AK		 4015 adapter->phy.fc_autoneg = 1;
4016
68d7bdcb 4017 be_schedule_worker(adapter);
e1ad8e33 4018 adapter->flags |= BE_FLAGS_SETUP_DONE;
f9449ab7 4019 return 0;
a54769f5
SP		 4020err:
4021 be_clear(adapter);
4022 return status;
4023}
6b7c5b94 4024
66268739
IV		 4025#ifdef CONFIG_NET_POLL_CONTROLLER
4026static void be_netpoll(struct net_device *netdev)
4027{
4028 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4 4029 struct be_eq_obj *eqo;
66268739
IV		 4030 int i;
4031
e49cc34f
SP		 4032 for_all_evt_queues(adapter, eqo, i) {
4033 be_eq_notify(eqo->adapter, eqo->q.id, false, true, 0);
4034 napi_schedule(&eqo->napi);
4035 }
66268739
IV		 4036}
4037#endif
4038
96c9b2e4 4039static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
fa9a6fed 4040
306f1348
SP		 4041static bool phy_flashing_required(struct be_adapter *adapter)
4042{
e02cfd96 4043 return (adapter->phy.phy_type == PHY_TYPE_TN_8022 &&
42f11cf2 4044 adapter->phy.interface_type == PHY_TYPE_BASET_10GB);
306f1348
SP		 4045}
4046
c165541e
PR		 4047static bool is_comp_in_ufi(struct be_adapter *adapter,
4048 struct flash_section_info *fsec, int type)
4049{
4050 int i = 0, img_type = 0;
4051 struct flash_section_info_g2 *fsec_g2 = NULL;
4052
ca34fe38 4053 if (BE2_chip(adapter))
c165541e
PR		 4054 fsec_g2 = (struct flash_section_info_g2 *)fsec;
4055
4056 for (i = 0; i < MAX_FLASH_COMP; i++) {
4057 if (fsec_g2)
4058 img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type);
4059 else
4060 img_type = le32_to_cpu(fsec->fsec_entry[i].type);
4061
4062 if (img_type == type)
4063 return true;
4064 }
4065 return false;
4066
4067}
4068
4188e7df 4069static struct flash_section_info *get_fsec_info(struct be_adapter *adapter,
748b539a
SP		 4070 int header_size,
4071 const struct firmware *fw)
c165541e
PR		 4072{
4073 struct flash_section_info *fsec = NULL;
4074 const u8 *p = fw->data;
4075
4076 p += header_size;
4077 while (p < (fw->data + fw->size)) {
4078 fsec = (struct flash_section_info *)p;
4079 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie)))
4080 return fsec;
4081 p += 32;
4082 }
4083 return NULL;
4084}
4085
96c9b2e4
VV		 4086static int be_check_flash_crc(struct be_adapter *adapter, const u8 *p,
4087 u32 img_offset, u32 img_size, int hdr_size,
4088 u16 img_optype, bool *crc_match)
4089{
4090 u32 crc_offset;
4091 int status;
4092 u8 crc[4];
4093
70a7b525
VV		 4094 status = be_cmd_get_flash_crc(adapter, crc, img_optype, img_offset,
4095 img_size - 4);
96c9b2e4
VV		 4096 if (status)
4097 return status;
4098
4099 crc_offset = hdr_size + img_offset + img_size - 4;
4100
4101 /* Skip flashing, if crc of flashed region matches */
4102 if (!memcmp(crc, p + crc_offset, 4))
4103 *crc_match = true;
4104 else
4105 *crc_match = false;
4106
4107 return status;
4108}
4109
773a2d7c 4110static int be_flash(struct be_adapter *adapter, const u8 *img,
70a7b525
VV		 4111 struct be_dma_mem *flash_cmd, int optype, int img_size,
4112 u32 img_offset)
773a2d7c 4113{
70a7b525 4114 u32 flash_op, num_bytes, total_bytes = img_size, bytes_sent = 0;
773a2d7c 4115 struct be_cmd_write_flashrom *req = flash_cmd->va;
96c9b2e4 4116 int status;
773a2d7c 4117
773a2d7c
PR		 4118 while (total_bytes) {
4119 num_bytes = min_t(u32, 32*1024, total_bytes);
4120
4121 total_bytes -= num_bytes;
4122
4123 if (!total_bytes) {
4124 if (optype == OPTYPE_PHY_FW)
4125 flash_op = FLASHROM_OPER_PHY_FLASH;
4126 else
4127 flash_op = FLASHROM_OPER_FLASH;
4128 } else {
4129 if (optype == OPTYPE_PHY_FW)
4130 flash_op = FLASHROM_OPER_PHY_SAVE;
4131 else
4132 flash_op = FLASHROM_OPER_SAVE;
4133 }
4134
be716446 4135 memcpy(req->data_buf, img, num_bytes);
773a2d7c
PR		 4136 img += num_bytes;
4137 status = be_cmd_write_flashrom(adapter, flash_cmd, optype,
70a7b525
VV		 4138 flash_op, img_offset +
4139 bytes_sent, num_bytes);
4c60005f 4140 if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST &&
96c9b2e4
VV		 4141 optype == OPTYPE_PHY_FW)
4142 break;
4143 else if (status)
773a2d7c 4144 return status;
70a7b525
VV		 4145
4146 bytes_sent += num_bytes;
773a2d7c
PR		 4147 }
4148 return 0;
4149}
4150
0ad3157e 4151/* For BE2, BE3 and BE3-R */
ca34fe38 4152static int be_flash_BEx(struct be_adapter *adapter,
748b539a
SP		 4153 const struct firmware *fw,
4154 struct be_dma_mem *flash_cmd, int num_of_images)
84517482 4155{
c165541e 4156 int img_hdrs_size = (num_of_images * sizeof(struct image_hdr));
96c9b2e4 4157 struct device *dev = &adapter->pdev->dev;
c165541e 4158 struct flash_section_info *fsec = NULL;
96c9b2e4
VV		 4159 int status, i, filehdr_size, num_comp;
4160 const struct flash_comp *pflashcomp;
4161 bool crc_match;
4162 const u8 *p;
c165541e
PR		 4163
4164 struct flash_comp gen3_flash_types[] = {
4165 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, OPTYPE_ISCSI_ACTIVE,
4166 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_iSCSI},
4167 { FLASH_REDBOOT_START_g3, OPTYPE_REDBOOT,
4168 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3, IMAGE_BOOT_CODE},
4169 { FLASH_iSCSI_BIOS_START_g3, OPTYPE_BIOS,
4170 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_ISCSI},
4171 { FLASH_PXE_BIOS_START_g3, OPTYPE_PXE_BIOS,
4172 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_PXE},
4173 { FLASH_FCoE_BIOS_START_g3, OPTYPE_FCOE_BIOS,
4174 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_FCoE},
4175 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, OPTYPE_ISCSI_BACKUP,
4176 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_iSCSI},
4177 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, OPTYPE_FCOE_FW_ACTIVE,
4178 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_FCoE},
4179 { FLASH_FCoE_BACKUP_IMAGE_START_g3, OPTYPE_FCOE_FW_BACKUP,
4180 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_FCoE},
4181 { FLASH_NCSI_START_g3, OPTYPE_NCSI_FW,
4182 FLASH_NCSI_IMAGE_MAX_SIZE_g3, IMAGE_NCSI},
4183 { FLASH_PHY_FW_START_g3, OPTYPE_PHY_FW,
4184 FLASH_PHY_FW_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_PHY}
3f0d4560 4185 };
c165541e
PR		 4186
4187 struct flash_comp gen2_flash_types[] = {
4188 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, OPTYPE_ISCSI_ACTIVE,
4189 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_iSCSI},
4190 { FLASH_REDBOOT_START_g2, OPTYPE_REDBOOT,
4191 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2, IMAGE_BOOT_CODE},
4192 { FLASH_iSCSI_BIOS_START_g2, OPTYPE_BIOS,
4193 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_ISCSI},
4194 { FLASH_PXE_BIOS_START_g2, OPTYPE_PXE_BIOS,
4195 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_PXE},
4196 { FLASH_FCoE_BIOS_START_g2, OPTYPE_FCOE_BIOS,
4197 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_FCoE},
4198 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, OPTYPE_ISCSI_BACKUP,
4199 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_iSCSI},
4200 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, OPTYPE_FCOE_FW_ACTIVE,
4201 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_FCoE},
4202 { FLASH_FCoE_BACKUP_IMAGE_START_g2, OPTYPE_FCOE_FW_BACKUP,
4203 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_FCoE}
3f0d4560
AK		 4204 };
4205
ca34fe38 4206 if (BE3_chip(adapter)) {
3f0d4560
AK		 4207 pflashcomp = gen3_flash_types;
4208 filehdr_size = sizeof(struct flash_file_hdr_g3);
215faf9c 4209 num_comp = ARRAY_SIZE(gen3_flash_types);
3f0d4560
AK		 4210 } else {
4211 pflashcomp = gen2_flash_types;
4212 filehdr_size = sizeof(struct flash_file_hdr_g2);
215faf9c 4213 num_comp = ARRAY_SIZE(gen2_flash_types);
5d3acd0d 4214 img_hdrs_size = 0;
84517482 4215 }
ca34fe38 4216
c165541e
PR		 4217 /* Get flash section info*/
4218 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
4219 if (!fsec) {
96c9b2e4 4220 dev_err(dev, "Invalid Cookie. FW image may be corrupted\n");
c165541e
PR		 4221 return -1;
4222 }
9fe96934 4223 for (i = 0; i < num_comp; i++) {
c165541e 4224 if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type))
9fe96934 4225 continue;
c165541e
PR		 4226
4227 if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) &&
4228 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
4229 continue;
4230
773a2d7c
PR		 4231 if (pflashcomp[i].optype == OPTYPE_PHY_FW &&
4232 !phy_flashing_required(adapter))
306f1348 4233 continue;
c165541e 4234
773a2d7c 4235 if (pflashcomp[i].optype == OPTYPE_REDBOOT) {
96c9b2e4
VV		 4236 status = be_check_flash_crc(adapter, fw->data,
4237 pflashcomp[i].offset,
4238 pflashcomp[i].size,
4239 filehdr_size +
4240 img_hdrs_size,
4241 OPTYPE_REDBOOT, &crc_match);
4242 if (status) {
4243 dev_err(dev,
4244 "Could not get CRC for 0x%x region\n",
4245 pflashcomp[i].optype);
4246 continue;
4247 }
4248
4249 if (crc_match)
773a2d7c
PR		 4250 continue;
4251 }
c165541e 4252
96c9b2e4
VV		 4253 p = fw->data + filehdr_size + pflashcomp[i].offset +
4254 img_hdrs_size;
306f1348
SP		 4255 if (p + pflashcomp[i].size > fw->data + fw->size)
4256 return -1;
773a2d7c
PR		 4257
4258 status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype,
70a7b525 4259 pflashcomp[i].size, 0);
773a2d7c 4260 if (status) {
96c9b2e4 4261 dev_err(dev, "Flashing section type 0x%x failed\n",
773a2d7c
PR		 4262 pflashcomp[i].img_type);
4263 return status;
84517482 4264 }
84517482 4265 }
84517482
AK		 4266 return 0;
4267}
4268
96c9b2e4
VV		 4269static u16 be_get_img_optype(struct flash_section_entry fsec_entry)
4270{
4271 u32 img_type = le32_to_cpu(fsec_entry.type);
4272 u16 img_optype = le16_to_cpu(fsec_entry.optype);
4273
4274 if (img_optype != 0xFFFF)
4275 return img_optype;
4276
4277 switch (img_type) {
4278 case IMAGE_FIRMWARE_iSCSI:
4279 img_optype = OPTYPE_ISCSI_ACTIVE;
4280 break;
4281 case IMAGE_BOOT_CODE:
4282 img_optype = OPTYPE_REDBOOT;
4283 break;
4284 case IMAGE_OPTION_ROM_ISCSI:
4285 img_optype = OPTYPE_BIOS;
4286 break;
4287 case IMAGE_OPTION_ROM_PXE:
4288 img_optype = OPTYPE_PXE_BIOS;
4289 break;
4290 case IMAGE_OPTION_ROM_FCoE:
4291 img_optype = OPTYPE_FCOE_BIOS;
4292 break;
4293 case IMAGE_FIRMWARE_BACKUP_iSCSI:
4294 img_optype = OPTYPE_ISCSI_BACKUP;
4295 break;
4296 case IMAGE_NCSI:
4297 img_optype = OPTYPE_NCSI_FW;
4298 break;
4299 case IMAGE_FLASHISM_JUMPVECTOR:
4300 img_optype = OPTYPE_FLASHISM_JUMPVECTOR;
4301 break;
4302 case IMAGE_FIRMWARE_PHY:
4303 img_optype = OPTYPE_SH_PHY_FW;
4304 break;
4305 case IMAGE_REDBOOT_DIR:
4306 img_optype = OPTYPE_REDBOOT_DIR;
4307 break;
4308 case IMAGE_REDBOOT_CONFIG:
4309 img_optype = OPTYPE_REDBOOT_CONFIG;
4310 break;
4311 case IMAGE_UFI_DIR:
4312 img_optype = OPTYPE_UFI_DIR;
4313 break;
4314 default:
4315 break;
4316 }
4317
4318 return img_optype;
4319}
4320
773a2d7c 4321static int be_flash_skyhawk(struct be_adapter *adapter,
748b539a
SP		 4322 const struct firmware *fw,
4323 struct be_dma_mem *flash_cmd, int num_of_images)
3f0d4560 4324{
773a2d7c 4325 int img_hdrs_size = num_of_images * sizeof(struct image_hdr);
70a7b525 4326 bool crc_match, old_fw_img, flash_offset_support = true;
96c9b2e4 4327 struct device *dev = &adapter->pdev->dev;
773a2d7c 4328 struct flash_section_info *fsec = NULL;
96c9b2e4 4329 u32 img_offset, img_size, img_type;
70a7b525 4330 u16 img_optype, flash_optype;
96c9b2e4 4331 int status, i, filehdr_size;
96c9b2e4 4332 const u8 *p;
773a2d7c
PR		 4333
4334 filehdr_size = sizeof(struct flash_file_hdr_g3);
4335 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
4336 if (!fsec) {
96c9b2e4 4337 dev_err(dev, "Invalid Cookie. FW image may be corrupted\n");
56ace3a0 4338 return -EINVAL;
773a2d7c
PR		 4339 }
4340
70a7b525 4341retry_flash:
773a2d7c
PR		 4342 for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) {
4343 img_offset = le32_to_cpu(fsec->fsec_entry[i].offset);
4344 img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size);
96c9b2e4
VV		 4345 img_type = le32_to_cpu(fsec->fsec_entry[i].type);
4346 img_optype = be_get_img_optype(fsec->fsec_entry[i]);
4347 old_fw_img = fsec->fsec_entry[i].optype == 0xFFFF;
773a2d7c 4348
96c9b2e4 4349 if (img_optype == 0xFFFF)
773a2d7c 4350 continue;
70a7b525
VV		 4351
4352 if (flash_offset_support)
4353 flash_optype = OPTYPE_OFFSET_SPECIFIED;
4354 else
4355 flash_optype = img_optype;
4356
96c9b2e4
VV		 4357 /* Don't bother verifying CRC if an old FW image is being
4358 * flashed
4359 */
4360 if (old_fw_img)
4361 goto flash;
4362
4363 status = be_check_flash_crc(adapter, fw->data, img_offset,
4364 img_size, filehdr_size +
70a7b525 4365 img_hdrs_size, flash_optype,
96c9b2e4 4366 &crc_match);
4c60005f
KA		 4367 if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST ||
4368 base_status(status) == MCC_STATUS_ILLEGAL_FIELD) {
70a7b525
VV		 4369 /* The current FW image on the card does not support
4370 * OFFSET based flashing. Retry using older mechanism
4371 * of OPTYPE based flashing
4372 */
4373 if (flash_optype == OPTYPE_OFFSET_SPECIFIED) {
4374 flash_offset_support = false;
4375 goto retry_flash;
4376 }
4377
4378 /* The current FW image on the card does not recognize
4379 * the new FLASH op_type. The FW download is partially
4380 * complete. Reboot the server now to enable FW image
4381 * to recognize the new FLASH op_type. To complete the
4382 * remaining process, download the same FW again after
4383 * the reboot.
4384 */
96c9b2e4
VV		 4385 dev_err(dev, "Flash incomplete. Reset the server\n");
4386 dev_err(dev, "Download FW image again after reset\n");
4387 return -EAGAIN;
4388 } else if (status) {
4389 dev_err(dev, "Could not get CRC for 0x%x region\n",
4390 img_optype);
4391 return -EFAULT;
773a2d7c
PR		 4392 }
4393
96c9b2e4
VV		 4394 if (crc_match)
4395 continue;
773a2d7c 4396
96c9b2e4
VV		 4397flash:
4398 p = fw->data + filehdr_size + img_offset + img_hdrs_size;
773a2d7c
PR		 4399 if (p + img_size > fw->data + fw->size)
4400 return -1;
4401
70a7b525
VV		 4402 status = be_flash(adapter, p, flash_cmd, flash_optype, img_size,
4403 img_offset);
4404
4405 /* The current FW image on the card does not support OFFSET
4406 * based flashing. Retry using older mechanism of OPTYPE based
4407 * flashing
4408 */
4409 if (base_status(status) == MCC_STATUS_ILLEGAL_FIELD &&
4410 flash_optype == OPTYPE_OFFSET_SPECIFIED) {
4411 flash_offset_support = false;
4412 goto retry_flash;
4413 }
4414
96c9b2e4
VV		 4415 /* For old FW images ignore ILLEGAL_FIELD error or errors on
4416 * UFI_DIR region
4417 */
4c60005f
KA		 4418 if (old_fw_img &&
4419 (base_status(status) == MCC_STATUS_ILLEGAL_FIELD ||
4420 (img_optype == OPTYPE_UFI_DIR &&
4421 base_status(status) == MCC_STATUS_FAILED))) {
96c9b2e4
VV		 4422 continue;
4423 } else if (status) {
4424 dev_err(dev, "Flashing section type 0x%x failed\n",
4425 img_type);
4426 return -EFAULT;
773a2d7c
PR		 4427 }
4428 }
4429 return 0;
3f0d4560
AK		 4430}
4431
485bf569 4432static int lancer_fw_download(struct be_adapter *adapter,
748b539a 4433 const struct firmware *fw)
84517482 4434{
485bf569
SN		 4435#define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
4436#define LANCER_FW_DOWNLOAD_LOCATION "/prg"
bb864e07 4437 struct device *dev = &adapter->pdev->dev;
84517482 4438 struct be_dma_mem flash_cmd;
485bf569
SN		 4439 const u8 *data_ptr = NULL;
4440 u8 *dest_image_ptr = NULL;
4441 size_t image_size = 0;
4442 u32 chunk_size = 0;
4443 u32 data_written = 0;
4444 u32 offset = 0;
4445 int status = 0;
4446 u8 add_status = 0;
f67ef7ba 4447 u8 change_status;
84517482 4448
485bf569 4449 if (!IS_ALIGNED(fw->size, sizeof(u32))) {
bb864e07 4450 dev_err(dev, "FW image size should be multiple of 4\n");
3fb8cb80 4451 return -EINVAL;
d9efd2af
SB		 4452 }
4453
485bf569
SN		 4454 flash_cmd.size = sizeof(struct lancer_cmd_req_write_object)
4455 + LANCER_FW_DOWNLOAD_CHUNK;
bb864e07 4456 flash_cmd.va = dma_alloc_coherent(dev, flash_cmd.size,
d0320f75 4457 &flash_cmd.dma, GFP_KERNEL);
3fb8cb80
KA		 4458 if (!flash_cmd.va)
4459 return -ENOMEM;
84517482 4460
485bf569
SN		 4461 dest_image_ptr = flash_cmd.va +
4462 sizeof(struct lancer_cmd_req_write_object);
4463 image_size = fw->size;
4464 data_ptr = fw->data;
4465
4466 while (image_size) {
4467 chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK);
4468
4469 /* Copy the image chunk content. */
4470 memcpy(dest_image_ptr, data_ptr, chunk_size);
4471
4472 status = lancer_cmd_write_object(adapter, &flash_cmd,
f67ef7ba
PR		 4473 chunk_size, offset,
4474 LANCER_FW_DOWNLOAD_LOCATION,
4475 &data_written, &change_status,
4476 &add_status);
485bf569
SN		 4477 if (status)
4478 break;
4479
4480 offset += data_written;
4481 data_ptr += data_written;
4482 image_size -= data_written;
4483 }
4484
4485 if (!status) {
4486 /* Commit the FW written */
4487 status = lancer_cmd_write_object(adapter, &flash_cmd,
f67ef7ba
PR		 4488 0, offset,
4489 LANCER_FW_DOWNLOAD_LOCATION,
4490 &data_written, &change_status,
4491 &add_status);
485bf569
SN		 4492 }
4493
bb864e07 4494 dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma);
485bf569 4495 if (status) {
bb864e07 4496 dev_err(dev, "Firmware load error\n");
3fb8cb80 4497 return be_cmd_status(status);
485bf569
SN		 4498 }
4499
bb864e07
KA		 4500 dev_info(dev, "Firmware flashed successfully\n");
4501
f67ef7ba 4502 if (change_status == LANCER_FW_RESET_NEEDED) {
bb864e07 4503 dev_info(dev, "Resetting adapter to activate new FW\n");
5c510811
SK		 4504 status = lancer_physdev_ctrl(adapter,
4505 PHYSDEV_CONTROL_FW_RESET_MASK);
f67ef7ba 4506 if (status) {
bb864e07
KA		 4507 dev_err(dev, "Adapter busy, could not reset FW\n");
4508 dev_err(dev, "Reboot server to activate new FW\n");
f67ef7ba
PR		 4509 }
4510 } else if (change_status != LANCER_NO_RESET_NEEDED) {
bb864e07 4511 dev_info(dev, "Reboot server to activate new FW\n");
f67ef7ba 4512 }
3fb8cb80
KA		 4513
4514 return 0;
485bf569
SN		 4515}
4516
5d3acd0d
VV		 4517#define BE2_UFI 2
4518#define BE3_UFI 3
4519#define BE3R_UFI 10
4520#define SH_UFI 4
81a9e226 4521#define SH_P2_UFI 11
5d3acd0d 4522
ca34fe38 4523static int be_get_ufi_type(struct be_adapter *adapter,
0ad3157e 4524 struct flash_file_hdr_g3 *fhdr)
773a2d7c 4525{
5d3acd0d
VV		 4526 if (!fhdr) {
4527 dev_err(&adapter->pdev->dev, "Invalid FW UFI file");
4528 return -1;
4529 }
773a2d7c 4530
5d3acd0d
VV		 4531 /* First letter of the build version is used to identify
4532 * which chip this image file is meant for.
4533 */
4534 switch (fhdr->build[0]) {
4535 case BLD_STR_UFI_TYPE_SH:
81a9e226
VV		 4536 return (fhdr->asic_type_rev == ASIC_REV_P2) ? SH_P2_UFI :
4537 SH_UFI;
5d3acd0d
VV		 4538 case BLD_STR_UFI_TYPE_BE3:
4539 return (fhdr->asic_type_rev == ASIC_REV_B0) ? BE3R_UFI :
4540 BE3_UFI;
4541 case BLD_STR_UFI_TYPE_BE2:
4542 return BE2_UFI;
4543 default:
4544 return -1;
4545 }
4546}
773a2d7c 4547
5d3acd0d
VV		 4548/* Check if the flash image file is compatible with the adapter that
4549 * is being flashed.
4550 * BE3 chips with asic-rev B0 must be flashed only with BE3R_UFI type.
81a9e226 4551 * Skyhawk chips with asic-rev P2 must be flashed only with SH_P2_UFI type.
5d3acd0d
VV		 4552 */
4553static bool be_check_ufi_compatibility(struct be_adapter *adapter,
4554 struct flash_file_hdr_g3 *fhdr)
4555{
4556 int ufi_type = be_get_ufi_type(adapter, fhdr);
4557
4558 switch (ufi_type) {
81a9e226 4559 case SH_P2_UFI:
5d3acd0d 4560 return skyhawk_chip(adapter);
81a9e226
VV		 4561 case SH_UFI:
4562 return (skyhawk_chip(adapter) &&
4563 adapter->asic_rev < ASIC_REV_P2);
5d3acd0d
VV		 4564 case BE3R_UFI:
4565 return BE3_chip(adapter);
4566 case BE3_UFI:
4567 return (BE3_chip(adapter) && adapter->asic_rev < ASIC_REV_B0);
4568 case BE2_UFI:
4569 return BE2_chip(adapter);
4570 default:
4571 return false;
4572 }
773a2d7c
PR		 4573}
4574
485bf569
SN		 4575static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw)
4576{
5d3acd0d 4577 struct device *dev = &adapter->pdev->dev;
485bf569 4578 struct flash_file_hdr_g3 *fhdr3;
5d3acd0d
VV		 4579 struct image_hdr *img_hdr_ptr;
4580 int status = 0, i, num_imgs;
485bf569 4581 struct be_dma_mem flash_cmd;
84517482 4582
5d3acd0d
VV		 4583 fhdr3 = (struct flash_file_hdr_g3 *)fw->data;
4584 if (!be_check_ufi_compatibility(adapter, fhdr3)) {
4585 dev_err(dev, "Flash image is not compatible with adapter\n");
4586 return -EINVAL;
84517482
AK		 4587 }
4588
5d3acd0d
VV		 4589 flash_cmd.size = sizeof(struct be_cmd_write_flashrom);
4590 flash_cmd.va = dma_alloc_coherent(dev, flash_cmd.size, &flash_cmd.dma,
4591 GFP_KERNEL);
4592 if (!flash_cmd.va)
4593 return -ENOMEM;
773a2d7c 4594
773a2d7c
PR		 4595 num_imgs = le32_to_cpu(fhdr3->num_imgs);
4596 for (i = 0; i < num_imgs; i++) {
4597 img_hdr_ptr = (struct image_hdr *)(fw->data +
4598 (sizeof(struct flash_file_hdr_g3) +
4599 i * sizeof(struct image_hdr)));
5d3acd0d
VV		 4600 if (!BE2_chip(adapter) &&
4601 le32_to_cpu(img_hdr_ptr->imageid) != 1)
4602 continue;
84517482 4603
5d3acd0d
VV		 4604 if (skyhawk_chip(adapter))
4605 status = be_flash_skyhawk(adapter, fw, &flash_cmd,
4606 num_imgs);
4607 else
4608 status = be_flash_BEx(adapter, fw, &flash_cmd,
4609 num_imgs);
84517482
AK		 4610 }
4611
5d3acd0d
VV		 4612 dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma);
4613 if (!status)
4614 dev_info(dev, "Firmware flashed successfully\n");
84517482 4615
485bf569
SN		 4616 return status;
4617}
4618
4619int be_load_fw(struct be_adapter *adapter, u8 *fw_file)
4620{
4621 const struct firmware *fw;
4622 int status;
4623
4624 if (!netif_running(adapter->netdev)) {
4625 dev_err(&adapter->pdev->dev,
4626 "Firmware load not allowed (interface is down)\n");
940a3fcd 4627 return -ENETDOWN;
485bf569
SN		 4628 }
4629
4630 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
4631 if (status)
4632 goto fw_exit;
4633
4634 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
4635
4636 if (lancer_chip(adapter))
4637 status = lancer_fw_download(adapter, fw);
4638 else
4639 status = be_fw_download(adapter, fw);
4640
eeb65ced 4641 if (!status)
e97e3cda 4642 be_cmd_get_fw_ver(adapter);
eeb65ced 4643
84517482
AK		 4644fw_exit:
4645 release_firmware(fw);
4646 return status;
4647}
4648
add511b3
RP		 4649static int be_ndo_bridge_setlink(struct net_device *dev, struct nlmsghdr *nlh,
4650 u16 flags)
a77dcb8c
AK		 4651{
4652 struct be_adapter *adapter = netdev_priv(dev);
4653 struct nlattr *attr, *br_spec;
4654 int rem;
4655 int status = 0;
4656 u16 mode = 0;
4657
4658 if (!sriov_enabled(adapter))
4659 return -EOPNOTSUPP;
4660
4661 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
4ea85e83
TG		 4662 if (!br_spec)
4663 return -EINVAL;
a77dcb8c
AK		 4664
4665 nla_for_each_nested(attr, br_spec, rem) {
4666 if (nla_type(attr) != IFLA_BRIDGE_MODE)
4667 continue;
4668
b7c1a314
TG		 4669 if (nla_len(attr) < sizeof(mode))
4670 return -EINVAL;
4671
a77dcb8c
AK		 4672 mode = nla_get_u16(attr);
4673 if (mode != BRIDGE_MODE_VEPA && mode != BRIDGE_MODE_VEB)
4674 return -EINVAL;
4675
4676 status = be_cmd_set_hsw_config(adapter, 0, 0,
4677 adapter->if_handle,
4678 mode == BRIDGE_MODE_VEPA ?
4679 PORT_FWD_TYPE_VEPA :
4680 PORT_FWD_TYPE_VEB);
4681 if (status)
4682 goto err;
4683
4684 dev_info(&adapter->pdev->dev, "enabled switch mode: %s\n",
4685 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
4686
4687 return status;
4688 }
4689err:
4690 dev_err(&adapter->pdev->dev, "Failed to set switch mode %s\n",
4691 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
4692
4693 return status;
4694}
4695
4696static int be_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
748b539a 4697 struct net_device *dev, u32 filter_mask)
a77dcb8c
AK		 4698{
4699 struct be_adapter *adapter = netdev_priv(dev);
4700 int status = 0;
4701 u8 hsw_mode;
4702
4703 if (!sriov_enabled(adapter))
4704 return 0;
4705
4706 /* BE and Lancer chips support VEB mode only */
4707 if (BEx_chip(adapter) || lancer_chip(adapter)) {
4708 hsw_mode = PORT_FWD_TYPE_VEB;
4709 } else {
4710 status = be_cmd_get_hsw_config(adapter, NULL, 0,
4711 adapter->if_handle, &hsw_mode);
4712 if (status)
4713 return 0;
4714 }
4715
4716 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
4717 hsw_mode == PORT_FWD_TYPE_VEPA ?
2c3c031c
SF		 4718 BRIDGE_MODE_VEPA : BRIDGE_MODE_VEB,
4719 0, 0);
a77dcb8c
AK		 4720}
4721
c5abe7c0 4722#ifdef CONFIG_BE2NET_VXLAN
630f4b70
SB		 4723/* VxLAN offload Notes:
4724 *
4725 * The stack defines tunnel offload flags (hw_enc_features) for IP and doesn't
4726 * distinguish various types of transports (VxLAN, GRE, NVGRE ..). So, offload
4727 * is expected to work across all types of IP tunnels once exported. Skyhawk
4728 * supports offloads for either VxLAN or NVGRE, exclusively. So we export VxLAN
16dde0d6
SB		 4729 * offloads in hw_enc_features only when a VxLAN port is added. If other (non
4730 * VxLAN) tunnels are configured while VxLAN offloads are enabled, offloads for
4731 * those other tunnels are unexported on the fly through ndo_features_check().
630f4b70
SB		 4732 *
4733 * Skyhawk supports VxLAN offloads only for one UDP dport. So, if the stack
4734 * adds more than one port, disable offloads and don't re-enable them again
4735 * until after all the tunnels are removed.
4736 */
c9c47142
SP		 4737static void be_add_vxlan_port(struct net_device *netdev, sa_family_t sa_family,
4738 __be16 port)
4739{
4740 struct be_adapter *adapter = netdev_priv(netdev);
4741 struct device *dev = &adapter->pdev->dev;
4742 int status;
4743
4744 if (lancer_chip(adapter) || BEx_chip(adapter))
4745 return;
4746
4747 if (adapter->flags & BE_FLAGS_VXLAN_OFFLOADS) {
c9c47142
SP		 4748 dev_info(dev,
4749 "Only one UDP port supported for VxLAN offloads\n");
630f4b70
SB		 4750 dev_info(dev, "Disabling VxLAN offloads\n");
4751 adapter->vxlan_port_count++;
4752 goto err;
c9c47142
SP		 4753 }
4754
630f4b70
SB		 4755 if (adapter->vxlan_port_count++ >= 1)
4756 return;
4757
c9c47142
SP		 4758 status = be_cmd_manage_iface(adapter, adapter->if_handle,
4759 OP_CONVERT_NORMAL_TO_TUNNEL);
4760 if (status) {
4761 dev_warn(dev, "Failed to convert normal interface to tunnel\n");
4762 goto err;
4763 }
4764
4765 status = be_cmd_set_vxlan_port(adapter, port);
4766 if (status) {
4767 dev_warn(dev, "Failed to add VxLAN port\n");
4768 goto err;
4769 }
4770 adapter->flags |= BE_FLAGS_VXLAN_OFFLOADS;
4771 adapter->vxlan_port = port;
4772
630f4b70
SB		 4773 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
4774 NETIF_F_TSO | NETIF_F_TSO6 |
4775 NETIF_F_GSO_UDP_TUNNEL;
4776 netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL;
ac9a3d84 4777 netdev->features |= NETIF_F_GSO_UDP_TUNNEL;
630f4b70 4778
c9c47142
SP		 4779 dev_info(dev, "Enabled VxLAN offloads for UDP port %d\n",
4780 be16_to_cpu(port));
4781 return;
4782err:
4783 be_disable_vxlan_offloads(adapter);
c9c47142
SP		 4784}
4785
4786static void be_del_vxlan_port(struct net_device *netdev, sa_family_t sa_family,
4787 __be16 port)
4788{
4789 struct be_adapter *adapter = netdev_priv(netdev);
4790
4791 if (lancer_chip(adapter) || BEx_chip(adapter))
4792 return;
4793
4794 if (adapter->vxlan_port != port)
630f4b70 4795 goto done;
c9c47142
SP		 4796
4797 be_disable_vxlan_offloads(adapter);
4798
4799 dev_info(&adapter->pdev->dev,
4800 "Disabled VxLAN offloads for UDP port %d\n",
4801 be16_to_cpu(port));
630f4b70
SB		 4802done:
4803 adapter->vxlan_port_count--;
c9c47142 4804}
725d548f 4805
5f35227e
JG		 4806static netdev_features_t be_features_check(struct sk_buff *skb,
4807 struct net_device *dev,
4808 netdev_features_t features)
725d548f 4809{
16dde0d6
SB		 4810 struct be_adapter *adapter = netdev_priv(dev);
4811 u8 l4_hdr = 0;
4812
4813 /* The code below restricts offload features for some tunneled packets.
4814 * Offload features for normal (non tunnel) packets are unchanged.
4815 */
4816 if (!skb->encapsulation ||
4817 !(adapter->flags & BE_FLAGS_VXLAN_OFFLOADS))
4818 return features;
4819
4820 /* It's an encapsulated packet and VxLAN offloads are enabled. We
4821 * should disable tunnel offload features if it's not a VxLAN packet,
4822 * as tunnel offloads have been enabled only for VxLAN. This is done to
4823 * allow other tunneled traffic like GRE work fine while VxLAN
4824 * offloads are configured in Skyhawk-R.
4825 */
4826 switch (vlan_get_protocol(skb)) {
4827 case htons(ETH_P_IP):
4828 l4_hdr = ip_hdr(skb)->protocol;
4829 break;
4830 case htons(ETH_P_IPV6):
4831 l4_hdr = ipv6_hdr(skb)->nexthdr;
4832 break;
4833 default:
4834 return features;
4835 }
4836
4837 if (l4_hdr != IPPROTO_UDP ||
4838 skb->inner_protocol_type != ENCAP_TYPE_ETHER ||
4839 skb->inner_protocol != htons(ETH_P_TEB) ||
4840 skb_inner_mac_header(skb) - skb_transport_header(skb) !=
4841 sizeof(struct udphdr) + sizeof(struct vxlanhdr))
4842 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
4843
4844 return features;
725d548f 4845}
c5abe7c0 4846#endif
c9c47142 4847
e5686ad8 4848static const struct net_device_ops be_netdev_ops = {
6b7c5b94
SP		 4849 .ndo_open = be_open,
4850 .ndo_stop = be_close,
4851 .ndo_start_xmit = be_xmit,
a54769f5 4852 .ndo_set_rx_mode = be_set_rx_mode,
6b7c5b94
SP		 4853 .ndo_set_mac_address = be_mac_addr_set,
4854 .ndo_change_mtu = be_change_mtu,
ab1594e9 4855 .ndo_get_stats64 = be_get_stats64,
6b7c5b94 4856 .ndo_validate_addr = eth_validate_addr,
6b7c5b94
SP		 4857 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
4858 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
64600ea5 4859 .ndo_set_vf_mac = be_set_vf_mac,
1da87b7f 4860 .ndo_set_vf_vlan = be_set_vf_vlan,
ed616689 4861 .ndo_set_vf_rate = be_set_vf_tx_rate,
66268739 4862 .ndo_get_vf_config = be_get_vf_config,
bdce2ad7 4863 .ndo_set_vf_link_state = be_set_vf_link_state,
66268739
IV		 4864#ifdef CONFIG_NET_POLL_CONTROLLER
4865 .ndo_poll_controller = be_netpoll,
4866#endif
a77dcb8c
AK		 4867 .ndo_bridge_setlink = be_ndo_bridge_setlink,
4868 .ndo_bridge_getlink = be_ndo_bridge_getlink,
6384a4d0 4869#ifdef CONFIG_NET_RX_BUSY_POLL
c9c47142 4870 .ndo_busy_poll = be_busy_poll,
6384a4d0 4871#endif
c5abe7c0 4872#ifdef CONFIG_BE2NET_VXLAN
c9c47142
SP		 4873 .ndo_add_vxlan_port = be_add_vxlan_port,
4874 .ndo_del_vxlan_port = be_del_vxlan_port,
5f35227e 4875 .ndo_features_check = be_features_check,
c5abe7c0 4876#endif
6b7c5b94
SP		 4877};
4878
4879static void be_netdev_init(struct net_device *netdev)
4880{
4881 struct be_adapter *adapter = netdev_priv(netdev);
4882
6332c8d3 4883 netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
8b8ddc68 4884 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
f646968f 4885 NETIF_F_HW_VLAN_CTAG_TX;
8b8ddc68
MM		 4886 if (be_multi_rxq(adapter))
4887 netdev->hw_features |= NETIF_F_RXHASH;
6332c8d3
MM		 4888
4889 netdev->features |= netdev->hw_features |
f646968f 4890 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
4b972914 4891
eb8a50d9 4892 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
79032644 4893 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
51c59870 4894
fbc13f01
AK		 4895 netdev->priv_flags |= IFF_UNICAST_FLT;
4896
6b7c5b94
SP		 4897 netdev->flags |= IFF_MULTICAST;
4898
b7e5887e 4899 netif_set_gso_max_size(netdev, 65535 - ETH_HLEN);
c190e3c8 4900
10ef9ab4 4901 netdev->netdev_ops = &be_netdev_ops;
6b7c5b94 4902
7ad24ea4 4903 netdev->ethtool_ops = &be_ethtool_ops;
6b7c5b94
SP		 4904}
4905
d0e1b319 4906static int be_err_recover(struct be_adapter *adapter)
78fad34e 4907{
d0e1b319 4908 struct net_device *netdev = adapter->netdev;
78fad34e
SP		 4909 struct device *dev = &adapter->pdev->dev;
4910 int status;
4911
4912 status = lancer_test_and_set_rdy_state(adapter);
4913 if (status)
4914 goto err;
4915
78fad34e
SP		 4916 be_clear_all_error(adapter);
4917
4918 status = be_setup(adapter);
4919 if (status)
4920 goto err;
4921
d0e1b319
KA		 4922 if (netif_running(netdev)) {
4923 status = be_open(netdev);
78fad34e
SP		 4924 if (status)
4925 goto err;
4926 }
4927
d0e1b319
KA		 4928 netif_device_attach(netdev);
4929
78fad34e
SP		 4930 dev_err(dev, "Adapter recovery successful\n");
4931 return 0;
4932err:
4933 if (status == -EAGAIN)
4934 dev_err(dev, "Waiting for resource provisioning\n");
4935 else
4936 dev_err(dev, "Adapter recovery failed\n");
4937
4938 return status;
4939}
4940
eb7dd46c 4941static void be_err_detection_task(struct work_struct *work)
78fad34e
SP		 4942{
4943 struct be_adapter *adapter =
eb7dd46c
SP		 4944 container_of(work, struct be_adapter,
4945 be_err_detection_work.work);
d0e1b319 4946 struct net_device *netdev = adapter->netdev;
78fad34e
SP		 4947 int status = 0;
4948
4949 be_detect_error(adapter);
4950
d0e1b319 4951 if (adapter->hw_error) {
78fad34e 4952 rtnl_lock();
d0e1b319
KA		 4953 netif_device_detach(netdev);
4954 if (netif_running(netdev))
4955 be_close(netdev);
78fad34e
SP		 4956 rtnl_unlock();
4957
d0e1b319
KA		 4958 be_clear(adapter);
4959
4960 /* As of now error recovery support is in Lancer only */
4961 if (lancer_chip(adapter))
4962 status = be_err_recover(adapter);
78fad34e
SP		 4963 }
4964
4965 /* In Lancer, for all errors other than provisioning error (-EAGAIN),
4966 * no need to attempt further recovery.
4967 */
4968 if (!status || status == -EAGAIN)
eb7dd46c 4969 be_schedule_err_detection(adapter);
78fad34e
SP		 4970}
4971
4972static void be_log_sfp_info(struct be_adapter *adapter)
4973{
4974 int status;
4975
4976 status = be_cmd_query_sfp_info(adapter);
4977 if (!status) {
4978 dev_err(&adapter->pdev->dev,
4979 "Unqualified SFP+ detected on %c from %s part no: %s",
4980 adapter->port_name, adapter->phy.vendor_name,
4981 adapter->phy.vendor_pn);
4982 }
4983 adapter->flags &= ~BE_FLAGS_EVT_INCOMPATIBLE_SFP;
4984}
4985
4986static void be_worker(struct work_struct *work)
4987{
4988 struct be_adapter *adapter =
4989 container_of(work, struct be_adapter, work.work);
4990 struct be_rx_obj *rxo;
4991 int i;
4992
4993 /* when interrupts are not yet enabled, just reap any pending
4994 * mcc completions
4995 */
4996 if (!netif_running(adapter->netdev)) {
4997 local_bh_disable();
4998 be_process_mcc(adapter);
4999 local_bh_enable();
5000 goto reschedule;
5001 }
5002
5003 if (!adapter->stats_cmd_sent) {
5004 if (lancer_chip(adapter))
5005 lancer_cmd_get_pport_stats(adapter,
5006 &adapter->stats_cmd);
5007 else
5008 be_cmd_get_stats(adapter, &adapter->stats_cmd);
5009 }
5010
5011 if (be_physfn(adapter) &&
5012 MODULO(adapter->work_counter, adapter->be_get_temp_freq) == 0)
5013 be_cmd_get_die_temperature(adapter);
5014
5015 for_all_rx_queues(adapter, rxo, i) {
5016 /* Replenish RX-queues starved due to memory
5017 * allocation failures.
5018 */
5019 if (rxo->rx_post_starved)
5020 be_post_rx_frags(rxo, GFP_KERNEL, MAX_RX_POST);
5021 }
5022
5023 be_eqd_update(adapter);
5024
5025 if (adapter->flags & BE_FLAGS_EVT_INCOMPATIBLE_SFP)
5026 be_log_sfp_info(adapter);
5027
5028reschedule:
5029 adapter->work_counter++;
5030 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
5031}
5032
6b7c5b94
SP		 5033static void be_unmap_pci_bars(struct be_adapter *adapter)
5034{
c5b3ad4c
SP		 5035 if (adapter->csr)
5036 pci_iounmap(adapter->pdev, adapter->csr);
8788fdc2 5037 if (adapter->db)
ce66f781 5038 pci_iounmap(adapter->pdev, adapter->db);
045508a8
PP		 5039}
5040
ce66f781
SP		 5041static int db_bar(struct be_adapter *adapter)
5042{
5043 if (lancer_chip(adapter) || !be_physfn(adapter))
5044 return 0;
5045 else
5046 return 4;
5047}
5048
5049static int be_roce_map_pci_bars(struct be_adapter *adapter)
045508a8 5050{
dbf0f2a7 5051 if (skyhawk_chip(adapter)) {
ce66f781
SP		 5052 adapter->roce_db.size = 4096;
5053 adapter->roce_db.io_addr = pci_resource_start(adapter->pdev,
5054 db_bar(adapter));
5055 adapter->roce_db.total_size = pci_resource_len(adapter->pdev,
5056 db_bar(adapter));
5057 }
045508a8 5058 return 0;
6b7c5b94
SP		 5059}
5060
5061static int be_map_pci_bars(struct be_adapter *adapter)
5062{
5063 u8 __iomem *addr;
78fad34e
SP		 5064 u32 sli_intf;
5065
5066 pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
5067 adapter->sli_family = (sli_intf & SLI_INTF_FAMILY_MASK) >>
5068 SLI_INTF_FAMILY_SHIFT;
5069 adapter->virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
fe6d2a38 5070
c5b3ad4c
SP		 5071 if (BEx_chip(adapter) && be_physfn(adapter)) {
5072 adapter->csr = pci_iomap(adapter->pdev, 2, 0);
ddf1169f 5073 if (!adapter->csr)
c5b3ad4c
SP		 5074 return -ENOMEM;
5075 }
5076
ce66f781 5077 addr = pci_iomap(adapter->pdev, db_bar(adapter), 0);
ddf1169f 5078 if (!addr)
6b7c5b94 5079 goto pci_map_err;
ba343c77 5080 adapter->db = addr;
ce66f781
SP		 5081
5082 be_roce_map_pci_bars(adapter);
6b7c5b94 5083 return 0;
ce66f781 5084
6b7c5b94 5085pci_map_err:
acbafeb1 5086 dev_err(&adapter->pdev->dev, "Error in mapping PCI BARs\n");
6b7c5b94
SP		 5087 be_unmap_pci_bars(adapter);
5088 return -ENOMEM;
5089}
5090
78fad34e 5091static void be_drv_cleanup(struct be_adapter *adapter)
6b7c5b94 5092{
8788fdc2 5093 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
78fad34e 5094 struct device *dev = &adapter->pdev->dev;
6b7c5b94
SP		 5095
5096 if (mem->va)
78fad34e 5097 dma_free_coherent(dev, mem->size, mem->va, mem->dma);
e7b909a6 5098
5b8821b7 5099 mem = &adapter->rx_filter;
e7b909a6 5100 if (mem->va)
78fad34e
SP		 5101 dma_free_coherent(dev, mem->size, mem->va, mem->dma);
5102
5103 mem = &adapter->stats_cmd;
5104 if (mem->va)
5105 dma_free_coherent(dev, mem->size, mem->va, mem->dma);
6b7c5b94
SP		 5106}
5107
78fad34e
SP		 5108/* Allocate and initialize various fields in be_adapter struct */
5109static int be_drv_init(struct be_adapter *adapter)
6b7c5b94 5110{
8788fdc2
SP		 5111 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
5112 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
5b8821b7 5113 struct be_dma_mem *rx_filter = &adapter->rx_filter;
78fad34e
SP		 5114 struct be_dma_mem *stats_cmd = &adapter->stats_cmd;
5115 struct device *dev = &adapter->pdev->dev;
5116 int status = 0;
6b7c5b94
SP		 5117
5118 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
78fad34e 5119 mbox_mem_alloc->va = dma_alloc_coherent(dev, mbox_mem_alloc->size,
2b7bcebf
IV		 5120 &mbox_mem_alloc->dma,
5121 GFP_KERNEL);
78fad34e
SP		 5122 if (!mbox_mem_alloc->va)
5123 return -ENOMEM;
5124
6b7c5b94
SP		 5125 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
5126 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
5127 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
5128 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6 5129
5b8821b7 5130 rx_filter->size = sizeof(struct be_cmd_req_rx_filter);
78fad34e
SP		 5131 rx_filter->va = dma_zalloc_coherent(dev, rx_filter->size,
5132 &rx_filter->dma, GFP_KERNEL);
ddf1169f 5133 if (!rx_filter->va) {
e7b909a6
SP		 5134 status = -ENOMEM;
5135 goto free_mbox;
5136 }
1f9061d2 5137
78fad34e
SP		 5138 if (lancer_chip(adapter))
5139 stats_cmd->size = sizeof(struct lancer_cmd_req_pport_stats);
5140 else if (BE2_chip(adapter))
5141 stats_cmd->size = sizeof(struct be_cmd_req_get_stats_v0);
5142 else if (BE3_chip(adapter))
5143 stats_cmd->size = sizeof(struct be_cmd_req_get_stats_v1);
5144 else
5145 stats_cmd->size = sizeof(struct be_cmd_req_get_stats_v2);
5146 stats_cmd->va = dma_zalloc_coherent(dev, stats_cmd->size,
5147 &stats_cmd->dma, GFP_KERNEL);
5148 if (!stats_cmd->va) {
5149 status = -ENOMEM;
5150 goto free_rx_filter;
5151 }
5152
2984961c 5153 mutex_init(&adapter->mbox_lock);
8788fdc2
SP		 5154 spin_lock_init(&adapter->mcc_lock);
5155 spin_lock_init(&adapter->mcc_cq_lock);
5eeff635 5156 init_completion(&adapter->et_cmd_compl);
e7b909a6 5157
78fad34e 5158 pci_save_state(adapter->pdev);
6b7c5b94 5159
78fad34e 5160 INIT_DELAYED_WORK(&adapter->work, be_worker);
eb7dd46c
SP		 5161 INIT_DELAYED_WORK(&adapter->be_err_detection_work,
5162 be_err_detection_task);
6b7c5b94 5163
78fad34e
SP		 5164 adapter->rx_fc = true;
5165 adapter->tx_fc = true;
6b7c5b94 5166
78fad34e
SP		 5167 /* Must be a power of 2 or else MODULO will BUG_ON */
5168 adapter->be_get_temp_freq = 64;
5169 adapter->cfg_num_qs = netif_get_num_default_rss_queues();
ca34fe38 5170
6b7c5b94 5171 return 0;
78fad34e
SP		 5172
5173free_rx_filter:
5174 dma_free_coherent(dev, rx_filter->size, rx_filter->va, rx_filter->dma);
5175free_mbox:
5176 dma_free_coherent(dev, mbox_mem_alloc->size, mbox_mem_alloc->va,
5177 mbox_mem_alloc->dma);
5178 return status;
6b7c5b94
SP		 5179}
5180
3bc6b06c 5181static void be_remove(struct pci_dev *pdev)
6b7c5b94
SP		 5182{
5183 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 5184
6b7c5b94
SP		 5185 if (!adapter)
5186 return;
5187
045508a8 5188 be_roce_dev_remove(adapter);
8cef7a78 5189 be_intr_set(adapter, false);
045508a8 5190
eb7dd46c 5191 be_cancel_err_detection(adapter);
f67ef7ba 5192
6b7c5b94
SP		 5193 unregister_netdev(adapter->netdev);
5194
5fb379ee
SP		 5195 be_clear(adapter);
5196
bf99e50d
PR		 5197 /* tell fw we're done with firing cmds */
5198 be_cmd_fw_clean(adapter);
5199
78fad34e
SP		 5200 be_unmap_pci_bars(adapter);
5201 be_drv_cleanup(adapter);
6b7c5b94 5202
d6b6d987
SP		 5203 pci_disable_pcie_error_reporting(pdev);
5204
6b7c5b94
SP		 5205 pci_release_regions(pdev);
5206 pci_disable_device(pdev);
5207
5208 free_netdev(adapter->netdev);
5209}
5210
257a3feb 5211/* If any VFs are already enabled don't FLR the PF */
39f1d94d
SP		 5212static bool be_reset_required(struct be_adapter *adapter)
5213{
257a3feb 5214 return pci_num_vf(adapter->pdev) ? false : true;
39f1d94d
SP		 5215}
5216
d379142b
SP		 5217static char *mc_name(struct be_adapter *adapter)
5218{
f93f160b
VV		 5219 char *str = ""; /* default */
5220
5221 switch (adapter->mc_type) {
5222 case UMC:
5223 str = "UMC";
5224 break;
5225 case FLEX10:
5226 str = "FLEX10";
5227 break;
5228 case vNIC1:
5229 str = "vNIC-1";
5230 break;
5231 case nPAR:
5232 str = "nPAR";
5233 break;
5234 case UFP:
5235 str = "UFP";
5236 break;
5237 case vNIC2:
5238 str = "vNIC-2";
5239 break;
5240 default:
5241 str = "";
5242 }
5243
5244 return str;
d379142b
SP		 5245}
5246
5247static inline char *func_name(struct be_adapter *adapter)
5248{
5249 return be_physfn(adapter) ? "PF" : "VF";
5250}
5251
f7062ee5
SP		 5252static inline char *nic_name(struct pci_dev *pdev)
5253{
5254 switch (pdev->device) {
5255 case OC_DEVICE_ID1:
5256 return OC_NAME;
5257 case OC_DEVICE_ID2:
5258 return OC_NAME_BE;
5259 case OC_DEVICE_ID3:
5260 case OC_DEVICE_ID4:
5261 return OC_NAME_LANCER;
5262 case BE_DEVICE_ID2:
5263 return BE3_NAME;
5264 case OC_DEVICE_ID5:
5265 case OC_DEVICE_ID6:
5266 return OC_NAME_SH;
5267 default:
5268 return BE_NAME;
5269 }
5270}
5271
ca3de6b2
SP		 5272/* Wait for the FW to be ready and perform the required initialization */
5273static int be_func_init(struct be_adapter *adapter)
5274{
5275 int status;
5276
5277 status = be_fw_wait_ready(adapter);
5278 if (status)
5279 return status;
5280
5281 if (be_reset_required(adapter)) {
5282 status = be_cmd_reset_function(adapter);
5283 if (status)
5284 return status;
5285
5286 /* Wait for interrupts to quiesce after an FLR */
5287 msleep(100);
5288 }
5289
5290 /* Tell FW we're ready to fire cmds */
5291 status = be_cmd_fw_init(adapter);
5292 if (status)
5293 return status;
5294
5295 /* Allow interrupts for other ULPs running on NIC function */
5296 be_intr_set(adapter, true);
5297
5298 return 0;
5299}
5300
1dd06ae8 5301static int be_probe(struct pci_dev *pdev, const struct pci_device_id *pdev_id)
6b7c5b94 5302{
6b7c5b94
SP		 5303 struct be_adapter *adapter;
5304 struct net_device *netdev;
21252377 5305 int status = 0;
6b7c5b94 5306
acbafeb1
SP		 5307 dev_info(&pdev->dev, "%s version is %s\n", DRV_NAME, DRV_VER);
5308
6b7c5b94
SP		 5309 status = pci_enable_device(pdev);
5310 if (status)
5311 goto do_none;
5312
5313 status = pci_request_regions(pdev, DRV_NAME);
5314 if (status)
5315 goto disable_dev;
5316 pci_set_master(pdev);
5317
7f640062 5318 netdev = alloc_etherdev_mqs(sizeof(*adapter), MAX_TX_QS, MAX_RX_QS);
ddf1169f 5319 if (!netdev) {
6b7c5b94
SP		 5320 status = -ENOMEM;
5321 goto rel_reg;
5322 }
5323 adapter = netdev_priv(netdev);
5324 adapter->pdev = pdev;
5325 pci_set_drvdata(pdev, adapter);
5326 adapter->netdev = netdev;
2243e2e9 5327 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94 5328
4c15c243 5329 status = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
6b7c5b94
SP		 5330 if (!status) {
5331 netdev->features |= NETIF_F_HIGHDMA;
5332 } else {
4c15c243 5333 status = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
6b7c5b94
SP		 5334 if (status) {
5335 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
5336 goto free_netdev;
5337 }
5338 }
5339
2f951a9a
KA		 5340 status = pci_enable_pcie_error_reporting(pdev);
5341 if (!status)
5342 dev_info(&pdev->dev, "PCIe error reporting enabled\n");
d6b6d987 5343
78fad34e 5344 status = be_map_pci_bars(adapter);
6b7c5b94 5345 if (status)
39f1d94d 5346 goto free_netdev;
6b7c5b94 5347
78fad34e
SP		 5348 status = be_drv_init(adapter);
5349 if (status)
5350 goto unmap_bars;
5351
ca3de6b2 5352 status = be_func_init(adapter);
2d177be8 5353 if (status)
78fad34e 5354 goto drv_cleanup;
2243e2e9 5355
5fb379ee
SP		 5356 status = be_setup(adapter);
5357 if (status)
78fad34e 5358 goto drv_cleanup;
2243e2e9 5359
3abcdeda 5360 be_netdev_init(netdev);
6b7c5b94
SP		 5361 status = register_netdev(netdev);
5362 if (status != 0)
5fb379ee 5363 goto unsetup;
6b7c5b94 5364
045508a8
PP		 5365 be_roce_dev_add(adapter);
5366
eb7dd46c 5367 be_schedule_err_detection(adapter);
b4e32a71 5368
d379142b 5369 dev_info(&pdev->dev, "%s: %s %s port %c\n", nic_name(pdev),
21252377 5370 func_name(adapter), mc_name(adapter), adapter->port_name);
34b1ef04 5371
6b7c5b94
SP		 5372 return 0;
5373
5fb379ee
SP		 5374unsetup:
5375 be_clear(adapter);
78fad34e
SP		 5376drv_cleanup:
5377 be_drv_cleanup(adapter);
5378unmap_bars:
5379 be_unmap_pci_bars(adapter);
f9449ab7 5380free_netdev:
fe6d2a38 5381 free_netdev(netdev);
6b7c5b94
SP		 5382rel_reg:
5383 pci_release_regions(pdev);
5384disable_dev:
5385 pci_disable_device(pdev);
5386do_none:
c4ca2374 5387 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 5388 return status;
5389}
5390
5391static int be_suspend(struct pci_dev *pdev, pm_message_t state)
5392{
5393 struct be_adapter *adapter = pci_get_drvdata(pdev);
5394 struct net_device *netdev = adapter->netdev;
5395
76a9e08e 5396 if (adapter->wol_en)
71d8d1b5
AK		 5397 be_setup_wol(adapter, true);
5398
d4360d6f 5399 be_intr_set(adapter, false);
eb7dd46c 5400 be_cancel_err_detection(adapter);
f67ef7ba 5401
6b7c5b94
SP		 5402 netif_device_detach(netdev);
5403 if (netif_running(netdev)) {
5404 rtnl_lock();
5405 be_close(netdev);
5406 rtnl_unlock();
5407 }
9b0365f1 5408 be_clear(adapter);
6b7c5b94
SP		 5409
5410 pci_save_state(pdev);
5411 pci_disable_device(pdev);
5412 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5413 return 0;
5414}
5415
5416static int be_resume(struct pci_dev *pdev)
5417{
5418 int status = 0;
5419 struct be_adapter *adapter = pci_get_drvdata(pdev);
5420 struct net_device *netdev = adapter->netdev;
5421
5422 netif_device_detach(netdev);
5423
5424 status = pci_enable_device(pdev);
5425 if (status)
5426 return status;
5427
1ca01512 5428 pci_set_power_state(pdev, PCI_D0);
6b7c5b94
SP		 5429 pci_restore_state(pdev);
5430
ca3de6b2 5431 status = be_func_init(adapter);
2243e2e9
SP		 5432 if (status)
5433 return status;
5434
9b0365f1 5435 be_setup(adapter);
6b7c5b94
SP		 5436 if (netif_running(netdev)) {
5437 rtnl_lock();
5438 be_open(netdev);
5439 rtnl_unlock();
5440 }
f67ef7ba 5441
6b7c5b94 5442 netif_device_attach(netdev);
71d8d1b5 5443
eb7dd46c
SP		 5444 be_schedule_err_detection(adapter);
5445
76a9e08e 5446 if (adapter->wol_en)
71d8d1b5 5447 be_setup_wol(adapter, false);
a4ca055f 5448
6b7c5b94
SP		 5449 return 0;
5450}
5451
82456b03
SP		 5452/*
5453 * An FLR will stop BE from DMAing any data.
5454 */
5455static void be_shutdown(struct pci_dev *pdev)
5456{
5457 struct be_adapter *adapter = pci_get_drvdata(pdev);
82456b03 5458
2d5d4154
AK		 5459 if (!adapter)
5460 return;
82456b03 5461
d114f99a 5462 be_roce_dev_shutdown(adapter);
0f4a6828 5463 cancel_delayed_work_sync(&adapter->work);
eb7dd46c 5464 be_cancel_err_detection(adapter);
a4ca055f 5465
2d5d4154 5466 netif_device_detach(adapter->netdev);
82456b03 5467
57841869
AK		 5468 be_cmd_reset_function(adapter);
5469
82456b03 5470 pci_disable_device(pdev);
82456b03
SP		 5471}
5472
cf588477 5473static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
748b539a 5474 pci_channel_state_t state)
cf588477
SP		 5475{
5476 struct be_adapter *adapter = pci_get_drvdata(pdev);
5477 struct net_device *netdev = adapter->netdev;
5478
5479 dev_err(&adapter->pdev->dev, "EEH error detected\n");
5480
01e5b2c4
SK		 5481 if (!adapter->eeh_error) {
5482 adapter->eeh_error = true;
cf588477 5483
eb7dd46c 5484 be_cancel_err_detection(adapter);
cf588477 5485
cf588477 5486 rtnl_lock();
01e5b2c4
SK		 5487 netif_device_detach(netdev);
5488 if (netif_running(netdev))
5489 be_close(netdev);
cf588477 5490 rtnl_unlock();
01e5b2c4
SK		 5491
5492 be_clear(adapter);
cf588477 5493 }
cf588477
SP		 5494
5495 if (state == pci_channel_io_perm_failure)
5496 return PCI_ERS_RESULT_DISCONNECT;
5497
5498 pci_disable_device(pdev);
5499
eeb7fc7b
SK		 5500 /* The error could cause the FW to trigger a flash debug dump.
5501 * Resetting the card while flash dump is in progress
c8a54163
PR		 5502 * can cause it not to recover; wait for it to finish.
5503 * Wait only for first function as it is needed only once per
5504 * adapter.
eeb7fc7b 5505 */
c8a54163
PR		 5506 if (pdev->devfn == 0)
5507 ssleep(30);
5508
cf588477
SP		 5509 return PCI_ERS_RESULT_NEED_RESET;
5510}
5511
5512static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
5513{
5514 struct be_adapter *adapter = pci_get_drvdata(pdev);
5515 int status;
5516
5517 dev_info(&adapter->pdev->dev, "EEH reset\n");
cf588477
SP		 5518
5519 status = pci_enable_device(pdev);
5520 if (status)
5521 return PCI_ERS_RESULT_DISCONNECT;
5522
5523 pci_set_master(pdev);
1ca01512 5524 pci_set_power_state(pdev, PCI_D0);
cf588477
SP		 5525 pci_restore_state(pdev);
5526
5527 /* Check if card is ok and fw is ready */
c5b3ad4c
SP		 5528 dev_info(&adapter->pdev->dev,
5529 "Waiting for FW to be ready after EEH reset\n");
bf99e50d 5530 status = be_fw_wait_ready(adapter);
cf588477
SP		 5531 if (status)
5532 return PCI_ERS_RESULT_DISCONNECT;
5533
d6b6d987 5534 pci_cleanup_aer_uncorrect_error_status(pdev);
01e5b2c4 5535 be_clear_all_error(adapter);
cf588477
SP		 5536 return PCI_ERS_RESULT_RECOVERED;
5537}
5538
5539static void be_eeh_resume(struct pci_dev *pdev)
5540{
5541 int status = 0;
5542 struct be_adapter *adapter = pci_get_drvdata(pdev);
5543 struct net_device *netdev = adapter->netdev;
5544
5545 dev_info(&adapter->pdev->dev, "EEH resume\n");
5546
5547 pci_save_state(pdev);
5548
ca3de6b2 5549 status = be_func_init(adapter);
bf99e50d
PR		 5550 if (status)
5551 goto err;
5552
cf588477
SP		 5553 status = be_setup(adapter);
5554 if (status)
5555 goto err;
5556
5557 if (netif_running(netdev)) {
5558 status = be_open(netdev);
5559 if (status)
5560 goto err;
5561 }
f67ef7ba 5562
cf588477 5563 netif_device_attach(netdev);
eb7dd46c
SP		 5564
5565 be_schedule_err_detection(adapter);
cf588477
SP		 5566 return;
5567err:
5568 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
cf588477
SP		 5569}
5570
3646f0e5 5571static const struct pci_error_handlers be_eeh_handlers = {
cf588477
SP		 5572 .error_detected = be_eeh_err_detected,
5573 .slot_reset = be_eeh_reset,
5574 .resume = be_eeh_resume,
5575};
5576
6b7c5b94
SP		 5577static struct pci_driver be_driver = {
5578 .name = DRV_NAME,
5579 .id_table = be_dev_ids,
5580 .probe = be_probe,
5581 .remove = be_remove,
5582 .suspend = be_suspend,
cf588477 5583 .resume = be_resume,
82456b03 5584 .shutdown = be_shutdown,
cf588477 5585 .err_handler = &be_eeh_handlers
6b7c5b94
SP		 5586};
5587
5588static int __init be_init_module(void)
5589{
8e95a202
JP		 5590 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
5591 rx_frag_size != 2048) {
6b7c5b94
SP		 5592 printk(KERN_WARNING DRV_NAME
5593 " : Module param rx_frag_size must be 2048/4096/8192."
5594 " Using 2048\n");
5595 rx_frag_size = 2048;
5596 }
6b7c5b94
SP		 5597
5598 return pci_register_driver(&be_driver);
5599}
5600module_init(be_init_module);
5601
5602static void __exit be_exit_module(void)
5603{
5604 pci_unregister_driver(&be_driver);
5605}
5606module_exit(be_exit_module);
Linux 6.x block layer and io_uring tree(s)