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Merge branch 'bkl/procfs' of git://git.kernel.org/pub/scm/linux/kernel/git/frederic...
[linux-2.6-block.git] / drivers / net / eth16i.c
CommitLineData
1da177e4 1/* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux
6aa20a22 2
1da177e4 3 Written 1994-1999 by Mika Kuoppala
6aa20a22 4
1da177e4
LT		 5 Copyright (C) 1994-1999 by Mika Kuoppala
6 Based on skeleton.c and heavily on at1700.c by Donald Becker
7
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
10
11 The author may be reached as miku@iki.fi
12
13 This driver supports following cards :
14 - ICL EtherTeam 16i
6aa20a22 15 - ICL EtherTeam 32 EISA
1da177e4
LT		 16 (Uses true 32 bit transfers rather than 16i compability mode)
17
18 Example Module usage:
19 insmod eth16i.o io=0x2a0 mediatype=bnc
20
21 mediatype can be one of the following: bnc,tp,dix,auto,eprom
22
23 'auto' will try to autoprobe mediatype.
24 'eprom' will use whatever type defined in eprom.
25
26 I have benchmarked driver with PII/300Mhz as a ftp client
27 and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.
6aa20a22 28
1da177e4
LT		 29 Sources:
30 - skeleton.c a sample network driver core for linux,
31 written by Donald Becker <becker@scyld.com>
6aa20a22 32 - at1700.c a driver for Allied Telesis AT1700, written
1da177e4
LT		 33 by Donald Becker.
34 - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
35 written by Markku Viima
36 - The Fujitsu MB86965 databook.
6aa20a22
JG		 37
38 Author thanks following persons due to their valueble assistance:
1da177e4 39 Markku Viima (ICL)
6aa20a22 40 Ari Valve (ICL)
1da177e4
LT		 41 Donald Becker
42 Kurt Huwig <kurt@huwig.de>
43
44 Revision history:
45
46 Version Date Description
6aa20a22 47
1da177e4
LT		 48 0.01 15.12-94 Initial version (card detection)
49 0.02 23.01-95 Interrupt is now hooked correctly
50 0.03 01.02-95 Rewrote initialization part
51 0.04 07.02-95 Base skeleton done...
52 Made a few changes to signature checking
53 to make it a bit reliable.
54 - fixed bug in tx_buf mapping
55 - fixed bug in initialization (DLC_EN
56 wasn't enabled when initialization
57 was done.)
58 0.05 08.02-95 If there were more than one packet to send,
59 transmit was jammed due to invalid
60 register write...now fixed
6aa20a22 61 0.06 19.02-95 Rewrote interrupt handling
1da177e4
LT		 62 0.07 13.04-95 Wrote EEPROM read routines
63 Card configuration now set according to
64 data read from EEPROM
65 0.08 23.06-95 Wrote part that tries to probe used interface
66 port if AUTO is selected
67
68 0.09 01.09-95 Added module support
6aa20a22 69
1da177e4
LT		 70 0.10 04.09-95 Fixed receive packet allocation to work
71 with kernels > 1.3.x
1da177e4 72
6aa20a22
JG		 73 0.20 20.09-95 Added support for EtherTeam32 EISA
74
75 0.21 17.10-95 Removed the unnecessary extern
1da177e4
LT		 76 init_etherdev() declaration. Some
77 other cleanups.
6aa20a22 78
1da177e4
LT		 79 0.22 22.02-96 Receive buffer was not flushed
80 correctly when faulty packet was
81 received. Now fixed.
82
6aa20a22 83 0.23 26.02-96 Made resetting the adapter
1da177e4 84 more reliable.
6aa20a22 85
1da177e4
LT		 86 0.24 27.02-96 Rewrote faulty packet handling in eth16i_rx
87
88 0.25 22.05-96 kfree() was missing from cleanup_module.
89
6aa20a22 90 0.26 11.06-96 Sometimes card was not found by
1da177e4 91 check_signature(). Now made more reliable.
6aa20a22
JG		 92
93 0.27 23.06-96 Oops. 16 consecutive collisions halted
94 adapter. Now will try to retransmit
1da177e4 95 MAX_COL_16 times before finally giving up.
6aa20a22 96
1da177e4
LT		 97 0.28 28.10-97 Added dev_id parameter (NULL) for free_irq
98
99 0.29 29.10-97 Multiple card support for module users
100
101 0.30 30.10-97 Fixed irq allocation bug.
102 (request_irq moved from probe to open)
103
104 0.30a 21.08-98 Card detection made more relaxed. Driver
105 had problems with some TCP/IP-PROM boots
6aa20a22 106 to find the card. Suggested by
1da177e4
LT		 107 Kurt Huwig <kurt@huwig.de>
108
109 0.31 28.08-98 Media interface port can now be selected
110 with module parameters or kernel
6aa20a22 111 boot parameters.
1da177e4 112
6aa20a22 113 0.32 31.08-98 IRQ was never freed if open/close
1da177e4 114 pair wasn't called. Now fixed.
6aa20a22 115
1da177e4
LT		 116 0.33 10.09-98 When eth16i_open() was called after
117 eth16i_close() chip never recovered.
118 Now more shallow reset is made on
119 close.
120
121 0.34 29.06-99 Fixed one bad #ifdef.
122 Changed ioaddr -> io for consistency
123
124 0.35 01.07-99 transmit,-receive bytes were never
6aa20a22 125 updated in stats.
1da177e4
LT		 126
127 Bugs:
6aa20a22
JG		 128 In some cases the media interface autoprobing code doesn't find
129 the correct interface type. In this case you can
130 manually choose the interface type in DOS with E16IC.EXE which is
1da177e4
LT		 131 configuration software for EtherTeam16i and EtherTeam32 cards.
132 This is also true for IRQ setting. You cannot use module
6aa20a22 133 parameter to configure IRQ of the card (yet).
1da177e4
LT		 134
135 To do:
136 - Real multicast support
137 - Rewrite the media interface autoprobing code. Its _horrible_ !
138 - Possibly merge all the MB86965 specific code to external
139 module for use by eth16.c and Donald's at1700.c
140 - IRQ configuration with module parameter. I will do
141 this when i will get enough info about setting
142 irq without configuration utility.
143*/
144
6aa20a22 145static char *version =
1da177e4
LT		 146 "eth16i.c: v0.35 01-Jul-1999 Mika Kuoppala (miku@iki.fi)\n";
147
148#include <linux/module.h>
149#include <linux/kernel.h>
6aa20a22
JG		 150#include <linux/types.h>
151#include <linux/fcntl.h>
152#include <linux/interrupt.h>
153#include <linux/ioport.h>
154#include <linux/in.h>
6aa20a22 155#include <linux/string.h>
1da177e4
LT		 156#include <linux/errno.h>
157#include <linux/init.h>
158#include <linux/spinlock.h>
159#include <linux/netdevice.h>
160#include <linux/etherdevice.h>
161#include <linux/skbuff.h>
162#include <linux/bitops.h>
ff5688ae 163#include <linux/jiffies.h>
53d5ed62 164#include <linux/io.h>
1da177e4 165
6aa20a22 166#include <asm/system.h>
1da177e4
LT		 167#include <asm/dma.h>
168
169
170
171/* Few macros */
6aa20a22 172#define BITSET(ioaddr, bnum) ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
1da177e4
LT		 173#define BITCLR(ioaddr, bnum) ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))
174
175/* This is the I/O address space for Etherteam 16i adapter. */
176#define ETH16I_IO_EXTENT 32
177
178/* Ticks before deciding that transmit has timed out */
179#define TX_TIMEOUT (400*HZ/1000)
180
181/* Maximum loop count when receiving packets */
182#define MAX_RX_LOOP 20
183
184/* Some interrupt masks */
185#define ETH16I_INTR_ON 0xef8a /* Higher is receive mask */
186#define ETH16I_INTR_OFF 0x0000
6aa20a22 187
1da177e4
LT		 188/* Buffers header status byte meanings */
189#define PKT_GOOD BIT(5)
190#define PKT_GOOD_RMT BIT(4)
191#define PKT_SHORT BIT(3)
192#define PKT_ALIGN_ERR BIT(2)
193#define PKT_CRC_ERR BIT(1)
194#define PKT_RX_BUF_OVERFLOW BIT(0)
195
196/* Transmit status register (DLCR0) */
197#define TX_STATUS_REG 0
198#define TX_DONE BIT(7)
199#define NET_BUSY BIT(6)
200#define TX_PKT_RCD BIT(5)
201#define CR_LOST BIT(4)
202#define TX_JABBER_ERR BIT(3)
203#define COLLISION BIT(2)
204#define COLLISIONS_16 BIT(1)
205
206/* Receive status register (DLCR1) */
207#define RX_STATUS_REG 1
208#define RX_PKT BIT(7) /* Packet received */
209#define BUS_RD_ERR BIT(6)
210#define SHORT_PKT_ERR BIT(3)
211#define ALIGN_ERR BIT(2)
212#define CRC_ERR BIT(1)
213#define RX_BUF_OVERFLOW BIT(0)
6aa20a22 214
1da177e4
LT		 215/* Transmit Interrupt Enable Register (DLCR2) */
216#define TX_INTR_REG 2
217#define TX_INTR_DONE BIT(7)
218#define TX_INTR_COL BIT(2)
219#define TX_INTR_16_COL BIT(1)
220
221/* Receive Interrupt Enable Register (DLCR3) */
222#define RX_INTR_REG 3
223#define RX_INTR_RECEIVE BIT(7)
224#define RX_INTR_SHORT_PKT BIT(3)
225#define RX_INTR_CRC_ERR BIT(1)
226#define RX_INTR_BUF_OVERFLOW BIT(0)
227
228/* Transmit Mode Register (DLCR4) */
229#define TRANSMIT_MODE_REG 4
230#define LOOPBACK_CONTROL BIT(1)
231#define CONTROL_OUTPUT BIT(2)
232
233/* Receive Mode Register (DLCR5) */
234#define RECEIVE_MODE_REG 5
235#define RX_BUFFER_EMPTY BIT(6)
236#define ACCEPT_BAD_PACKETS BIT(5)
237#define RECEIVE_SHORT_ADDR BIT(4)
238#define ACCEPT_SHORT_PACKETS BIT(3)
239#define REMOTE_RESET BIT(2)
240
241#define ADDRESS_FILTER_MODE BIT(1) | BIT(0)
242#define REJECT_ALL 0
243#define ACCEPT_ALL 3
244#define MODE_1 1 /* NODE ID, BC, MC, 2-24th bit */
245#define MODE_2 2 /* NODE ID, BC, MC, Hash Table */
246
247/* Configuration Register 0 (DLCR6) */
248#define CONFIG_REG_0 6
249#define DLC_EN BIT(7)
250#define SRAM_CYCLE_TIME_100NS BIT(6)
251#define SYSTEM_BUS_WIDTH_8 BIT(5) /* 1 = 8bit, 0 = 16bit */
252#define BUFFER_WIDTH_8 BIT(4) /* 1 = 8bit, 0 = 16bit */
6aa20a22 253#define TBS1 BIT(3)
1da177e4
LT		 254#define TBS0 BIT(2)
255#define SRAM_BS1 BIT(1) /* 00=8kb, 01=16kb */
256#define SRAM_BS0 BIT(0) /* 10=32kb, 11=64kb */
257
6aa20a22 258#ifndef ETH16I_TX_BUF_SIZE /* 0 = 2kb, 1 = 4kb */
1da177e4 259#define ETH16I_TX_BUF_SIZE 3 /* 2 = 8kb, 3 = 16kb */
6aa20a22 260#endif
1da177e4
LT		 261#define TX_BUF_1x2048 0
262#define TX_BUF_2x2048 1
263#define TX_BUF_2x4098 2
264#define TX_BUF_2x8192 3
265
266/* Configuration Register 1 (DLCR7) */
267#define CONFIG_REG_1 7
268#define POWERUP BIT(5)
269
270/* Transmit start register */
271#define TRANSMIT_START_REG 10
272#define TRANSMIT_START_RB 2
273#define TX_START BIT(7) /* Rest of register bit indicate*/
274 /* number of packets in tx buffer*/
275/* Node ID registers (DLCR8-13) */
276#define NODE_ID_0 8
277#define NODE_ID_RB 0
278
279/* Hash Table registers (HT8-15) */
280#define HASH_TABLE_0 8
281#define HASH_TABLE_RB 1
282
283/* Buffer memory ports */
284#define BUFFER_MEM_PORT_LB 8
285#define DATAPORT BUFFER_MEM_PORT_LB
286#define BUFFER_MEM_PORT_HB 9
287
288/* 16 Collision control register (BMPR11) */
289#define COL_16_REG 11
290#define HALT_ON_16 0x00
291#define RETRANS_AND_HALT_ON_16 0x02
292
293/* Maximum number of attempts to send after 16 concecutive collisions */
294#define MAX_COL_16 10
295
296/* DMA Burst and Transceiver Mode Register (BMPR13) */
297#define TRANSCEIVER_MODE_REG 13
6aa20a22 298#define TRANSCEIVER_MODE_RB 2
1da177e4
LT		 299#define IO_BASE_UNLOCK BIT(7)
300#define LOWER_SQUELCH_TRESH BIT(6)
301#define LINK_TEST_DISABLE BIT(5)
302#define AUI_SELECT BIT(4)
303#define DIS_AUTO_PORT_SEL BIT(3)
304
305/* Filter Self Receive Register (BMPR14) */
306#define FILTER_SELF_RX_REG 14
307#define SKIP_RX_PACKET BIT(2)
308#define FILTER_SELF_RECEIVE BIT(0)
309
310/* EEPROM Control Register (BMPR 16) */
311#define EEPROM_CTRL_REG 16
312
313/* EEPROM Data Register (BMPR 17) */
314#define EEPROM_DATA_REG 17
315
316/* NMC93CSx6 EEPROM Control Bits */
317#define CS_0 0x00
318#define CS_1 0x20
319#define SK_0 0x00
320#define SK_1 0x40
321#define DI_0 0x00
322#define DI_1 0x80
323
324/* NMC93CSx6 EEPROM Instructions */
325#define EEPROM_READ 0x80
326
327/* NMC93CSx6 EEPROM Addresses */
328#define E_NODEID_0 0x02
329#define E_NODEID_1 0x03
330#define E_NODEID_2 0x04
331#define E_PORT_SELECT 0x14
332 #define E_PORT_BNC 0x00
333 #define E_PORT_DIX 0x01
334 #define E_PORT_TP 0x02
335 #define E_PORT_AUTO 0x03
336 #define E_PORT_FROM_EPROM 0x04
337#define E_PRODUCT_CFG 0x30
6aa20a22 338
1da177e4
LT		 339
340/* Macro to slow down io between EEPROM clock transitions */
341#define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)
342
343/* Jumperless Configuration Register (BMPR19) */
344#define JUMPERLESS_CONFIG 19
345
346/* ID ROM registers, writing to them also resets some parts of chip */
347#define ID_ROM_0 24
348#define ID_ROM_7 31
349#define RESET ID_ROM_0
350
351/* This is the I/O address list to be probed when seeking the card */
352static unsigned int eth16i_portlist[] __initdata = {
6aa20a22 353 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0
1da177e4
LT		 354};
355
6aa20a22 356static unsigned int eth32i_portlist[] __initdata = {
1da177e4 357 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
6aa20a22 358 0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0
1da177e4
LT		 359};
360
361/* This is the Interrupt lookup table for Eth16i card */
362static unsigned int eth16i_irqmap[] __initdata = { 9, 10, 5, 15, 0 };
363#define NUM_OF_ISA_IRQS 4
364
365/* This is the Interrupt lookup table for Eth32i card */
6aa20a22 366static unsigned int eth32i_irqmap[] __initdata = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
1da177e4
LT		 367#define EISA_IRQ_REG 0xc89
368#define NUM_OF_EISA_IRQS 8
369
370static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
371
372/* Use 0 for production, 1 for verification, >2 for debug */
373#ifndef ETH16I_DEBUG
374#define ETH16I_DEBUG 0
375#endif
376static unsigned int eth16i_debug = ETH16I_DEBUG;
377
378/* Information for each board */
379
380struct eth16i_local {
1da177e4
LT		 381 unsigned char tx_started;
382 unsigned char tx_buf_busy;
383 unsigned short tx_queue; /* Number of packets in transmit buffer */
6aa20a22 384 unsigned short tx_queue_len;
1da177e4
LT		 385 unsigned int tx_buf_size;
386 unsigned long open_time;
387 unsigned long tx_buffered_packets;
388 unsigned long tx_buffered_bytes;
389 unsigned long col_16;
390 spinlock_t lock;
391};
392
393/* Function prototypes */
394
395static int eth16i_probe1(struct net_device *dev, int ioaddr);
396static int eth16i_check_signature(int ioaddr);
397static int eth16i_probe_port(int ioaddr);
398static void eth16i_set_port(int ioaddr, int porttype);
399static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
400static int eth16i_receive_probe_packet(int ioaddr);
401static int eth16i_get_irq(int ioaddr);
402static int eth16i_read_eeprom(int ioaddr, int offset);
403static int eth16i_read_eeprom_word(int ioaddr);
404static void eth16i_eeprom_cmd(int ioaddr, unsigned char command);
405static int eth16i_open(struct net_device *dev);
406static int eth16i_close(struct net_device *dev);
61357325 407static netdev_tx_t eth16i_tx(struct sk_buff *skb, struct net_device *dev);
1da177e4
LT		 408static void eth16i_rx(struct net_device *dev);
409static void eth16i_timeout(struct net_device *dev);
7d12e780 410static irqreturn_t eth16i_interrupt(int irq, void *dev_id);
1da177e4
LT		 411static void eth16i_reset(struct net_device *dev);
412static void eth16i_timeout(struct net_device *dev);
413static void eth16i_skip_packet(struct net_device *dev);
6aa20a22 414static void eth16i_multicast(struct net_device *dev);
1da177e4
LT		 415static void eth16i_select_regbank(unsigned char regbank, int ioaddr);
416static void eth16i_initialize(struct net_device *dev, int boot);
417
418#if 0
419static int eth16i_set_irq(struct net_device *dev);
420#endif
421
422#ifdef MODULE
423static ushort eth16i_parse_mediatype(const char* s);
424#endif
425
1da177e4
LT		 426static char cardname[] __initdata = "ICL EtherTeam 16i/32";
427
428static int __init do_eth16i_probe(struct net_device *dev)
429{
430 int i;
431 int ioaddr;
432 int base_addr = dev->base_addr;
6aa20a22 433
6aa20a22 434 if(eth16i_debug > 4)
1da177e4
LT		 435 printk(KERN_DEBUG "Probing started for %s\n", cardname);
436
437 if(base_addr > 0x1ff) /* Check only single location */
438 return eth16i_probe1(dev, base_addr);
439 else if(base_addr != 0) /* Don't probe at all */
440 return -ENXIO;
441
442 /* Seek card from the ISA io address space */
443 for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++)
444 if(eth16i_probe1(dev, ioaddr) == 0)
445 return 0;
446
447 /* Seek card from the EISA io address space */
448 for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++)
449 if(eth16i_probe1(dev, ioaddr) == 0)
450 return 0;
451
452 return -ENODEV;
453}
454
455#ifndef MODULE
456struct net_device * __init eth16i_probe(int unit)
457{
458 struct net_device *dev = alloc_etherdev(sizeof(struct eth16i_local));
459 int err;
460
461 if (!dev)
462 return ERR_PTR(-ENOMEM);
463
464 sprintf(dev->name, "eth%d", unit);
465 netdev_boot_setup_check(dev);
466
467 err = do_eth16i_probe(dev);
468 if (err)
469 goto out;
1da177e4 470 return dev;
1da177e4
LT		 471out:
472 free_netdev(dev);
473 return ERR_PTR(err);
474}
475#endif
476
6d1ec781
SH		 477static const struct net_device_ops eth16i_netdev_ops = {
478 .ndo_open = eth16i_open,
479 .ndo_stop = eth16i_close,
480 .ndo_start_xmit = eth16i_tx,
481 .ndo_set_multicast_list = eth16i_multicast,
482 .ndo_tx_timeout = eth16i_timeout,
483 .ndo_change_mtu = eth_change_mtu,
484 .ndo_set_mac_address = eth_mac_addr,
485 .ndo_validate_addr = eth_validate_addr,
486};
487
1da177e4
LT		 488static int __init eth16i_probe1(struct net_device *dev, int ioaddr)
489{
490 struct eth16i_local *lp = netdev_priv(dev);
491 static unsigned version_printed;
492 int retval;
493
494 /* Let's grab the region */
495 if (!request_region(ioaddr, ETH16I_IO_EXTENT, cardname))
496 return -EBUSY;
497
498 /*
6aa20a22 499 The MB86985 chip has on register which holds information in which
1da177e4
LT		 500 io address the chip lies. First read this register and compare
501 it to our current io address and if match then this could
502 be our chip.
503 */
504
505 if(ioaddr < 0x1000) {
6aa20a22 506 if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
1da177e4
LT		 507 != ioaddr) {
508 retval = -ENODEV;
509 goto out;
510 }
511 }
512
513 /* Now we will go a bit deeper and try to find the chip's signature */
514
515 if(eth16i_check_signature(ioaddr) != 0) {
516 retval = -ENODEV;
517 goto out;
518 }
519
6aa20a22 520 /*
1da177e4 521 Now it seems that we have found a ethernet chip in this particular
6aa20a22 522 ioaddr. The MB86985 chip has this feature, that when you read a
1da177e4
LT		 523 certain register it will increase it's io base address to next
524 configurable slot. Now when we have found the chip, first thing is
525 to make sure that the chip's ioaddr will hold still here.
526 */
527
528 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
529 outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);
530
531 outb(0x00, ioaddr + RESET); /* Reset some parts of chip */
532 BITSET(ioaddr + CONFIG_REG_0, BIT(7)); /* Disable the data link */
533
534 if( (eth16i_debug & version_printed++) == 0)
535 printk(KERN_INFO "%s", version);
536
537 dev->base_addr = ioaddr;
538 dev->irq = eth16i_get_irq(ioaddr);
539
540 /* Try to obtain interrupt vector */
541
542 if ((retval = request_irq(dev->irq, (void *)&eth16i_interrupt, 0, cardname, dev))) {
6aa20a22 543 printk(KERN_WARNING "%s at %#3x, but is unusable due to conflicting IRQ %d.\n",
1da177e4
LT		 544 cardname, ioaddr, dev->irq);
545 goto out;
546 }
547
548 printk(KERN_INFO "%s: %s at %#3x, IRQ %d, ",
549 dev->name, cardname, ioaddr, dev->irq);
550
551
552 /* Now we will have to lock the chip's io address */
553 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
6aa20a22 554 outb(0x38, ioaddr + TRANSCEIVER_MODE_REG);
1da177e4
LT		 555
556 eth16i_initialize(dev, 1); /* Initialize rest of the chip's registers */
557
558 /* Now let's same some energy by shutting down the chip ;) */
559 BITCLR(ioaddr + CONFIG_REG_1, POWERUP);
560
561 /* Initialize the device structure */
6d1ec781 562 dev->netdev_ops = &eth16i_netdev_ops;
1da177e4
LT		 563 dev->watchdog_timeo = TX_TIMEOUT;
564 spin_lock_init(&lp->lock);
b1fc5505 565
566 retval = register_netdev(dev);
567 if (retval)
568 goto out1;
1da177e4 569 return 0;
b1fc5505 570out1:
571 free_irq(dev->irq, dev);
1da177e4
LT		 572out:
573 release_region(ioaddr, ETH16I_IO_EXTENT);
574 return retval;
575}
576
577
578static void eth16i_initialize(struct net_device *dev, int boot)
579{
580 int ioaddr = dev->base_addr;
581 int i, node_w = 0;
582 unsigned char node_byte = 0;
583
584 /* Setup station address */
585 eth16i_select_regbank(NODE_ID_RB, ioaddr);
586 for(i = 0 ; i < 3 ; i++) {
587 unsigned short node_val = eth16i_read_eeprom(ioaddr, E_NODEID_0 + i);
588 ((unsigned short *)dev->dev_addr)[i] = ntohs(node_val);
589 }
590
6aa20a22 591 for(i = 0; i < 6; i++) {
1da177e4
LT		 592 outb( ((unsigned char *)dev->dev_addr)[i], ioaddr + NODE_ID_0 + i);
593 if(boot) {
594 printk("%02x", inb(ioaddr + NODE_ID_0 + i));
595 if(i != 5)
596 printk(":");
597 }
598 }
599
600 /* Now we will set multicast addresses to accept none */
601 eth16i_select_regbank(HASH_TABLE_RB, ioaddr);
6aa20a22 602 for(i = 0; i < 8; i++)
1da177e4
LT		 603 outb(0x00, ioaddr + HASH_TABLE_0 + i);
604
605 /*
6aa20a22 606 Now let's disable the transmitter and receiver, set the buffer ram
1da177e4
LT		 607 cycle time, bus width and buffer data path width. Also we shall
608 set transmit buffer size and total buffer size.
609 */
610
611 eth16i_select_regbank(2, ioaddr);
612
613 node_byte = 0;
614 node_w = eth16i_read_eeprom(ioaddr, E_PRODUCT_CFG);
615
616 if( (node_w & 0xFF00) == 0x0800)
617 node_byte |= BUFFER_WIDTH_8;
618
619 node_byte |= SRAM_BS1;
620
621 if( (node_w & 0x00FF) == 64)
622 node_byte |= SRAM_BS0;
623
624 node_byte |= DLC_EN | SRAM_CYCLE_TIME_100NS | (ETH16I_TX_BUF_SIZE << 2);
625
626 outb(node_byte, ioaddr + CONFIG_REG_0);
627
628 /* We shall halt the transmitting, if 16 collisions are detected */
629 outb(HALT_ON_16, ioaddr + COL_16_REG);
630
631#ifdef MODULE
632 /* if_port already set by init_module() */
633#else
6aa20a22 634 dev->if_port = (dev->mem_start < E_PORT_FROM_EPROM) ?
1da177e4
LT		 635 dev->mem_start : E_PORT_FROM_EPROM;
636#endif
637
638 /* Set interface port type */
639 if(boot) {
640 char *porttype[] = {"BNC", "DIX", "TP", "AUTO", "FROM_EPROM" };
641
642 switch(dev->if_port)
643 {
644
645 case E_PORT_FROM_EPROM:
646 dev->if_port = eth16i_read_eeprom(ioaddr, E_PORT_SELECT);
647 break;
648
649 case E_PORT_AUTO:
650 dev->if_port = eth16i_probe_port(ioaddr);
651 break;
6aa20a22 652
1da177e4
LT		 653 case E_PORT_BNC:
654 case E_PORT_TP:
655 case E_PORT_DIX:
656 break;
657 }
658
659 printk(" %s interface.\n", porttype[dev->if_port]);
660
661 eth16i_set_port(ioaddr, dev->if_port);
662 }
663
664 /* Set Receive Mode to normal operation */
665 outb(MODE_2, ioaddr + RECEIVE_MODE_REG);
666}
667
668static int eth16i_probe_port(int ioaddr)
669{
670 int i;
671 int retcode;
672 unsigned char dummy_packet[64];
673
674 /* Powerup the chip */
675 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
676
677 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
678
679 eth16i_select_regbank(NODE_ID_RB, ioaddr);
680
681 for(i = 0; i < 6; i++) {
682 dummy_packet[i] = inb(ioaddr + NODE_ID_0 + i);
683 dummy_packet[i+6] = inb(ioaddr + NODE_ID_0 + i);
684 }
685
686 dummy_packet[12] = 0x00;
687 dummy_packet[13] = 0x04;
688 memset(dummy_packet + 14, 0, sizeof(dummy_packet) - 14);
689
690 eth16i_select_regbank(2, ioaddr);
691
692 for(i = 0; i < 3; i++) {
693 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
694 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
695 eth16i_set_port(ioaddr, i);
696
697 if(eth16i_debug > 1)
698 printk(KERN_DEBUG "Set port number %d\n", i);
699
700 retcode = eth16i_send_probe_packet(ioaddr, dummy_packet, 64);
701 if(retcode == 0) {
702 retcode = eth16i_receive_probe_packet(ioaddr);
703 if(retcode != -1) {
704 if(eth16i_debug > 1)
705 printk(KERN_DEBUG "Eth16i interface port found at %d\n", i);
706 return i;
707 }
708 }
709 else {
710 if(eth16i_debug > 1)
711 printk(KERN_DEBUG "TRANSMIT_DONE timeout when probing interface port\n");
712 }
713 }
714
715 if( eth16i_debug > 1)
716 printk(KERN_DEBUG "Using default port\n");
717
718 return E_PORT_BNC;
719}
720
721static void eth16i_set_port(int ioaddr, int porttype)
6aa20a22 722{
1da177e4
LT		 723 unsigned short temp = 0;
724
725 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
726 outb(LOOPBACK_CONTROL, ioaddr + TRANSMIT_MODE_REG);
727
728 temp |= DIS_AUTO_PORT_SEL;
729
730 switch(porttype) {
731
732 case E_PORT_BNC :
733 temp |= AUI_SELECT;
734 break;
735
736 case E_PORT_TP :
737 break;
738
739 case E_PORT_DIX :
740 temp |= AUI_SELECT;
741 BITSET(ioaddr + TRANSMIT_MODE_REG, CONTROL_OUTPUT);
742 break;
6aa20a22 743 }
1da177e4
LT		 744
745 outb(temp, ioaddr + TRANSCEIVER_MODE_REG);
746
747 if(eth16i_debug > 1) {
748 printk(KERN_DEBUG "TRANSMIT_MODE_REG = %x\n", inb(ioaddr + TRANSMIT_MODE_REG));
6aa20a22 749 printk(KERN_DEBUG "TRANSCEIVER_MODE_REG = %x\n",
1da177e4
LT		 750 inb(ioaddr+TRANSCEIVER_MODE_REG));
751 }
752}
753
754static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
755{
ff5688ae 756 unsigned long starttime;
1da177e4
LT		 757
758 outb(0xff, ioaddr + TX_STATUS_REG);
759
760 outw(l, ioaddr + DATAPORT);
6aa20a22 761 outsw(ioaddr + DATAPORT, (unsigned short *)b, (l + 1) >> 1);
1da177e4
LT		 762
763 starttime = jiffies;
6aa20a22 764 outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
1da177e4
LT		 765
766 while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
ff5688ae 767 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 768 return -1;
769 }
770 }
771
772 return 0;
773}
774
775static int eth16i_receive_probe_packet(int ioaddr)
776{
ff5688ae 777 unsigned long starttime;
1da177e4
LT		 778
779 starttime = jiffies;
780
781 while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
ff5688ae 782 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 783
784 if(eth16i_debug > 1)
785 printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
786 starttime = jiffies;
787 while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
ff5688ae 788 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 789 if(eth16i_debug > 1)
790 printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
791 return -1;
792 }
793 }
794
795 if(eth16i_debug > 1)
796 printk(KERN_DEBUG "RECEIVE_PACKET\n");
797 return(0); /* Found receive packet */
798 }
799 }
800
801 if(eth16i_debug > 1) {
802 printk(KERN_DEBUG "TRANSMIT_PACKET_RECEIVED %x\n", inb(ioaddr + TX_STATUS_REG));
803 printk(KERN_DEBUG "RX_STATUS_REG = %x\n", inb(ioaddr + RX_STATUS_REG));
804 }
805
806 return(0); /* Return success */
807}
808
809#if 0
810static int eth16i_set_irq(struct net_device* dev)
811{
812 const int ioaddr = dev->base_addr;
813 const int irq = dev->irq;
814 int i = 0;
815
6aa20a22 816 if(ioaddr < 0x1000) {
1da177e4
LT		 817 while(eth16i_irqmap[i] && eth16i_irqmap[i] != irq)
818 i++;
6aa20a22 819
1da177e4
LT		 820 if(i < NUM_OF_ISA_IRQS) {
821 u8 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
822 cbyte = (cbyte & 0x3F) | (i << 6);
823 outb(cbyte, ioaddr + JUMPERLESS_CONFIG);
824 return 0;
825 }
826 }
827 else {
828 printk(KERN_NOTICE "%s: EISA Interrupt cannot be set. Use EISA Configuration utility.\n", dev->name);
829 }
6aa20a22 830
1da177e4
LT		 831 return -1;
832
833}
834#endif
835
836static int __init eth16i_get_irq(int ioaddr)
837{
838 unsigned char cbyte;
839
840 if( ioaddr < 0x1000) {
841 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
842 return( eth16i_irqmap[ ((cbyte & 0xC0) >> 6) ] );
843 } else { /* Oh..the card is EISA so method getting IRQ different */
844 unsigned short index = 0;
845 cbyte = inb(ioaddr + EISA_IRQ_REG);
846 while( (cbyte & 0x01) == 0) {
847 cbyte = cbyte >> 1;
848 index++;
849 }
850 return( eth32i_irqmap[ index ] );
851 }
852}
853
854static int __init eth16i_check_signature(int ioaddr)
855{
856 int i;
857 unsigned char creg[4] = { 0 };
858
859 for(i = 0; i < 4 ; i++) {
860
861 creg[i] = inb(ioaddr + TRANSMIT_MODE_REG + i);
862
863 if(eth16i_debug > 1)
6aa20a22 864 printk("eth16i: read signature byte %x at %x\n",
1da177e4
LT		 865 creg[i],
866 ioaddr + TRANSMIT_MODE_REG + i);
867 }
868
869 creg[0] &= 0x0F; /* Mask collision cnr */
870 creg[2] &= 0x7F; /* Mask DCLEN bit */
871
872#if 0
6aa20a22 873 /*
1da177e4
LT		 874 This was removed because the card was sometimes left to state
875 from which it couldn't be find anymore. If there is need
876 to more strict check still this have to be fixed.
877 */
878 if( ! ((creg[0] == 0x06) && (creg[1] == 0x41)) ) {
879 if(creg[1] != 0x42)
880 return -1;
881 }
882#endif
883
884 if( !((creg[2] == 0x36) && (creg[3] == 0xE0)) ) {
885 creg[2] &= 0x40;
886 creg[3] &= 0x03;
6aa20a22 887
1da177e4
LT		 888 if( !((creg[2] == 0x40) && (creg[3] == 0x00)) )
889 return -1;
890 }
6aa20a22 891
1da177e4
LT		 892 if(eth16i_read_eeprom(ioaddr, E_NODEID_0) != 0)
893 return -1;
6aa20a22 894
1da177e4
LT		 895 if((eth16i_read_eeprom(ioaddr, E_NODEID_1) & 0xFF00) != 0x4B00)
896 return -1;
897
898 return 0;
899}
900
901static int eth16i_read_eeprom(int ioaddr, int offset)
902{
903 int data = 0;
904
905 eth16i_eeprom_cmd(ioaddr, EEPROM_READ | offset);
906 outb(CS_1, ioaddr + EEPROM_CTRL_REG);
907 data = eth16i_read_eeprom_word(ioaddr);
908 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
909
6aa20a22 910 return(data);
1da177e4
LT		 911}
912
913static int eth16i_read_eeprom_word(int ioaddr)
914{
915 int i;
916 int data = 0;
6aa20a22 917
1da177e4
LT		 918 for(i = 16; i > 0; i--) {
919 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
920 eeprom_slow_io();
921 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
922 eeprom_slow_io();
6aa20a22 923 data = (data << 1) |
1da177e4 924 ((inb(ioaddr + EEPROM_DATA_REG) & DI_1) ? 1 : 0);
6aa20a22 925
1da177e4
LT		 926 eeprom_slow_io();
927 }
928
929 return(data);
930}
931
932static void eth16i_eeprom_cmd(int ioaddr, unsigned char command)
933{
934 int i;
935
936 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
937 outb(DI_0, ioaddr + EEPROM_DATA_REG);
938 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
939 outb(DI_1, ioaddr + EEPROM_DATA_REG);
940 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
941
942 for(i = 7; i >= 0; i--) {
943 short cmd = ( (command & (1 << i)) ? DI_1 : DI_0 );
944 outb(cmd, ioaddr + EEPROM_DATA_REG);
945 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
946 eeprom_slow_io();
947 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
948 eeprom_slow_io();
6aa20a22 949 }
1da177e4
LT		 950}
951
952static int eth16i_open(struct net_device *dev)
953{
954 struct eth16i_local *lp = netdev_priv(dev);
955 int ioaddr = dev->base_addr;
6aa20a22 956
1da177e4
LT		 957 /* Powerup the chip */
958 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
959
960 /* Initialize the chip */
6aa20a22 961 eth16i_initialize(dev, 0);
1da177e4
LT		 962
963 /* Set the transmit buffer size */
964 lp->tx_buf_size = eth16i_tx_buf_map[ETH16I_TX_BUF_SIZE & 0x03];
965
966 if(eth16i_debug > 0)
6aa20a22 967 printk(KERN_DEBUG "%s: transmit buffer size %d\n",
1da177e4
LT		 968 dev->name, lp->tx_buf_size);
969
970 /* Now enable Transmitter and Receiver sections */
971 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
972
973 /* Now switch to register bank 2, for run time operation */
974 eth16i_select_regbank(2, ioaddr);
975
976 lp->open_time = jiffies;
977 lp->tx_started = 0;
978 lp->tx_queue = 0;
979 lp->tx_queue_len = 0;
980
981 /* Turn on interrupts*/
6aa20a22 982 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1da177e4
LT		 983
984 netif_start_queue(dev);
985 return 0;
986}
987
988static int eth16i_close(struct net_device *dev)
989{
990 struct eth16i_local *lp = netdev_priv(dev);
991 int ioaddr = dev->base_addr;
992
993 eth16i_reset(dev);
994
995 /* Turn off interrupts*/
6aa20a22 996 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1da177e4
LT		 997
998 netif_stop_queue(dev);
6aa20a22 999
1da177e4
LT		 1000 lp->open_time = 0;
1001
1002 /* Disable transmit and receive */
1003 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
1004
1005 /* Reset the chip */
1006 /* outb(0xff, ioaddr + RESET); */
1007 /* outw(0xffff, ioaddr + TX_STATUS_REG); */
6aa20a22 1008
1da177e4
LT		 1009 outb(0x00, ioaddr + CONFIG_REG_1);
1010
1011 return 0;
1012}
1013
1014static void eth16i_timeout(struct net_device *dev)
1015{
1016 struct eth16i_local *lp = netdev_priv(dev);
1017 int ioaddr = dev->base_addr;
6aa20a22
JG		 1018 /*
1019 If we get here, some higher level has decided that
1020 we are broken. There should really be a "kick me"
1021 function call instead.
1da177e4
LT		 1022 */
1023
1024 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1025 printk(KERN_WARNING "%s: transmit timed out with status %04x, %s ?\n",
1da177e4 1026 dev->name,
6aa20a22 1027 inw(ioaddr + TX_STATUS_REG), (inb(ioaddr + TX_STATUS_REG) & TX_DONE) ?
1da177e4
LT		 1028 "IRQ conflict" : "network cable problem");
1029
1030 dev->trans_start = jiffies;
1031
1032 /* Let's dump all registers */
6aa20a22 1033 if(eth16i_debug > 0) {
1da177e4 1034 printk(KERN_DEBUG "%s: timeout: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
6aa20a22
JG		 1035 dev->name, inb(ioaddr + 0),
1036 inb(ioaddr + 1), inb(ioaddr + 2),
1037 inb(ioaddr + 3), inb(ioaddr + 4),
1da177e4
LT		 1038 inb(ioaddr + 5),
1039 inb(ioaddr + 6), inb(ioaddr + 7));
1040
1041 printk(KERN_DEBUG "%s: transmit start reg: %02x. collision reg %02x\n",
1042 dev->name, inb(ioaddr + TRANSMIT_START_REG),
1043 inb(ioaddr + COL_16_REG));
1044 printk(KERN_DEBUG "lp->tx_queue = %d\n", lp->tx_queue);
1045 printk(KERN_DEBUG "lp->tx_queue_len = %d\n", lp->tx_queue_len);
1046 printk(KERN_DEBUG "lp->tx_started = %d\n", lp->tx_started);
1047 }
09f75cd7 1048 dev->stats.tx_errors++;
1da177e4
LT		 1049 eth16i_reset(dev);
1050 dev->trans_start = jiffies;
1051 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1052 netif_wake_queue(dev);
1053}
1054
61357325 1055static netdev_tx_t eth16i_tx(struct sk_buff *skb, struct net_device *dev)
1da177e4
LT		 1056{
1057 struct eth16i_local *lp = netdev_priv(dev);
1058 int ioaddr = dev->base_addr;
1059 int status = 0;
1060 ushort length = skb->len;
1061 unsigned char *buf;
1062 unsigned long flags;
1063
1064 if (length < ETH_ZLEN) {
5b057c6b 1065 if (skb_padto(skb, ETH_ZLEN))
6ed10654 1066 return NETDEV_TX_OK;
1da177e4
LT		 1067 length = ETH_ZLEN;
1068 }
1069 buf = skb->data;
1070
1071 netif_stop_queue(dev);
6aa20a22 1072
1da177e4
LT		 1073 /* Turn off TX interrupts */
1074 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1075
1da177e4
LT		 1076 /* We would be better doing the disable_irq tricks the 3c509 does,
1077 that would make this suck a lot less */
6aa20a22 1078
1da177e4
LT		 1079 spin_lock_irqsave(&lp->lock, flags);
1080
1081 if( (length + 2) > (lp->tx_buf_size - lp->tx_queue_len)) {
6aa20a22
JG		 1082 if(eth16i_debug > 0)
1083 printk(KERN_WARNING "%s: Transmit buffer full.\n", dev->name);
1084 }
1da177e4
LT		 1085 else {
1086 outw(length, ioaddr + DATAPORT);
1087
6aa20a22 1088 if( ioaddr < 0x1000 )
1da177e4
LT		 1089 outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1);
1090 else {
1091 unsigned char frag = length % 4;
1092 outsl(ioaddr + DATAPORT, buf, length >> 2);
1093 if( frag != 0 ) {
1094 outsw(ioaddr + DATAPORT, (buf + (length & 0xFFFC)), 1);
6aa20a22
JG		 1095 if( frag == 3 )
1096 outsw(ioaddr + DATAPORT,
1da177e4
LT		 1097 (buf + (length & 0xFFFC) + 2), 1);
1098 }
1099 }
1100 lp->tx_buffered_packets++;
1101 lp->tx_buffered_bytes = length;
1102 lp->tx_queue++;
1103 lp->tx_queue_len += length + 2;
1104 }
1105 lp->tx_buf_busy = 0;
1106
1107 if(lp->tx_started == 0) {
1108 /* If the transmitter is idle..always trigger a transmit */
1109 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1110 lp->tx_queue = 0;
1111 lp->tx_queue_len = 0;
1112 dev->trans_start = jiffies;
1113 lp->tx_started = 1;
1114 netif_wake_queue(dev);
1115 }
1116 else if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1117 /* There is still more room for one more packet in tx buffer */
1118 netif_wake_queue(dev);
1119 }
6aa20a22 1120
1da177e4 1121 spin_unlock_irqrestore(&lp->lock, flags);
6aa20a22 1122
1da177e4
LT		 1123 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1124 /* Turn TX interrupts back on */
1125 /* outb(TX_INTR_DONE | TX_INTR_16_COL, ioaddr + TX_INTR_REG); */
1126 status = 0;
1127 dev_kfree_skb(skb);
6ed10654 1128 return NETDEV_TX_OK;
1da177e4
LT		 1129}
1130
1131static void eth16i_rx(struct net_device *dev)
1132{
1da177e4
LT		 1133 int ioaddr = dev->base_addr;
1134 int boguscount = MAX_RX_LOOP;
1135
1136 /* Loop until all packets have been read */
1137 while( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) {
1138
6aa20a22 1139 /* Read status byte from receive buffer */
1da177e4
LT		 1140 ushort status = inw(ioaddr + DATAPORT);
1141
1142 /* Get the size of the packet from receive buffer */
1143 ushort pkt_len = inw(ioaddr + DATAPORT);
1144
1145 if(eth16i_debug > 4)
6aa20a22
JG		 1146 printk(KERN_DEBUG "%s: Receiving packet mode %02x status %04x.\n",
1147 dev->name,
1da177e4 1148 inb(ioaddr + RECEIVE_MODE_REG), status);
6aa20a22 1149
1da177e4 1150 if( !(status & PKT_GOOD) ) {
09f75cd7 1151 dev->stats.rx_errors++;
1da177e4
LT		 1152
1153 if( (pkt_len < ETH_ZLEN) || (pkt_len > ETH_FRAME_LEN) ) {
09f75cd7 1154 dev->stats.rx_length_errors++;
1da177e4 1155 eth16i_reset(dev);
6aa20a22 1156 return;
1da177e4 1157 }
6aa20a22 1158 else {
1da177e4 1159 eth16i_skip_packet(dev);
09f75cd7 1160 dev->stats.rx_dropped++;
6aa20a22 1161 }
1da177e4
LT		 1162 }
1163 else { /* Ok so now we should have a good packet */
1164 struct sk_buff *skb;
1165
1166 skb = dev_alloc_skb(pkt_len + 3);
1167 if( skb == NULL ) {
6aa20a22 1168 printk(KERN_WARNING "%s: Could'n allocate memory for packet (len %d)\n",
1da177e4
LT		 1169 dev->name, pkt_len);
1170 eth16i_skip_packet(dev);
09f75cd7 1171 dev->stats.rx_dropped++;
1da177e4
LT		 1172 break;
1173 }
1174
1da177e4 1175 skb_reserve(skb,2);
6aa20a22
JG		 1176
1177 /*
1da177e4
LT		 1178 Now let's get the packet out of buffer.
1179 size is (pkt_len + 1) >> 1, cause we are now reading words
1180 and it have to be even aligned.
6aa20a22
JG		 1181 */
1182
1183 if(ioaddr < 0x1000)
1184 insw(ioaddr + DATAPORT, skb_put(skb, pkt_len),
1da177e4 1185 (pkt_len + 1) >> 1);
6aa20a22 1186 else {
1da177e4
LT		 1187 unsigned char *buf = skb_put(skb, pkt_len);
1188 unsigned char frag = pkt_len % 4;
1189
1190 insl(ioaddr + DATAPORT, buf, pkt_len >> 2);
1191
1192 if(frag != 0) {
1193 unsigned short rest[2];
1194 rest[0] = inw( ioaddr + DATAPORT );
1195 if(frag == 3)
1196 rest[1] = inw( ioaddr + DATAPORT );
1197
1198 memcpy(buf + (pkt_len & 0xfffc), (char *)rest, frag);
1199 }
1200 }
1201
1202 skb->protocol=eth_type_trans(skb, dev);
1203
1204 if( eth16i_debug > 5 ) {
1205 int i;
6aa20a22 1206 printk(KERN_DEBUG "%s: Received packet of length %d.\n",
1da177e4 1207 dev->name, pkt_len);
6aa20a22 1208 for(i = 0; i < 14; i++)
1da177e4
LT		 1209 printk(KERN_DEBUG " %02x", skb->data[i]);
1210 printk(KERN_DEBUG ".\n");
1211 }
1212 netif_rx(skb);
09f75cd7
JG		 1213 dev->stats.rx_packets++;
1214 dev->stats.rx_bytes += pkt_len;
1da177e4
LT		 1215
1216 } /* else */
1217
1218 if(--boguscount <= 0)
1219 break;
1220
1221 } /* while */
1222}
1223
7d12e780 1224static irqreturn_t eth16i_interrupt(int irq, void *dev_id)
1da177e4
LT		 1225{
1226 struct net_device *dev = dev_id;
1227 struct eth16i_local *lp;
1228 int ioaddr = 0, status;
1229 int handled = 0;
1230
1231 ioaddr = dev->base_addr;
1232 lp = netdev_priv(dev);
1233
1234 /* Turn off all interrupts from adapter */
1235 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1236
1237 /* eth16i_tx won't be called */
1238 spin_lock(&lp->lock);
1239
1240 status = inw(ioaddr + TX_STATUS_REG); /* Get the status */
1241 outw(status, ioaddr + TX_STATUS_REG); /* Clear status bits */
1242
1243 if (status)
1244 handled = 1;
1245
1246 if(eth16i_debug > 3)
1247 printk(KERN_DEBUG "%s: Interrupt with status %04x.\n", dev->name, status);
1248
1249 if( status & 0x7f00 ) {
1250
09f75cd7 1251 dev->stats.rx_errors++;
1da177e4 1252
6aa20a22 1253 if(status & (BUS_RD_ERR << 8) )
1da177e4 1254 printk(KERN_WARNING "%s: Bus read error.\n",dev->name);
09f75cd7
JG		 1255 if(status & (SHORT_PKT_ERR << 8) ) dev->stats.rx_length_errors++;
1256 if(status & (ALIGN_ERR << 8) ) dev->stats.rx_frame_errors++;
1257 if(status & (CRC_ERR << 8) ) dev->stats.rx_crc_errors++;
1258 if(status & (RX_BUF_OVERFLOW << 8) ) dev->stats.rx_over_errors++;
1da177e4
LT		 1259 }
1260 if( status & 0x001a) {
1261
09f75cd7 1262 dev->stats.tx_errors++;
1da177e4 1263
09f75cd7
JG		 1264 if(status & CR_LOST) dev->stats.tx_carrier_errors++;
1265 if(status & TX_JABBER_ERR) dev->stats.tx_window_errors++;
1da177e4 1266
6aa20a22 1267#if 0
1da177e4 1268 if(status & COLLISION) {
09f75cd7 1269 dev->stats.collisions +=
1da177e4
LT		 1270 ((inb(ioaddr+TRANSMIT_MODE_REG) & 0xF0) >> 4);
1271 }
1272#endif
1273 if(status & COLLISIONS_16) {
6aa20a22 1274 if(lp->col_16 < MAX_COL_16) {
1da177e4 1275 lp->col_16++;
09f75cd7 1276 dev->stats.collisions++;
1da177e4
LT		 1277 /* Resume transmitting, skip failed packet */
1278 outb(0x02, ioaddr + COL_16_REG);
1279 }
1280 else {
1281 printk(KERN_WARNING "%s: bailing out due to many consecutive 16-in-a-row collisions. Network cable problem?\n", dev->name);
1282 }
1283 }
1284 }
1285
1286 if( status & 0x00ff ) { /* Let's check the transmit status reg */
1287
1288 if(status & TX_DONE) { /* The transmit has been done */
09f75cd7
JG		 1289 dev->stats.tx_packets = lp->tx_buffered_packets;
1290 dev->stats.tx_bytes += lp->tx_buffered_bytes;
6aa20a22 1291 lp->col_16 = 0;
1da177e4
LT		 1292
1293 if(lp->tx_queue) { /* Is there still packets ? */
1294 /* There was packet(s) so start transmitting and write also
1295 how many packets there is to be sended */
1296 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1297 lp->tx_queue = 0;
1298 lp->tx_queue_len = 0;
1299 lp->tx_started = 1;
1300 }
1301 else {
1302 lp->tx_started = 0;
1303 }
1304 netif_wake_queue(dev);
1305 }
1306 }
1307
6aa20a22 1308 if( ( status & 0x8000 ) ||
1da177e4
LT		 1309 ( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) ) {
1310 eth16i_rx(dev); /* We have packet in receive buffer */
6aa20a22
JG		 1311 }
1312
1da177e4
LT		 1313 /* Turn interrupts back on */
1314 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
6aa20a22 1315
1da177e4
LT		 1316 if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1317 /* There is still more room for one more packet in tx buffer */
1318 netif_wake_queue(dev);
1319 }
6aa20a22 1320
1da177e4 1321 spin_unlock(&lp->lock);
6aa20a22 1322
1da177e4
LT		 1323 return IRQ_RETVAL(handled);
1324}
1325
1326static void eth16i_skip_packet(struct net_device *dev)
6aa20a22 1327{
1da177e4
LT		 1328 int ioaddr = dev->base_addr;
1329
1330 inw(ioaddr + DATAPORT);
1331 inw(ioaddr + DATAPORT);
1332 inw(ioaddr + DATAPORT);
1333
1334 outb(SKIP_RX_PACKET, ioaddr + FILTER_SELF_RX_REG);
1335 while( inb( ioaddr + FILTER_SELF_RX_REG ) != 0);
1336}
1337
1338static void eth16i_reset(struct net_device *dev)
1339{
1340 struct eth16i_local *lp = netdev_priv(dev);
1341 int ioaddr = dev->base_addr;
1342
6aa20a22 1343 if(eth16i_debug > 1)
1da177e4
LT		 1344 printk(KERN_DEBUG "%s: Resetting device.\n", dev->name);
1345
1346 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
6aa20a22 1347 outw(0xffff, ioaddr + TX_STATUS_REG);
1da177e4
LT		 1348 eth16i_select_regbank(2, ioaddr);
1349
1350 lp->tx_started = 0;
1351 lp->tx_buf_busy = 0;
1352 lp->tx_queue = 0;
6aa20a22 1353 lp->tx_queue_len = 0;
1da177e4
LT		 1354 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
1355}
1356
1357static void eth16i_multicast(struct net_device *dev)
1358{
1359 int ioaddr = dev->base_addr;
6aa20a22 1360
4cd24eaf 1361 if (!netdev_mc_empty(dev) || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
1da177e4 1362 {
6aa20a22 1363 outb(3, ioaddr + RECEIVE_MODE_REG);
1da177e4
LT		 1364 } else {
1365 outb(2, ioaddr + RECEIVE_MODE_REG);
1366 }
1367}
1368
1da177e4
LT		 1369static void eth16i_select_regbank(unsigned char banknbr, int ioaddr)
1370{
1371 unsigned char data;
1372
1373 data = inb(ioaddr + CONFIG_REG_1);
6aa20a22 1374 outb( ((data & 0xF3) | ( (banknbr & 0x03) << 2)), ioaddr + CONFIG_REG_1);
1da177e4
LT		 1375}
1376
1377#ifdef MODULE
1378
1379static ushort eth16i_parse_mediatype(const char* s)
1380{
1381 if(!s)
1382 return E_PORT_FROM_EPROM;
6aa20a22 1383
1da177e4
LT		 1384 if (!strncmp(s, "bnc", 3))
1385 return E_PORT_BNC;
1386 else if (!strncmp(s, "tp", 2))
1387 return E_PORT_TP;
1388 else if (!strncmp(s, "dix", 3))
1389 return E_PORT_DIX;
1390 else if (!strncmp(s, "auto", 4))
1391 return E_PORT_AUTO;
1392 else
1393 return E_PORT_FROM_EPROM;
1394}
1395
1396#define MAX_ETH16I_CARDS 4 /* Max number of Eth16i cards per module */
1397
1398static struct net_device *dev_eth16i[MAX_ETH16I_CARDS];
1399static int io[MAX_ETH16I_CARDS];
1400#if 0
1401static int irq[MAX_ETH16I_CARDS];
1402#endif
1403static char* mediatype[MAX_ETH16I_CARDS];
1404static int debug = -1;
1405
1406MODULE_AUTHOR("Mika Kuoppala <miku@iki.fi>");
1407MODULE_DESCRIPTION("ICL EtherTeam 16i/32 driver");
1408MODULE_LICENSE("GPL");
1409
1410
1411module_param_array(io, int, NULL, 0);
1412MODULE_PARM_DESC(io, "eth16i I/O base address(es)");
1413
1414#if 0
1415module_param_array(irq, int, NULL, 0);
1416MODULE_PARM_DESC(irq, "eth16i interrupt request number");
1417#endif
1418
1419module_param_array(mediatype, charp, NULL, 0);
1420MODULE_PARM_DESC(mediatype, "eth16i media type of interface(s) (bnc,tp,dix,auto,eprom)");
1421
1422module_param(debug, int, 0);
1423MODULE_PARM_DESC(debug, "eth16i debug level (0-6)");
1424
58f149fc 1425int __init init_module(void)
1da177e4
LT		 1426{
1427 int this_dev, found = 0;
1428 struct net_device *dev;
1429
1430 for (this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1431 dev = alloc_etherdev(sizeof(struct eth16i_local));
1432 if (!dev)
1433 break;
1434
1435 dev->base_addr = io[this_dev];
1436
1437 if(debug != -1)
1438 eth16i_debug = debug;
1439
1440 if(eth16i_debug > 1)
1441 printk(KERN_NOTICE "eth16i(%d): interface type %s\n", this_dev, mediatype[this_dev] ? mediatype[this_dev] : "none" );
1442
1443 dev->if_port = eth16i_parse_mediatype(mediatype[this_dev]);
1444
1445 if(io[this_dev] == 0) {
1446 if(this_dev != 0) /* Only autoprobe 1st one */
1447 break;
1448
1449 printk(KERN_NOTICE "eth16i.c: Presently autoprobing (not recommended) for a single card.\n");
1450 }
1451
1452 if (do_eth16i_probe(dev) == 0) {
b1fc5505 1453 dev_eth16i[found++] = dev;
1454 continue;
1da177e4
LT		 1455 }
1456 printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n",
1457 io[this_dev]);
1458 free_netdev(dev);
1459 break;
1460 }
1461 if (found)
1462 return 0;
1463 return -ENXIO;
1464}
6aa20a22 1465
afc8eb46 1466void __exit cleanup_module(void)
1da177e4
LT		 1467{
1468 int this_dev;
1469
1470 for(this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1471 struct net_device *dev = dev_eth16i[this_dev];
6aa20a22 1472
4cf1653a 1473 if (netdev_priv(dev)) {
1da177e4
LT		 1474 unregister_netdev(dev);
1475 free_irq(dev->irq, dev);
1476 release_region(dev->base_addr, ETH16I_IO_EXTENT);
1477 free_netdev(dev);
1478 }
1479 }
1480}
1481#endif /* MODULE */
Linux 6.x block layer and io_uring tree(s)