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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[linux-block.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94
SP		 1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
29module_param(rx_frag_size, uint, S_IRUGO);
30MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
31
6b7c5b94 32static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374
AK		 33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
34 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
6b7c5b94
SP		 36 { 0 }
37};
38MODULE_DEVICE_TABLE(pci, be_dev_ids);
39
40static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
41{
42 struct be_dma_mem *mem = &q->dma_mem;
43 if (mem->va)
44 pci_free_consistent(adapter->pdev, mem->size,
45 mem->va, mem->dma);
46}
47
48static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
49 u16 len, u16 entry_size)
50{
51 struct be_dma_mem *mem = &q->dma_mem;
52
53 memset(q, 0, sizeof(*q));
54 q->len = len;
55 q->entry_size = entry_size;
56 mem->size = len * entry_size;
57 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
58 if (!mem->va)
59 return -1;
60 memset(mem->va, 0, mem->size);
61 return 0;
62}
63
8788fdc2 64static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 65{
8788fdc2 66 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 67 u32 reg = ioread32(addr);
68 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e
SP		 69
70 if (!enabled && enable)
6b7c5b94 71 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 72 else if (enabled && !enable)
6b7c5b94 73 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 74 else
6b7c5b94 75 return;
5f0b849e 76
6b7c5b94
SP		 77 iowrite32(reg, addr);
78}
79
8788fdc2 80static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 81{
82 u32 val = 0;
83 val |= qid & DB_RQ_RING_ID_MASK;
84 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
8788fdc2 85 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 86}
87
8788fdc2 88static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 89{
90 u32 val = 0;
91 val |= qid & DB_TXULP_RING_ID_MASK;
92 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
8788fdc2 93 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 94}
95
8788fdc2 96static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 97 bool arm, bool clear_int, u16 num_popped)
98{
99 u32 val = 0;
100 val |= qid & DB_EQ_RING_ID_MASK;
101 if (arm)
102 val |= 1 << DB_EQ_REARM_SHIFT;
103 if (clear_int)
104 val |= 1 << DB_EQ_CLR_SHIFT;
105 val |= 1 << DB_EQ_EVNT_SHIFT;
106 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 107 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 108}
109
8788fdc2 110void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 111{
112 u32 val = 0;
113 val |= qid & DB_CQ_RING_ID_MASK;
114 if (arm)
115 val |= 1 << DB_CQ_REARM_SHIFT;
116 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 117 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 118}
119
6b7c5b94
SP		 120static int be_mac_addr_set(struct net_device *netdev, void *p)
121{
122 struct be_adapter *adapter = netdev_priv(netdev);
123 struct sockaddr *addr = p;
124 int status = 0;
125
a65027e4
SP		 126 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
127 if (status)
128 return status;
6b7c5b94 129
a65027e4
SP		 130 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
131 adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 132 if (!status)
133 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
134
135 return status;
136}
137
b31c50a7 138void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 139{
140 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
141 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
142 struct be_port_rxf_stats *port_stats =
143 &rxf_stats->port[adapter->port_num];
144 struct net_device_stats *dev_stats = &adapter->stats.net_stats;
68110868 145 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94
SP		 146
147 dev_stats->rx_packets = port_stats->rx_total_frames;
148 dev_stats->tx_packets = port_stats->tx_unicastframes +
149 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
150 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
151 (u64) port_stats->rx_bytes_lsd;
152 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
153 (u64) port_stats->tx_bytes_lsd;
154
155 /* bad pkts received */
156 dev_stats->rx_errors = port_stats->rx_crc_errors +
157 port_stats->rx_alignment_symbol_errors +
158 port_stats->rx_in_range_errors +
68110868
SP		 159 port_stats->rx_out_range_errors +
160 port_stats->rx_frame_too_long +
161 port_stats->rx_dropped_too_small +
162 port_stats->rx_dropped_too_short +
163 port_stats->rx_dropped_header_too_small +
164 port_stats->rx_dropped_tcp_length +
165 port_stats->rx_dropped_runt +
166 port_stats->rx_tcp_checksum_errs +
167 port_stats->rx_ip_checksum_errs +
168 port_stats->rx_udp_checksum_errs;
169
170 /* no space in linux buffers: best possible approximation */
171 dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
6b7c5b94
SP		 172
173 /* detailed rx errors */
174 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 175 port_stats->rx_out_range_errors +
176 port_stats->rx_frame_too_long;
177
6b7c5b94
SP		 178 /* receive ring buffer overflow */
179 dev_stats->rx_over_errors = 0;
68110868 180
6b7c5b94
SP		 181 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
182
183 /* frame alignment errors */
184 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 185
6b7c5b94
SP		 186 /* receiver fifo overrun */
187 /* drops_no_pbuf is no per i/f, it's per BE card */
188 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
189 port_stats->rx_input_fifo_overflow +
190 rxf_stats->rx_drops_no_pbuf;
191 /* receiver missed packetd */
192 dev_stats->rx_missed_errors = 0;
68110868
SP		 193
194 /* packet transmit problems */
195 dev_stats->tx_errors = 0;
196
197 /* no space available in linux */
198 dev_stats->tx_dropped = 0;
199
200 dev_stats->multicast = port_stats->tx_multicastframes;
201 dev_stats->collisions = 0;
202
6b7c5b94
SP		 203 /* detailed tx_errors */
204 dev_stats->tx_aborted_errors = 0;
205 dev_stats->tx_carrier_errors = 0;
206 dev_stats->tx_fifo_errors = 0;
207 dev_stats->tx_heartbeat_errors = 0;
208 dev_stats->tx_window_errors = 0;
209}
210
8788fdc2 211void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 212{
6b7c5b94
SP		 213 struct net_device *netdev = adapter->netdev;
214
6b7c5b94 215 /* If link came up or went down */
a8f447bd
SP		 216 if (adapter->link_up != link_up) {
217 if (link_up) {
6b7c5b94
SP		 218 netif_start_queue(netdev);
219 netif_carrier_on(netdev);
220 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 221 } else {
222 netif_stop_queue(netdev);
223 netif_carrier_off(netdev);
224 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 225 }
a8f447bd 226 adapter->link_up = link_up;
6b7c5b94 227 }
6b7c5b94
SP		 228}
229
230/* Update the EQ delay n BE based on the RX frags consumed / sec */
231static void be_rx_eqd_update(struct be_adapter *adapter)
232{
6b7c5b94
SP		 233 struct be_eq_obj *rx_eq = &adapter->rx_eq;
234 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 235 ulong now = jiffies;
236 u32 eqd;
237
238 if (!rx_eq->enable_aic)
239 return;
240
241 /* Wrapped around */
242 if (time_before(now, stats->rx_fps_jiffies)) {
243 stats->rx_fps_jiffies = now;
244 return;
245 }
6b7c5b94
SP		 246
247 /* Update once a second */
4097f663 248 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 249 return;
250
251 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 252 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 253
4097f663 254 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 255 stats->be_prev_rx_frags = stats->be_rx_frags;
256 eqd = stats->be_rx_fps / 110000;
257 eqd = eqd << 3;
258 if (eqd > rx_eq->max_eqd)
259 eqd = rx_eq->max_eqd;
260 if (eqd < rx_eq->min_eqd)
261 eqd = rx_eq->min_eqd;
262 if (eqd < 10)
263 eqd = 0;
264 if (eqd != rx_eq->cur_eqd)
8788fdc2 265 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 266
267 rx_eq->cur_eqd = eqd;
268}
269
6b7c5b94
SP		 270static struct net_device_stats *be_get_stats(struct net_device *dev)
271{
272 struct be_adapter *adapter = netdev_priv(dev);
273
274 return &adapter->stats.net_stats;
275}
276
65f71b8b
SH		 277static u32 be_calc_rate(u64 bytes, unsigned long ticks)
278{
279 u64 rate = bytes;
280
281 do_div(rate, ticks / HZ);
282 rate <<= 3; /* bytes/sec -> bits/sec */
283 do_div(rate, 1000000ul); /* MB/Sec */
284
285 return rate;
286}
287
4097f663
SP		 288static void be_tx_rate_update(struct be_adapter *adapter)
289{
290 struct be_drvr_stats *stats = drvr_stats(adapter);
291 ulong now = jiffies;
292
293 /* Wrapped around? */
294 if (time_before(now, stats->be_tx_jiffies)) {
295 stats->be_tx_jiffies = now;
296 return;
297 }
298
299 /* Update tx rate once in two seconds */
300 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 301 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
302 - stats->be_tx_bytes_prev,
303 now - stats->be_tx_jiffies);
4097f663
SP		 304 stats->be_tx_jiffies = now;
305 stats->be_tx_bytes_prev = stats->be_tx_bytes;
306 }
307}
308
6b7c5b94
SP		 309static void be_tx_stats_update(struct be_adapter *adapter,
310 u32 wrb_cnt, u32 copied, bool stopped)
311{
4097f663 312 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 313 stats->be_tx_reqs++;
314 stats->be_tx_wrbs += wrb_cnt;
315 stats->be_tx_bytes += copied;
316 if (stopped)
317 stats->be_tx_stops++;
6b7c5b94
SP		 318}
319
320/* Determine number of WRB entries needed to xmit data in an skb */
321static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
322{
ebc8d2ab
DM		 323 int cnt = (skb->len > skb->data_len);
324
325 cnt += skb_shinfo(skb)->nr_frags;
326
6b7c5b94
SP		 327 /* to account for hdr wrb */
328 cnt++;
329 if (cnt & 1) {
330 /* add a dummy to make it an even num */
331 cnt++;
332 *dummy = true;
333 } else
334 *dummy = false;
335 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
336 return cnt;
337}
338
339static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
340{
341 wrb->frag_pa_hi = upper_32_bits(addr);
342 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
343 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
344}
345
346static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
347 bool vlan, u32 wrb_cnt, u32 len)
348{
349 memset(hdr, 0, sizeof(*hdr));
350
351 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
352
353 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
354 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
355 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
356 hdr, skb_shinfo(skb)->gso_size);
357 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
358 if (is_tcp_pkt(skb))
359 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
360 else if (is_udp_pkt(skb))
361 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
362 }
363
364 if (vlan && vlan_tx_tag_present(skb)) {
365 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
366 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
367 hdr, vlan_tx_tag_get(skb));
368 }
369
370 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
371 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
372 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
373 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
374}
375
376
377static int make_tx_wrbs(struct be_adapter *adapter,
378 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
379{
380 u64 busaddr;
381 u32 i, copied = 0;
382 struct pci_dev *pdev = adapter->pdev;
383 struct sk_buff *first_skb = skb;
384 struct be_queue_info *txq = &adapter->tx_obj.q;
385 struct be_eth_wrb *wrb;
386 struct be_eth_hdr_wrb *hdr;
387
6b7c5b94 388 hdr = queue_head_node(txq);
c190e3c8 389 atomic_add(wrb_cnt, &txq->used);
6b7c5b94
SP		 390 queue_head_inc(txq);
391
c190e3c8
AK		 392 if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
393 dev_err(&pdev->dev, "TX DMA mapping failed\n");
394 return 0;
395 }
396
ebc8d2ab
DM		 397 if (skb->len > skb->data_len) {
398 int len = skb->len - skb->data_len;
ebc8d2ab 399 wrb = queue_head_node(txq);
c190e3c8 400 busaddr = skb_shinfo(skb)->dma_head;
ebc8d2ab
DM		 401 wrb_fill(wrb, busaddr, len);
402 be_dws_cpu_to_le(wrb, sizeof(*wrb));
403 queue_head_inc(txq);
404 copied += len;
405 }
6b7c5b94 406
ebc8d2ab
DM		 407 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
408 struct skb_frag_struct *frag =
409 &skb_shinfo(skb)->frags[i];
c190e3c8
AK		 410
411 busaddr = skb_shinfo(skb)->dma_maps[i];
ebc8d2ab
DM		 412 wrb = queue_head_node(txq);
413 wrb_fill(wrb, busaddr, frag->size);
414 be_dws_cpu_to_le(wrb, sizeof(*wrb));
415 queue_head_inc(txq);
416 copied += frag->size;
6b7c5b94
SP		 417 }
418
419 if (dummy_wrb) {
420 wrb = queue_head_node(txq);
421 wrb_fill(wrb, 0, 0);
422 be_dws_cpu_to_le(wrb, sizeof(*wrb));
423 queue_head_inc(txq);
424 }
425
426 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
427 wrb_cnt, copied);
428 be_dws_cpu_to_le(hdr, sizeof(*hdr));
429
430 return copied;
431}
432
61357325 433static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 434 struct net_device *netdev)
6b7c5b94
SP		 435{
436 struct be_adapter *adapter = netdev_priv(netdev);
437 struct be_tx_obj *tx_obj = &adapter->tx_obj;
438 struct be_queue_info *txq = &tx_obj->q;
439 u32 wrb_cnt = 0, copied = 0;
440 u32 start = txq->head;
441 bool dummy_wrb, stopped = false;
442
443 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
444
445 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 446 if (copied) {
447 /* record the sent skb in the sent_skb table */
448 BUG_ON(tx_obj->sent_skb_list[start]);
449 tx_obj->sent_skb_list[start] = skb;
450
451 /* Ensure txq has space for the next skb; Else stop the queue
452 * *BEFORE* ringing the tx doorbell, so that we serialze the
453 * tx compls of the current transmit which'll wake up the queue
454 */
455 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
456 txq->len) {
457 netif_stop_queue(netdev);
458 stopped = true;
459 }
6b7c5b94 460
c190e3c8 461 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 462
c190e3c8
AK		 463 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
464 } else {
465 txq->head = start;
466 dev_kfree_skb_any(skb);
6b7c5b94 467 }
6b7c5b94
SP		 468 return NETDEV_TX_OK;
469}
470
471static int be_change_mtu(struct net_device *netdev, int new_mtu)
472{
473 struct be_adapter *adapter = netdev_priv(netdev);
474 if (new_mtu < BE_MIN_MTU ||
475 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
476 dev_info(&adapter->pdev->dev,
477 "MTU must be between %d and %d bytes\n",
478 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
479 return -EINVAL;
480 }
481 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
482 netdev->mtu, new_mtu);
483 netdev->mtu = new_mtu;
484 return 0;
485}
486
487/*
488 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
489 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
490 * set the BE in promiscuous VLAN mode.
491 */
b31c50a7 492static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 493{
6b7c5b94
SP		 494 u16 vtag[BE_NUM_VLANS_SUPPORTED];
495 u16 ntags = 0, i;
b31c50a7 496 int status;
6b7c5b94
SP		 497
498 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
499 /* Construct VLAN Table to give to HW */
500 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
501 if (adapter->vlan_tag[i]) {
502 vtag[ntags] = cpu_to_le16(i);
503 ntags++;
504 }
505 }
b31c50a7
SP		 506 status = be_cmd_vlan_config(adapter, adapter->if_handle,
507 vtag, ntags, 1, 0);
6b7c5b94 508 } else {
b31c50a7
SP		 509 status = be_cmd_vlan_config(adapter, adapter->if_handle,
510 NULL, 0, 1, 1);
6b7c5b94 511 }
b31c50a7 512 return status;
6b7c5b94
SP		 513}
514
515static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
516{
517 struct be_adapter *adapter = netdev_priv(netdev);
518 struct be_eq_obj *rx_eq = &adapter->rx_eq;
519 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 520
8788fdc2
SP		 521 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
522 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 523 adapter->vlan_grp = grp;
8788fdc2
SP		 524 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
525 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 526}
527
528static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
529{
530 struct be_adapter *adapter = netdev_priv(netdev);
531
532 adapter->num_vlans++;
533 adapter->vlan_tag[vid] = 1;
534
b31c50a7 535 be_vid_config(adapter);
6b7c5b94
SP		 536}
537
538static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
539{
540 struct be_adapter *adapter = netdev_priv(netdev);
541
542 adapter->num_vlans--;
543 adapter->vlan_tag[vid] = 0;
544
545 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
b31c50a7 546 be_vid_config(adapter);
6b7c5b94
SP		 547}
548
24307eef 549static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 550{
551 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 552
24307eef 553 if (netdev->flags & IFF_PROMISC) {
8788fdc2 554 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 555 adapter->promiscuous = true;
556 goto done;
6b7c5b94
SP		 557 }
558
24307eef
SP		 559 /* BE was previously in promiscous mode; disable it */
560 if (adapter->promiscuous) {
561 adapter->promiscuous = false;
8788fdc2 562 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 563 }
564
24307eef 565 if (netdev->flags & IFF_ALLMULTI) {
8788fdc2 566 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0);
24307eef 567 goto done;
6b7c5b94 568 }
6b7c5b94 569
8788fdc2 570 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
24307eef
SP		 571 netdev->mc_count);
572done:
573 return;
6b7c5b94
SP		 574}
575
4097f663 576static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 577{
4097f663
SP		 578 struct be_drvr_stats *stats = drvr_stats(adapter);
579 ulong now = jiffies;
6b7c5b94 580
4097f663
SP		 581 /* Wrapped around */
582 if (time_before(now, stats->be_rx_jiffies)) {
583 stats->be_rx_jiffies = now;
584 return;
585 }
6b7c5b94
SP		 586
587 /* Update the rate once in two seconds */
4097f663 588 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 589 return;
590
65f71b8b
SH		 591 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
592 - stats->be_rx_bytes_prev,
593 now - stats->be_rx_jiffies);
4097f663 594 stats->be_rx_jiffies = now;
6b7c5b94
SP		 595 stats->be_rx_bytes_prev = stats->be_rx_bytes;
596}
597
4097f663
SP		 598static void be_rx_stats_update(struct be_adapter *adapter,
599 u32 pktsize, u16 numfrags)
600{
601 struct be_drvr_stats *stats = drvr_stats(adapter);
602
603 stats->be_rx_compl++;
604 stats->be_rx_frags += numfrags;
605 stats->be_rx_bytes += pktsize;
606}
607
728a9972
AK		 608static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
609{
610 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
611
612 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
613 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
614 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
615 if (ip_version) {
616 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
617 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
618 }
619 ipv6_chk = (ip_version && (tcpf || udpf));
620
621 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
622}
623
6b7c5b94
SP		 624static struct be_rx_page_info *
625get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
626{
627 struct be_rx_page_info *rx_page_info;
628 struct be_queue_info *rxq = &adapter->rx_obj.q;
629
630 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
631 BUG_ON(!rx_page_info->page);
632
633 if (rx_page_info->last_page_user)
634 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
635 adapter->big_page_size, PCI_DMA_FROMDEVICE);
636
637 atomic_dec(&rxq->used);
638 return rx_page_info;
639}
640
641/* Throwaway the data in the Rx completion */
642static void be_rx_compl_discard(struct be_adapter *adapter,
643 struct be_eth_rx_compl *rxcp)
644{
645 struct be_queue_info *rxq = &adapter->rx_obj.q;
646 struct be_rx_page_info *page_info;
647 u16 rxq_idx, i, num_rcvd;
648
649 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
650 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
651
652 for (i = 0; i < num_rcvd; i++) {
653 page_info = get_rx_page_info(adapter, rxq_idx);
654 put_page(page_info->page);
655 memset(page_info, 0, sizeof(*page_info));
656 index_inc(&rxq_idx, rxq->len);
657 }
658}
659
660/*
661 * skb_fill_rx_data forms a complete skb for an ether frame
662 * indicated by rxcp.
663 */
664static void skb_fill_rx_data(struct be_adapter *adapter,
665 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
666{
667 struct be_queue_info *rxq = &adapter->rx_obj.q;
668 struct be_rx_page_info *page_info;
bd46cb6c 669 u16 rxq_idx, i, num_rcvd, j;
fa77406a 670 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94
SP		 671 u8 *start;
672
673 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
674 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
675 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
676
677 page_info = get_rx_page_info(adapter, rxq_idx);
678
679 start = page_address(page_info->page) + page_info->page_offset;
680 prefetch(start);
681
682 /* Copy data in the first descriptor of this completion */
683 curr_frag_len = min(pktsize, rx_frag_size);
684
685 /* Copy the header portion into skb_data */
686 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
687 memcpy(skb->data, start, hdr_len);
688 skb->len = curr_frag_len;
689 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
690 /* Complete packet has now been moved to data */
691 put_page(page_info->page);
692 skb->data_len = 0;
693 skb->tail += curr_frag_len;
694 } else {
695 skb_shinfo(skb)->nr_frags = 1;
696 skb_shinfo(skb)->frags[0].page = page_info->page;
697 skb_shinfo(skb)->frags[0].page_offset =
698 page_info->page_offset + hdr_len;
699 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
700 skb->data_len = curr_frag_len - hdr_len;
701 skb->tail += hdr_len;
702 }
703 memset(page_info, 0, sizeof(*page_info));
704
705 if (pktsize <= rx_frag_size) {
706 BUG_ON(num_rcvd != 1);
76fbb429 707 goto done;
6b7c5b94
SP		 708 }
709
710 /* More frags present for this completion */
fa77406a 711 size = pktsize;
bd46cb6c 712 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 713 size -= curr_frag_len;
6b7c5b94
SP		 714 index_inc(&rxq_idx, rxq->len);
715 page_info = get_rx_page_info(adapter, rxq_idx);
716
fa77406a 717 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 718
bd46cb6c
AK		 719 /* Coalesce all frags from the same physical page in one slot */
720 if (page_info->page_offset == 0) {
721 /* Fresh page */
722 j++;
723 skb_shinfo(skb)->frags[j].page = page_info->page;
724 skb_shinfo(skb)->frags[j].page_offset =
725 page_info->page_offset;
726 skb_shinfo(skb)->frags[j].size = 0;
727 skb_shinfo(skb)->nr_frags++;
728 } else {
729 put_page(page_info->page);
730 }
731
732 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 733 skb->len += curr_frag_len;
734 skb->data_len += curr_frag_len;
6b7c5b94
SP		 735
736 memset(page_info, 0, sizeof(*page_info));
737 }
bd46cb6c 738 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 739
76fbb429 740done:
4097f663 741 be_rx_stats_update(adapter, pktsize, num_rcvd);
6b7c5b94
SP		 742 return;
743}
744
5be93b9a 745/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 746static void be_rx_compl_process(struct be_adapter *adapter,
747 struct be_eth_rx_compl *rxcp)
748{
749 struct sk_buff *skb;
750 u32 vtp, vid;
6b7c5b94 751
6b7c5b94
SP		 752 vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
753
754 skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
755 if (!skb) {
756 if (net_ratelimit())
757 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
758 be_rx_compl_discard(adapter, rxcp);
759 return;
760 }
761
762 skb_reserve(skb, NET_IP_ALIGN);
763
764 skb_fill_rx_data(adapter, skb, rxcp);
765
728a9972 766 if (do_pkt_csum(rxcp, adapter->rx_csum))
6b7c5b94 767 skb->ip_summed = CHECKSUM_NONE;
728a9972
AK		 768 else
769 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 770
771 skb->truesize = skb->len + sizeof(struct sk_buff);
772 skb->protocol = eth_type_trans(skb, adapter->netdev);
773 skb->dev = adapter->netdev;
774
775 if (vtp) {
776 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
777 kfree_skb(skb);
778 return;
779 }
780 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
781 vid = be16_to_cpu(vid);
782 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
783 } else {
784 netif_receive_skb(skb);
785 }
786
6b7c5b94
SP		 787 return;
788}
789
5be93b9a
AK		 790/* Process the RX completion indicated by rxcp when GRO is enabled */
791static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 792 struct be_eth_rx_compl *rxcp)
793{
794 struct be_rx_page_info *page_info;
5be93b9a 795 struct sk_buff *skb = NULL;
6b7c5b94 796 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 797 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 798 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 799 u16 i, rxq_idx = 0, vid, j;
6b7c5b94
SP		 800
801 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
802 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
803 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
804 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
805
5be93b9a
AK		 806 skb = napi_get_frags(&eq_obj->napi);
807 if (!skb) {
808 be_rx_compl_discard(adapter, rxcp);
809 return;
810 }
811
6b7c5b94 812 remaining = pkt_size;
bd46cb6c 813 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 814 page_info = get_rx_page_info(adapter, rxq_idx);
815
816 curr_frag_len = min(remaining, rx_frag_size);
817
bd46cb6c
AK		 818 /* Coalesce all frags from the same physical page in one slot */
819 if (i == 0 || page_info->page_offset == 0) {
820 /* First frag or Fresh page */
821 j++;
5be93b9a
AK		 822 skb_shinfo(skb)->frags[j].page = page_info->page;
823 skb_shinfo(skb)->frags[j].page_offset =
824 page_info->page_offset;
825 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 826 } else {
827 put_page(page_info->page);
828 }
5be93b9a 829 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 830
bd46cb6c 831 remaining -= curr_frag_len;
6b7c5b94 832 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 833 memset(page_info, 0, sizeof(*page_info));
834 }
bd46cb6c 835 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 836
5be93b9a
AK		 837 skb_shinfo(skb)->nr_frags = j + 1;
838 skb->len = pkt_size;
839 skb->data_len = pkt_size;
840 skb->truesize += pkt_size;
841 skb->ip_summed = CHECKSUM_UNNECESSARY;
842
6b7c5b94 843 if (likely(!vlanf)) {
5be93b9a 844 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 845 } else {
846 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
847 vid = be16_to_cpu(vid);
848
849 if (!adapter->vlan_grp || adapter->num_vlans == 0)
850 return;
851
5be93b9a 852 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 853 }
854
4097f663 855 be_rx_stats_update(adapter, pkt_size, num_rcvd);
6b7c5b94
SP		 856 return;
857}
858
859static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
860{
861 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
862
863 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
864 return NULL;
865
866 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
867
6b7c5b94
SP		 868 queue_tail_inc(&adapter->rx_obj.cq);
869 return rxcp;
870}
871
a7a0ef31
SP		 872/* To reset the valid bit, we need to reset the whole word as
873 * when walking the queue the valid entries are little-endian
874 * and invalid entries are host endian
875 */
876static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
877{
878 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
879}
880
6b7c5b94
SP		 881static inline struct page *be_alloc_pages(u32 size)
882{
883 gfp_t alloc_flags = GFP_ATOMIC;
884 u32 order = get_order(size);
885 if (order > 0)
886 alloc_flags |= __GFP_COMP;
887 return alloc_pages(alloc_flags, order);
888}
889
890/*
891 * Allocate a page, split it to fragments of size rx_frag_size and post as
892 * receive buffers to BE
893 */
894static void be_post_rx_frags(struct be_adapter *adapter)
895{
896 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
897 struct be_rx_page_info *page_info = NULL;
898 struct be_queue_info *rxq = &adapter->rx_obj.q;
899 struct page *pagep = NULL;
900 struct be_eth_rx_d *rxd;
901 u64 page_dmaaddr = 0, frag_dmaaddr;
902 u32 posted, page_offset = 0;
903
6b7c5b94
SP		 904 page_info = &page_info_tbl[rxq->head];
905 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
906 if (!pagep) {
907 pagep = be_alloc_pages(adapter->big_page_size);
908 if (unlikely(!pagep)) {
909 drvr_stats(adapter)->be_ethrx_post_fail++;
910 break;
911 }
912 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
913 adapter->big_page_size,
914 PCI_DMA_FROMDEVICE);
915 page_info->page_offset = 0;
916 } else {
917 get_page(pagep);
918 page_info->page_offset = page_offset + rx_frag_size;
919 }
920 page_offset = page_info->page_offset;
921 page_info->page = pagep;
922 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
923 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
924
925 rxd = queue_head_node(rxq);
926 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
927 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
928 queue_head_inc(rxq);
929
930 /* Any space left in the current big page for another frag? */
931 if ((page_offset + rx_frag_size + rx_frag_size) >
932 adapter->big_page_size) {
933 pagep = NULL;
934 page_info->last_page_user = true;
935 }
936 page_info = &page_info_tbl[rxq->head];
937 }
938 if (pagep)
939 page_info->last_page_user = true;
940
941 if (posted) {
6b7c5b94 942 atomic_add(posted, &rxq->used);
8788fdc2 943 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 944 } else if (atomic_read(&rxq->used) == 0) {
945 /* Let be_worker replenish when memory is available */
946 adapter->rx_post_starved = true;
6b7c5b94
SP		 947 }
948
949 return;
950}
951
5fb379ee 952static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 953{
6b7c5b94
SP		 954 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
955
956 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
957 return NULL;
958
959 be_dws_le_to_cpu(txcp, sizeof(*txcp));
960
961 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
962
963 queue_tail_inc(tx_cq);
964 return txcp;
965}
966
967static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
968{
969 struct be_queue_info *txq = &adapter->tx_obj.q;
6b7c5b94
SP		 970 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
971 struct sk_buff *sent_skb;
6b7c5b94
SP		 972 u16 cur_index, num_wrbs = 0;
973
974 cur_index = txq->tail;
975 sent_skb = sent_skbs[cur_index];
976 BUG_ON(!sent_skb);
977 sent_skbs[cur_index] = NULL;
978
979 do {
980 cur_index = txq->tail;
6b7c5b94
SP		 981 num_wrbs++;
982 queue_tail_inc(txq);
983 } while (cur_index != last_index);
984
985 atomic_sub(num_wrbs, &txq->used);
c190e3c8 986 skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
6b7c5b94
SP		 987 kfree_skb(sent_skb);
988}
989
859b1e4e
SP		 990static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
991{
992 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
993
994 if (!eqe->evt)
995 return NULL;
996
997 eqe->evt = le32_to_cpu(eqe->evt);
998 queue_tail_inc(&eq_obj->q);
999 return eqe;
1000}
1001
1002static int event_handle(struct be_adapter *adapter,
1003 struct be_eq_obj *eq_obj)
1004{
1005 struct be_eq_entry *eqe;
1006 u16 num = 0;
1007
1008 while ((eqe = event_get(eq_obj)) != NULL) {
1009 eqe->evt = 0;
1010 num++;
1011 }
1012
1013 /* Deal with any spurious interrupts that come
1014 * without events
1015 */
1016 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1017 if (num)
1018 napi_schedule(&eq_obj->napi);
1019
1020 return num;
1021}
1022
1023/* Just read and notify events without processing them.
1024 * Used at the time of destroying event queues */
1025static void be_eq_clean(struct be_adapter *adapter,
1026 struct be_eq_obj *eq_obj)
1027{
1028 struct be_eq_entry *eqe;
1029 u16 num = 0;
1030
1031 while ((eqe = event_get(eq_obj)) != NULL) {
1032 eqe->evt = 0;
1033 num++;
1034 }
1035
1036 if (num)
1037 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1038}
1039
6b7c5b94
SP		 1040static void be_rx_q_clean(struct be_adapter *adapter)
1041{
1042 struct be_rx_page_info *page_info;
1043 struct be_queue_info *rxq = &adapter->rx_obj.q;
1044 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1045 struct be_eth_rx_compl *rxcp;
1046 u16 tail;
1047
1048 /* First cleanup pending rx completions */
1049 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1050 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1051 be_rx_compl_reset(rxcp);
8788fdc2 1052 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1053 }
1054
1055 /* Then free posted rx buffer that were not used */
1056 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1057 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1058 page_info = get_rx_page_info(adapter, tail);
1059 put_page(page_info->page);
1060 memset(page_info, 0, sizeof(*page_info));
1061 }
1062 BUG_ON(atomic_read(&rxq->used));
1063}
1064
a8e9179a 1065static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1066{
a8e9179a 1067 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1068 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1069 struct be_eth_tx_compl *txcp;
1070 u16 end_idx, cmpl = 0, timeo = 0;
1071
1072 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1073 do {
1074 while ((txcp = be_tx_compl_get(tx_cq))) {
1075 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1076 wrb_index, txcp);
1077 be_tx_compl_process(adapter, end_idx);
1078 cmpl++;
1079 }
1080 if (cmpl) {
1081 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1082 cmpl = 0;
1083 }
1084
1085 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1086 break;
1087
1088 mdelay(1);
1089 } while (true);
1090
1091 if (atomic_read(&txq->used))
1092 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1093 atomic_read(&txq->used));
6b7c5b94
SP		 1094}
1095
5fb379ee
SP		 1096static void be_mcc_queues_destroy(struct be_adapter *adapter)
1097{
1098 struct be_queue_info *q;
5fb379ee 1099
8788fdc2 1100 q = &adapter->mcc_obj.q;
5fb379ee 1101 if (q->created)
8788fdc2 1102 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1103 be_queue_free(adapter, q);
1104
8788fdc2 1105 q = &adapter->mcc_obj.cq;
5fb379ee 1106 if (q->created)
8788fdc2 1107 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1108 be_queue_free(adapter, q);
1109}
1110
1111/* Must be called only after TX qs are created as MCC shares TX EQ */
1112static int be_mcc_queues_create(struct be_adapter *adapter)
1113{
1114 struct be_queue_info *q, *cq;
5fb379ee
SP		 1115
1116 /* Alloc MCC compl queue */
8788fdc2 1117 cq = &adapter->mcc_obj.cq;
5fb379ee 1118 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1119 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1120 goto err;
1121
1122 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1123 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1124 goto mcc_cq_free;
1125
1126 /* Alloc MCC queue */
8788fdc2 1127 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1128 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1129 goto mcc_cq_destroy;
1130
1131 /* Ask BE to create MCC queue */
8788fdc2 1132 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1133 goto mcc_q_free;
1134
1135 return 0;
1136
1137mcc_q_free:
1138 be_queue_free(adapter, q);
1139mcc_cq_destroy:
8788fdc2 1140 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1141mcc_cq_free:
1142 be_queue_free(adapter, cq);
1143err:
1144 return -1;
1145}
1146
6b7c5b94
SP		 1147static void be_tx_queues_destroy(struct be_adapter *adapter)
1148{
1149 struct be_queue_info *q;
1150
1151 q = &adapter->tx_obj.q;
a8e9179a 1152 if (q->created)
8788fdc2 1153 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1154 be_queue_free(adapter, q);
1155
1156 q = &adapter->tx_obj.cq;
1157 if (q->created)
8788fdc2 1158 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1159 be_queue_free(adapter, q);
1160
859b1e4e
SP		 1161 /* Clear any residual events */
1162 be_eq_clean(adapter, &adapter->tx_eq);
1163
6b7c5b94
SP		 1164 q = &adapter->tx_eq.q;
1165 if (q->created)
8788fdc2 1166 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1167 be_queue_free(adapter, q);
1168}
1169
1170static int be_tx_queues_create(struct be_adapter *adapter)
1171{
1172 struct be_queue_info *eq, *q, *cq;
1173
1174 adapter->tx_eq.max_eqd = 0;
1175 adapter->tx_eq.min_eqd = 0;
1176 adapter->tx_eq.cur_eqd = 96;
1177 adapter->tx_eq.enable_aic = false;
1178 /* Alloc Tx Event queue */
1179 eq = &adapter->tx_eq.q;
1180 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1181 return -1;
1182
1183 /* Ask BE to create Tx Event queue */
8788fdc2 1184 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94
SP		 1185 goto tx_eq_free;
1186 /* Alloc TX eth compl queue */
1187 cq = &adapter->tx_obj.cq;
1188 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1189 sizeof(struct be_eth_tx_compl)))
1190 goto tx_eq_destroy;
1191
1192 /* Ask BE to create Tx eth compl queue */
8788fdc2 1193 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1194 goto tx_cq_free;
1195
1196 /* Alloc TX eth queue */
1197 q = &adapter->tx_obj.q;
1198 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1199 goto tx_cq_destroy;
1200
1201 /* Ask BE to create Tx eth queue */
8788fdc2 1202 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1203 goto tx_q_free;
1204 return 0;
1205
1206tx_q_free:
1207 be_queue_free(adapter, q);
1208tx_cq_destroy:
8788fdc2 1209 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1210tx_cq_free:
1211 be_queue_free(adapter, cq);
1212tx_eq_destroy:
8788fdc2 1213 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1214tx_eq_free:
1215 be_queue_free(adapter, eq);
1216 return -1;
1217}
1218
1219static void be_rx_queues_destroy(struct be_adapter *adapter)
1220{
1221 struct be_queue_info *q;
1222
1223 q = &adapter->rx_obj.q;
1224 if (q->created) {
8788fdc2 1225 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
6b7c5b94
SP		 1226 be_rx_q_clean(adapter);
1227 }
1228 be_queue_free(adapter, q);
1229
1230 q = &adapter->rx_obj.cq;
1231 if (q->created)
8788fdc2 1232 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1233 be_queue_free(adapter, q);
1234
859b1e4e
SP		 1235 /* Clear any residual events */
1236 be_eq_clean(adapter, &adapter->rx_eq);
1237
6b7c5b94
SP		 1238 q = &adapter->rx_eq.q;
1239 if (q->created)
8788fdc2 1240 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1241 be_queue_free(adapter, q);
1242}
1243
1244static int be_rx_queues_create(struct be_adapter *adapter)
1245{
1246 struct be_queue_info *eq, *q, *cq;
1247 int rc;
1248
6b7c5b94
SP		 1249 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1250 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1251 adapter->rx_eq.min_eqd = 0;
1252 adapter->rx_eq.cur_eqd = 0;
1253 adapter->rx_eq.enable_aic = true;
1254
1255 /* Alloc Rx Event queue */
1256 eq = &adapter->rx_eq.q;
1257 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1258 sizeof(struct be_eq_entry));
1259 if (rc)
1260 return rc;
1261
1262 /* Ask BE to create Rx Event queue */
8788fdc2 1263 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1264 if (rc)
1265 goto rx_eq_free;
1266
1267 /* Alloc RX eth compl queue */
1268 cq = &adapter->rx_obj.cq;
1269 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1270 sizeof(struct be_eth_rx_compl));
1271 if (rc)
1272 goto rx_eq_destroy;
1273
1274 /* Ask BE to create Rx eth compl queue */
8788fdc2 1275 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1276 if (rc)
1277 goto rx_cq_free;
1278
1279 /* Alloc RX eth queue */
1280 q = &adapter->rx_obj.q;
1281 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1282 if (rc)
1283 goto rx_cq_destroy;
1284
1285 /* Ask BE to create Rx eth queue */
8788fdc2 1286 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1287 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1288 if (rc)
1289 goto rx_q_free;
1290
1291 return 0;
1292rx_q_free:
1293 be_queue_free(adapter, q);
1294rx_cq_destroy:
8788fdc2 1295 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1296rx_cq_free:
1297 be_queue_free(adapter, cq);
1298rx_eq_destroy:
8788fdc2 1299 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1300rx_eq_free:
1301 be_queue_free(adapter, eq);
1302 return rc;
1303}
6b7c5b94 1304
b628bde2
SP		 1305/* There are 8 evt ids per func. Retruns the evt id's bit number */
1306static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1307{
1308 return eq_id - 8 * be_pci_func(adapter);
1309}
1310
6b7c5b94
SP		 1311static irqreturn_t be_intx(int irq, void *dev)
1312{
1313 struct be_adapter *adapter = dev;
8788fdc2 1314 int isr;
6b7c5b94 1315
8788fdc2 1316 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
eec368fb 1317 be_pci_func(adapter) * CEV_ISR_SIZE);
c001c213 1318 if (!isr)
8788fdc2 1319 return IRQ_NONE;
6b7c5b94 1320
8788fdc2
SP		 1321 event_handle(adapter, &adapter->tx_eq);
1322 event_handle(adapter, &adapter->rx_eq);
c001c213 1323
8788fdc2 1324 return IRQ_HANDLED;
6b7c5b94
SP		 1325}
1326
1327static irqreturn_t be_msix_rx(int irq, void *dev)
1328{
1329 struct be_adapter *adapter = dev;
1330
8788fdc2 1331 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1332
1333 return IRQ_HANDLED;
1334}
1335
5fb379ee 1336static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1337{
1338 struct be_adapter *adapter = dev;
1339
8788fdc2 1340 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1341
1342 return IRQ_HANDLED;
1343}
1344
5be93b9a 1345static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1346 struct be_eth_rx_compl *rxcp)
1347{
1348 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1349 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1350
1351 if (err)
1352 drvr_stats(adapter)->be_rxcp_err++;
1353
5be93b9a 1354 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1355}
1356
1357int be_poll_rx(struct napi_struct *napi, int budget)
1358{
1359 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1360 struct be_adapter *adapter =
1361 container_of(rx_eq, struct be_adapter, rx_eq);
1362 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1363 struct be_eth_rx_compl *rxcp;
1364 u32 work_done;
1365
1366 for (work_done = 0; work_done < budget; work_done++) {
1367 rxcp = be_rx_compl_get(adapter);
1368 if (!rxcp)
1369 break;
1370
5be93b9a
AK		 1371 if (do_gro(adapter, rxcp))
1372 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1373 else
1374 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1375
1376 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1377 }
1378
6b7c5b94
SP		 1379 /* Refill the queue */
1380 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1381 be_post_rx_frags(adapter);
1382
1383 /* All consumed */
1384 if (work_done < budget) {
1385 napi_complete(napi);
8788fdc2 1386 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1387 } else {
1388 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1389 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1390 }
1391 return work_done;
1392}
1393
5fb379ee 1394void be_process_tx(struct be_adapter *adapter)
6b7c5b94 1395{
5fb379ee
SP		 1396 struct be_queue_info *txq = &adapter->tx_obj.q;
1397 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94
SP		 1398 struct be_eth_tx_compl *txcp;
1399 u32 num_cmpl = 0;
1400 u16 end_idx;
1401
5fb379ee 1402 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94
SP		 1403 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1404 wrb_index, txcp);
1405 be_tx_compl_process(adapter, end_idx);
1406 num_cmpl++;
1407 }
1408
5fb379ee 1409 if (num_cmpl) {
8788fdc2 1410 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
5fb379ee
SP		 1411
1412 /* As Tx wrbs have been freed up, wake up netdev queue if
1413 * it was stopped due to lack of tx wrbs.
1414 */
1415 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1416 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1417 netif_wake_queue(adapter->netdev);
1418 }
1419
1420 drvr_stats(adapter)->be_tx_events++;
1421 drvr_stats(adapter)->be_tx_compl += num_cmpl;
6b7c5b94 1422 }
5fb379ee
SP		 1423}
1424
1425/* As TX and MCC share the same EQ check for both TX and MCC completions.
1426 * For TX/MCC we don't honour budget; consume everything
1427 */
1428static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1429{
1430 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1431 struct be_adapter *adapter =
1432 container_of(tx_eq, struct be_adapter, tx_eq);
6b7c5b94
SP		 1433
1434 napi_complete(napi);
1435
5fb379ee 1436 be_process_tx(adapter);
6b7c5b94 1437
8788fdc2 1438 be_process_mcc(adapter);
6b7c5b94
SP		 1439
1440 return 1;
1441}
1442
ea1dae11
SP		 1443static void be_worker(struct work_struct *work)
1444{
1445 struct be_adapter *adapter =
1446 container_of(work, struct be_adapter, work.work);
ea1dae11 1447
b31c50a7 1448 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1449
1450 /* Set EQ delay */
1451 be_rx_eqd_update(adapter);
1452
4097f663
SP		 1453 be_tx_rate_update(adapter);
1454 be_rx_rate_update(adapter);
1455
ea1dae11
SP		 1456 if (adapter->rx_post_starved) {
1457 adapter->rx_post_starved = false;
1458 be_post_rx_frags(adapter);
1459 }
1460
1461 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1462}
1463
6b7c5b94
SP		 1464static void be_msix_enable(struct be_adapter *adapter)
1465{
1466 int i, status;
1467
1468 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1469 adapter->msix_entries[i].entry = i;
1470
1471 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1472 BE_NUM_MSIX_VECTORS);
1473 if (status == 0)
1474 adapter->msix_enabled = true;
1475 return;
1476}
1477
1478static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1479{
b628bde2
SP		 1480 return adapter->msix_entries[
1481 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1482}
1483
b628bde2
SP		 1484static int be_request_irq(struct be_adapter *adapter,
1485 struct be_eq_obj *eq_obj,
1486 void *handler, char *desc)
6b7c5b94
SP		 1487{
1488 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1489 int vec;
1490
1491 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1492 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1493 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1494}
1495
1496static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1497{
1498 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1499 free_irq(vec, adapter);
1500}
6b7c5b94 1501
b628bde2
SP		 1502static int be_msix_register(struct be_adapter *adapter)
1503{
1504 int status;
1505
1506 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1507 if (status)
1508 goto err;
1509
b628bde2
SP		 1510 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1511 if (status)
1512 goto free_tx_irq;
1513
6b7c5b94 1514 return 0;
b628bde2
SP		 1515
1516free_tx_irq:
1517 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1518err:
1519 dev_warn(&adapter->pdev->dev,
1520 "MSIX Request IRQ failed - err %d\n", status);
1521 pci_disable_msix(adapter->pdev);
1522 adapter->msix_enabled = false;
1523 return status;
1524}
1525
1526static int be_irq_register(struct be_adapter *adapter)
1527{
1528 struct net_device *netdev = adapter->netdev;
1529 int status;
1530
1531 if (adapter->msix_enabled) {
1532 status = be_msix_register(adapter);
1533 if (status == 0)
1534 goto done;
1535 }
1536
1537 /* INTx */
1538 netdev->irq = adapter->pdev->irq;
1539 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1540 adapter);
1541 if (status) {
1542 dev_err(&adapter->pdev->dev,
1543 "INTx request IRQ failed - err %d\n", status);
1544 return status;
1545 }
1546done:
1547 adapter->isr_registered = true;
1548 return 0;
1549}
1550
1551static void be_irq_unregister(struct be_adapter *adapter)
1552{
1553 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1554
1555 if (!adapter->isr_registered)
1556 return;
1557
1558 /* INTx */
1559 if (!adapter->msix_enabled) {
1560 free_irq(netdev->irq, adapter);
1561 goto done;
1562 }
1563
1564 /* MSIx */
b628bde2
SP		 1565 be_free_irq(adapter, &adapter->tx_eq);
1566 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1567done:
1568 adapter->isr_registered = false;
1569 return;
1570}
1571
1572static int be_open(struct net_device *netdev)
1573{
1574 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1575 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1576 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 1577 bool link_up;
1578 int status;
5fb379ee
SP		 1579
1580 /* First time posting */
1581 be_post_rx_frags(adapter);
1582
1583 napi_enable(&rx_eq->napi);
1584 napi_enable(&tx_eq->napi);
1585
1586 be_irq_register(adapter);
1587
8788fdc2 1588 be_intr_set(adapter, true);
5fb379ee
SP		 1589
1590 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 1591 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1592 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 1593
1594 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 1595 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 1596
8788fdc2 1597 status = be_cmd_link_status_query(adapter, &link_up);
a8f447bd
SP		 1598 if (status)
1599 return status;
1600 be_link_status_update(adapter, link_up);
5fb379ee
SP		 1601
1602 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1603 return 0;
1604}
1605
1606static int be_setup(struct be_adapter *adapter)
1607{
5fb379ee 1608 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1609 u32 if_flags;
1610 int status;
1611
1612 if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
1613 BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
1614 BE_IF_FLAGS_PASS_L3L4_ERRORS;
8788fdc2 1615 status = be_cmd_if_create(adapter, if_flags, netdev->dev_addr,
6b7c5b94
SP		 1616 false/* pmac_invalid */, &adapter->if_handle,
1617 &adapter->pmac_id);
1618 if (status != 0)
1619 goto do_none;
1620
6b7c5b94
SP		 1621
1622 status = be_tx_queues_create(adapter);
1623 if (status != 0)
1624 goto if_destroy;
1625
1626 status = be_rx_queues_create(adapter);
1627 if (status != 0)
1628 goto tx_qs_destroy;
1629
5fb379ee
SP		 1630 status = be_mcc_queues_create(adapter);
1631 if (status != 0)
1632 goto rx_qs_destroy;
6b7c5b94 1633
b31c50a7
SP		 1634 status = be_vid_config(adapter);
1635 if (status != 0)
1636 goto mccqs_destroy;
1637
1638 status = be_cmd_set_flow_control(adapter, true, true);
1639 if (status != 0)
1640 goto mccqs_destroy;
6b7c5b94
SP		 1641 return 0;
1642
b31c50a7
SP		 1643mccqs_destroy:
1644 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1645rx_qs_destroy:
1646 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 1647tx_qs_destroy:
1648 be_tx_queues_destroy(adapter);
1649if_destroy:
8788fdc2 1650 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 1651do_none:
1652 return status;
1653}
1654
5fb379ee
SP		 1655static int be_clear(struct be_adapter *adapter)
1656{
1a8887d8 1657 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1658 be_rx_queues_destroy(adapter);
1659 be_tx_queues_destroy(adapter);
1660
8788fdc2 1661 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 1662
5fb379ee
SP		 1663 return 0;
1664}
1665
6b7c5b94
SP		 1666static int be_close(struct net_device *netdev)
1667{
1668 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1669 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1670 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1671 int vec;
1672
b305be78 1673 cancel_delayed_work_sync(&adapter->work);
6b7c5b94
SP		 1674
1675 netif_stop_queue(netdev);
1676 netif_carrier_off(netdev);
a8f447bd 1677 adapter->link_up = false;
6b7c5b94 1678
8788fdc2 1679 be_intr_set(adapter, false);
6b7c5b94
SP		 1680
1681 if (adapter->msix_enabled) {
1682 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1683 synchronize_irq(vec);
1684 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1685 synchronize_irq(vec);
1686 } else {
1687 synchronize_irq(netdev->irq);
1688 }
1689 be_irq_unregister(adapter);
1690
1691 napi_disable(&rx_eq->napi);
1692 napi_disable(&tx_eq->napi);
1693
a8e9179a
SP		 1694 /* Wait for all pending tx completions to arrive so that
1695 * all tx skbs are freed.
1696 */
1697 be_tx_compl_clean(adapter);
1698
6b7c5b94
SP		 1699 return 0;
1700}
1701
84517482
AK		 1702#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1703char flash_cookie[2][16] = {"*** SE FLAS",
1704 "H DIRECTORY *** "};
1705static int be_flash_image(struct be_adapter *adapter,
1706 const struct firmware *fw,
1707 struct be_dma_mem *flash_cmd, u32 flash_type)
1708{
1709 int status;
1710 u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
1711 int num_bytes;
1712 const u8 *p = fw->data;
1713 struct be_cmd_write_flashrom *req = flash_cmd->va;
1714
1715 switch (flash_type) {
1716 case FLASHROM_TYPE_ISCSI_ACTIVE:
1717 image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
1718 image_size = FLASH_IMAGE_MAX_SIZE;
1719 break;
1720 case FLASHROM_TYPE_ISCSI_BACKUP:
1721 image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
1722 image_size = FLASH_IMAGE_MAX_SIZE;
1723 break;
1724 case FLASHROM_TYPE_FCOE_FW_ACTIVE:
1725 image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
1726 image_size = FLASH_IMAGE_MAX_SIZE;
1727 break;
1728 case FLASHROM_TYPE_FCOE_FW_BACKUP:
1729 image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
1730 image_size = FLASH_IMAGE_MAX_SIZE;
1731 break;
1732 case FLASHROM_TYPE_BIOS:
1733 image_offset = FLASH_iSCSI_BIOS_START;
1734 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1735 break;
1736 case FLASHROM_TYPE_FCOE_BIOS:
1737 image_offset = FLASH_FCoE_BIOS_START;
1738 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1739 break;
1740 case FLASHROM_TYPE_PXE_BIOS:
1741 image_offset = FLASH_PXE_BIOS_START;
1742 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1743 break;
1744 default:
1745 return 0;
1746 }
1747
1748 p += sizeof(struct flash_file_hdr) + image_offset;
1749 if (p + image_size > fw->data + fw->size)
1750 return -1;
1751
1752 total_bytes = image_size;
1753
1754 while (total_bytes) {
1755 if (total_bytes > 32*1024)
1756 num_bytes = 32*1024;
1757 else
1758 num_bytes = total_bytes;
1759 total_bytes -= num_bytes;
1760
1761 if (!total_bytes)
1762 flash_op = FLASHROM_OPER_FLASH;
1763 else
1764 flash_op = FLASHROM_OPER_SAVE;
1765 memcpy(req->params.data_buf, p, num_bytes);
1766 p += num_bytes;
1767 status = be_cmd_write_flashrom(adapter, flash_cmd,
1768 flash_type, flash_op, num_bytes);
1769 if (status) {
1770 dev_err(&adapter->pdev->dev,
1771 "cmd to write to flash rom failed. type/op %d/%d\n",
1772 flash_type, flash_op);
1773 return -1;
1774 }
1775 yield();
1776 }
1777
1778 return 0;
1779}
1780
1781int be_load_fw(struct be_adapter *adapter, u8 *func)
1782{
1783 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1784 const struct firmware *fw;
1785 struct flash_file_hdr *fhdr;
1786 struct flash_section_info *fsec = NULL;
1787 struct be_dma_mem flash_cmd;
1788 int status;
1789 const u8 *p;
1790 bool entry_found = false;
1791 int flash_type;
1792 char fw_ver[FW_VER_LEN];
1793 char fw_cfg;
1794
1795 status = be_cmd_get_fw_ver(adapter, fw_ver);
1796 if (status)
1797 return status;
1798
1799 fw_cfg = *(fw_ver + 2);
1800 if (fw_cfg == '0')
1801 fw_cfg = '1';
1802 strcpy(fw_file, func);
1803
1804 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1805 if (status)
1806 goto fw_exit;
1807
1808 p = fw->data;
1809 fhdr = (struct flash_file_hdr *) p;
1810 if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
1811 dev_err(&adapter->pdev->dev,
1812 "Firmware(%s) load error (signature did not match)\n",
1813 fw_file);
1814 status = -1;
1815 goto fw_exit;
1816 }
1817
1818 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1819
1820 p += sizeof(struct flash_file_hdr);
1821 while (p < (fw->data + fw->size)) {
1822 fsec = (struct flash_section_info *)p;
1823 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
1824 entry_found = true;
1825 break;
1826 }
1827 p += 32;
1828 }
1829
1830 if (!entry_found) {
1831 status = -1;
1832 dev_err(&adapter->pdev->dev,
1833 "Flash cookie not found in firmware image\n");
1834 goto fw_exit;
1835 }
1836
1837 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1838 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
1839 &flash_cmd.dma);
1840 if (!flash_cmd.va) {
1841 status = -ENOMEM;
1842 dev_err(&adapter->pdev->dev,
1843 "Memory allocation failure while flashing\n");
1844 goto fw_exit;
1845 }
1846
1847 for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
1848 flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
1849 status = be_flash_image(adapter, fw, &flash_cmd,
1850 flash_type);
1851 if (status)
1852 break;
1853 }
1854
1855 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
1856 flash_cmd.dma);
1857 if (status) {
1858 dev_err(&adapter->pdev->dev, "Firmware load error\n");
1859 goto fw_exit;
1860 }
1861
1862 dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
1863
1864fw_exit:
1865 release_firmware(fw);
1866 return status;
1867}
1868
6b7c5b94
SP		 1869static struct net_device_ops be_netdev_ops = {
1870 .ndo_open = be_open,
1871 .ndo_stop = be_close,
1872 .ndo_start_xmit = be_xmit,
1873 .ndo_get_stats = be_get_stats,
1874 .ndo_set_rx_mode = be_set_multicast_list,
1875 .ndo_set_mac_address = be_mac_addr_set,
1876 .ndo_change_mtu = be_change_mtu,
1877 .ndo_validate_addr = eth_validate_addr,
1878 .ndo_vlan_rx_register = be_vlan_register,
1879 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
1880 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
1881};
1882
1883static void be_netdev_init(struct net_device *netdev)
1884{
1885 struct be_adapter *adapter = netdev_priv(netdev);
1886
1887 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
1888 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
5be93b9a 1889 NETIF_F_IPV6_CSUM | NETIF_F_GRO;
6b7c5b94
SP		 1890
1891 netdev->flags |= IFF_MULTICAST;
1892
728a9972
AK		 1893 adapter->rx_csum = true;
1894
c190e3c8
AK		 1895 netif_set_gso_max_size(netdev, 65535);
1896
6b7c5b94
SP		 1897 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
1898
1899 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
1900
6b7c5b94
SP		 1901 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
1902 BE_NAPI_WEIGHT);
5fb379ee 1903 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 1904 BE_NAPI_WEIGHT);
1905
1906 netif_carrier_off(netdev);
1907 netif_stop_queue(netdev);
1908}
1909
1910static void be_unmap_pci_bars(struct be_adapter *adapter)
1911{
8788fdc2
SP		 1912 if (adapter->csr)
1913 iounmap(adapter->csr);
1914 if (adapter->db)
1915 iounmap(adapter->db);
1916 if (adapter->pcicfg)
1917 iounmap(adapter->pcicfg);
6b7c5b94
SP		 1918}
1919
1920static int be_map_pci_bars(struct be_adapter *adapter)
1921{
1922 u8 __iomem *addr;
1923
1924 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
1925 pci_resource_len(adapter->pdev, 2));
1926 if (addr == NULL)
1927 return -ENOMEM;
8788fdc2 1928 adapter->csr = addr;
6b7c5b94
SP		 1929
1930 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
1931 128 * 1024);
1932 if (addr == NULL)
1933 goto pci_map_err;
8788fdc2 1934 adapter->db = addr;
6b7c5b94
SP		 1935
1936 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
1937 pci_resource_len(adapter->pdev, 1));
1938 if (addr == NULL)
1939 goto pci_map_err;
8788fdc2 1940 adapter->pcicfg = addr;
6b7c5b94
SP		 1941
1942 return 0;
1943pci_map_err:
1944 be_unmap_pci_bars(adapter);
1945 return -ENOMEM;
1946}
1947
1948
1949static void be_ctrl_cleanup(struct be_adapter *adapter)
1950{
8788fdc2 1951 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 1952
1953 be_unmap_pci_bars(adapter);
1954
1955 if (mem->va)
1956 pci_free_consistent(adapter->pdev, mem->size,
1957 mem->va, mem->dma);
1958}
1959
6b7c5b94
SP		 1960static int be_ctrl_init(struct be_adapter *adapter)
1961{
8788fdc2
SP		 1962 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
1963 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
6b7c5b94 1964 int status;
6b7c5b94
SP		 1965
1966 status = be_map_pci_bars(adapter);
1967 if (status)
1968 return status;
1969
1970 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
1971 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
1972 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
1973 if (!mbox_mem_alloc->va) {
1974 be_unmap_pci_bars(adapter);
1975 return -1;
1976 }
1977 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
1978 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
1979 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
1980 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
8788fdc2
SP		 1981 spin_lock_init(&adapter->mbox_lock);
1982 spin_lock_init(&adapter->mcc_lock);
1983 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 1984
6b7c5b94
SP		 1985 return 0;
1986}
1987
1988static void be_stats_cleanup(struct be_adapter *adapter)
1989{
1990 struct be_stats_obj *stats = &adapter->stats;
1991 struct be_dma_mem *cmd = &stats->cmd;
1992
1993 if (cmd->va)
1994 pci_free_consistent(adapter->pdev, cmd->size,
1995 cmd->va, cmd->dma);
1996}
1997
1998static int be_stats_init(struct be_adapter *adapter)
1999{
2000 struct be_stats_obj *stats = &adapter->stats;
2001 struct be_dma_mem *cmd = &stats->cmd;
2002
2003 cmd->size = sizeof(struct be_cmd_req_get_stats);
2004 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2005 if (cmd->va == NULL)
2006 return -1;
2007 return 0;
2008}
2009
2010static void __devexit be_remove(struct pci_dev *pdev)
2011{
2012 struct be_adapter *adapter = pci_get_drvdata(pdev);
2013 if (!adapter)
2014 return;
2015
2016 unregister_netdev(adapter->netdev);
2017
5fb379ee
SP		 2018 be_clear(adapter);
2019
6b7c5b94
SP		 2020 be_stats_cleanup(adapter);
2021
2022 be_ctrl_cleanup(adapter);
2023
2024 if (adapter->msix_enabled) {
2025 pci_disable_msix(adapter->pdev);
2026 adapter->msix_enabled = false;
2027 }
2028
2029 pci_set_drvdata(pdev, NULL);
2030 pci_release_regions(pdev);
2031 pci_disable_device(pdev);
2032
2033 free_netdev(adapter->netdev);
2034}
2035
2036static int be_hw_up(struct be_adapter *adapter)
2037{
6b7c5b94
SP		 2038 int status;
2039
8788fdc2 2040 status = be_cmd_POST(adapter);
6b7c5b94
SP		 2041 if (status)
2042 return status;
2043
8788fdc2 2044 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2045 if (status)
2046 return status;
2047
8788fdc2 2048 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num);
6b7c5b94
SP		 2049 return status;
2050}
2051
2052static int __devinit be_probe(struct pci_dev *pdev,
2053 const struct pci_device_id *pdev_id)
2054{
2055 int status = 0;
2056 struct be_adapter *adapter;
2057 struct net_device *netdev;
6b7c5b94
SP		 2058 u8 mac[ETH_ALEN];
2059
2060 status = pci_enable_device(pdev);
2061 if (status)
2062 goto do_none;
2063
2064 status = pci_request_regions(pdev, DRV_NAME);
2065 if (status)
2066 goto disable_dev;
2067 pci_set_master(pdev);
2068
2069 netdev = alloc_etherdev(sizeof(struct be_adapter));
2070 if (netdev == NULL) {
2071 status = -ENOMEM;
2072 goto rel_reg;
2073 }
2074 adapter = netdev_priv(netdev);
2075 adapter->pdev = pdev;
2076 pci_set_drvdata(pdev, adapter);
2077 adapter->netdev = netdev;
2078
2079 be_msix_enable(adapter);
2080
e930438c 2081 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2082 if (!status) {
2083 netdev->features |= NETIF_F_HIGHDMA;
2084 } else {
e930438c 2085 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2086 if (status) {
2087 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2088 goto free_netdev;
2089 }
2090 }
2091
6b7c5b94
SP		 2092 status = be_ctrl_init(adapter);
2093 if (status)
2094 goto free_netdev;
2095
14074eab 2096 status = be_cmd_reset_function(adapter);
2097 if (status)
2098 goto ctrl_clean;
2099
6b7c5b94
SP		 2100 status = be_stats_init(adapter);
2101 if (status)
2102 goto ctrl_clean;
2103
2104 status = be_hw_up(adapter);
2105 if (status)
2106 goto stats_clean;
2107
8788fdc2 2108 status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
6b7c5b94
SP		 2109 true /* permanent */, 0);
2110 if (status)
2111 goto stats_clean;
2112 memcpy(netdev->dev_addr, mac, ETH_ALEN);
2113
2114 INIT_DELAYED_WORK(&adapter->work, be_worker);
2115 be_netdev_init(netdev);
2116 SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
2117
5fb379ee
SP		 2118 status = be_setup(adapter);
2119 if (status)
2120 goto stats_clean;
6b7c5b94
SP		 2121 status = register_netdev(netdev);
2122 if (status != 0)
5fb379ee 2123 goto unsetup;
6b7c5b94 2124
c4ca2374 2125 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2126 return 0;
2127
5fb379ee
SP		 2128unsetup:
2129 be_clear(adapter);
6b7c5b94
SP		 2130stats_clean:
2131 be_stats_cleanup(adapter);
2132ctrl_clean:
2133 be_ctrl_cleanup(adapter);
2134free_netdev:
2135 free_netdev(adapter->netdev);
2136rel_reg:
2137 pci_release_regions(pdev);
2138disable_dev:
2139 pci_disable_device(pdev);
2140do_none:
c4ca2374 2141 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2142 return status;
2143}
2144
2145static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2146{
2147 struct be_adapter *adapter = pci_get_drvdata(pdev);
2148 struct net_device *netdev = adapter->netdev;
2149
2150 netif_device_detach(netdev);
2151 if (netif_running(netdev)) {
2152 rtnl_lock();
2153 be_close(netdev);
2154 rtnl_unlock();
2155 }
9b0365f1 2156 be_clear(adapter);
6b7c5b94
SP		 2157
2158 pci_save_state(pdev);
2159 pci_disable_device(pdev);
2160 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2161 return 0;
2162}
2163
2164static int be_resume(struct pci_dev *pdev)
2165{
2166 int status = 0;
2167 struct be_adapter *adapter = pci_get_drvdata(pdev);
2168 struct net_device *netdev = adapter->netdev;
2169
2170 netif_device_detach(netdev);
2171
2172 status = pci_enable_device(pdev);
2173 if (status)
2174 return status;
2175
2176 pci_set_power_state(pdev, 0);
2177 pci_restore_state(pdev);
2178
9b0365f1 2179 be_setup(adapter);
6b7c5b94
SP		 2180 if (netif_running(netdev)) {
2181 rtnl_lock();
2182 be_open(netdev);
2183 rtnl_unlock();
2184 }
2185 netif_device_attach(netdev);
2186 return 0;
2187}
2188
2189static struct pci_driver be_driver = {
2190 .name = DRV_NAME,
2191 .id_table = be_dev_ids,
2192 .probe = be_probe,
2193 .remove = be_remove,
2194 .suspend = be_suspend,
2195 .resume = be_resume
2196};
2197
2198static int __init be_init_module(void)
2199{
2200 if (rx_frag_size != 8192 && rx_frag_size != 4096
2201 && rx_frag_size != 2048) {
2202 printk(KERN_WARNING DRV_NAME
2203 " : Module param rx_frag_size must be 2048/4096/8192."
2204 " Using 2048\n");
2205 rx_frag_size = 2048;
2206 }
6b7c5b94
SP		 2207
2208 return pci_register_driver(&be_driver);
2209}
2210module_init(be_init_module);
2211
2212static void __exit be_exit_module(void)
2213{
2214 pci_unregister_driver(&be_driver);
2215}
2216module_exit(be_exit_module);
Linux 6.x block layer and io_uring tree(s)