Commit | Line | Data |
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1da177e4 | 1 | /* |
aaac1b47 | 2 | * linux/drivers/mmc/core/core.c |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2003-2004 Russell King, All Rights Reserved. | |
5b4fd9ae | 5 | * SD support Copyright (C) 2004 Ian Molton, All Rights Reserved. |
ad3868b2 | 6 | * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. |
bce40a36 | 7 | * MMCv4 support Copyright (C) 2006 Philip Langdale, All Rights Reserved. |
1da177e4 LT |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
1da177e4 LT |
13 | #include <linux/module.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/completion.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pagemap.h> | |
20 | #include <linux/err.h> | |
af8350c7 | 21 | #include <linux/leds.h> |
b57c43ad | 22 | #include <linux/scatterlist.h> |
86e8286a | 23 | #include <linux/log2.h> |
5c13941a | 24 | #include <linux/regulator/consumer.h> |
1da177e4 LT |
25 | |
26 | #include <linux/mmc/card.h> | |
27 | #include <linux/mmc/host.h> | |
da7fbe58 PO |
28 | #include <linux/mmc/mmc.h> |
29 | #include <linux/mmc/sd.h> | |
1da177e4 | 30 | |
aaac1b47 | 31 | #include "core.h" |
ffce2e7e PO |
32 | #include "bus.h" |
33 | #include "host.h" | |
e29a7d73 | 34 | #include "sdio_bus.h" |
da7fbe58 PO |
35 | |
36 | #include "mmc_ops.h" | |
37 | #include "sd_ops.h" | |
5c4e6f13 | 38 | #include "sdio_ops.h" |
1da177e4 | 39 | |
ffce2e7e PO |
40 | static struct workqueue_struct *workqueue; |
41 | ||
af517150 DB |
42 | /* |
43 | * Enabling software CRCs on the data blocks can be a significant (30%) | |
44 | * performance cost, and for other reasons may not always be desired. | |
45 | * So we allow it it to be disabled. | |
46 | */ | |
47 | int use_spi_crc = 1; | |
48 | module_param(use_spi_crc, bool, 0); | |
49 | ||
ffce2e7e PO |
50 | /* |
51 | * Internal function. Schedule delayed work in the MMC work queue. | |
52 | */ | |
53 | static int mmc_schedule_delayed_work(struct delayed_work *work, | |
54 | unsigned long delay) | |
55 | { | |
56 | return queue_delayed_work(workqueue, work, delay); | |
57 | } | |
58 | ||
59 | /* | |
60 | * Internal function. Flush all scheduled work from the MMC work queue. | |
61 | */ | |
62 | static void mmc_flush_scheduled_work(void) | |
63 | { | |
64 | flush_workqueue(workqueue); | |
65 | } | |
66 | ||
1da177e4 | 67 | /** |
fe10c6ab RK |
68 | * mmc_request_done - finish processing an MMC request |
69 | * @host: MMC host which completed request | |
70 | * @mrq: MMC request which request | |
1da177e4 LT |
71 | * |
72 | * MMC drivers should call this function when they have completed | |
fe10c6ab | 73 | * their processing of a request. |
1da177e4 LT |
74 | */ |
75 | void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) | |
76 | { | |
77 | struct mmc_command *cmd = mrq->cmd; | |
920e70c5 RK |
78 | int err = cmd->error; |
79 | ||
af517150 DB |
80 | if (err && cmd->retries && mmc_host_is_spi(host)) { |
81 | if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND) | |
82 | cmd->retries = 0; | |
83 | } | |
84 | ||
1da177e4 | 85 | if (err && cmd->retries) { |
e4d21708 PO |
86 | pr_debug("%s: req failed (CMD%u): %d, retrying...\n", |
87 | mmc_hostname(host), cmd->opcode, err); | |
88 | ||
1da177e4 LT |
89 | cmd->retries--; |
90 | cmd->error = 0; | |
91 | host->ops->request(host, mrq); | |
e4d21708 | 92 | } else { |
af8350c7 PO |
93 | led_trigger_event(host->led, LED_OFF); |
94 | ||
e4d21708 PO |
95 | pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n", |
96 | mmc_hostname(host), cmd->opcode, err, | |
97 | cmd->resp[0], cmd->resp[1], | |
98 | cmd->resp[2], cmd->resp[3]); | |
99 | ||
100 | if (mrq->data) { | |
101 | pr_debug("%s: %d bytes transferred: %d\n", | |
102 | mmc_hostname(host), | |
103 | mrq->data->bytes_xfered, mrq->data->error); | |
104 | } | |
105 | ||
106 | if (mrq->stop) { | |
107 | pr_debug("%s: (CMD%u): %d: %08x %08x %08x %08x\n", | |
108 | mmc_hostname(host), mrq->stop->opcode, | |
109 | mrq->stop->error, | |
110 | mrq->stop->resp[0], mrq->stop->resp[1], | |
111 | mrq->stop->resp[2], mrq->stop->resp[3]); | |
112 | } | |
113 | ||
114 | if (mrq->done) | |
115 | mrq->done(mrq); | |
1da177e4 LT |
116 | } |
117 | } | |
118 | ||
119 | EXPORT_SYMBOL(mmc_request_done); | |
120 | ||
39361851 | 121 | static void |
1da177e4 LT |
122 | mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) |
123 | { | |
976d9276 PO |
124 | #ifdef CONFIG_MMC_DEBUG |
125 | unsigned int i, sz; | |
a84756c5 | 126 | struct scatterlist *sg; |
976d9276 PO |
127 | #endif |
128 | ||
920e70c5 RK |
129 | pr_debug("%s: starting CMD%u arg %08x flags %08x\n", |
130 | mmc_hostname(host), mrq->cmd->opcode, | |
131 | mrq->cmd->arg, mrq->cmd->flags); | |
1da177e4 | 132 | |
e4d21708 PO |
133 | if (mrq->data) { |
134 | pr_debug("%s: blksz %d blocks %d flags %08x " | |
135 | "tsac %d ms nsac %d\n", | |
136 | mmc_hostname(host), mrq->data->blksz, | |
137 | mrq->data->blocks, mrq->data->flags, | |
ce252edd | 138 | mrq->data->timeout_ns / 1000000, |
e4d21708 PO |
139 | mrq->data->timeout_clks); |
140 | } | |
141 | ||
142 | if (mrq->stop) { | |
143 | pr_debug("%s: CMD%u arg %08x flags %08x\n", | |
144 | mmc_hostname(host), mrq->stop->opcode, | |
145 | mrq->stop->arg, mrq->stop->flags); | |
146 | } | |
147 | ||
f22ee4ed | 148 | WARN_ON(!host->claimed); |
1da177e4 | 149 | |
af8350c7 PO |
150 | led_trigger_event(host->led, LED_FULL); |
151 | ||
1da177e4 LT |
152 | mrq->cmd->error = 0; |
153 | mrq->cmd->mrq = mrq; | |
154 | if (mrq->data) { | |
fe4a3c7a | 155 | BUG_ON(mrq->data->blksz > host->max_blk_size); |
55db890a PO |
156 | BUG_ON(mrq->data->blocks > host->max_blk_count); |
157 | BUG_ON(mrq->data->blocks * mrq->data->blksz > | |
158 | host->max_req_size); | |
fe4a3c7a | 159 | |
976d9276 PO |
160 | #ifdef CONFIG_MMC_DEBUG |
161 | sz = 0; | |
a84756c5 PO |
162 | for_each_sg(mrq->data->sg, sg, mrq->data->sg_len, i) |
163 | sz += sg->length; | |
976d9276 PO |
164 | BUG_ON(sz != mrq->data->blocks * mrq->data->blksz); |
165 | #endif | |
166 | ||
1da177e4 LT |
167 | mrq->cmd->data = mrq->data; |
168 | mrq->data->error = 0; | |
169 | mrq->data->mrq = mrq; | |
170 | if (mrq->stop) { | |
171 | mrq->data->stop = mrq->stop; | |
172 | mrq->stop->error = 0; | |
173 | mrq->stop->mrq = mrq; | |
174 | } | |
175 | } | |
176 | host->ops->request(host, mrq); | |
177 | } | |
178 | ||
1da177e4 LT |
179 | static void mmc_wait_done(struct mmc_request *mrq) |
180 | { | |
181 | complete(mrq->done_data); | |
182 | } | |
183 | ||
67a61c48 PO |
184 | /** |
185 | * mmc_wait_for_req - start a request and wait for completion | |
186 | * @host: MMC host to start command | |
187 | * @mrq: MMC request to start | |
188 | * | |
189 | * Start a new MMC custom command request for a host, and wait | |
190 | * for the command to complete. Does not attempt to parse the | |
191 | * response. | |
192 | */ | |
193 | void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq) | |
1da177e4 | 194 | { |
0afffc72 | 195 | DECLARE_COMPLETION_ONSTACK(complete); |
1da177e4 LT |
196 | |
197 | mrq->done_data = &complete; | |
198 | mrq->done = mmc_wait_done; | |
199 | ||
200 | mmc_start_request(host, mrq); | |
201 | ||
202 | wait_for_completion(&complete); | |
1da177e4 LT |
203 | } |
204 | ||
205 | EXPORT_SYMBOL(mmc_wait_for_req); | |
206 | ||
207 | /** | |
208 | * mmc_wait_for_cmd - start a command and wait for completion | |
209 | * @host: MMC host to start command | |
210 | * @cmd: MMC command to start | |
211 | * @retries: maximum number of retries | |
212 | * | |
213 | * Start a new MMC command for a host, and wait for the command | |
214 | * to complete. Return any error that occurred while the command | |
215 | * was executing. Do not attempt to parse the response. | |
216 | */ | |
217 | int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd, int retries) | |
218 | { | |
219 | struct mmc_request mrq; | |
220 | ||
d84075c8 | 221 | WARN_ON(!host->claimed); |
1da177e4 LT |
222 | |
223 | memset(&mrq, 0, sizeof(struct mmc_request)); | |
224 | ||
225 | memset(cmd->resp, 0, sizeof(cmd->resp)); | |
226 | cmd->retries = retries; | |
227 | ||
228 | mrq.cmd = cmd; | |
229 | cmd->data = NULL; | |
230 | ||
231 | mmc_wait_for_req(host, &mrq); | |
232 | ||
233 | return cmd->error; | |
234 | } | |
235 | ||
236 | EXPORT_SYMBOL(mmc_wait_for_cmd); | |
237 | ||
d773d725 RK |
238 | /** |
239 | * mmc_set_data_timeout - set the timeout for a data command | |
240 | * @data: data phase for command | |
241 | * @card: the MMC card associated with the data transfer | |
67a61c48 PO |
242 | * |
243 | * Computes the data timeout parameters according to the | |
244 | * correct algorithm given the card type. | |
d773d725 | 245 | */ |
b146d26a | 246 | void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card) |
d773d725 RK |
247 | { |
248 | unsigned int mult; | |
249 | ||
e6f918bf PO |
250 | /* |
251 | * SDIO cards only define an upper 1 s limit on access. | |
252 | */ | |
253 | if (mmc_card_sdio(card)) { | |
254 | data->timeout_ns = 1000000000; | |
255 | data->timeout_clks = 0; | |
256 | return; | |
257 | } | |
258 | ||
d773d725 RK |
259 | /* |
260 | * SD cards use a 100 multiplier rather than 10 | |
261 | */ | |
262 | mult = mmc_card_sd(card) ? 100 : 10; | |
263 | ||
264 | /* | |
265 | * Scale up the multiplier (and therefore the timeout) by | |
266 | * the r2w factor for writes. | |
267 | */ | |
b146d26a | 268 | if (data->flags & MMC_DATA_WRITE) |
d773d725 RK |
269 | mult <<= card->csd.r2w_factor; |
270 | ||
271 | data->timeout_ns = card->csd.tacc_ns * mult; | |
272 | data->timeout_clks = card->csd.tacc_clks * mult; | |
273 | ||
274 | /* | |
275 | * SD cards also have an upper limit on the timeout. | |
276 | */ | |
277 | if (mmc_card_sd(card)) { | |
278 | unsigned int timeout_us, limit_us; | |
279 | ||
280 | timeout_us = data->timeout_ns / 1000; | |
281 | timeout_us += data->timeout_clks * 1000 / | |
282 | (card->host->ios.clock / 1000); | |
283 | ||
b146d26a | 284 | if (data->flags & MMC_DATA_WRITE) |
493890e7 PO |
285 | /* |
286 | * The limit is really 250 ms, but that is | |
287 | * insufficient for some crappy cards. | |
288 | */ | |
289 | limit_us = 300000; | |
d773d725 RK |
290 | else |
291 | limit_us = 100000; | |
292 | ||
fba68bd2 PL |
293 | /* |
294 | * SDHC cards always use these fixed values. | |
295 | */ | |
296 | if (timeout_us > limit_us || mmc_card_blockaddr(card)) { | |
d773d725 RK |
297 | data->timeout_ns = limit_us * 1000; |
298 | data->timeout_clks = 0; | |
299 | } | |
300 | } | |
301 | } | |
302 | EXPORT_SYMBOL(mmc_set_data_timeout); | |
303 | ||
ad3868b2 PO |
304 | /** |
305 | * mmc_align_data_size - pads a transfer size to a more optimal value | |
306 | * @card: the MMC card associated with the data transfer | |
307 | * @sz: original transfer size | |
308 | * | |
309 | * Pads the original data size with a number of extra bytes in | |
310 | * order to avoid controller bugs and/or performance hits | |
311 | * (e.g. some controllers revert to PIO for certain sizes). | |
312 | * | |
313 | * Returns the improved size, which might be unmodified. | |
314 | * | |
315 | * Note that this function is only relevant when issuing a | |
316 | * single scatter gather entry. | |
317 | */ | |
318 | unsigned int mmc_align_data_size(struct mmc_card *card, unsigned int sz) | |
319 | { | |
320 | /* | |
321 | * FIXME: We don't have a system for the controller to tell | |
322 | * the core about its problems yet, so for now we just 32-bit | |
323 | * align the size. | |
324 | */ | |
325 | sz = ((sz + 3) / 4) * 4; | |
326 | ||
327 | return sz; | |
328 | } | |
329 | EXPORT_SYMBOL(mmc_align_data_size); | |
330 | ||
1da177e4 | 331 | /** |
2342f332 | 332 | * __mmc_claim_host - exclusively claim a host |
1da177e4 | 333 | * @host: mmc host to claim |
2342f332 | 334 | * @abort: whether or not the operation should be aborted |
1da177e4 | 335 | * |
2342f332 NP |
336 | * Claim a host for a set of operations. If @abort is non null and |
337 | * dereference a non-zero value then this will return prematurely with | |
338 | * that non-zero value without acquiring the lock. Returns zero | |
339 | * with the lock held otherwise. | |
1da177e4 | 340 | */ |
2342f332 | 341 | int __mmc_claim_host(struct mmc_host *host, atomic_t *abort) |
1da177e4 LT |
342 | { |
343 | DECLARE_WAITQUEUE(wait, current); | |
344 | unsigned long flags; | |
2342f332 | 345 | int stop; |
1da177e4 | 346 | |
cf795bfb PO |
347 | might_sleep(); |
348 | ||
1da177e4 LT |
349 | add_wait_queue(&host->wq, &wait); |
350 | spin_lock_irqsave(&host->lock, flags); | |
351 | while (1) { | |
352 | set_current_state(TASK_UNINTERRUPTIBLE); | |
2342f332 NP |
353 | stop = abort ? atomic_read(abort) : 0; |
354 | if (stop || !host->claimed) | |
1da177e4 LT |
355 | break; |
356 | spin_unlock_irqrestore(&host->lock, flags); | |
357 | schedule(); | |
358 | spin_lock_irqsave(&host->lock, flags); | |
359 | } | |
360 | set_current_state(TASK_RUNNING); | |
2342f332 NP |
361 | if (!stop) |
362 | host->claimed = 1; | |
363 | else | |
364 | wake_up(&host->wq); | |
1da177e4 LT |
365 | spin_unlock_irqrestore(&host->lock, flags); |
366 | remove_wait_queue(&host->wq, &wait); | |
2342f332 | 367 | return stop; |
1da177e4 LT |
368 | } |
369 | ||
2342f332 | 370 | EXPORT_SYMBOL(__mmc_claim_host); |
1da177e4 LT |
371 | |
372 | /** | |
373 | * mmc_release_host - release a host | |
374 | * @host: mmc host to release | |
375 | * | |
376 | * Release a MMC host, allowing others to claim the host | |
377 | * for their operations. | |
378 | */ | |
379 | void mmc_release_host(struct mmc_host *host) | |
380 | { | |
381 | unsigned long flags; | |
382 | ||
d84075c8 | 383 | WARN_ON(!host->claimed); |
1da177e4 LT |
384 | |
385 | spin_lock_irqsave(&host->lock, flags); | |
f22ee4ed | 386 | host->claimed = 0; |
1da177e4 LT |
387 | spin_unlock_irqrestore(&host->lock, flags); |
388 | ||
389 | wake_up(&host->wq); | |
390 | } | |
391 | ||
392 | EXPORT_SYMBOL(mmc_release_host); | |
393 | ||
7ea239d9 PO |
394 | /* |
395 | * Internal function that does the actual ios call to the host driver, | |
396 | * optionally printing some debug output. | |
397 | */ | |
920e70c5 RK |
398 | static inline void mmc_set_ios(struct mmc_host *host) |
399 | { | |
400 | struct mmc_ios *ios = &host->ios; | |
401 | ||
cd9277c0 PO |
402 | pr_debug("%s: clock %uHz busmode %u powermode %u cs %u Vdd %u " |
403 | "width %u timing %u\n", | |
920e70c5 RK |
404 | mmc_hostname(host), ios->clock, ios->bus_mode, |
405 | ios->power_mode, ios->chip_select, ios->vdd, | |
cd9277c0 | 406 | ios->bus_width, ios->timing); |
fba68bd2 | 407 | |
920e70c5 RK |
408 | host->ops->set_ios(host, ios); |
409 | } | |
410 | ||
7ea239d9 PO |
411 | /* |
412 | * Control chip select pin on a host. | |
413 | */ | |
da7fbe58 | 414 | void mmc_set_chip_select(struct mmc_host *host, int mode) |
1da177e4 | 415 | { |
da7fbe58 PO |
416 | host->ios.chip_select = mode; |
417 | mmc_set_ios(host); | |
1da177e4 LT |
418 | } |
419 | ||
7ea239d9 PO |
420 | /* |
421 | * Sets the host clock to the highest possible frequency that | |
422 | * is below "hz". | |
423 | */ | |
424 | void mmc_set_clock(struct mmc_host *host, unsigned int hz) | |
425 | { | |
426 | WARN_ON(hz < host->f_min); | |
427 | ||
428 | if (hz > host->f_max) | |
429 | hz = host->f_max; | |
430 | ||
431 | host->ios.clock = hz; | |
432 | mmc_set_ios(host); | |
433 | } | |
434 | ||
435 | /* | |
436 | * Change the bus mode (open drain/push-pull) of a host. | |
437 | */ | |
438 | void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) | |
439 | { | |
440 | host->ios.bus_mode = mode; | |
441 | mmc_set_ios(host); | |
442 | } | |
443 | ||
444 | /* | |
445 | * Change data bus width of a host. | |
446 | */ | |
447 | void mmc_set_bus_width(struct mmc_host *host, unsigned int width) | |
448 | { | |
449 | host->ios.bus_width = width; | |
450 | mmc_set_ios(host); | |
451 | } | |
452 | ||
86e8286a AV |
453 | /** |
454 | * mmc_vdd_to_ocrbitnum - Convert a voltage to the OCR bit number | |
455 | * @vdd: voltage (mV) | |
456 | * @low_bits: prefer low bits in boundary cases | |
457 | * | |
458 | * This function returns the OCR bit number according to the provided @vdd | |
459 | * value. If conversion is not possible a negative errno value returned. | |
460 | * | |
461 | * Depending on the @low_bits flag the function prefers low or high OCR bits | |
462 | * on boundary voltages. For example, | |
463 | * with @low_bits = true, 3300 mV translates to ilog2(MMC_VDD_32_33); | |
464 | * with @low_bits = false, 3300 mV translates to ilog2(MMC_VDD_33_34); | |
465 | * | |
466 | * Any value in the [1951:1999] range translates to the ilog2(MMC_VDD_20_21). | |
467 | */ | |
468 | static int mmc_vdd_to_ocrbitnum(int vdd, bool low_bits) | |
469 | { | |
470 | const int max_bit = ilog2(MMC_VDD_35_36); | |
471 | int bit; | |
472 | ||
473 | if (vdd < 1650 || vdd > 3600) | |
474 | return -EINVAL; | |
475 | ||
476 | if (vdd >= 1650 && vdd <= 1950) | |
477 | return ilog2(MMC_VDD_165_195); | |
478 | ||
479 | if (low_bits) | |
480 | vdd -= 1; | |
481 | ||
482 | /* Base 2000 mV, step 100 mV, bit's base 8. */ | |
483 | bit = (vdd - 2000) / 100 + 8; | |
484 | if (bit > max_bit) | |
485 | return max_bit; | |
486 | return bit; | |
487 | } | |
488 | ||
489 | /** | |
490 | * mmc_vddrange_to_ocrmask - Convert a voltage range to the OCR mask | |
491 | * @vdd_min: minimum voltage value (mV) | |
492 | * @vdd_max: maximum voltage value (mV) | |
493 | * | |
494 | * This function returns the OCR mask bits according to the provided @vdd_min | |
495 | * and @vdd_max values. If conversion is not possible the function returns 0. | |
496 | * | |
497 | * Notes wrt boundary cases: | |
498 | * This function sets the OCR bits for all boundary voltages, for example | |
499 | * [3300:3400] range is translated to MMC_VDD_32_33 | MMC_VDD_33_34 | | |
500 | * MMC_VDD_34_35 mask. | |
501 | */ | |
502 | u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max) | |
503 | { | |
504 | u32 mask = 0; | |
505 | ||
506 | if (vdd_max < vdd_min) | |
507 | return 0; | |
508 | ||
509 | /* Prefer high bits for the boundary vdd_max values. */ | |
510 | vdd_max = mmc_vdd_to_ocrbitnum(vdd_max, false); | |
511 | if (vdd_max < 0) | |
512 | return 0; | |
513 | ||
514 | /* Prefer low bits for the boundary vdd_min values. */ | |
515 | vdd_min = mmc_vdd_to_ocrbitnum(vdd_min, true); | |
516 | if (vdd_min < 0) | |
517 | return 0; | |
518 | ||
519 | /* Fill the mask, from max bit to min bit. */ | |
520 | while (vdd_max >= vdd_min) | |
521 | mask |= 1 << vdd_max--; | |
522 | ||
523 | return mask; | |
524 | } | |
525 | EXPORT_SYMBOL(mmc_vddrange_to_ocrmask); | |
526 | ||
5c13941a DB |
527 | #ifdef CONFIG_REGULATOR |
528 | ||
529 | /** | |
530 | * mmc_regulator_get_ocrmask - return mask of supported voltages | |
531 | * @supply: regulator to use | |
532 | * | |
533 | * This returns either a negative errno, or a mask of voltages that | |
534 | * can be provided to MMC/SD/SDIO devices using the specified voltage | |
535 | * regulator. This would normally be called before registering the | |
536 | * MMC host adapter. | |
537 | */ | |
538 | int mmc_regulator_get_ocrmask(struct regulator *supply) | |
539 | { | |
540 | int result = 0; | |
541 | int count; | |
542 | int i; | |
543 | ||
544 | count = regulator_count_voltages(supply); | |
545 | if (count < 0) | |
546 | return count; | |
547 | ||
548 | for (i = 0; i < count; i++) { | |
549 | int vdd_uV; | |
550 | int vdd_mV; | |
551 | ||
552 | vdd_uV = regulator_list_voltage(supply, i); | |
553 | if (vdd_uV <= 0) | |
554 | continue; | |
555 | ||
556 | vdd_mV = vdd_uV / 1000; | |
557 | result |= mmc_vddrange_to_ocrmask(vdd_mV, vdd_mV); | |
558 | } | |
559 | ||
560 | return result; | |
561 | } | |
562 | EXPORT_SYMBOL(mmc_regulator_get_ocrmask); | |
563 | ||
564 | /** | |
565 | * mmc_regulator_set_ocr - set regulator to match host->ios voltage | |
566 | * @vdd_bit: zero for power off, else a bit number (host->ios.vdd) | |
567 | * @supply: regulator to use | |
568 | * | |
569 | * Returns zero on success, else negative errno. | |
570 | * | |
571 | * MMC host drivers may use this to enable or disable a regulator using | |
572 | * a particular supply voltage. This would normally be called from the | |
573 | * set_ios() method. | |
574 | */ | |
575 | int mmc_regulator_set_ocr(struct regulator *supply, unsigned short vdd_bit) | |
576 | { | |
577 | int result = 0; | |
578 | int min_uV, max_uV; | |
579 | int enabled; | |
580 | ||
581 | enabled = regulator_is_enabled(supply); | |
582 | if (enabled < 0) | |
583 | return enabled; | |
584 | ||
585 | if (vdd_bit) { | |
586 | int tmp; | |
587 | int voltage; | |
588 | ||
589 | /* REVISIT mmc_vddrange_to_ocrmask() may have set some | |
590 | * bits this regulator doesn't quite support ... don't | |
591 | * be too picky, most cards and regulators are OK with | |
592 | * a 0.1V range goof (it's a small error percentage). | |
593 | */ | |
594 | tmp = vdd_bit - ilog2(MMC_VDD_165_195); | |
595 | if (tmp == 0) { | |
596 | min_uV = 1650 * 1000; | |
597 | max_uV = 1950 * 1000; | |
598 | } else { | |
599 | min_uV = 1900 * 1000 + tmp * 100 * 1000; | |
600 | max_uV = min_uV + 100 * 1000; | |
601 | } | |
602 | ||
603 | /* avoid needless changes to this voltage; the regulator | |
604 | * might not allow this operation | |
605 | */ | |
606 | voltage = regulator_get_voltage(supply); | |
607 | if (voltage < 0) | |
608 | result = voltage; | |
609 | else if (voltage < min_uV || voltage > max_uV) | |
610 | result = regulator_set_voltage(supply, min_uV, max_uV); | |
611 | else | |
612 | result = 0; | |
613 | ||
614 | if (result == 0 && !enabled) | |
615 | result = regulator_enable(supply); | |
616 | } else if (enabled) { | |
617 | result = regulator_disable(supply); | |
618 | } | |
619 | ||
620 | return result; | |
621 | } | |
622 | EXPORT_SYMBOL(mmc_regulator_set_ocr); | |
623 | ||
624 | #endif | |
625 | ||
1da177e4 LT |
626 | /* |
627 | * Mask off any voltages we don't support and select | |
628 | * the lowest voltage | |
629 | */ | |
7ea239d9 | 630 | u32 mmc_select_voltage(struct mmc_host *host, u32 ocr) |
1da177e4 LT |
631 | { |
632 | int bit; | |
633 | ||
634 | ocr &= host->ocr_avail; | |
635 | ||
636 | bit = ffs(ocr); | |
637 | if (bit) { | |
638 | bit -= 1; | |
639 | ||
63ef731a | 640 | ocr &= 3 << bit; |
1da177e4 LT |
641 | |
642 | host->ios.vdd = bit; | |
920e70c5 | 643 | mmc_set_ios(host); |
1da177e4 | 644 | } else { |
f6e10b86 DB |
645 | pr_warning("%s: host doesn't support card's voltages\n", |
646 | mmc_hostname(host)); | |
1da177e4 LT |
647 | ocr = 0; |
648 | } | |
649 | ||
650 | return ocr; | |
651 | } | |
652 | ||
b57c43ad | 653 | /* |
7ea239d9 | 654 | * Select timing parameters for host. |
b57c43ad | 655 | */ |
7ea239d9 | 656 | void mmc_set_timing(struct mmc_host *host, unsigned int timing) |
b57c43ad | 657 | { |
7ea239d9 PO |
658 | host->ios.timing = timing; |
659 | mmc_set_ios(host); | |
b57c43ad PO |
660 | } |
661 | ||
1da177e4 | 662 | /* |
45f8245b RK |
663 | * Apply power to the MMC stack. This is a two-stage process. |
664 | * First, we enable power to the card without the clock running. | |
665 | * We then wait a bit for the power to stabilise. Finally, | |
666 | * enable the bus drivers and clock to the card. | |
667 | * | |
668 | * We must _NOT_ enable the clock prior to power stablising. | |
669 | * | |
670 | * If a host does all the power sequencing itself, ignore the | |
671 | * initial MMC_POWER_UP stage. | |
1da177e4 LT |
672 | */ |
673 | static void mmc_power_up(struct mmc_host *host) | |
674 | { | |
675 | int bit = fls(host->ocr_avail) - 1; | |
676 | ||
677 | host->ios.vdd = bit; | |
af517150 DB |
678 | if (mmc_host_is_spi(host)) { |
679 | host->ios.chip_select = MMC_CS_HIGH; | |
680 | host->ios.bus_mode = MMC_BUSMODE_PUSHPULL; | |
681 | } else { | |
682 | host->ios.chip_select = MMC_CS_DONTCARE; | |
683 | host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; | |
684 | } | |
1da177e4 | 685 | host->ios.power_mode = MMC_POWER_UP; |
f218278a | 686 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
cd9277c0 | 687 | host->ios.timing = MMC_TIMING_LEGACY; |
920e70c5 | 688 | mmc_set_ios(host); |
1da177e4 | 689 | |
f9996aee PO |
690 | /* |
691 | * This delay should be sufficient to allow the power supply | |
692 | * to reach the minimum voltage. | |
693 | */ | |
694 | mmc_delay(2); | |
1da177e4 LT |
695 | |
696 | host->ios.clock = host->f_min; | |
697 | host->ios.power_mode = MMC_POWER_ON; | |
920e70c5 | 698 | mmc_set_ios(host); |
1da177e4 | 699 | |
f9996aee PO |
700 | /* |
701 | * This delay must be at least 74 clock sizes, or 1 ms, or the | |
702 | * time required to reach a stable voltage. | |
703 | */ | |
1da177e4 LT |
704 | mmc_delay(2); |
705 | } | |
706 | ||
707 | static void mmc_power_off(struct mmc_host *host) | |
708 | { | |
709 | host->ios.clock = 0; | |
710 | host->ios.vdd = 0; | |
af517150 DB |
711 | if (!mmc_host_is_spi(host)) { |
712 | host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; | |
713 | host->ios.chip_select = MMC_CS_DONTCARE; | |
714 | } | |
1da177e4 | 715 | host->ios.power_mode = MMC_POWER_OFF; |
f218278a | 716 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
cd9277c0 | 717 | host->ios.timing = MMC_TIMING_LEGACY; |
920e70c5 | 718 | mmc_set_ios(host); |
1da177e4 LT |
719 | } |
720 | ||
39361851 AB |
721 | /* |
722 | * Cleanup when the last reference to the bus operator is dropped. | |
723 | */ | |
261172fd | 724 | static void __mmc_release_bus(struct mmc_host *host) |
39361851 AB |
725 | { |
726 | BUG_ON(!host); | |
727 | BUG_ON(host->bus_refs); | |
728 | BUG_ON(!host->bus_dead); | |
729 | ||
730 | host->bus_ops = NULL; | |
731 | } | |
732 | ||
733 | /* | |
734 | * Increase reference count of bus operator | |
735 | */ | |
736 | static inline void mmc_bus_get(struct mmc_host *host) | |
737 | { | |
738 | unsigned long flags; | |
739 | ||
740 | spin_lock_irqsave(&host->lock, flags); | |
741 | host->bus_refs++; | |
742 | spin_unlock_irqrestore(&host->lock, flags); | |
743 | } | |
744 | ||
745 | /* | |
746 | * Decrease reference count of bus operator and free it if | |
747 | * it is the last reference. | |
748 | */ | |
749 | static inline void mmc_bus_put(struct mmc_host *host) | |
750 | { | |
751 | unsigned long flags; | |
752 | ||
753 | spin_lock_irqsave(&host->lock, flags); | |
754 | host->bus_refs--; | |
755 | if ((host->bus_refs == 0) && host->bus_ops) | |
756 | __mmc_release_bus(host); | |
757 | spin_unlock_irqrestore(&host->lock, flags); | |
758 | } | |
759 | ||
1da177e4 | 760 | /* |
7ea239d9 PO |
761 | * Assign a mmc bus handler to a host. Only one bus handler may control a |
762 | * host at any given time. | |
1da177e4 | 763 | */ |
7ea239d9 | 764 | void mmc_attach_bus(struct mmc_host *host, const struct mmc_bus_ops *ops) |
1da177e4 | 765 | { |
7ea239d9 | 766 | unsigned long flags; |
e45a1bd2 | 767 | |
7ea239d9 PO |
768 | BUG_ON(!host); |
769 | BUG_ON(!ops); | |
b855885e | 770 | |
d84075c8 | 771 | WARN_ON(!host->claimed); |
bce40a36 | 772 | |
7ea239d9 | 773 | spin_lock_irqsave(&host->lock, flags); |
bce40a36 | 774 | |
7ea239d9 PO |
775 | BUG_ON(host->bus_ops); |
776 | BUG_ON(host->bus_refs); | |
b57c43ad | 777 | |
7ea239d9 PO |
778 | host->bus_ops = ops; |
779 | host->bus_refs = 1; | |
780 | host->bus_dead = 0; | |
b57c43ad | 781 | |
7ea239d9 | 782 | spin_unlock_irqrestore(&host->lock, flags); |
b57c43ad PO |
783 | } |
784 | ||
7ea239d9 PO |
785 | /* |
786 | * Remove the current bus handler from a host. Assumes that there are | |
787 | * no interesting cards left, so the bus is powered down. | |
788 | */ | |
789 | void mmc_detach_bus(struct mmc_host *host) | |
7ccd266e | 790 | { |
7ea239d9 | 791 | unsigned long flags; |
7ccd266e | 792 | |
7ea239d9 | 793 | BUG_ON(!host); |
7ccd266e | 794 | |
d84075c8 PO |
795 | WARN_ON(!host->claimed); |
796 | WARN_ON(!host->bus_ops); | |
cd9277c0 | 797 | |
7ea239d9 | 798 | spin_lock_irqsave(&host->lock, flags); |
7ccd266e | 799 | |
7ea239d9 | 800 | host->bus_dead = 1; |
7ccd266e | 801 | |
7ea239d9 | 802 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 | 803 | |
7ea239d9 | 804 | mmc_power_off(host); |
1da177e4 | 805 | |
7ea239d9 | 806 | mmc_bus_put(host); |
1da177e4 LT |
807 | } |
808 | ||
1da177e4 LT |
809 | /** |
810 | * mmc_detect_change - process change of state on a MMC socket | |
811 | * @host: host which changed state. | |
8dc00335 | 812 | * @delay: optional delay to wait before detection (jiffies) |
1da177e4 | 813 | * |
67a61c48 PO |
814 | * MMC drivers should call this when they detect a card has been |
815 | * inserted or removed. The MMC layer will confirm that any | |
816 | * present card is still functional, and initialize any newly | |
817 | * inserted. | |
1da177e4 | 818 | */ |
8dc00335 | 819 | void mmc_detect_change(struct mmc_host *host, unsigned long delay) |
1da177e4 | 820 | { |
3b91e550 | 821 | #ifdef CONFIG_MMC_DEBUG |
1efd48b3 | 822 | unsigned long flags; |
01f41ec7 | 823 | spin_lock_irqsave(&host->lock, flags); |
d84075c8 | 824 | WARN_ON(host->removed); |
01f41ec7 | 825 | spin_unlock_irqrestore(&host->lock, flags); |
3b91e550 PO |
826 | #endif |
827 | ||
c4028958 | 828 | mmc_schedule_delayed_work(&host->detect, delay); |
1da177e4 LT |
829 | } |
830 | ||
831 | EXPORT_SYMBOL(mmc_detect_change); | |
832 | ||
833 | ||
b93931a6 | 834 | void mmc_rescan(struct work_struct *work) |
1da177e4 | 835 | { |
c4028958 DH |
836 | struct mmc_host *host = |
837 | container_of(work, struct mmc_host, detect.work); | |
7ea239d9 PO |
838 | u32 ocr; |
839 | int err; | |
1da177e4 | 840 | |
7ea239d9 | 841 | mmc_bus_get(host); |
b855885e | 842 | |
7ea239d9 | 843 | if (host->bus_ops == NULL) { |
1da177e4 | 844 | /* |
7ea239d9 PO |
845 | * Only we can add a new handler, so it's safe to |
846 | * release the lock here. | |
1da177e4 | 847 | */ |
7ea239d9 | 848 | mmc_bus_put(host); |
1da177e4 | 849 | |
28f52482 AV |
850 | if (host->ops->get_cd && host->ops->get_cd(host) == 0) |
851 | goto out; | |
852 | ||
7ea239d9 | 853 | mmc_claim_host(host); |
1da177e4 | 854 | |
7ea239d9 PO |
855 | mmc_power_up(host); |
856 | mmc_go_idle(host); | |
1da177e4 | 857 | |
7ea239d9 | 858 | mmc_send_if_cond(host, host->ocr_avail); |
1da177e4 | 859 | |
5c4e6f13 PO |
860 | /* |
861 | * First we search for SDIO... | |
862 | */ | |
863 | err = mmc_send_io_op_cond(host, 0, &ocr); | |
864 | if (!err) { | |
865 | if (mmc_attach_sdio(host, ocr)) | |
866 | mmc_power_off(host); | |
28f52482 | 867 | goto out; |
5c4e6f13 PO |
868 | } |
869 | ||
870 | /* | |
871 | * ...then normal SD... | |
872 | */ | |
7ea239d9 | 873 | err = mmc_send_app_op_cond(host, 0, &ocr); |
17b0429d | 874 | if (!err) { |
7ea239d9 PO |
875 | if (mmc_attach_sd(host, ocr)) |
876 | mmc_power_off(host); | |
28f52482 | 877 | goto out; |
5c4e6f13 PO |
878 | } |
879 | ||
880 | /* | |
881 | * ...and finally MMC. | |
882 | */ | |
883 | err = mmc_send_op_cond(host, 0, &ocr); | |
884 | if (!err) { | |
885 | if (mmc_attach_mmc(host, ocr)) | |
7ea239d9 | 886 | mmc_power_off(host); |
28f52482 | 887 | goto out; |
7ea239d9 | 888 | } |
5c4e6f13 PO |
889 | |
890 | mmc_release_host(host); | |
891 | mmc_power_off(host); | |
7ea239d9 PO |
892 | } else { |
893 | if (host->bus_ops->detect && !host->bus_dead) | |
894 | host->bus_ops->detect(host); | |
895 | ||
896 | mmc_bus_put(host); | |
897 | } | |
28f52482 AV |
898 | out: |
899 | if (host->caps & MMC_CAP_NEEDS_POLL) | |
900 | mmc_schedule_delayed_work(&host->detect, HZ); | |
1da177e4 LT |
901 | } |
902 | ||
b93931a6 | 903 | void mmc_start_host(struct mmc_host *host) |
1da177e4 | 904 | { |
b93931a6 PO |
905 | mmc_power_off(host); |
906 | mmc_detect_change(host, 0); | |
1da177e4 LT |
907 | } |
908 | ||
b93931a6 | 909 | void mmc_stop_host(struct mmc_host *host) |
1da177e4 | 910 | { |
3b91e550 | 911 | #ifdef CONFIG_MMC_DEBUG |
1efd48b3 PO |
912 | unsigned long flags; |
913 | spin_lock_irqsave(&host->lock, flags); | |
3b91e550 | 914 | host->removed = 1; |
1efd48b3 | 915 | spin_unlock_irqrestore(&host->lock, flags); |
3b91e550 PO |
916 | #endif |
917 | ||
918 | mmc_flush_scheduled_work(); | |
919 | ||
7ea239d9 PO |
920 | mmc_bus_get(host); |
921 | if (host->bus_ops && !host->bus_dead) { | |
922 | if (host->bus_ops->remove) | |
923 | host->bus_ops->remove(host); | |
924 | ||
925 | mmc_claim_host(host); | |
926 | mmc_detach_bus(host); | |
927 | mmc_release_host(host); | |
1da177e4 | 928 | } |
7ea239d9 PO |
929 | mmc_bus_put(host); |
930 | ||
931 | BUG_ON(host->card); | |
1da177e4 LT |
932 | |
933 | mmc_power_off(host); | |
934 | } | |
935 | ||
1da177e4 LT |
936 | #ifdef CONFIG_PM |
937 | ||
938 | /** | |
939 | * mmc_suspend_host - suspend a host | |
940 | * @host: mmc host | |
941 | * @state: suspend mode (PM_SUSPEND_xxx) | |
942 | */ | |
e5378ca8 | 943 | int mmc_suspend_host(struct mmc_host *host, pm_message_t state) |
1da177e4 | 944 | { |
b5af25be PO |
945 | mmc_flush_scheduled_work(); |
946 | ||
7ea239d9 PO |
947 | mmc_bus_get(host); |
948 | if (host->bus_ops && !host->bus_dead) { | |
6abaa0c9 PO |
949 | if (host->bus_ops->suspend) |
950 | host->bus_ops->suspend(host); | |
951 | if (!host->bus_ops->resume) { | |
952 | if (host->bus_ops->remove) | |
953 | host->bus_ops->remove(host); | |
954 | ||
955 | mmc_claim_host(host); | |
956 | mmc_detach_bus(host); | |
957 | mmc_release_host(host); | |
958 | } | |
b5af25be | 959 | } |
7ea239d9 PO |
960 | mmc_bus_put(host); |
961 | ||
1da177e4 | 962 | mmc_power_off(host); |
1da177e4 LT |
963 | |
964 | return 0; | |
965 | } | |
966 | ||
967 | EXPORT_SYMBOL(mmc_suspend_host); | |
968 | ||
969 | /** | |
970 | * mmc_resume_host - resume a previously suspended host | |
971 | * @host: mmc host | |
972 | */ | |
973 | int mmc_resume_host(struct mmc_host *host) | |
974 | { | |
6abaa0c9 PO |
975 | mmc_bus_get(host); |
976 | if (host->bus_ops && !host->bus_dead) { | |
977 | mmc_power_up(host); | |
978 | BUG_ON(!host->bus_ops->resume); | |
979 | host->bus_ops->resume(host); | |
980 | } | |
981 | mmc_bus_put(host); | |
982 | ||
983 | /* | |
984 | * We add a slight delay here so that resume can progress | |
985 | * in parallel. | |
986 | */ | |
987 | mmc_detect_change(host, 1); | |
1da177e4 LT |
988 | |
989 | return 0; | |
990 | } | |
991 | ||
992 | EXPORT_SYMBOL(mmc_resume_host); | |
993 | ||
994 | #endif | |
995 | ||
ffce2e7e PO |
996 | static int __init mmc_init(void) |
997 | { | |
998 | int ret; | |
999 | ||
1000 | workqueue = create_singlethread_workqueue("kmmcd"); | |
1001 | if (!workqueue) | |
1002 | return -ENOMEM; | |
1003 | ||
1004 | ret = mmc_register_bus(); | |
e29a7d73 PO |
1005 | if (ret) |
1006 | goto destroy_workqueue; | |
1007 | ||
1008 | ret = mmc_register_host_class(); | |
1009 | if (ret) | |
1010 | goto unregister_bus; | |
1011 | ||
1012 | ret = sdio_register_bus(); | |
1013 | if (ret) | |
1014 | goto unregister_host_class; | |
1015 | ||
1016 | return 0; | |
1017 | ||
1018 | unregister_host_class: | |
1019 | mmc_unregister_host_class(); | |
1020 | unregister_bus: | |
1021 | mmc_unregister_bus(); | |
1022 | destroy_workqueue: | |
1023 | destroy_workqueue(workqueue); | |
1024 | ||
ffce2e7e PO |
1025 | return ret; |
1026 | } | |
1027 | ||
1028 | static void __exit mmc_exit(void) | |
1029 | { | |
e29a7d73 | 1030 | sdio_unregister_bus(); |
ffce2e7e PO |
1031 | mmc_unregister_host_class(); |
1032 | mmc_unregister_bus(); | |
1033 | destroy_workqueue(workqueue); | |
1034 | } | |
1035 | ||
26074962 | 1036 | subsys_initcall(mmc_init); |
ffce2e7e PO |
1037 | module_exit(mmc_exit); |
1038 | ||
1da177e4 | 1039 | MODULE_LICENSE("GPL"); |