[linux-2.6-block.git] / drivers / misc / eeprom / eeprom_93xx46.c

/*
 * Driver for 93xx46 EEPROMs
 *
 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/delay.h>
#include <linux/device.h>
#include <linux/gpio/consumer.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include <linux/nvmem-provider.h>
#include <linux/regmap.h>
#include <linux/eeprom_93xx46.h>

#define OP_START	0x4
#define OP_WRITE	(OP_START | 0x1)
#define OP_READ		(OP_START | 0x2)
#define ADDR_EWDS	0x00
#define ADDR_ERAL	0x20
#define ADDR_EWEN	0x30

struct eeprom_93xx46_devtype_data {
	unsigned int quirks;
};

static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
	.quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
		  EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
};

struct eeprom_93xx46_dev {
	struct spi_device *spi;
	struct eeprom_93xx46_platform_data *pdata;
	struct mutex lock;
	struct regmap_config regmap_config;
	struct nvmem_config nvmem_config;
	struct nvmem_device *nvmem;
	int addrlen;
	int size;
};

static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
{
	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
}

static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
{
	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
}

static ssize_t
eeprom_93xx46_read(struct eeprom_93xx46_dev *edev, char *buf,
		   unsigned off, size_t count)
{
	ssize_t ret = 0;

	if (unlikely(off >= edev->size))
		return 0;
	if ((off + count) > edev->size)
		count = edev->size - off;
	if (unlikely(!count))
		return count;

	mutex_lock(&edev->lock);

	if (edev->pdata->prepare)
		edev->pdata->prepare(edev);

	while (count) {
		struct spi_message m;
		struct spi_transfer t[2] = { { 0 } };
		u16 cmd_addr = OP_READ << edev->addrlen;
		size_t nbytes = count;
		int bits;
		int err;

		if (edev->addrlen == 7) {
			cmd_addr |= off & 0x7f;
			bits = 10;
			if (has_quirk_single_word_read(edev))
				nbytes = 1;
		} else {
			cmd_addr |= (off >> 1) & 0x3f;
			bits = 9;
			if (has_quirk_single_word_read(edev))
				nbytes = 2;
		}

		dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
			cmd_addr, edev->spi->max_speed_hz);

		spi_message_init(&m);

		t[0].tx_buf = (char *)&cmd_addr;
		t[0].len = 2;
		t[0].bits_per_word = bits;
		spi_message_add_tail(&t[0], &m);

		t[1].rx_buf = buf;
		t[1].len = count;
		t[1].bits_per_word = 8;
		spi_message_add_tail(&t[1], &m);

		err = spi_sync(edev->spi, &m);
		/* have to wait at least Tcsl ns */
		ndelay(250);

		if (err) {
			dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
				nbytes, (int)off, err);
			ret = err;
			break;
		}

		buf += nbytes;
		off += nbytes;
		count -= nbytes;
		ret += nbytes;
	}

	if (edev->pdata->finish)
		edev->pdata->finish(edev);

	mutex_unlock(&edev->lock);
	return ret;
}

static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
{
	struct spi_message m;
	struct spi_transfer t;
	int bits, ret;
	u16 cmd_addr;

	cmd_addr = OP_START << edev->addrlen;
	if (edev->addrlen == 7) {
		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
		bits = 10;
	} else {
		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
		bits = 9;
	}

	if (has_quirk_instruction_length(edev)) {
		cmd_addr <<= 2;
		bits += 2;
	}

	dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
			is_on ? "en" : "ds", cmd_addr, bits);

	spi_message_init(&m);
	memset(&t, 0, sizeof(t));

	t.tx_buf = &cmd_addr;
	t.len = 2;
	t.bits_per_word = bits;
	spi_message_add_tail(&t, &m);

	mutex_lock(&edev->lock);

	if (edev->pdata->prepare)
		edev->pdata->prepare(edev);

	ret = spi_sync(edev->spi, &m);
	/* have to wait at least Tcsl ns */
	ndelay(250);
	if (ret)
		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
			is_on ? "en" : "dis", ret);

	if (edev->pdata->finish)
		edev->pdata->finish(edev);

	mutex_unlock(&edev->lock);
	return ret;
}

static ssize_t
eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
			 const char *buf, unsigned off)
{
	struct spi_message m;
	struct spi_transfer t[2];
	int bits, data_len, ret;
	u16 cmd_addr;

	cmd_addr = OP_WRITE << edev->addrlen;

	if (edev->addrlen == 7) {
		cmd_addr |= off & 0x7f;
		bits = 10;
		data_len = 1;
	} else {
		cmd_addr |= (off >> 1) & 0x3f;
		bits = 9;
		data_len = 2;
	}

	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);

	spi_message_init(&m);
	memset(t, 0, sizeof(t));

	t[0].tx_buf = (char *)&cmd_addr;
	t[0].len = 2;
	t[0].bits_per_word = bits;
	spi_message_add_tail(&t[0], &m);

	t[1].tx_buf = buf;
	t[1].len = data_len;
	t[1].bits_per_word = 8;
	spi_message_add_tail(&t[1], &m);

	ret = spi_sync(edev->spi, &m);
	/* have to wait program cycle time Twc ms */
	mdelay(6);
	return ret;
}

static ssize_t
eeprom_93xx46_write(struct eeprom_93xx46_dev *edev, const char *buf,
		    loff_t off, size_t count)
{
	int i, ret, step = 1;

	if (unlikely(off >= edev->size))
		return -EFBIG;
	if ((off + count) > edev->size)
		count = edev->size - off;
	if (unlikely(!count))
		return count;

	/* only write even number of bytes on 16-bit devices */
	if (edev->addrlen == 6) {
		step = 2;
		count &= ~1;
	}

	/* erase/write enable */
	ret = eeprom_93xx46_ew(edev, 1);
	if (ret)
		return ret;

	mutex_lock(&edev->lock);

	if (edev->pdata->prepare)
		edev->pdata->prepare(edev);

	for (i = 0; i < count; i += step) {
		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
		if (ret) {
			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
				(int)off + i, ret);
			break;
		}
	}

	if (edev->pdata->finish)
		edev->pdata->finish(edev);

	mutex_unlock(&edev->lock);

	/* erase/write disable */
	eeprom_93xx46_ew(edev, 0);
	return ret ? : count;
}

/*
 * Provide a regmap interface, which is registered with the NVMEM
 * framework
*/
static int eeprom_93xx46_regmap_read(void *context, const void *reg,
				     size_t reg_size, void *val,
				     size_t val_size)
{
	struct eeprom_93xx46_dev *eeprom_93xx46 = context;
	off_t offset = *(u32 *)reg;
	int err;

	err = eeprom_93xx46_read(eeprom_93xx46, val, offset, val_size);
	if (err)
		return err;
	return 0;
}

static int eeprom_93xx46_regmap_write(void *context, const void *data,
				      size_t count)
{
	struct eeprom_93xx46_dev *eeprom_93xx46 = context;
	const char *buf;
	u32 offset;
	size_t len;
	int err;

	memcpy(&offset, data, sizeof(offset));
	buf = (const char *)data + sizeof(offset);
	len = count - sizeof(offset);

	err = eeprom_93xx46_write(eeprom_93xx46, buf, offset, len);
	if (err)
		return err;
	return 0;
}

static const struct regmap_bus eeprom_93xx46_regmap_bus = {
	.read = eeprom_93xx46_regmap_read,
	.write = eeprom_93xx46_regmap_write,
	.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
};

static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
{
	struct eeprom_93xx46_platform_data *pd = edev->pdata;
	struct spi_message m;
	struct spi_transfer t;
	int bits, ret;
	u16 cmd_addr;

	cmd_addr = OP_START << edev->addrlen;
	if (edev->addrlen == 7) {
		cmd_addr |= ADDR_ERAL << 1;
		bits = 10;
	} else {
		cmd_addr |= ADDR_ERAL;
		bits = 9;
	}

	if (has_quirk_instruction_length(edev)) {
		cmd_addr <<= 2;
		bits += 2;
	}

	dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);

	spi_message_init(&m);
	memset(&t, 0, sizeof(t));

	t.tx_buf = &cmd_addr;
	t.len = 2;
	t.bits_per_word = bits;
	spi_message_add_tail(&t, &m);

	mutex_lock(&edev->lock);

	if (edev->pdata->prepare)
		edev->pdata->prepare(edev);

	ret = spi_sync(edev->spi, &m);
	if (ret)
		dev_err(&edev->spi->dev, "erase error %d\n", ret);
	/* have to wait erase cycle time Tec ms */
	mdelay(6);

	if (pd->finish)
		pd->finish(edev);

	mutex_unlock(&edev->lock);
	return ret;
}

static ssize_t eeprom_93xx46_store_erase(struct device *dev,
					 struct device_attribute *attr,
					 const char *buf, size_t count)
{
	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
	int erase = 0, ret;

	sscanf(buf, "%d", &erase);
	if (erase) {
		ret = eeprom_93xx46_ew(edev, 1);
		if (ret)
			return ret;
		ret = eeprom_93xx46_eral(edev);
		if (ret)
			return ret;
		ret = eeprom_93xx46_ew(edev, 0);
		if (ret)
			return ret;
	}
	return count;
}
static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);

static void select_assert(void *context)
{
	struct eeprom_93xx46_dev *edev = context;

	gpiod_set_value_cansleep(edev->pdata->select, 1);
}

static void select_deassert(void *context)
{
	struct eeprom_93xx46_dev *edev = context;

	gpiod_set_value_cansleep(edev->pdata->select, 0);
}

static const struct of_device_id eeprom_93xx46_of_table[] = {
	{ .compatible = "eeprom-93xx46", },
	{ .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
	{}
};
MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);

static int eeprom_93xx46_probe_dt(struct spi_device *spi)
{
	const struct of_device_id *of_id =
		of_match_device(eeprom_93xx46_of_table, &spi->dev);
	struct device_node *np = spi->dev.of_node;
	struct eeprom_93xx46_platform_data *pd;
	u32 tmp;
	int gpio;
	enum of_gpio_flags of_flags;
	int ret;

	pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
	if (!pd)
		return -ENOMEM;

	ret = of_property_read_u32(np, "data-size", &tmp);
	if (ret < 0) {
		dev_err(&spi->dev, "data-size property not found\n");
		return ret;
	}

	if (tmp == 8) {
		pd->flags |= EE_ADDR8;
	} else if (tmp == 16) {
		pd->flags |= EE_ADDR16;
	} else {
		dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
		return -EINVAL;
	}

	if (of_property_read_bool(np, "read-only"))
		pd->flags |= EE_READONLY;

	gpio = of_get_named_gpio_flags(np, "select-gpios", 0, &of_flags);
	if (gpio_is_valid(gpio)) {
		unsigned long flags =
			of_flags == OF_GPIO_ACTIVE_LOW ? GPIOF_ACTIVE_LOW : 0;

		ret = devm_gpio_request_one(&spi->dev, gpio, flags,
					    "eeprom_93xx46_select");
		if (ret)
			return ret;

		pd->select = gpio_to_desc(gpio);
		pd->prepare = select_assert;
		pd->finish = select_deassert;

		gpiod_direction_output(pd->select, 0);
	}

	if (of_id->data) {
		const struct eeprom_93xx46_devtype_data *data = of_id->data;

		pd->quirks = data->quirks;
	}

	spi->dev.platform_data = pd;

	return 0;
}

static int eeprom_93xx46_probe(struct spi_device *spi)
{
	struct eeprom_93xx46_platform_data *pd;
	struct eeprom_93xx46_dev *edev;
	struct regmap *regmap;
	int err;

	if (spi->dev.of_node) {
		err = eeprom_93xx46_probe_dt(spi);
		if (err < 0)
			return err;
	}

	pd = spi->dev.platform_data;
	if (!pd) {
		dev_err(&spi->dev, "missing platform data\n");
		return -ENODEV;
	}

	edev = kzalloc(sizeof(*edev), GFP_KERNEL);
	if (!edev)
		return -ENOMEM;

	if (pd->flags & EE_ADDR8)
		edev->addrlen = 7;
	else if (pd->flags & EE_ADDR16)
		edev->addrlen = 6;
	else {
		dev_err(&spi->dev, "unspecified address type\n");
		err = -EINVAL;
		goto fail;
	}

	mutex_init(&edev->lock);

	edev->spi = spi_dev_get(spi);
	edev->pdata = pd;

	edev->size = 128;

	edev->regmap_config.reg_bits = 32;
	edev->regmap_config.val_bits = 8;
	edev->regmap_config.reg_stride = 1;
	edev->regmap_config.max_register = edev->size - 1;

	regmap = devm_regmap_init(&spi->dev, &eeprom_93xx46_regmap_bus, edev,
				  &edev->regmap_config);
	if (IS_ERR(regmap)) {
		dev_err(&spi->dev, "regmap init failed\n");
		err = PTR_ERR(regmap);
		goto fail;
	}

	edev->nvmem_config.name = dev_name(&spi->dev);
	edev->nvmem_config.dev = &spi->dev;
	edev->nvmem_config.read_only = pd->flags & EE_READONLY;
	edev->nvmem_config.root_only = true;
	edev->nvmem_config.owner = THIS_MODULE;
	edev->nvmem_config.compat = true;
	edev->nvmem_config.base_dev = &spi->dev;

	edev->nvmem = nvmem_register(&edev->nvmem_config);
	if (IS_ERR(edev->nvmem)) {
		err = PTR_ERR(edev->nvmem);
		goto fail;
	}

	dev_info(&spi->dev, "%d-bit eeprom %s\n",
		(pd->flags & EE_ADDR8) ? 8 : 16,
		(pd->flags & EE_READONLY) ? "(readonly)" : "");

	if (!(pd->flags & EE_READONLY)) {
		if (device_create_file(&spi->dev, &dev_attr_erase))
			dev_err(&spi->dev, "can't create erase interface\n");
	}

	spi_set_drvdata(spi, edev);
	return 0;
fail:
	kfree(edev);
	return err;
}

static int eeprom_93xx46_remove(struct spi_device *spi)
{
	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);

	nvmem_unregister(edev->nvmem);

	if (!(edev->pdata->flags & EE_READONLY))
		device_remove_file(&spi->dev, &dev_attr_erase);

	kfree(edev);
	return 0;
}

static struct spi_driver eeprom_93xx46_driver = {
	.driver = {
		.name	= "93xx46",
		.of_match_table = of_match_ptr(eeprom_93xx46_of_table),
	},
	.probe		= eeprom_93xx46_probe,
	.remove		= eeprom_93xx46_remove,
};

module_spi_driver(eeprom_93xx46_driver);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
MODULE_ALIAS("spi:93xx46");
Commit	Line	Data
06b4501e AG	1	/*
	2	* Driver for 93xx46 EEPROMs
	3	*
	4	* (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#include <linux/delay.h>
	12	#include <linux/device.h>
3ca9b1ac	13	#include <linux/gpio/consumer.h>
06b4501e	14	#include <linux/kernel.h>
06b4501e AG	15	#include <linux/module.h>
06b4501e AG	16	#include <linux/mutex.h>
c074abe0 CT	17	#include <linux/of.h>
c074abe0 CT	18	#include <linux/of_device.h>
3ca9b1ac	19	#include <linux/of_gpio.h>
06b4501e AG	20	#include <linux/slab.h>
06b4501e AG	21	#include <linux/spi/spi.h>
1c4b6e2c AL	22	#include <linux/nvmem-provider.h>
1c4b6e2c AL	23	#include <linux/regmap.h>
06b4501e AG	24	#include <linux/eeprom_93xx46.h>
	25
	26	#define OP_START 0x4
	27	#define OP_WRITE (OP_START \| 0x1)
	28	#define OP_READ (OP_START \| 0x2)
	29	#define ADDR_EWDS 0x00
	30	#define ADDR_ERAL 0x20
	31	#define ADDR_EWEN 0x30
	32
e1379b56 CT	33	struct eeprom_93xx46_devtype_data {
	34	unsigned int quirks;
	35	};
	36
	37	static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
	38	.quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ \|
	39	EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
	40	};
	41
06b4501e AG	42	struct eeprom_93xx46_dev {
	43	struct spi_device *spi;
	44	struct eeprom_93xx46_platform_data *pdata;
06b4501e	45	struct mutex lock;
1c4b6e2c AL	46	struct regmap_config regmap_config;
	47	struct nvmem_config nvmem_config;
	48	struct nvmem_device *nvmem;
06b4501e	49	int addrlen;
1c4b6e2c	50	int size;
06b4501e AG	51	};
06b4501e AG	52
e1379b56 CT	53	static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
	54	{
	55	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
	56	}
	57
	58	static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
	59	{
	60	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
	61	}
	62
06b4501e	63	static ssize_t
1c4b6e2c AL	64	eeprom_93xx46_read(struct eeprom_93xx46_dev edev, char buf,
1c4b6e2c AL	65	unsigned off, size_t count)
06b4501e	66	{
e1379b56	67	ssize_t ret = 0;
06b4501e	68
1c4b6e2c AL	69	if (unlikely(off >= edev->size))
	70	return 0;
	71	if ((off + count) > edev->size)
	72	count = edev->size - off;
	73	if (unlikely(!count))
	74	return count;
06b4501e	75
e1379b56	76	mutex_lock(&edev->lock);
06b4501e	77
e1379b56 CT	78	if (edev->pdata->prepare)
e1379b56 CT	79	edev->pdata->prepare(edev);
06b4501e	80
e1379b56 CT	81	while (count) {
	82	struct spi_message m;
	83	struct spi_transfer t[2] = { { 0 } };
	84	u16 cmd_addr = OP_READ << edev->addrlen;
	85	size_t nbytes = count;
	86	int bits;
	87	int err;
	88
	89	if (edev->addrlen == 7) {
	90	cmd_addr \|= off & 0x7f;
	91	bits = 10;
	92	if (has_quirk_single_word_read(edev))
	93	nbytes = 1;
	94	} else {
	95	cmd_addr \|= (off >> 1) & 0x3f;
	96	bits = 9;
	97	if (has_quirk_single_word_read(edev))
	98	nbytes = 2;
	99	}
06b4501e	100
e1379b56 CT	101	dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
e1379b56 CT	102	cmd_addr, edev->spi->max_speed_hz);
06b4501e	103
e1379b56	104	spi_message_init(&m);
06b4501e	105
e1379b56 CT	106	t[0].tx_buf = (char *)&cmd_addr;
	107	t[0].len = 2;
	108	t[0].bits_per_word = bits;
	109	spi_message_add_tail(&t[0], &m);
06b4501e	110
e1379b56 CT	111	t[1].rx_buf = buf;
	112	t[1].len = count;
	113	t[1].bits_per_word = 8;
	114	spi_message_add_tail(&t[1], &m);
06b4501e	115
e1379b56 CT	116	err = spi_sync(edev->spi, &m);
	117	/* have to wait at least Tcsl ns */
	118	ndelay(250);
06b4501e	119
e1379b56 CT	120	if (err) {
	121	dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
	122	nbytes, (int)off, err);
	123	ret = err;
	124	break;
	125	}
	126
	127	buf += nbytes;
	128	off += nbytes;
	129	count -= nbytes;
	130	ret += nbytes;
06b4501e AG	131	}
	132
	133	if (edev->pdata->finish)
	134	edev->pdata->finish(edev);
	135
	136	mutex_unlock(&edev->lock);
e1379b56	137	return ret;
06b4501e AG	138	}
	139
	140	static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
	141	{
	142	struct spi_message m;
	143	struct spi_transfer t;
	144	int bits, ret;
	145	u16 cmd_addr;
	146
	147	cmd_addr = OP_START << edev->addrlen;
	148	if (edev->addrlen == 7) {
	149	cmd_addr \|= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
	150	bits = 10;
	151	} else {
	152	cmd_addr \|= (is_on ? ADDR_EWEN : ADDR_EWDS);
	153	bits = 9;
	154	}
	155
e1379b56 CT	156	if (has_quirk_instruction_length(edev)) {
	157	cmd_addr <<= 2;
	158	bits += 2;
	159	}
	160
	161	dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
	162	is_on ? "en" : "ds", cmd_addr, bits);
06b4501e AG	163
	164	spi_message_init(&m);
	165	memset(&t, 0, sizeof(t));
	166
	167	t.tx_buf = &cmd_addr;
	168	t.len = 2;
	169	t.bits_per_word = bits;
	170	spi_message_add_tail(&t, &m);
	171
	172	mutex_lock(&edev->lock);
	173
	174	if (edev->pdata->prepare)
	175	edev->pdata->prepare(edev);
	176
	177	ret = spi_sync(edev->spi, &m);
	178	/* have to wait at least Tcsl ns */
	179	ndelay(250);
	180	if (ret)
	181	dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
	182	is_on ? "en" : "dis", ret);
	183
	184	if (edev->pdata->finish)
	185	edev->pdata->finish(edev);
	186
	187	mutex_unlock(&edev->lock);
	188	return ret;
	189	}
	190
	191	static ssize_t
	192	eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
	193	const char *buf, unsigned off)
	194	{
	195	struct spi_message m;
	196	struct spi_transfer t[2];
	197	int bits, data_len, ret;
	198	u16 cmd_addr;
	199
	200	cmd_addr = OP_WRITE << edev->addrlen;
	201
	202	if (edev->addrlen == 7) {
	203	cmd_addr \|= off & 0x7f;
	204	bits = 10;
	205	data_len = 1;
	206	} else {
cb54ad6c	207	cmd_addr \|= (off >> 1) & 0x3f;
06b4501e AG	208	bits = 9;
	209	data_len = 2;
	210	}
	211
	212	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
	213
	214	spi_message_init(&m);
	215	memset(t, 0, sizeof(t));
	216
	217	t[0].tx_buf = (char *)&cmd_addr;
	218	t[0].len = 2;
	219	t[0].bits_per_word = bits;
	220	spi_message_add_tail(&t[0], &m);
	221
	222	t[1].tx_buf = buf;
	223	t[1].len = data_len;
	224	t[1].bits_per_word = 8;
	225	spi_message_add_tail(&t[1], &m);
	226
	227	ret = spi_sync(edev->spi, &m);
	228	/* have to wait program cycle time Twc ms */
	229	mdelay(6);
	230	return ret;
	231	}
	232
	233	static ssize_t
1c4b6e2c AL	234	eeprom_93xx46_write(struct eeprom_93xx46_dev edev, const char buf,
1c4b6e2c AL	235	loff_t off, size_t count)
06b4501e	236	{
06b4501e AG	237	int i, ret, step = 1;
06b4501e AG	238
1c4b6e2c AL	239	if (unlikely(off >= edev->size))
	240	return -EFBIG;
	241	if ((off + count) > edev->size)
	242	count = edev->size - off;
	243	if (unlikely(!count))
	244	return count;
06b4501e	245
06b4501e AG	246	/* only write even number of bytes on 16-bit devices */
	247	if (edev->addrlen == 6) {
	248	step = 2;
	249	count &= ~1;
	250	}
	251
	252	/* erase/write enable */
	253	ret = eeprom_93xx46_ew(edev, 1);
	254	if (ret)
	255	return ret;
	256
	257	mutex_lock(&edev->lock);
	258
	259	if (edev->pdata->prepare)
	260	edev->pdata->prepare(edev);
	261
	262	for (i = 0; i < count; i += step) {
	263	ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
	264	if (ret) {
	265	dev_err(&edev->spi->dev, "write failed at %d: %d\n",
	266	(int)off + i, ret);
	267	break;
	268	}
	269	}
	270
	271	if (edev->pdata->finish)
	272	edev->pdata->finish(edev);
	273
	274	mutex_unlock(&edev->lock);
	275
	276	/* erase/write disable */
	277	eeprom_93xx46_ew(edev, 0);
	278	return ret ? : count;
	279	}
	280
1c4b6e2c AL	281	/*
	282	* Provide a regmap interface, which is registered with the NVMEM
	283	* framework
	284	*/
	285	static int eeprom_93xx46_regmap_read(void context, const void reg,
	286	size_t reg_size, void *val,
	287	size_t val_size)
	288	{
	289	struct eeprom_93xx46_dev *eeprom_93xx46 = context;
	290	off_t offset = (u32 )reg;
	291	int err;
	292
	293	err = eeprom_93xx46_read(eeprom_93xx46, val, offset, val_size);
	294	if (err)
	295	return err;
	296	return 0;
	297	}
	298
	299	static int eeprom_93xx46_regmap_write(void context, const void data,
	300	size_t count)
	301	{
	302	struct eeprom_93xx46_dev *eeprom_93xx46 = context;
	303	const char *buf;
	304	u32 offset;
	305	size_t len;
	306	int err;
	307
	308	memcpy(&offset, data, sizeof(offset));
	309	buf = (const char *)data + sizeof(offset);
	310	len = count - sizeof(offset);
	311
	312	err = eeprom_93xx46_write(eeprom_93xx46, buf, offset, len);
	313	if (err)
	314	return err;
	315	return 0;
	316	}
	317
	318	static const struct regmap_bus eeprom_93xx46_regmap_bus = {
	319	.read = eeprom_93xx46_regmap_read,
	320	.write = eeprom_93xx46_regmap_write,
	321	.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
	322	};
	323
06b4501e AG	324	static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
	325	{
	326	struct eeprom_93xx46_platform_data *pd = edev->pdata;
	327	struct spi_message m;
	328	struct spi_transfer t;
	329	int bits, ret;
	330	u16 cmd_addr;
	331
	332	cmd_addr = OP_START << edev->addrlen;
	333	if (edev->addrlen == 7) {
	334	cmd_addr \|= ADDR_ERAL << 1;
	335	bits = 10;
	336	} else {
	337	cmd_addr \|= ADDR_ERAL;
	338	bits = 9;
	339	}
	340
e1379b56 CT	341	if (has_quirk_instruction_length(edev)) {
	342	cmd_addr <<= 2;
	343	bits += 2;
	344	}
	345
	346	dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
	347
06b4501e AG	348	spi_message_init(&m);
	349	memset(&t, 0, sizeof(t));
	350
	351	t.tx_buf = &cmd_addr;
	352	t.len = 2;
	353	t.bits_per_word = bits;
	354	spi_message_add_tail(&t, &m);
	355
	356	mutex_lock(&edev->lock);
	357
	358	if (edev->pdata->prepare)
	359	edev->pdata->prepare(edev);
	360
	361	ret = spi_sync(edev->spi, &m);
	362	if (ret)
	363	dev_err(&edev->spi->dev, "erase error %d\n", ret);
	364	/* have to wait erase cycle time Tec ms */
	365	mdelay(6);
	366
	367	if (pd->finish)
	368	pd->finish(edev);
	369
	370	mutex_unlock(&edev->lock);
	371	return ret;
	372	}
	373
	374	static ssize_t eeprom_93xx46_store_erase(struct device *dev,
	375	struct device_attribute *attr,
	376	const char *buf, size_t count)
	377	{
	378	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
	379	int erase = 0, ret;
	380
	381	sscanf(buf, "%d", &erase);
	382	if (erase) {
	383	ret = eeprom_93xx46_ew(edev, 1);
	384	if (ret)
	385	return ret;
	386	ret = eeprom_93xx46_eral(edev);
	387	if (ret)
	388	return ret;
	389	ret = eeprom_93xx46_ew(edev, 0);
	390	if (ret)
	391	return ret;
	392	}
	393	return count;
	394	}
	395	static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
	396
3ca9b1ac CT	397	static void select_assert(void *context)
	398	{
	399	struct eeprom_93xx46_dev *edev = context;
	400
	401	gpiod_set_value_cansleep(edev->pdata->select, 1);
	402	}
	403
	404	static void select_deassert(void *context)
	405	{
	406	struct eeprom_93xx46_dev *edev = context;
	407
	408	gpiod_set_value_cansleep(edev->pdata->select, 0);
	409	}
	410
c074abe0 CT	411	static const struct of_device_id eeprom_93xx46_of_table[] = {
c074abe0 CT	412	{ .compatible = "eeprom-93xx46", },
e1379b56	413	{ .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
c074abe0 CT	414	{}
	415	};
	416	MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
	417
	418	static int eeprom_93xx46_probe_dt(struct spi_device *spi)
	419	{
e1379b56 CT	420	const struct of_device_id *of_id =
e1379b56 CT	421	of_match_device(eeprom_93xx46_of_table, &spi->dev);
c074abe0 CT	422	struct device_node *np = spi->dev.of_node;
	423	struct eeprom_93xx46_platform_data *pd;
	424	u32 tmp;
3ca9b1ac CT	425	int gpio;
3ca9b1ac CT	426	enum of_gpio_flags of_flags;
c074abe0 CT	427	int ret;
	428
	429	pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
	430	if (!pd)
	431	return -ENOMEM;
	432
	433	ret = of_property_read_u32(np, "data-size", &tmp);
	434	if (ret < 0) {
	435	dev_err(&spi->dev, "data-size property not found\n");
	436	return ret;
	437	}
	438
	439	if (tmp == 8) {
	440	pd->flags \|= EE_ADDR8;
	441	} else if (tmp == 16) {
	442	pd->flags \|= EE_ADDR16;
	443	} else {
	444	dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
	445	return -EINVAL;
	446	}
	447
	448	if (of_property_read_bool(np, "read-only"))
	449	pd->flags \|= EE_READONLY;
	450
3ca9b1ac CT	451	gpio = of_get_named_gpio_flags(np, "select-gpios", 0, &of_flags);
	452	if (gpio_is_valid(gpio)) {
	453	unsigned long flags =
	454	of_flags == OF_GPIO_ACTIVE_LOW ? GPIOF_ACTIVE_LOW : 0;
	455
	456	ret = devm_gpio_request_one(&spi->dev, gpio, flags,
	457	"eeprom_93xx46_select");
	458	if (ret)
	459	return ret;
	460
	461	pd->select = gpio_to_desc(gpio);
	462	pd->prepare = select_assert;
	463	pd->finish = select_deassert;
	464
	465	gpiod_direction_output(pd->select, 0);
	466	}
	467
e1379b56 CT	468	if (of_id->data) {
	469	const struct eeprom_93xx46_devtype_data *data = of_id->data;
	470
	471	pd->quirks = data->quirks;
	472	}
	473
c074abe0 CT	474	spi->dev.platform_data = pd;
	475
	476	return 0;
	477	}
	478
80c8ae28	479	static int eeprom_93xx46_probe(struct spi_device *spi)
06b4501e AG	480	{
	481	struct eeprom_93xx46_platform_data *pd;
	482	struct eeprom_93xx46_dev *edev;
1c4b6e2c	483	struct regmap *regmap;
06b4501e AG	484	int err;
06b4501e AG	485
c074abe0 CT	486	if (spi->dev.of_node) {
	487	err = eeprom_93xx46_probe_dt(spi);
	488	if (err < 0)
	489	return err;
	490	}
	491
06b4501e AG	492	pd = spi->dev.platform_data;
	493	if (!pd) {
	494	dev_err(&spi->dev, "missing platform data\n");
	495	return -ENODEV;
	496	}
	497
	498	edev = kzalloc(sizeof(*edev), GFP_KERNEL);
	499	if (!edev)
	500	return -ENOMEM;
	501
	502	if (pd->flags & EE_ADDR8)
	503	edev->addrlen = 7;
	504	else if (pd->flags & EE_ADDR16)
	505	edev->addrlen = 6;
	506	else {
	507	dev_err(&spi->dev, "unspecified address type\n");
	508	err = -EINVAL;
	509	goto fail;
	510	}
	511
	512	mutex_init(&edev->lock);
	513
	514	edev->spi = spi_dev_get(spi);
	515	edev->pdata = pd;
	516
1c4b6e2c AL	517	edev->size = 128;
	518
	519	edev->regmap_config.reg_bits = 32;
	520	edev->regmap_config.val_bits = 8;
	521	edev->regmap_config.reg_stride = 1;
	522	edev->regmap_config.max_register = edev->size - 1;
	523
	524	regmap = devm_regmap_init(&spi->dev, &eeprom_93xx46_regmap_bus, edev,
	525	&edev->regmap_config);
	526	if (IS_ERR(regmap)) {
	527	dev_err(&spi->dev, "regmap init failed\n");
	528	err = PTR_ERR(regmap);
	529	goto fail;
06b4501e AG	530	}
06b4501e AG	531
1c4b6e2c AL	532	edev->nvmem_config.name = dev_name(&spi->dev);
	533	edev->nvmem_config.dev = &spi->dev;
	534	edev->nvmem_config.read_only = pd->flags & EE_READONLY;
	535	edev->nvmem_config.root_only = true;
	536	edev->nvmem_config.owner = THIS_MODULE;
	537	edev->nvmem_config.compat = true;
	538	edev->nvmem_config.base_dev = &spi->dev;
	539
	540	edev->nvmem = nvmem_register(&edev->nvmem_config);
	541	if (IS_ERR(edev->nvmem)) {
	542	err = PTR_ERR(edev->nvmem);
06b4501e	543	goto fail;
1c4b6e2c	544	}
06b4501e AG	545
	546	dev_info(&spi->dev, "%d-bit eeprom %s\n",
	547	(pd->flags & EE_ADDR8) ? 8 : 16,
	548	(pd->flags & EE_READONLY) ? "(readonly)" : "");
	549
	550	if (!(pd->flags & EE_READONLY)) {
	551	if (device_create_file(&spi->dev, &dev_attr_erase))
	552	dev_err(&spi->dev, "can't create erase interface\n");
	553	}
	554
5ba75b55	555	spi_set_drvdata(spi, edev);
06b4501e AG	556	return 0;
	557	fail:
	558	kfree(edev);
	559	return err;
	560	}
	561
486a5c28	562	static int eeprom_93xx46_remove(struct spi_device *spi)
06b4501e	563	{
5ba75b55	564	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
06b4501e	565
1c4b6e2c AL	566	nvmem_unregister(edev->nvmem);
1c4b6e2c AL	567
06b4501e AG	568	if (!(edev->pdata->flags & EE_READONLY))
	569	device_remove_file(&spi->dev, &dev_attr_erase);
	570
06b4501e AG	571	kfree(edev);
	572	return 0;
	573	}
	574
	575	static struct spi_driver eeprom_93xx46_driver = {
	576	.driver = {
	577	.name = "93xx46",
c074abe0	578	.of_match_table = of_match_ptr(eeprom_93xx46_of_table),
06b4501e AG	579	},
06b4501e AG	580	.probe = eeprom_93xx46_probe,
2d6bed9c	581	.remove = eeprom_93xx46_remove,
06b4501e AG	582	};
06b4501e AG	583
a3dc3c9e	584	module_spi_driver(eeprom_93xx46_driver);
06b4501e AG	585
	586	MODULE_LICENSE("GPL");
	587	MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
	588	MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
	589	MODULE_ALIAS("spi:93xx46");