[linux-2.6-block.git] / drivers / mfd / mcp-sa11x0.c

/*
 *  linux/drivers/mfd/mcp-sa11x0.c
 *
 *  Copyright (C) 2001-2005 Russell King
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License.
 *
 *  SA11x0 MCP (Multimedia Communications Port) driver.
 *
 *  MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
 */
#include <linux/module.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/mfd/mcp.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <linux/platform_data/mfd-mcp-sa11x0.h>

#define DRIVER_NAME "sa11x0-mcp"

struct mcp_sa11x0 {
	void __iomem	*base0;
	void __iomem	*base1;
	u32		mccr0;
	u32		mccr1;
};

/* Register offsets */
#define MCCR0(m)	((m)->base0 + 0x00)
#define MCDR0(m)	((m)->base0 + 0x08)
#define MCDR1(m)	((m)->base0 + 0x0c)
#define MCDR2(m)	((m)->base0 + 0x10)
#define MCSR(m)		((m)->base0 + 0x18)
#define MCCR1(m)	((m)->base1 + 0x00)

#define priv(mcp)	((struct mcp_sa11x0 *)mcp_priv(mcp))

static void
mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
{
	struct mcp_sa11x0 *m = priv(mcp);

	divisor /= 32;

	m->mccr0 &= ~0x00007f00;
	m->mccr0 |= divisor << 8;
	writel_relaxed(m->mccr0, MCCR0(m));
}

static void
mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
{
	struct mcp_sa11x0 *m = priv(mcp);

	divisor /= 32;

	m->mccr0 &= ~0x0000007f;
	m->mccr0 |= divisor;
	writel_relaxed(m->mccr0, MCCR0(m));
}

/*
 * Write data to the device.  The bit should be set after 3 subframe
 * times (each frame is 64 clocks).  We wait a maximum of 6 subframes.
 * We really should try doing something more productive while we
 * wait.
 */
static void
mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
{
	struct mcp_sa11x0 *m = priv(mcp);
	int ret = -ETIME;
	int i;

	writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m));

	for (i = 0; i < 2; i++) {
		udelay(mcp->rw_timeout);
		if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
			ret = 0;
			break;
		}
	}

	if (ret < 0)
		printk(KERN_WARNING "mcp: write timed out\n");
}

/*
 * Read data from the device.  The bit should be set after 3 subframe
 * times (each frame is 64 clocks).  We wait a maximum of 6 subframes.
 * We really should try doing something more productive while we
 * wait.
 */
static unsigned int
mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
{
	struct mcp_sa11x0 *m = priv(mcp);
	int ret = -ETIME;
	int i;

	writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m));

	for (i = 0; i < 2; i++) {
		udelay(mcp->rw_timeout);
		if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
			ret = readl_relaxed(MCDR2(m)) & 0xffff;
			break;
		}
	}

	if (ret < 0)
		printk(KERN_WARNING "mcp: read timed out\n");

	return ret;
}

static void mcp_sa11x0_enable(struct mcp *mcp)
{
	struct mcp_sa11x0 *m = priv(mcp);

	writel(-1, MCSR(m));
	m->mccr0 |= MCCR0_MCE;
	writel_relaxed(m->mccr0, MCCR0(m));
}

static void mcp_sa11x0_disable(struct mcp *mcp)
{
	struct mcp_sa11x0 *m = priv(mcp);

	m->mccr0 &= ~MCCR0_MCE;
	writel_relaxed(m->mccr0, MCCR0(m));
}

/*
 * Our methods.
 */
static struct mcp_ops mcp_sa11x0 = {
	.set_telecom_divisor	= mcp_sa11x0_set_telecom_divisor,
	.set_audio_divisor	= mcp_sa11x0_set_audio_divisor,
	.reg_write		= mcp_sa11x0_write,
	.reg_read		= mcp_sa11x0_read,
	.enable			= mcp_sa11x0_enable,
	.disable		= mcp_sa11x0_disable,
};

static int mcp_sa11x0_probe(struct platform_device *dev)
{
	struct mcp_plat_data *data = dev_get_platdata(&dev->dev);
	struct resource *mem0, *mem1;
	struct mcp_sa11x0 *m;
	struct mcp *mcp;
	int ret;

	if (!data)
		return -ENODEV;

	mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
	mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
	if (!mem0 || !mem1)
		return -ENXIO;

	if (!request_mem_region(mem0->start, resource_size(mem0),
				DRIVER_NAME)) {
		ret = -EBUSY;
		goto err_mem0;
	}

	if (!request_mem_region(mem1->start, resource_size(mem1),
				DRIVER_NAME)) {
		ret = -EBUSY;
		goto err_mem1;
	}

	mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
	if (!mcp) {
		ret = -ENOMEM;
		goto err_alloc;
	}

	mcp->owner		= THIS_MODULE;
	mcp->ops		= &mcp_sa11x0;
	mcp->sclk_rate		= data->sclk_rate;

	m = priv(mcp);
	m->mccr0 = data->mccr0 | 0x7f7f;
	m->mccr1 = data->mccr1;

	m->base0 = ioremap(mem0->start, resource_size(mem0));
	m->base1 = ioremap(mem1->start, resource_size(mem1));
	if (!m->base0 || !m->base1) {
		ret = -ENOMEM;
		goto err_ioremap;
	}

	platform_set_drvdata(dev, mcp);

	/*
	 * Initialise device.  Note that we initially
	 * set the sampling rate to minimum.
	 */
	writel_relaxed(-1, MCSR(m));
	writel_relaxed(m->mccr1, MCCR1(m));
	writel_relaxed(m->mccr0, MCCR0(m));

	/*
	 * Calculate the read/write timeout (us) from the bit clock
	 * rate.  This is the period for 3 64-bit frames.  Always
	 * round this time up.
	 */
	mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
			  mcp->sclk_rate;

	ret = mcp_host_add(mcp, data->codec_pdata);
	if (ret == 0)
		return 0;

 err_ioremap:
	iounmap(m->base1);
	iounmap(m->base0);
	mcp_host_free(mcp);
 err_alloc:
	release_mem_region(mem1->start, resource_size(mem1));
 err_mem1:
	release_mem_region(mem0->start, resource_size(mem0));
 err_mem0:
	return ret;
}

static int mcp_sa11x0_remove(struct platform_device *dev)
{
	struct mcp *mcp = platform_get_drvdata(dev);
	struct mcp_sa11x0 *m = priv(mcp);
	struct resource *mem0, *mem1;

	if (m->mccr0 & MCCR0_MCE)
		dev_warn(&dev->dev,
			 "device left active (missing disable call?)\n");

	mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
	mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);

	mcp_host_del(mcp);
	iounmap(m->base1);
	iounmap(m->base0);
	mcp_host_free(mcp);
	release_mem_region(mem1->start, resource_size(mem1));
	release_mem_region(mem0->start, resource_size(mem0));

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int mcp_sa11x0_suspend(struct device *dev)
{
	struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));

	if (m->mccr0 & MCCR0_MCE)
		dev_warn(dev, "device left active (missing disable call?)\n");

	writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));

	return 0;
}

static int mcp_sa11x0_resume(struct device *dev)
{
	struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));

	writel_relaxed(m->mccr1, MCCR1(m));
	writel_relaxed(m->mccr0, MCCR0(m));

	return 0;
}
#endif

static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
#ifdef CONFIG_PM_SLEEP
	.suspend = mcp_sa11x0_suspend,
	.freeze = mcp_sa11x0_suspend,
	.poweroff = mcp_sa11x0_suspend,
	.resume_noirq = mcp_sa11x0_resume,
	.thaw_noirq = mcp_sa11x0_resume,
	.restore_noirq = mcp_sa11x0_resume,
#endif
};

static struct platform_driver mcp_sa11x0_driver = {
	.probe		= mcp_sa11x0_probe,
	.remove		= mcp_sa11x0_remove,
	.driver		= {
		.name	= DRIVER_NAME,
		.pm	= &mcp_sa11x0_pm_ops,
	},
};

/*
 * This needs re-working
 */
module_platform_driver(mcp_sa11x0_driver);

MODULE_ALIAS("platform:" DRIVER_NAME);
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
5e742ad6 RK	1	/*
	2	* linux/drivers/mfd/mcp-sa11x0.c
	3	*
	4	* Copyright (C) 2001-2005 Russell King
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License.
	9	*
	10	* SA11x0 MCP (Multimedia Communications Port) driver.
	11	*
	12	* MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
	13	*/
	14	#include <linux/module.h>
45c7f75f	15	#include <linux/io.h>
5e742ad6 RK	16	#include <linux/errno.h>
	17	#include <linux/kernel.h>
	18	#include <linux/delay.h>
	19	#include <linux/spinlock.h>
d052d1be	20	#include <linux/platform_device.h>
2796e397	21	#include <linux/pm.h>
c8602edf	22	#include <linux/mfd/mcp.h>
5e742ad6	23
a09e64fb	24	#include <mach/hardware.h>
5e742ad6	25	#include <asm/mach-types.h>
a1fd844c	26	#include <linux/platform_data/mfd-mcp-sa11x0.h>
5e742ad6	27
c4592ce4	28	#define DRIVER_NAME "sa11x0-mcp"
5e742ad6 RK	29
5e742ad6 RK	30	struct mcp_sa11x0 {
45c7f75f RK	31	void __iomem *base0;
	32	void __iomem *base1;
	33	u32 mccr0;
	34	u32 mccr1;
5e742ad6 RK	35	};
5e742ad6 RK	36
45c7f75f RK	37	/* Register offsets */
	38	#define MCCR0(m) ((m)->base0 + 0x00)
	39	#define MCDR0(m) ((m)->base0 + 0x08)
	40	#define MCDR1(m) ((m)->base0 + 0x0c)
	41	#define MCDR2(m) ((m)->base0 + 0x10)
	42	#define MCSR(m) ((m)->base0 + 0x18)
	43	#define MCCR1(m) ((m)->base1 + 0x00)
	44
5e742ad6 RK	45	#define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp))
	46
	47	static void
	48	mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
	49	{
45c7f75f	50	struct mcp_sa11x0 *m = priv(mcp);
5e742ad6 RK	51
	52	divisor /= 32;
	53
45c7f75f RK	54	m->mccr0 &= ~0x00007f00;
	55	m->mccr0 \|= divisor << 8;
	56	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	57	}
	58
	59	static void
	60	mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
	61	{
45c7f75f	62	struct mcp_sa11x0 *m = priv(mcp);
5e742ad6 RK	63
	64	divisor /= 32;
	65
45c7f75f RK	66	m->mccr0 &= ~0x0000007f;
	67	m->mccr0 \|= divisor;
	68	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	69	}
	70
	71	/*
	72	* Write data to the device. The bit should be set after 3 subframe
	73	* times (each frame is 64 clocks). We wait a maximum of 6 subframes.
	74	* We really should try doing something more productive while we
	75	* wait.
	76	*/
	77	static void
	78	mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
	79	{
45c7f75f	80	struct mcp_sa11x0 *m = priv(mcp);
5e742ad6 RK	81	int ret = -ETIME;
	82	int i;
	83
45c7f75f	84	writel_relaxed(reg << 17 \| MCDR2_Wr \| (val & 0xffff), MCDR2(m));
5e742ad6 RK	85
	86	for (i = 0; i < 2; i++) {
	87	udelay(mcp->rw_timeout);
45c7f75f	88	if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
5e742ad6 RK	89	ret = 0;
	90	break;
	91	}
	92	}
	93
	94	if (ret < 0)
	95	printk(KERN_WARNING "mcp: write timed out\n");
	96	}
	97
	98	/*
	99	* Read data from the device. The bit should be set after 3 subframe
	100	* times (each frame is 64 clocks). We wait a maximum of 6 subframes.
	101	* We really should try doing something more productive while we
	102	* wait.
	103	*/
	104	static unsigned int
	105	mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
	106	{
45c7f75f	107	struct mcp_sa11x0 *m = priv(mcp);
5e742ad6 RK	108	int ret = -ETIME;
	109	int i;
	110
45c7f75f	111	writel_relaxed(reg << 17 \| MCDR2_Rd, MCDR2(m));
5e742ad6 RK	112
	113	for (i = 0; i < 2; i++) {
	114	udelay(mcp->rw_timeout);
45c7f75f RK	115	if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
45c7f75f RK	116	ret = readl_relaxed(MCDR2(m)) & 0xffff;
5e742ad6 RK	117	break;
	118	}
	119	}
	120
	121	if (ret < 0)
	122	printk(KERN_WARNING "mcp: read timed out\n");
	123
	124	return ret;
	125	}
	126
	127	static void mcp_sa11x0_enable(struct mcp *mcp)
	128	{
45c7f75f RK	129	struct mcp_sa11x0 *m = priv(mcp);
	130
	131	writel(-1, MCSR(m));
	132	m->mccr0 \|= MCCR0_MCE;
	133	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	134	}
	135
	136	static void mcp_sa11x0_disable(struct mcp *mcp)
	137	{
45c7f75f RK	138	struct mcp_sa11x0 *m = priv(mcp);
	139
	140	m->mccr0 &= ~MCCR0_MCE;
	141	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	142	}
	143
	144	/*
	145	* Our methods.
	146	*/
	147	static struct mcp_ops mcp_sa11x0 = {
	148	.set_telecom_divisor = mcp_sa11x0_set_telecom_divisor,
	149	.set_audio_divisor = mcp_sa11x0_set_audio_divisor,
	150	.reg_write = mcp_sa11x0_write,
	151	.reg_read = mcp_sa11x0_read,
	152	.enable = mcp_sa11x0_enable,
	153	.disable = mcp_sa11x0_disable,
	154	};
	155
45c7f75f	156	static int mcp_sa11x0_probe(struct platform_device *dev)
5e742ad6	157	{
334a41ce	158	struct mcp_plat_data *data = dev_get_platdata(&dev->dev);
45c7f75f RK	159	struct resource mem0, mem1;
45c7f75f RK	160	struct mcp_sa11x0 *m;
5e742ad6 RK	161	struct mcp *mcp;
	162	int ret;
	163
323cdfc1	164	if (!data)
5e742ad6 RK	165	return -ENODEV;
5e742ad6 RK	166
45c7f75f RK	167	mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
	168	mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
	169	if (!mem0 \|\| !mem1)
	170	return -ENXIO;
	171
	172	if (!request_mem_region(mem0->start, resource_size(mem0),
	173	DRIVER_NAME)) {
	174	ret = -EBUSY;
	175	goto err_mem0;
	176	}
5e742ad6	177
45c7f75f RK	178	if (!request_mem_region(mem1->start, resource_size(mem1),
	179	DRIVER_NAME)) {
	180	ret = -EBUSY;
	181	goto err_mem1;
	182	}
	183
	184	mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
5e742ad6 RK	185	if (!mcp) {
5e742ad6 RK	186	ret = -ENOMEM;
45c7f75f	187	goto err_alloc;
5e742ad6 RK	188	}
	189
	190	mcp->owner = THIS_MODULE;
	191	mcp->ops = &mcp_sa11x0;
323cdfc1	192	mcp->sclk_rate = data->sclk_rate;
5e742ad6	193
45c7f75f RK	194	m = priv(mcp);
	195	m->mccr0 = data->mccr0 \| 0x7f7f;
	196	m->mccr1 = data->mccr1;
	197
	198	m->base0 = ioremap(mem0->start, resource_size(mem0));
	199	m->base1 = ioremap(mem1->start, resource_size(mem1));
	200	if (!m->base0 \|\| !m->base1) {
	201	ret = -ENOMEM;
	202	goto err_ioremap;
	203	}
	204
	205	platform_set_drvdata(dev, mcp);
5e742ad6	206
323cdfc1 RK	207	/*
	208	* Initialise device. Note that we initially
	209	* set the sampling rate to minimum.
	210	*/
45c7f75f RK	211	writel_relaxed(-1, MCSR(m));
	212	writel_relaxed(m->mccr1, MCCR1(m));
	213	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	214
	215	/*
	216	* Calculate the read/write timeout (us) from the bit clock
	217	* rate. This is the period for 3 64-bit frames. Always
	218	* round this time up.
	219	*/
	220	mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
	221	mcp->sclk_rate;
	222
abe06082	223	ret = mcp_host_add(mcp, data->codec_pdata);
5e742ad6	224	if (ret == 0)
45c7f75f	225	return 0;
5e742ad6	226
45c7f75f RK	227	err_ioremap:
	228	iounmap(m->base1);
	229	iounmap(m->base0);
	230	mcp_host_free(mcp);
	231	err_alloc:
	232	release_mem_region(mem1->start, resource_size(mem1));
	233	err_mem1:
	234	release_mem_region(mem0->start, resource_size(mem0));
	235	err_mem0:
5e742ad6 RK	236	return ret;
	237	}
	238
216f63c4	239	static int mcp_sa11x0_remove(struct platform_device *dev)
5e742ad6	240	{
216f63c4	241	struct mcp *mcp = platform_get_drvdata(dev);
45c7f75f RK	242	struct mcp_sa11x0 *m = priv(mcp);
	243	struct resource mem0, mem1;
	244
a4b54acf RK	245	if (m->mccr0 & MCCR0_MCE)
	246	dev_warn(&dev->dev,
	247	"device left active (missing disable call?)\n");
	248
45c7f75f RK	249	mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
45c7f75f RK	250	mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
5e742ad6	251
30816ac0	252	mcp_host_del(mcp);
45c7f75f RK	253	iounmap(m->base1);
45c7f75f RK	254	iounmap(m->base0);
30816ac0	255	mcp_host_free(mcp);
45c7f75f RK	256	release_mem_region(mem1->start, resource_size(mem1));
45c7f75f RK	257	release_mem_region(mem0->start, resource_size(mem0));
5e742ad6 RK	258
	259	return 0;
	260	}
	261
2796e397 RK	262	#ifdef CONFIG_PM_SLEEP
2796e397 RK	263	static int mcp_sa11x0_suspend(struct device *dev)
5e742ad6	264	{
2796e397	265	struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
5e742ad6	266
a4b54acf RK	267	if (m->mccr0 & MCCR0_MCE)
	268	dev_warn(dev, "device left active (missing disable call?)\n");
	269
45c7f75f	270	writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));
9480e307	271
5e742ad6 RK	272	return 0;
	273	}
	274
2796e397	275	static int mcp_sa11x0_resume(struct device *dev)
5e742ad6	276	{
2796e397	277	struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
5e742ad6	278
45c7f75f RK	279	writel_relaxed(m->mccr1, MCCR1(m));
45c7f75f RK	280	writel_relaxed(m->mccr0, MCCR0(m));
9480e307	281
5e742ad6 RK	282	return 0;
5e742ad6 RK	283	}
2796e397 RK	284	#endif
	285
	286	static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
a6aecae2 RK	287	#ifdef CONFIG_PM_SLEEP
	288	.suspend = mcp_sa11x0_suspend,
	289	.freeze = mcp_sa11x0_suspend,
	290	.poweroff = mcp_sa11x0_suspend,
	291	.resume_noirq = mcp_sa11x0_resume,
	292	.thaw_noirq = mcp_sa11x0_resume,
	293	.restore_noirq = mcp_sa11x0_resume,
	294	#endif
2796e397	295	};
5e742ad6	296
3ae5eaec	297	static struct platform_driver mcp_sa11x0_driver = {
5e742ad6 RK	298	.probe = mcp_sa11x0_probe,
5e742ad6 RK	299	.remove = mcp_sa11x0_remove,
3ae5eaec	300	.driver = {
c4592ce4	301	.name = DRIVER_NAME,
2796e397	302	.pm = &mcp_sa11x0_pm_ops,
3ae5eaec	303	},
5e742ad6 RK	304	};
	305
	306	/*
	307	* This needs re-working
	308	*/
65349d60	309	module_platform_driver(mcp_sa11x0_driver);
5e742ad6	310
c4592ce4	311	MODULE_ALIAS("platform:" DRIVER_NAME);
5e742ad6 RK	312	MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
	313	MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
	314	MODULE_LICENSE("GPL");