[linux-2.6-block.git] / drivers / mfd / intel_quark_i2c_gpio.c

/*
 * Intel Quark MFD PCI driver for I2C & GPIO
 *
 * Copyright(c) 2014 Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * Intel Quark PCI device for I2C and GPIO controller sharing the same
 * PCI function. This PCI driver will split the 2 devices into their
 * respective drivers.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/mfd/core.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/dmi.h>
#include <linux/platform_data/gpio-dwapb.h>
#include <linux/platform_data/i2c-designware.h>

/* PCI BAR for register base address */
#define MFD_I2C_BAR		0
#define MFD_GPIO_BAR		1

/* ACPI _ADR value to match the child node */
#define MFD_ACPI_MATCH_GPIO	0ULL
#define MFD_ACPI_MATCH_I2C	1ULL

/* The base GPIO number under GPIOLIB framework */
#define INTEL_QUARK_MFD_GPIO_BASE	8

/* The default number of South-Cluster GPIO on Quark. */
#define INTEL_QUARK_MFD_NGPIO		8

/* The DesignWare GPIO ports on Quark. */
#define INTEL_QUARK_GPIO_NPORTS	1

#define INTEL_QUARK_IORES_MEM	0
#define INTEL_QUARK_IORES_IRQ	1

#define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"

/* The Quark I2C controller source clock */
#define INTEL_QUARK_I2C_CLK_HZ	33000000

struct intel_quark_mfd {
	struct pci_dev		*pdev;
	struct clk		*i2c_clk;
	struct clk_lookup	*i2c_clk_lookup;
};

struct i2c_mode_info {
	const char *name;
	unsigned int i2c_scl_freq;
};

static const struct i2c_mode_info platform_i2c_mode_info[] = {
	{
		.name = "Galileo",
		.i2c_scl_freq = 100000,
	},
	{
		.name = "GalileoGen2",
		.i2c_scl_freq = 400000,
	},
	{}
};

static struct resource intel_quark_i2c_res[] = {
	[INTEL_QUARK_IORES_MEM] = {
		.flags = IORESOURCE_MEM,
	},
	[INTEL_QUARK_IORES_IRQ] = {
		.flags = IORESOURCE_IRQ,
	},
};

static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = {
	.adr = MFD_ACPI_MATCH_I2C,
};

static struct resource intel_quark_gpio_res[] = {
	[INTEL_QUARK_IORES_MEM] = {
		.flags = IORESOURCE_MEM,
	},
};

static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
	.adr = MFD_ACPI_MATCH_GPIO,
};

static struct mfd_cell intel_quark_mfd_cells[] = {
	{
		.id = MFD_GPIO_BAR,
		.name = "gpio-dwapb",
		.acpi_match = &intel_quark_acpi_match_gpio,
		.num_resources = ARRAY_SIZE(intel_quark_gpio_res),
		.resources = intel_quark_gpio_res,
		.ignore_resource_conflicts = true,
	},
	{
		.id = MFD_I2C_BAR,
		.name = "i2c_designware",
		.acpi_match = &intel_quark_acpi_match_i2c,
		.num_resources = ARRAY_SIZE(intel_quark_i2c_res),
		.resources = intel_quark_i2c_res,
		.ignore_resource_conflicts = true,
	},
};

static const struct pci_device_id intel_quark_mfd_ids[] = {
	{ PCI_VDEVICE(INTEL, 0x0934), },
	{},
};
MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);

static int intel_quark_register_i2c_clk(struct intel_quark_mfd *quark_mfd)
{
	struct pci_dev *pdev = quark_mfd->pdev;
	struct clk *i2c_clk;

	i2c_clk = clk_register_fixed_rate(&pdev->dev,
					  INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
					  CLK_IS_ROOT, INTEL_QUARK_I2C_CLK_HZ);
	if (IS_ERR(i2c_clk))
		return PTR_ERR(i2c_clk);

	quark_mfd->i2c_clk = i2c_clk;
	quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
						INTEL_QUARK_I2C_CONTROLLER_CLK);

	if (!quark_mfd->i2c_clk_lookup) {
		dev_err(&pdev->dev, "Fixed clk register failed\n");
		return -ENOMEM;
	}

	return 0;
}

static void intel_quark_unregister_i2c_clk(struct pci_dev *pdev)
{
	struct intel_quark_mfd *quark_mfd = dev_get_drvdata(&pdev->dev);

	if (!quark_mfd->i2c_clk || !quark_mfd->i2c_clk_lookup)
		return;

	clkdev_drop(quark_mfd->i2c_clk_lookup);
	clk_unregister(quark_mfd->i2c_clk);
}

static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
{
	const char *board_name = dmi_get_system_info(DMI_BOARD_NAME);
	const struct i2c_mode_info *info;
	struct dw_i2c_platform_data *pdata;
	struct resource *res = (struct resource *)cell->resources;
	struct device *dev = &pdev->dev;

	res[INTEL_QUARK_IORES_MEM].start =
		pci_resource_start(pdev, MFD_I2C_BAR);
	res[INTEL_QUARK_IORES_MEM].end =
		pci_resource_end(pdev, MFD_I2C_BAR);

	res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
	res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;

	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;

	/* Normal mode by default */
	pdata->i2c_scl_freq = 100000;

	if (board_name) {
		for (info = platform_i2c_mode_info; info->name; info++) {
			if (!strcmp(board_name, info->name)) {
				pdata->i2c_scl_freq = info->i2c_scl_freq;
				break;
			}
		}
	}

	cell->platform_data = pdata;
	cell->pdata_size = sizeof(*pdata);

	return 0;
}

static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
{
	struct dwapb_platform_data *pdata;
	struct resource *res = (struct resource *)cell->resources;
	struct device *dev = &pdev->dev;

	res[INTEL_QUARK_IORES_MEM].start =
		pci_resource_start(pdev, MFD_GPIO_BAR);
	res[INTEL_QUARK_IORES_MEM].end =
		pci_resource_end(pdev, MFD_GPIO_BAR);

	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;

	/* For intel quark x1000, it has only one port: portA */
	pdata->nports = INTEL_QUARK_GPIO_NPORTS;
	pdata->properties = devm_kcalloc(dev, pdata->nports,
					 sizeof(*pdata->properties),
					 GFP_KERNEL);
	if (!pdata->properties)
		return -ENOMEM;

	/* Set the properties for portA */
	pdata->properties->node		= NULL;
	pdata->properties->name		= "intel-quark-x1000-gpio-portA";
	pdata->properties->idx		= 0;
	pdata->properties->ngpio	= INTEL_QUARK_MFD_NGPIO;
	pdata->properties->gpio_base	= INTEL_QUARK_MFD_GPIO_BASE;
	pdata->properties->irq		= pdev->irq;
	pdata->properties->irq_shared	= true;

	cell->platform_data = pdata;
	cell->pdata_size = sizeof(*pdata);

	return 0;
}

static int intel_quark_mfd_probe(struct pci_dev *pdev,
				 const struct pci_device_id *id)
{
	struct intel_quark_mfd *quark_mfd;
	int ret;

	ret = pcim_enable_device(pdev);
	if (ret)
		return ret;

	quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
	if (!quark_mfd)
		return -ENOMEM;
	quark_mfd->pdev = pdev;

	ret = intel_quark_register_i2c_clk(quark_mfd);
	if (ret)
		return ret;

	dev_set_drvdata(&pdev->dev, quark_mfd);

	ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
	if (ret)
		return ret;

	ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
	if (ret)
		return ret;

	return mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
			       ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
			       NULL);
}

static void intel_quark_mfd_remove(struct pci_dev *pdev)
{
	intel_quark_unregister_i2c_clk(pdev);
	mfd_remove_devices(&pdev->dev);
}

static struct pci_driver intel_quark_mfd_driver = {
	.name		= "intel_quark_mfd_i2c_gpio",
	.id_table	= intel_quark_mfd_ids,
	.probe		= intel_quark_mfd_probe,
	.remove		= intel_quark_mfd_remove,
};

module_pci_driver(intel_quark_mfd_driver);

MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
60ae5b9f RT	1	/*
	2	* Intel Quark MFD PCI driver for I2C & GPIO
	3	*
	4	* Copyright(c) 2014 Intel Corporation.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms and conditions of the GNU General Public License,
	8	* version 2, as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope it will be useful, but WITHOUT
	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	* more details.
	14	*
	15	* Intel Quark PCI device for I2C and GPIO controller sharing the same
	16	* PCI function. This PCI driver will split the 2 devices into their
	17	* respective drivers.
	18	*/
	19
	20	#include <linux/kernel.h>
	21	#include <linux/module.h>
	22	#include <linux/pci.h>
	23	#include <linux/mfd/core.h>
	24	#include <linux/clkdev.h>
	25	#include <linux/clk-provider.h>
	26	#include <linux/dmi.h>
	27	#include <linux/platform_data/gpio-dwapb.h>
	28	#include <linux/platform_data/i2c-designware.h>
	29
	30	/* PCI BAR for register base address */
	31	#define MFD_I2C_BAR 0
	32	#define MFD_GPIO_BAR 1
	33
918fe70c AS	34	/* ACPI _ADR value to match the child node */
	35	#define MFD_ACPI_MATCH_GPIO 0ULL
	36	#define MFD_ACPI_MATCH_I2C 1ULL
	37
60ae5b9f RT	38	/* The base GPIO number under GPIOLIB framework */
	39	#define INTEL_QUARK_MFD_GPIO_BASE 8
	40
	41	/* The default number of South-Cluster GPIO on Quark. */
	42	#define INTEL_QUARK_MFD_NGPIO 8
	43
	44	/* The DesignWare GPIO ports on Quark. */
	45	#define INTEL_QUARK_GPIO_NPORTS 1
	46
	47	#define INTEL_QUARK_IORES_MEM 0
	48	#define INTEL_QUARK_IORES_IRQ 1
	49
	50	#define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"
	51
	52	/* The Quark I2C controller source clock */
	53	#define INTEL_QUARK_I2C_CLK_HZ 33000000
	54
60ae5b9f RT	55	struct intel_quark_mfd {
	56	struct pci_dev *pdev;
	57	struct clk *i2c_clk;
	58	struct clk_lookup *i2c_clk_lookup;
	59	};
	60
	61	struct i2c_mode_info {
	62	const char *name;
	63	unsigned int i2c_scl_freq;
	64	};
	65
	66	static const struct i2c_mode_info platform_i2c_mode_info[] = {
	67	{
	68	.name = "Galileo",
	69	.i2c_scl_freq = 100000,
	70	},
	71	{
	72	.name = "GalileoGen2",
	73	.i2c_scl_freq = 400000,
	74	},
bafc1fac	75	{}
60ae5b9f RT	76	};
	77
	78	static struct resource intel_quark_i2c_res[] = {
	79	[INTEL_QUARK_IORES_MEM] = {
	80	.flags = IORESOURCE_MEM,
	81	},
	82	[INTEL_QUARK_IORES_IRQ] = {
	83	.flags = IORESOURCE_IRQ,
	84	},
	85	};
	86
918fe70c AS	87	static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = {
	88	.adr = MFD_ACPI_MATCH_I2C,
	89	};
	90
60ae5b9f RT	91	static struct resource intel_quark_gpio_res[] = {
	92	[INTEL_QUARK_IORES_MEM] = {
	93	.flags = IORESOURCE_MEM,
	94	},
	95	};
	96
918fe70c AS	97	static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
	98	.adr = MFD_ACPI_MATCH_GPIO,
	99	};
	100
60ae5b9f	101	static struct mfd_cell intel_quark_mfd_cells[] = {
60ae5b9f RT	102	{
	103	.id = MFD_GPIO_BAR,
	104	.name = "gpio-dwapb",
918fe70c	105	.acpi_match = &intel_quark_acpi_match_gpio,
60ae5b9f RT	106	.num_resources = ARRAY_SIZE(intel_quark_gpio_res),
	107	.resources = intel_quark_gpio_res,
	108	.ignore_resource_conflicts = true,
	109	},
236fd469 AS	110	{
	111	.id = MFD_I2C_BAR,
	112	.name = "i2c_designware",
918fe70c	113	.acpi_match = &intel_quark_acpi_match_i2c,
236fd469 AS	114	.num_resources = ARRAY_SIZE(intel_quark_i2c_res),
	115	.resources = intel_quark_i2c_res,
	116	.ignore_resource_conflicts = true,
	117	},
60ae5b9f RT	118	};
	119
	120	static const struct pci_device_id intel_quark_mfd_ids[] = {
	121	{ PCI_VDEVICE(INTEL, 0x0934), },
	122	{},
	123	};
	124	MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
	125
	126	static int intel_quark_register_i2c_clk(struct intel_quark_mfd *quark_mfd)
	127	{
	128	struct pci_dev *pdev = quark_mfd->pdev;
60ae5b9f	129	struct clk *i2c_clk;
60ae5b9f RT	130
	131	i2c_clk = clk_register_fixed_rate(&pdev->dev,
	132	INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
	133	CLK_IS_ROOT, INTEL_QUARK_I2C_CLK_HZ);
c4726abc SB	134	if (IS_ERR(i2c_clk))
c4726abc SB	135	return PTR_ERR(i2c_clk);
60ae5b9f	136
60ae5b9f	137	quark_mfd->i2c_clk = i2c_clk;
c4726abc SB	138	quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
c4726abc SB	139	INTEL_QUARK_I2C_CONTROLLER_CLK);
60ae5b9f	140
c4726abc SB	141	if (!quark_mfd->i2c_clk_lookup) {
	142	dev_err(&pdev->dev, "Fixed clk register failed\n");
	143	return -ENOMEM;
	144	}
60ae5b9f	145
c4726abc	146	return 0;
60ae5b9f RT	147	}
	148
	149	static void intel_quark_unregister_i2c_clk(struct pci_dev *pdev)
	150	{
	151	struct intel_quark_mfd *quark_mfd = dev_get_drvdata(&pdev->dev);
	152
	153	if (!quark_mfd->i2c_clk \|\| !quark_mfd->i2c_clk_lookup)
	154	return;
	155
	156	clkdev_drop(quark_mfd->i2c_clk_lookup);
	157	clk_unregister(quark_mfd->i2c_clk);
	158	}
	159
	160	static int intel_quark_i2c_setup(struct pci_dev pdev, struct mfd_cell cell)
	161	{
	162	const char *board_name = dmi_get_system_info(DMI_BOARD_NAME);
bafc1fac	163	const struct i2c_mode_info *info;
60ae5b9f RT	164	struct dw_i2c_platform_data *pdata;
	165	struct resource res = (struct resource )cell->resources;
	166	struct device *dev = &pdev->dev;
60ae5b9f RT	167
	168	res[INTEL_QUARK_IORES_MEM].start =
	169	pci_resource_start(pdev, MFD_I2C_BAR);
	170	res[INTEL_QUARK_IORES_MEM].end =
	171	pci_resource_end(pdev, MFD_I2C_BAR);
	172
	173	res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
	174	res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
	175
	176	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	177	if (!pdata)
	178	return -ENOMEM;
	179
bafc1fac AS	180	/* Normal mode by default */
	181	pdata->i2c_scl_freq = 100000;
	182
	183	if (board_name) {
	184	for (info = platform_i2c_mode_info; info->name; info++) {
	185	if (!strcmp(board_name, info->name)) {
	186	pdata->i2c_scl_freq = info->i2c_scl_freq;
	187	break;
	188	}
	189	}
	190	}
60ae5b9f RT	191
	192	cell->platform_data = pdata;
	193	cell->pdata_size = sizeof(*pdata);
	194
	195	return 0;
	196	}
	197
	198	static int intel_quark_gpio_setup(struct pci_dev pdev, struct mfd_cell cell)
	199	{
	200	struct dwapb_platform_data *pdata;
	201	struct resource res = (struct resource )cell->resources;
	202	struct device *dev = &pdev->dev;
	203
	204	res[INTEL_QUARK_IORES_MEM].start =
	205	pci_resource_start(pdev, MFD_GPIO_BAR);
	206	res[INTEL_QUARK_IORES_MEM].end =
	207	pci_resource_end(pdev, MFD_GPIO_BAR);
	208
	209	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	210	if (!pdata)
	211	return -ENOMEM;
	212
	213	/* For intel quark x1000, it has only one port: portA */
	214	pdata->nports = INTEL_QUARK_GPIO_NPORTS;
	215	pdata->properties = devm_kcalloc(dev, pdata->nports,
	216	sizeof(*pdata->properties),
	217	GFP_KERNEL);
	218	if (!pdata->properties)
	219	return -ENOMEM;
	220
	221	/* Set the properties for portA */
	222	pdata->properties->node = NULL;
	223	pdata->properties->name = "intel-quark-x1000-gpio-portA";
	224	pdata->properties->idx = 0;
	225	pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
	226	pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
	227	pdata->properties->irq = pdev->irq;
	228	pdata->properties->irq_shared = true;
	229
	230	cell->platform_data = pdata;
	231	cell->pdata_size = sizeof(*pdata);
	232
	233	return 0;
	234	}
	235
	236	static int intel_quark_mfd_probe(struct pci_dev *pdev,
	237	const struct pci_device_id *id)
	238	{
	239	struct intel_quark_mfd *quark_mfd;
	240	int ret;
	241
	242	ret = pcim_enable_device(pdev);
	243	if (ret)
	244	return ret;
	245
	246	quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
	247	if (!quark_mfd)
	248	return -ENOMEM;
	249	quark_mfd->pdev = pdev;
	250
	251	ret = intel_quark_register_i2c_clk(quark_mfd);
	252	if (ret)
	253	return ret;
	254
255	dev_set_drvdata(&pdev->dev, quark_mfd);
256
236fd469	257	ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
60ae5b9f RT	258	if (ret)
	259	return ret;
	260
236fd469	261	ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
60ae5b9f RT	262	if (ret)
	263	return ret;
	264
	265	return mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
	266	ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
	267	NULL);
	268	}
	269
	270	static void intel_quark_mfd_remove(struct pci_dev *pdev)
	271	{
	272	intel_quark_unregister_i2c_clk(pdev);
	273	mfd_remove_devices(&pdev->dev);
	274	}
	275
	276	static struct pci_driver intel_quark_mfd_driver = {
	277	.name = "intel_quark_mfd_i2c_gpio",
	278	.id_table = intel_quark_mfd_ids,
	279	.probe = intel_quark_mfd_probe,
	280	.remove = intel_quark_mfd_remove,
	281	};
	282
	283	module_pci_driver(intel_quark_mfd_driver);
	284
	285	MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
	286	MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
	287	MODULE_LICENSE("GPL v2");