[linux-2.6-block.git] / drivers / mfd / da9052-core.c

/*
 * Device access for Dialog DA9052 PMICs.
 *
 * Copyright(c) 2011 Dialog Semiconductor Ltd.
 *
 * Author: David Dajun Chen <dchen@diasemi.com>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 */

#include <linux/device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/slab.h>
#include <linux/module.h>

#include <linux/mfd/da9052/da9052.h>
#include <linux/mfd/da9052/pdata.h>
#include <linux/mfd/da9052/reg.h>

static bool da9052_reg_readable(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case DA9052_PAGE0_CON_REG:
	case DA9052_STATUS_A_REG:
	case DA9052_STATUS_B_REG:
	case DA9052_STATUS_C_REG:
	case DA9052_STATUS_D_REG:
	case DA9052_EVENT_A_REG:
	case DA9052_EVENT_B_REG:
	case DA9052_EVENT_C_REG:
	case DA9052_EVENT_D_REG:
	case DA9052_FAULTLOG_REG:
	case DA9052_IRQ_MASK_A_REG:
	case DA9052_IRQ_MASK_B_REG:
	case DA9052_IRQ_MASK_C_REG:
	case DA9052_IRQ_MASK_D_REG:
	case DA9052_CONTROL_A_REG:
	case DA9052_CONTROL_B_REG:
	case DA9052_CONTROL_C_REG:
	case DA9052_CONTROL_D_REG:
	case DA9052_PDDIS_REG:
	case DA9052_INTERFACE_REG:
	case DA9052_RESET_REG:
	case DA9052_GPIO_0_1_REG:
	case DA9052_GPIO_2_3_REG:
	case DA9052_GPIO_4_5_REG:
	case DA9052_GPIO_6_7_REG:
	case DA9052_GPIO_8_9_REG:
	case DA9052_GPIO_10_11_REG:
	case DA9052_GPIO_12_13_REG:
	case DA9052_GPIO_14_15_REG:
	case DA9052_ID_0_1_REG:
	case DA9052_ID_2_3_REG:
	case DA9052_ID_4_5_REG:
	case DA9052_ID_6_7_REG:
	case DA9052_ID_8_9_REG:
	case DA9052_ID_10_11_REG:
	case DA9052_ID_12_13_REG:
	case DA9052_ID_14_15_REG:
	case DA9052_ID_16_17_REG:
	case DA9052_ID_18_19_REG:
	case DA9052_ID_20_21_REG:
	case DA9052_SEQ_STATUS_REG:
	case DA9052_SEQ_A_REG:
	case DA9052_SEQ_B_REG:
	case DA9052_SEQ_TIMER_REG:
	case DA9052_BUCKA_REG:
	case DA9052_BUCKB_REG:
	case DA9052_BUCKCORE_REG:
	case DA9052_BUCKPRO_REG:
	case DA9052_BUCKMEM_REG:
	case DA9052_BUCKPERI_REG:
	case DA9052_LDO1_REG:
	case DA9052_LDO2_REG:
	case DA9052_LDO3_REG:
	case DA9052_LDO4_REG:
	case DA9052_LDO5_REG:
	case DA9052_LDO6_REG:
	case DA9052_LDO7_REG:
	case DA9052_LDO8_REG:
	case DA9052_LDO9_REG:
	case DA9052_LDO10_REG:
	case DA9052_SUPPLY_REG:
	case DA9052_PULLDOWN_REG:
	case DA9052_CHGBUCK_REG:
	case DA9052_WAITCONT_REG:
	case DA9052_ISET_REG:
	case DA9052_BATCHG_REG:
	case DA9052_CHG_CONT_REG:
	case DA9052_INPUT_CONT_REG:
	case DA9052_CHG_TIME_REG:
	case DA9052_BBAT_CONT_REG:
	case DA9052_BOOST_REG:
	case DA9052_LED_CONT_REG:
	case DA9052_LEDMIN123_REG:
	case DA9052_LED1_CONF_REG:
	case DA9052_LED2_CONF_REG:
	case DA9052_LED3_CONF_REG:
	case DA9052_LED1CONT_REG:
	case DA9052_LED2CONT_REG:
	case DA9052_LED3CONT_REG:
	case DA9052_LED_CONT_4_REG:
	case DA9052_LED_CONT_5_REG:
	case DA9052_ADC_MAN_REG:
	case DA9052_ADC_CONT_REG:
	case DA9052_ADC_RES_L_REG:
	case DA9052_ADC_RES_H_REG:
	case DA9052_VDD_RES_REG:
	case DA9052_VDD_MON_REG:
	case DA9052_ICHG_AV_REG:
	case DA9052_ICHG_THD_REG:
	case DA9052_ICHG_END_REG:
	case DA9052_TBAT_RES_REG:
	case DA9052_TBAT_HIGHP_REG:
	case DA9052_TBAT_HIGHN_REG:
	case DA9052_TBAT_LOW_REG:
	case DA9052_T_OFFSET_REG:
	case DA9052_ADCIN4_RES_REG:
	case DA9052_AUTO4_HIGH_REG:
	case DA9052_AUTO4_LOW_REG:
	case DA9052_ADCIN5_RES_REG:
	case DA9052_AUTO5_HIGH_REG:
	case DA9052_AUTO5_LOW_REG:
	case DA9052_ADCIN6_RES_REG:
	case DA9052_AUTO6_HIGH_REG:
	case DA9052_AUTO6_LOW_REG:
	case DA9052_TJUNC_RES_REG:
	case DA9052_TSI_CONT_A_REG:
	case DA9052_TSI_CONT_B_REG:
	case DA9052_TSI_X_MSB_REG:
	case DA9052_TSI_Y_MSB_REG:
	case DA9052_TSI_LSB_REG:
	case DA9052_TSI_Z_MSB_REG:
	case DA9052_COUNT_S_REG:
	case DA9052_COUNT_MI_REG:
	case DA9052_COUNT_H_REG:
	case DA9052_COUNT_D_REG:
	case DA9052_COUNT_MO_REG:
	case DA9052_COUNT_Y_REG:
	case DA9052_ALARM_MI_REG:
	case DA9052_ALARM_H_REG:
	case DA9052_ALARM_D_REG:
	case DA9052_ALARM_MO_REG:
	case DA9052_ALARM_Y_REG:
	case DA9052_SECOND_A_REG:
	case DA9052_SECOND_B_REG:
	case DA9052_SECOND_C_REG:
	case DA9052_SECOND_D_REG:
	case DA9052_PAGE1_CON_REG:
		return true;
	default:
		return false;
	}
}

static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case DA9052_PAGE0_CON_REG:
	case DA9052_EVENT_A_REG:
	case DA9052_EVENT_B_REG:
	case DA9052_EVENT_C_REG:
	case DA9052_EVENT_D_REG:
	case DA9052_IRQ_MASK_A_REG:
	case DA9052_IRQ_MASK_B_REG:
	case DA9052_IRQ_MASK_C_REG:
	case DA9052_IRQ_MASK_D_REG:
	case DA9052_CONTROL_A_REG:
	case DA9052_CONTROL_B_REG:
	case DA9052_CONTROL_C_REG:
	case DA9052_CONTROL_D_REG:
	case DA9052_PDDIS_REG:
	case DA9052_RESET_REG:
	case DA9052_GPIO_0_1_REG:
	case DA9052_GPIO_2_3_REG:
	case DA9052_GPIO_4_5_REG:
	case DA9052_GPIO_6_7_REG:
	case DA9052_GPIO_8_9_REG:
	case DA9052_GPIO_10_11_REG:
	case DA9052_GPIO_12_13_REG:
	case DA9052_GPIO_14_15_REG:
	case DA9052_ID_0_1_REG:
	case DA9052_ID_2_3_REG:
	case DA9052_ID_4_5_REG:
	case DA9052_ID_6_7_REG:
	case DA9052_ID_8_9_REG:
	case DA9052_ID_10_11_REG:
	case DA9052_ID_12_13_REG:
	case DA9052_ID_14_15_REG:
	case DA9052_ID_16_17_REG:
	case DA9052_ID_18_19_REG:
	case DA9052_ID_20_21_REG:
	case DA9052_SEQ_STATUS_REG:
	case DA9052_SEQ_A_REG:
	case DA9052_SEQ_B_REG:
	case DA9052_SEQ_TIMER_REG:
	case DA9052_BUCKA_REG:
	case DA9052_BUCKB_REG:
	case DA9052_BUCKCORE_REG:
	case DA9052_BUCKPRO_REG:
	case DA9052_BUCKMEM_REG:
	case DA9052_BUCKPERI_REG:
	case DA9052_LDO1_REG:
	case DA9052_LDO2_REG:
	case DA9052_LDO3_REG:
	case DA9052_LDO4_REG:
	case DA9052_LDO5_REG:
	case DA9052_LDO6_REG:
	case DA9052_LDO7_REG:
	case DA9052_LDO8_REG:
	case DA9052_LDO9_REG:
	case DA9052_LDO10_REG:
	case DA9052_SUPPLY_REG:
	case DA9052_PULLDOWN_REG:
	case DA9052_CHGBUCK_REG:
	case DA9052_WAITCONT_REG:
	case DA9052_ISET_REG:
	case DA9052_BATCHG_REG:
	case DA9052_CHG_CONT_REG:
	case DA9052_INPUT_CONT_REG:
	case DA9052_BBAT_CONT_REG:
	case DA9052_BOOST_REG:
	case DA9052_LED_CONT_REG:
	case DA9052_LEDMIN123_REG:
	case DA9052_LED1_CONF_REG:
	case DA9052_LED2_CONF_REG:
	case DA9052_LED3_CONF_REG:
	case DA9052_LED1CONT_REG:
	case DA9052_LED2CONT_REG:
	case DA9052_LED3CONT_REG:
	case DA9052_LED_CONT_4_REG:
	case DA9052_LED_CONT_5_REG:
	case DA9052_ADC_MAN_REG:
	case DA9052_ADC_CONT_REG:
	case DA9052_ADC_RES_L_REG:
	case DA9052_ADC_RES_H_REG:
	case DA9052_VDD_RES_REG:
	case DA9052_VDD_MON_REG:
	case DA9052_ICHG_THD_REG:
	case DA9052_ICHG_END_REG:
	case DA9052_TBAT_HIGHP_REG:
	case DA9052_TBAT_HIGHN_REG:
	case DA9052_TBAT_LOW_REG:
	case DA9052_T_OFFSET_REG:
	case DA9052_AUTO4_HIGH_REG:
	case DA9052_AUTO4_LOW_REG:
	case DA9052_AUTO5_HIGH_REG:
	case DA9052_AUTO5_LOW_REG:
	case DA9052_AUTO6_HIGH_REG:
	case DA9052_AUTO6_LOW_REG:
	case DA9052_TSI_CONT_A_REG:
	case DA9052_TSI_CONT_B_REG:
	case DA9052_COUNT_S_REG:
	case DA9052_COUNT_MI_REG:
	case DA9052_COUNT_H_REG:
	case DA9052_COUNT_D_REG:
	case DA9052_COUNT_MO_REG:
	case DA9052_COUNT_Y_REG:
	case DA9052_ALARM_MI_REG:
	case DA9052_ALARM_H_REG:
	case DA9052_ALARM_D_REG:
	case DA9052_ALARM_MO_REG:
	case DA9052_ALARM_Y_REG:
	case DA9052_PAGE1_CON_REG:
		return true;
	default:
		return false;
	}
}

static bool da9052_reg_volatile(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case DA9052_STATUS_A_REG:
	case DA9052_STATUS_B_REG:
	case DA9052_STATUS_C_REG:
	case DA9052_STATUS_D_REG:
	case DA9052_EVENT_A_REG:
	case DA9052_EVENT_B_REG:
	case DA9052_EVENT_C_REG:
	case DA9052_EVENT_D_REG:
	case DA9052_CONTROL_B_REG:
	case DA9052_CONTROL_D_REG:
	case DA9052_SUPPLY_REG:
	case DA9052_FAULTLOG_REG:
	case DA9052_CHG_TIME_REG:
	case DA9052_ADC_RES_L_REG:
	case DA9052_ADC_RES_H_REG:
	case DA9052_VDD_RES_REG:
	case DA9052_ICHG_AV_REG:
	case DA9052_TBAT_RES_REG:
	case DA9052_ADCIN4_RES_REG:
	case DA9052_ADCIN5_RES_REG:
	case DA9052_ADCIN6_RES_REG:
	case DA9052_TJUNC_RES_REG:
	case DA9052_TSI_X_MSB_REG:
	case DA9052_TSI_Y_MSB_REG:
	case DA9052_TSI_LSB_REG:
	case DA9052_TSI_Z_MSB_REG:
	case DA9052_COUNT_S_REG:
	case DA9052_COUNT_MI_REG:
	case DA9052_COUNT_H_REG:
	case DA9052_COUNT_D_REG:
	case DA9052_COUNT_MO_REG:
	case DA9052_COUNT_Y_REG:
	case DA9052_ALARM_MI_REG:
		return true;
	default:
		return false;
	}
}

/*
 * TBAT look-up table is computed from the R90 reg (8 bit register)
 * reading as below. The battery temperature is in milliCentigrade
 * TBAT = (1/(t1+1/298) - 273) * 1000 mC
 * where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255))
 * Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6
 * Example:
 * R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates
 * TBAT = 20015 mili degrees Centrigrade
 *
*/
static const int32_t tbat_lookup[255] = {
	183258, 144221, 124334, 111336, 101826, 94397, 88343, 83257,
	78889, 75071, 71688, 68656, 65914, 63414, 61120, 59001,
	570366, 55204, 53490, 51881, 50364, 48931, 47574, 46285,
	45059, 43889, 42772, 41703, 40678, 39694, 38748, 37838,
	36961, 36115, 35297, 34507, 33743, 33002, 32284, 31588,
	30911, 30254, 29615, 28994, 28389, 27799, 27225, 26664,
	26117, 25584, 25062, 24553, 24054, 23567, 23091, 22624,
	22167, 21719, 21281, 20851, 20429, 20015, 19610, 19211,
	18820, 18436, 18058, 17688, 17323, 16965, 16612, 16266,
	15925, 15589, 15259, 14933, 14613, 14298, 13987, 13681,
	13379, 13082, 12788, 12499, 12214, 11933, 11655, 11382,
	11112, 10845, 10582, 10322, 10066, 9812, 9562, 9315,
	9071, 8830, 8591, 8356, 8123, 7893, 7665, 7440,
	7218, 6998, 6780, 6565, 6352, 6141, 5933, 5726,
	5522, 5320, 5120, 4922, 4726, 4532, 4340, 4149,
	3961, 3774, 3589, 3406, 3225, 3045, 2867, 2690,
	2516, 2342, 2170, 2000, 1831, 1664, 1498, 1334,
	1171, 1009, 849, 690, 532, 376, 221, 67,
	-84, -236, -386, -535, -683, -830, -975, -1119,
	-1263, -1405, -1546, -1686, -1825, -1964, -2101, -2237,
	-2372, -2506, -2639, -2771, -2902, -3033, -3162, -3291,
	-3418, -3545, -3671, -3796, -3920, -4044, -4166, -4288,
	-4409, -4529, -4649, -4767, -4885, -5002, -5119, -5235,
	-5349, -5464, -5577, -5690, -5802, -5913, -6024, -6134,
	-6244, -6352, -6461, -6568, -6675, -6781, -6887, -6992,
	-7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810,
	-7910, -8009, -8108, -8206, -8304, -8401, -8497, -8593,
	-8689, -8784, -8878, -8972, -9066, -9159, -9251, -9343,
	-9435, -9526, -9617, -9707, -9796, -9886, -9975, -10063,
	-10151, -10238, -10325, -10412, -10839, -10923, -11007, -11090,
	-11173, -11256, -11338, -11420, -11501, -11583, -11663, -11744,
	-11823, -11903, -11982
};

static const u8 chan_mux[DA9052_ADC_VBBAT + 1] = {
	[DA9052_ADC_VDDOUT]	= DA9052_ADC_MAN_MUXSEL_VDDOUT,
	[DA9052_ADC_ICH]	= DA9052_ADC_MAN_MUXSEL_ICH,
	[DA9052_ADC_TBAT]	= DA9052_ADC_MAN_MUXSEL_TBAT,
	[DA9052_ADC_VBAT]	= DA9052_ADC_MAN_MUXSEL_VBAT,
	[DA9052_ADC_IN4]	= DA9052_ADC_MAN_MUXSEL_AD4,
	[DA9052_ADC_IN5]	= DA9052_ADC_MAN_MUXSEL_AD5,
	[DA9052_ADC_IN6]	= DA9052_ADC_MAN_MUXSEL_AD6,
	[DA9052_ADC_VBBAT]	= DA9052_ADC_MAN_MUXSEL_VBBAT
};

int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel)
{
	int ret;
	unsigned short calc_data;
	unsigned short data;
	unsigned char mux_sel;

	if (channel > DA9052_ADC_VBBAT)
		return -EINVAL;

	mutex_lock(&da9052->auxadc_lock);

	/* Channel gets activated on enabling the Conversion bit */
	mux_sel = chan_mux[channel] | DA9052_ADC_MAN_MAN_CONV;

	ret = da9052_reg_write(da9052, DA9052_ADC_MAN_REG, mux_sel);
	if (ret < 0)
		goto err;

	/* Wait for an interrupt */
	if (!wait_for_completion_timeout(&da9052->done,
					 msecs_to_jiffies(500))) {
		dev_err(da9052->dev,
			"timeout waiting for ADC conversion interrupt\n");
		ret = -ETIMEDOUT;
		goto err;
	}

	ret = da9052_reg_read(da9052, DA9052_ADC_RES_H_REG);
	if (ret < 0)
		goto err;

	calc_data = (unsigned short)ret;
	data = calc_data << 2;

	ret = da9052_reg_read(da9052, DA9052_ADC_RES_L_REG);
	if (ret < 0)
		goto err;

	calc_data = (unsigned short)(ret & DA9052_ADC_RES_LSB);
	data |= calc_data;

	ret = data;

err:
	mutex_unlock(&da9052->auxadc_lock);
	return ret;
}
EXPORT_SYMBOL_GPL(da9052_adc_manual_read);

int da9052_adc_read_temp(struct da9052 *da9052)
{
	int tbat;

	tbat = da9052_reg_read(da9052, DA9052_TBAT_RES_REG);
	if (tbat <= 0)
		return tbat;

	/* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */
	return tbat_lookup[tbat - 1];
}
EXPORT_SYMBOL_GPL(da9052_adc_read_temp);

static const struct mfd_cell da9052_subdev_info[] = {
	{
		.name = "da9052-regulator",
		.id = 0,
	},
	{
		.name = "da9052-regulator",
		.id = 1,
	},
	{
		.name = "da9052-regulator",
		.id = 2,
	},
	{
		.name = "da9052-regulator",
		.id = 3,
	},
	{
		.name = "da9052-regulator",
		.id = 4,
	},
	{
		.name = "da9052-regulator",
		.id = 5,
	},
	{
		.name = "da9052-regulator",
		.id = 6,
	},
	{
		.name = "da9052-regulator",
		.id = 7,
	},
	{
		.name = "da9052-regulator",
		.id = 8,
	},
	{
		.name = "da9052-regulator",
		.id = 9,
	},
	{
		.name = "da9052-regulator",
		.id = 10,
	},
	{
		.name = "da9052-regulator",
		.id = 11,
	},
	{
		.name = "da9052-regulator",
		.id = 12,
	},
	{
		.name = "da9052-regulator",
		.id = 13,
	},
	{
		.name = "da9052-onkey",
	},
	{
		.name = "da9052-rtc",
	},
	{
		.name = "da9052-gpio",
	},
	{
		.name = "da9052-hwmon",
	},
	{
		.name = "da9052-leds",
	},
	{
		.name = "da9052-wled1",
	},
	{
		.name = "da9052-wled2",
	},
	{
		.name = "da9052-wled3",
	},
	{
		.name = "da9052-tsi",
	},
	{
		.name = "da9052-bat",
	},
	{
		.name = "da9052-watchdog",
	},
};

const struct regmap_config da9052_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,

	.cache_type = REGCACHE_RBTREE,

	.max_register = DA9052_PAGE1_CON_REG,
	.readable_reg = da9052_reg_readable,
	.writeable_reg = da9052_reg_writeable,
	.volatile_reg = da9052_reg_volatile,
};
EXPORT_SYMBOL_GPL(da9052_regmap_config);

int da9052_device_init(struct da9052 *da9052, u8 chip_id)
{
	struct da9052_pdata *pdata = dev_get_platdata(da9052->dev);
	int ret;

	mutex_init(&da9052->auxadc_lock);
	init_completion(&da9052->done);

	if (pdata && pdata->init != NULL)
		pdata->init(da9052);

	da9052->chip_id = chip_id;

	ret = da9052_irq_init(da9052);
	if (ret != 0) {
		dev_err(da9052->dev, "da9052_irq_init failed: %d\n", ret);
		return ret;
	}

	ret = mfd_add_devices(da9052->dev, PLATFORM_DEVID_AUTO,
			      da9052_subdev_info,
			      ARRAY_SIZE(da9052_subdev_info), NULL, 0, NULL);
	if (ret) {
		dev_err(da9052->dev, "mfd_add_devices failed: %d\n", ret);
		goto err;
	}

	return 0;

err:
	da9052_irq_exit(da9052);

	return ret;
}

void da9052_device_exit(struct da9052 *da9052)
{
	mfd_remove_devices(da9052->dev);
	da9052_irq_exit(da9052);
}

MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
MODULE_DESCRIPTION("DA9052 MFD Core");
MODULE_LICENSE("GPL");
Commit	Line	Data
84c99db8 AJ	1	/*
	2	* Device access for Dialog DA9052 PMICs.
	3	*
	4	* Copyright(c) 2011 Dialog Semiconductor Ltd.
	5	*
	6	* Author: David Dajun Chen <dchen@diasemi.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*/
	13
	14	#include <linux/device.h>
	15	#include <linux/delay.h>
	16	#include <linux/input.h>
	17	#include <linux/interrupt.h>
84c99db8 AJ	18	#include <linux/mfd/core.h>
	19	#include <linux/slab.h>
	20	#include <linux/module.h>
	21
	22	#include <linux/mfd/da9052/da9052.h>
	23	#include <linux/mfd/da9052/pdata.h>
	24	#include <linux/mfd/da9052/reg.h>
	25
84c99db8 AJ	26	static bool da9052_reg_readable(struct device *dev, unsigned int reg)
	27	{
	28	switch (reg) {
	29	case DA9052_PAGE0_CON_REG:
	30	case DA9052_STATUS_A_REG:
	31	case DA9052_STATUS_B_REG:
	32	case DA9052_STATUS_C_REG:
	33	case DA9052_STATUS_D_REG:
	34	case DA9052_EVENT_A_REG:
	35	case DA9052_EVENT_B_REG:
	36	case DA9052_EVENT_C_REG:
	37	case DA9052_EVENT_D_REG:
	38	case DA9052_FAULTLOG_REG:
	39	case DA9052_IRQ_MASK_A_REG:
	40	case DA9052_IRQ_MASK_B_REG:
	41	case DA9052_IRQ_MASK_C_REG:
	42	case DA9052_IRQ_MASK_D_REG:
	43	case DA9052_CONTROL_A_REG:
	44	case DA9052_CONTROL_B_REG:
	45	case DA9052_CONTROL_C_REG:
	46	case DA9052_CONTROL_D_REG:
	47	case DA9052_PDDIS_REG:
	48	case DA9052_INTERFACE_REG:
	49	case DA9052_RESET_REG:
	50	case DA9052_GPIO_0_1_REG:
	51	case DA9052_GPIO_2_3_REG:
	52	case DA9052_GPIO_4_5_REG:
	53	case DA9052_GPIO_6_7_REG:
0386af30 ST	54	case DA9052_GPIO_8_9_REG:
	55	case DA9052_GPIO_10_11_REG:
	56	case DA9052_GPIO_12_13_REG:
84c99db8 AJ	57	case DA9052_GPIO_14_15_REG:
	58	case DA9052_ID_0_1_REG:
	59	case DA9052_ID_2_3_REG:
	60	case DA9052_ID_4_5_REG:
	61	case DA9052_ID_6_7_REG:
	62	case DA9052_ID_8_9_REG:
	63	case DA9052_ID_10_11_REG:
	64	case DA9052_ID_12_13_REG:
	65	case DA9052_ID_14_15_REG:
	66	case DA9052_ID_16_17_REG:
	67	case DA9052_ID_18_19_REG:
	68	case DA9052_ID_20_21_REG:
	69	case DA9052_SEQ_STATUS_REG:
	70	case DA9052_SEQ_A_REG:
	71	case DA9052_SEQ_B_REG:
	72	case DA9052_SEQ_TIMER_REG:
	73	case DA9052_BUCKA_REG:
	74	case DA9052_BUCKB_REG:
	75	case DA9052_BUCKCORE_REG:
	76	case DA9052_BUCKPRO_REG:
	77	case DA9052_BUCKMEM_REG:
	78	case DA9052_BUCKPERI_REG:
	79	case DA9052_LDO1_REG:
	80	case DA9052_LDO2_REG:
	81	case DA9052_LDO3_REG:
	82	case DA9052_LDO4_REG:
	83	case DA9052_LDO5_REG:
	84	case DA9052_LDO6_REG:
	85	case DA9052_LDO7_REG:
	86	case DA9052_LDO8_REG:
	87	case DA9052_LDO9_REG:
	88	case DA9052_LDO10_REG:
	89	case DA9052_SUPPLY_REG:
	90	case DA9052_PULLDOWN_REG:
	91	case DA9052_CHGBUCK_REG:
	92	case DA9052_WAITCONT_REG:
	93	case DA9052_ISET_REG:
	94	case DA9052_BATCHG_REG:
	95	case DA9052_CHG_CONT_REG:
	96	case DA9052_INPUT_CONT_REG:
	97	case DA9052_CHG_TIME_REG:
	98	case DA9052_BBAT_CONT_REG:
	99	case DA9052_BOOST_REG:
	100	case DA9052_LED_CONT_REG:
	101	case DA9052_LEDMIN123_REG:
	102	case DA9052_LED1_CONF_REG:
	103	case DA9052_LED2_CONF_REG:
	104	case DA9052_LED3_CONF_REG:
	105	case DA9052_LED1CONT_REG:
	106	case DA9052_LED2CONT_REG:
	107	case DA9052_LED3CONT_REG:
	108	case DA9052_LED_CONT_4_REG:
	109	case DA9052_LED_CONT_5_REG:
	110	case DA9052_ADC_MAN_REG:
	111	case DA9052_ADC_CONT_REG:
	112	case DA9052_ADC_RES_L_REG:
	113	case DA9052_ADC_RES_H_REG:
	114	case DA9052_VDD_RES_REG:
	115	case DA9052_VDD_MON_REG:
	116	case DA9052_ICHG_AV_REG:
	117	case DA9052_ICHG_THD_REG:
	118	case DA9052_ICHG_END_REG:
	119	case DA9052_TBAT_RES_REG:
	120	case DA9052_TBAT_HIGHP_REG:
121	case DA9052_TBAT_HIGHN_REG:
122	case DA9052_TBAT_LOW_REG:
123	case DA9052_T_OFFSET_REG:
124	case DA9052_ADCIN4_RES_REG:
125	case DA9052_AUTO4_HIGH_REG:
126	case DA9052_AUTO4_LOW_REG:
127	case DA9052_ADCIN5_RES_REG:
128	case DA9052_AUTO5_HIGH_REG:
129	case DA9052_AUTO5_LOW_REG:
130	case DA9052_ADCIN6_RES_REG:
131	case DA9052_AUTO6_HIGH_REG:
132	case DA9052_AUTO6_LOW_REG:
133	case DA9052_TJUNC_RES_REG:
134	case DA9052_TSI_CONT_A_REG:
135	case DA9052_TSI_CONT_B_REG:
136	case DA9052_TSI_X_MSB_REG:
137	case DA9052_TSI_Y_MSB_REG:
138	case DA9052_TSI_LSB_REG:
139	case DA9052_TSI_Z_MSB_REG:
140	case DA9052_COUNT_S_REG:
141	case DA9052_COUNT_MI_REG:
142	case DA9052_COUNT_H_REG:
143	case DA9052_COUNT_D_REG:
144	case DA9052_COUNT_MO_REG:
145	case DA9052_COUNT_Y_REG:
146	case DA9052_ALARM_MI_REG:
147	case DA9052_ALARM_H_REG:
148	case DA9052_ALARM_D_REG:
149	case DA9052_ALARM_MO_REG:
150	case DA9052_ALARM_Y_REG:
151	case DA9052_SECOND_A_REG:
152	case DA9052_SECOND_B_REG:
153	case DA9052_SECOND_C_REG:
154	case DA9052_SECOND_D_REG:
155	case DA9052_PAGE1_CON_REG:
156	return true;
157	default:
158	return false;
159	}
160	}
161
162	static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
163	{
164	switch (reg) {
165	case DA9052_PAGE0_CON_REG:
0a92815d AJ	166	case DA9052_EVENT_A_REG:
	167	case DA9052_EVENT_B_REG:
	168	case DA9052_EVENT_C_REG:
	169	case DA9052_EVENT_D_REG:
84c99db8 AJ	170	case DA9052_IRQ_MASK_A_REG:
	171	case DA9052_IRQ_MASK_B_REG:
	172	case DA9052_IRQ_MASK_C_REG:
	173	case DA9052_IRQ_MASK_D_REG:
	174	case DA9052_CONTROL_A_REG:
	175	case DA9052_CONTROL_B_REG:
	176	case DA9052_CONTROL_C_REG:
	177	case DA9052_CONTROL_D_REG:
	178	case DA9052_PDDIS_REG:
	179	case DA9052_RESET_REG:
	180	case DA9052_GPIO_0_1_REG:
	181	case DA9052_GPIO_2_3_REG:
	182	case DA9052_GPIO_4_5_REG:
	183	case DA9052_GPIO_6_7_REG:
0386af30 ST	184	case DA9052_GPIO_8_9_REG:
	185	case DA9052_GPIO_10_11_REG:
	186	case DA9052_GPIO_12_13_REG:
84c99db8 AJ	187	case DA9052_GPIO_14_15_REG:
	188	case DA9052_ID_0_1_REG:
	189	case DA9052_ID_2_3_REG:
	190	case DA9052_ID_4_5_REG:
	191	case DA9052_ID_6_7_REG:
	192	case DA9052_ID_8_9_REG:
	193	case DA9052_ID_10_11_REG:
	194	case DA9052_ID_12_13_REG:
	195	case DA9052_ID_14_15_REG:
	196	case DA9052_ID_16_17_REG:
	197	case DA9052_ID_18_19_REG:
	198	case DA9052_ID_20_21_REG:
	199	case DA9052_SEQ_STATUS_REG:
	200	case DA9052_SEQ_A_REG:
	201	case DA9052_SEQ_B_REG:
	202	case DA9052_SEQ_TIMER_REG:
	203	case DA9052_BUCKA_REG:
	204	case DA9052_BUCKB_REG:
	205	case DA9052_BUCKCORE_REG:
	206	case DA9052_BUCKPRO_REG:
	207	case DA9052_BUCKMEM_REG:
	208	case DA9052_BUCKPERI_REG:
	209	case DA9052_LDO1_REG:
	210	case DA9052_LDO2_REG:
	211	case DA9052_LDO3_REG:
	212	case DA9052_LDO4_REG:
	213	case DA9052_LDO5_REG:
	214	case DA9052_LDO6_REG:
	215	case DA9052_LDO7_REG:
	216	case DA9052_LDO8_REG:
	217	case DA9052_LDO9_REG:
	218	case DA9052_LDO10_REG:
	219	case DA9052_SUPPLY_REG:
	220	case DA9052_PULLDOWN_REG:
	221	case DA9052_CHGBUCK_REG:
	222	case DA9052_WAITCONT_REG:
	223	case DA9052_ISET_REG:
	224	case DA9052_BATCHG_REG:
	225	case DA9052_CHG_CONT_REG:
	226	case DA9052_INPUT_CONT_REG:
	227	case DA9052_BBAT_CONT_REG:
	228	case DA9052_BOOST_REG:
	229	case DA9052_LED_CONT_REG:
	230	case DA9052_LEDMIN123_REG:
	231	case DA9052_LED1_CONF_REG:
	232	case DA9052_LED2_CONF_REG:
	233	case DA9052_LED3_CONF_REG:
	234	case DA9052_LED1CONT_REG:
	235	case DA9052_LED2CONT_REG:
	236	case DA9052_LED3CONT_REG:
	237	case DA9052_LED_CONT_4_REG:
	238	case DA9052_LED_CONT_5_REG:
	239	case DA9052_ADC_MAN_REG:
	240	case DA9052_ADC_CONT_REG:
	241	case DA9052_ADC_RES_L_REG:
	242	case DA9052_ADC_RES_H_REG:
	243	case DA9052_VDD_RES_REG:
	244	case DA9052_VDD_MON_REG:
	245	case DA9052_ICHG_THD_REG:
	246	case DA9052_ICHG_END_REG:
	247	case DA9052_TBAT_HIGHP_REG:
	248	case DA9052_TBAT_HIGHN_REG:
	249	case DA9052_TBAT_LOW_REG:
	250	case DA9052_T_OFFSET_REG:
251	case DA9052_AUTO4_HIGH_REG:
252	case DA9052_AUTO4_LOW_REG:
253	case DA9052_AUTO5_HIGH_REG:
254	case DA9052_AUTO5_LOW_REG:
255	case DA9052_AUTO6_HIGH_REG:
256	case DA9052_AUTO6_LOW_REG:
257	case DA9052_TSI_CONT_A_REG:
258	case DA9052_TSI_CONT_B_REG:
259	case DA9052_COUNT_S_REG:
260	case DA9052_COUNT_MI_REG:
261	case DA9052_COUNT_H_REG:
262	case DA9052_COUNT_D_REG:
263	case DA9052_COUNT_MO_REG:
264	case DA9052_COUNT_Y_REG:
265	case DA9052_ALARM_MI_REG:
266	case DA9052_ALARM_H_REG:
267	case DA9052_ALARM_D_REG:
268	case DA9052_ALARM_MO_REG:
269	case DA9052_ALARM_Y_REG:
270	case DA9052_PAGE1_CON_REG:
271	return true;
272	default:
273	return false;
274	}
275	}
276
277	static bool da9052_reg_volatile(struct device *dev, unsigned int reg)
278	{
279	switch (reg) {
280	case DA9052_STATUS_A_REG:
281	case DA9052_STATUS_B_REG:
282	case DA9052_STATUS_C_REG:
283	case DA9052_STATUS_D_REG:
284	case DA9052_EVENT_A_REG:
285	case DA9052_EVENT_B_REG:
286	case DA9052_EVENT_C_REG:
287	case DA9052_EVENT_D_REG:
bcb5a7d3	288	case DA9052_CONTROL_B_REG:
	289	case DA9052_CONTROL_D_REG:
	290	case DA9052_SUPPLY_REG:
84c99db8 AJ	291	case DA9052_FAULTLOG_REG:
	292	case DA9052_CHG_TIME_REG:
	293	case DA9052_ADC_RES_L_REG:
	294	case DA9052_ADC_RES_H_REG:
	295	case DA9052_VDD_RES_REG:
	296	case DA9052_ICHG_AV_REG:
	297	case DA9052_TBAT_RES_REG:
	298	case DA9052_ADCIN4_RES_REG:
	299	case DA9052_ADCIN5_RES_REG:
	300	case DA9052_ADCIN6_RES_REG:
	301	case DA9052_TJUNC_RES_REG:
	302	case DA9052_TSI_X_MSB_REG:
	303	case DA9052_TSI_Y_MSB_REG:
	304	case DA9052_TSI_LSB_REG:
	305	case DA9052_TSI_Z_MSB_REG:
	306	case DA9052_COUNT_S_REG:
	307	case DA9052_COUNT_MI_REG:
	308	case DA9052_COUNT_H_REG:
	309	case DA9052_COUNT_D_REG:
	310	case DA9052_COUNT_MO_REG:
	311	case DA9052_COUNT_Y_REG:
	312	case DA9052_ALARM_MI_REG:
	313	return true;
	314	default:
	315	return false;
	316	}
	317	}
	318
16e5e204 AJ	319	/*
	320	* TBAT look-up table is computed from the R90 reg (8 bit register)
	321	* reading as below. The battery temperature is in milliCentigrade
	322	* TBAT = (1/(t1+1/298) - 273) * 1000 mC
	323	* where t1 = (1/B)* ln(( ADCval * 2.5)/(R25ITBAT255))
	324	* Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6
	325	* Example:
	326	* R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates
	327	* TBAT = 20015 mili degrees Centrigrade
	328	*
	329	*/
	330	static const int32_t tbat_lookup[255] = {
	331	183258, 144221, 124334, 111336, 101826, 94397, 88343, 83257,
	332	78889, 75071, 71688, 68656, 65914, 63414, 61120, 59001,
	333	570366, 55204, 53490, 51881, 50364, 48931, 47574, 46285,
	334	45059, 43889, 42772, 41703, 40678, 39694, 38748, 37838,
	335	36961, 36115, 35297, 34507, 33743, 33002, 32284, 31588,
	336	30911, 30254, 29615, 28994, 28389, 27799, 27225, 26664,
	337	26117, 25584, 25062, 24553, 24054, 23567, 23091, 22624,
	338	22167, 21719, 21281, 20851, 20429, 20015, 19610, 19211,
	339	18820, 18436, 18058, 17688, 17323, 16965, 16612, 16266,
	340	15925, 15589, 15259, 14933, 14613, 14298, 13987, 13681,
	341	13379, 13082, 12788, 12499, 12214, 11933, 11655, 11382,
	342	11112, 10845, 10582, 10322, 10066, 9812, 9562, 9315,
	343	9071, 8830, 8591, 8356, 8123, 7893, 7665, 7440,
	344	7218, 6998, 6780, 6565, 6352, 6141, 5933, 5726,
	345	5522, 5320, 5120, 4922, 4726, 4532, 4340, 4149,
	346	3961, 3774, 3589, 3406, 3225, 3045, 2867, 2690,
	347	2516, 2342, 2170, 2000, 1831, 1664, 1498, 1334,
	348	1171, 1009, 849, 690, 532, 376, 221, 67,
	349	-84, -236, -386, -535, -683, -830, -975, -1119,
	350	-1263, -1405, -1546, -1686, -1825, -1964, -2101, -2237,
	351	-2372, -2506, -2639, -2771, -2902, -3033, -3162, -3291,
	352	-3418, -3545, -3671, -3796, -3920, -4044, -4166, -4288,
	353	-4409, -4529, -4649, -4767, -4885, -5002, -5119, -5235,
	354	-5349, -5464, -5577, -5690, -5802, -5913, -6024, -6134,
	355	-6244, -6352, -6461, -6568, -6675, -6781, -6887, -6992,
	356	-7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810,
	357	-7910, -8009, -8108, -8206, -8304, -8401, -8497, -8593,
	358	-8689, -8784, -8878, -8972, -9066, -9159, -9251, -9343,
	359	-9435, -9526, -9617, -9707, -9796, -9886, -9975, -10063,
	360	-10151, -10238, -10325, -10412, -10839, -10923, -11007, -11090,
	361	-11173, -11256, -11338, -11420, -11501, -11583, -11663, -11744,
	362	-11823, -11903, -11982
	363	};
	364
	365	static const u8 chan_mux[DA9052_ADC_VBBAT + 1] = {
	366	[DA9052_ADC_VDDOUT] = DA9052_ADC_MAN_MUXSEL_VDDOUT,
	367	[DA9052_ADC_ICH] = DA9052_ADC_MAN_MUXSEL_ICH,
	368	[DA9052_ADC_TBAT] = DA9052_ADC_MAN_MUXSEL_TBAT,
	369	[DA9052_ADC_VBAT] = DA9052_ADC_MAN_MUXSEL_VBAT,
	370	[DA9052_ADC_IN4] = DA9052_ADC_MAN_MUXSEL_AD4,
	371	[DA9052_ADC_IN5] = DA9052_ADC_MAN_MUXSEL_AD5,
	372	[DA9052_ADC_IN6] = DA9052_ADC_MAN_MUXSEL_AD6,
	373	[DA9052_ADC_VBBAT] = DA9052_ADC_MAN_MUXSEL_VBBAT
	374	};
	375
	376	int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel)
	377	{
	378	int ret;
	379	unsigned short calc_data;
	380	unsigned short data;
	381	unsigned char mux_sel;
	382
383	if (channel > DA9052_ADC_VBBAT)
384	return -EINVAL;
385
386	mutex_lock(&da9052->auxadc_lock);
387
388	/* Channel gets activated on enabling the Conversion bit */
389	mux_sel = chan_mux[channel] \| DA9052_ADC_MAN_MAN_CONV;
390
391	ret = da9052_reg_write(da9052, DA9052_ADC_MAN_REG, mux_sel);
392	if (ret < 0)
393	goto err;
394
395	/* Wait for an interrupt */
396	if (!wait_for_completion_timeout(&da9052->done,
397	msecs_to_jiffies(500))) {
398	dev_err(da9052->dev,
399	"timeout waiting for ADC conversion interrupt\n");
400	ret = -ETIMEDOUT;
401	goto err;
402	}
403
404	ret = da9052_reg_read(da9052, DA9052_ADC_RES_H_REG);
405	if (ret < 0)
406	goto err;
407
408	calc_data = (unsigned short)ret;
409	data = calc_data << 2;
410
411	ret = da9052_reg_read(da9052, DA9052_ADC_RES_L_REG);
412	if (ret < 0)
413	goto err;
414
415	calc_data = (unsigned short)(ret & DA9052_ADC_RES_LSB);
416	data \|= calc_data;
417
418	ret = data;
419
420	err:
421	mutex_unlock(&da9052->auxadc_lock);
422	return ret;
423	}
424	EXPORT_SYMBOL_GPL(da9052_adc_manual_read);
425
16e5e204 AJ	426	int da9052_adc_read_temp(struct da9052 *da9052)
	427	{
	428	int tbat;
	429
	430	tbat = da9052_reg_read(da9052, DA9052_TBAT_RES_REG);
	431	if (tbat <= 0)
	432	return tbat;
	433
	434	/* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */
	435	return tbat_lookup[tbat - 1];
	436	}
	437	EXPORT_SYMBOL_GPL(da9052_adc_read_temp);
	438
c8f675ff	439	static const struct mfd_cell da9052_subdev_info[] = {
e0c21530 JH	440	{
	441	.name = "da9052-regulator",
	442	.id = 0,
	443	},
84c99db8 AJ	444	{
	445	.name = "da9052-regulator",
	446	.id = 1,
	447	},
	448	{
	449	.name = "da9052-regulator",
	450	.id = 2,
	451	},
	452	{
	453	.name = "da9052-regulator",
	454	.id = 3,
	455	},
	456	{
	457	.name = "da9052-regulator",
	458	.id = 4,
	459	},
	460	{
	461	.name = "da9052-regulator",
	462	.id = 5,
	463	},
	464	{
	465	.name = "da9052-regulator",
	466	.id = 6,
	467	},
	468	{
	469	.name = "da9052-regulator",
	470	.id = 7,
	471	},
	472	{
	473	.name = "da9052-regulator",
	474	.id = 8,
	475	},
	476	{
	477	.name = "da9052-regulator",
	478	.id = 9,
	479	},
	480	{
	481	.name = "da9052-regulator",
	482	.id = 10,
	483	},
	484	{
	485	.name = "da9052-regulator",
	486	.id = 11,
	487	},
	488	{
	489	.name = "da9052-regulator",
	490	.id = 12,
	491	},
	492	{
	493	.name = "da9052-regulator",
	494	.id = 13,
	495	},
84c99db8 AJ	496	{
84c99db8 AJ	497	.name = "da9052-onkey",
84c99db8 AJ	498	},
	499	{
	500	.name = "da9052-rtc",
84c99db8 AJ	501	},
	502	{
	503	.name = "da9052-gpio",
	504	},
	505	{
	506	.name = "da9052-hwmon",
	507	},
	508	{
	509	.name = "da9052-leds",
	510	},
	511	{
	512	.name = "da9052-wled1",
	513	},
	514	{
	515	.name = "da9052-wled2",
	516	},
	517	{
	518	.name = "da9052-wled3",
	519	},
	520	{
	521	.name = "da9052-tsi",
84c99db8 AJ	522	},
	523	{
	524	.name = "da9052-bat",
84c99db8 AJ	525	},
	526	{
	527	.name = "da9052-watchdog",
	528	},
	529	};
	530
e9e9d397	531	const struct regmap_config da9052_regmap_config = {
84c99db8 AJ	532	.reg_bits = 8,
	533	.val_bits = 8,
	534
	535	.cache_type = REGCACHE_RBTREE,
	536
	537	.max_register = DA9052_PAGE1_CON_REG,
	538	.readable_reg = da9052_reg_readable,
	539	.writeable_reg = da9052_reg_writeable,
	540	.volatile_reg = da9052_reg_volatile,
	541	};
	542	EXPORT_SYMBOL_GPL(da9052_regmap_config);
	543
f791be49	544	int da9052_device_init(struct da9052 *da9052, u8 chip_id)
84c99db8	545	{
334a41ce	546	struct da9052_pdata *pdata = dev_get_platdata(da9052->dev);
84c99db8 AJ	547	int ret;
84c99db8 AJ	548
16e5e204 AJ	549	mutex_init(&da9052->auxadc_lock);
	550	init_completion(&da9052->done);
	551
84c99db8 AJ	552	if (pdata && pdata->init != NULL)
	553	pdata->init(da9052);
	554
	555	da9052->chip_id = chip_id;
	556
8bad1abd FE	557	ret = da9052_irq_init(da9052);
	558	if (ret != 0) {
	559	dev_err(da9052->dev, "da9052_irq_init failed: %d\n", ret);
	560	return ret;
ffe20b68	561	}
16e5e204	562
b3f6c73d FE	563	ret = mfd_add_devices(da9052->dev, PLATFORM_DEVID_AUTO,
b3f6c73d FE	564	da9052_subdev_info,
0848c94f	565	ARRAY_SIZE(da9052_subdev_info), NULL, 0, NULL);
ffe20b68 FE	566	if (ret) {
ffe20b68 FE	567	dev_err(da9052->dev, "mfd_add_devices failed: %d\n", ret);
84c99db8	568	goto err;
ffe20b68	569	}
84c99db8 AJ	570
	571	return 0;
	572
	573	err:
8bad1abd FE	574	da9052_irq_exit(da9052);
8bad1abd FE	575
84c99db8 AJ	576	return ret;
	577	}
	578
	579	void da9052_device_exit(struct da9052 *da9052)
	580	{
84c99db8	581	mfd_remove_devices(da9052->dev);
8bad1abd	582	da9052_irq_exit(da9052);
84c99db8 AJ	583	}
	584
	585	MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
	586	MODULE_DESCRIPTION("DA9052 MFD Core");
	587	MODULE_LICENSE("GPL");