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Merge branches 'topic/slob/cleanups', 'topic/slob/fixes', 'topic/slub/core', 'topic...
[linux-block.git] / drivers / media / video / tvaudio.c
CommitLineData
1da177e4 1/*
b4ab114c 2 * Driver for simple i2c audio chips.
1da177e4
LT		 3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
b4ab114c
MCC		 10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 * - Some cleanups, code fixes, etc
12 * - Convert it to V4L2 API
13 *
1da177e4
LT		 14 * This code is placed under the terms of the GNU General Public License
15 *
16 * OPTIONS:
17 * debug - set to 1 if you'd like to see debug messages
18 *
19 */
20
1da177e4 21#include <linux/module.h>
1da177e4
LT		 22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/string.h>
25#include <linux/timer.h>
26#include <linux/delay.h>
27#include <linux/errno.h>
28#include <linux/slab.h>
29#include <linux/videodev.h>
30#include <linux/i2c.h>
1da177e4 31#include <linux/init.h>
bc282879 32#include <linux/kthread.h>
7dfb7103 33#include <linux/freezer.h>
1da177e4 34
8bf2f8e7 35#include <media/tvaudio.h>
64f70e7e 36#include <media/v4l2-device.h>
74cab31c 37#include <media/v4l2-chip-ident.h>
08e14054 38#include <media/v4l2-i2c-drv-legacy.h>
1da177e4 39
7c9b5048 40#include <media/i2c-addr.h>
1da177e4
LT		 41
42/* ---------------------------------------------------------------------- */
43/* insmod args */
44
ff699e6b 45static int debug; /* insmod parameter */
1da177e4
LT		 46module_param(debug, int, 0644);
47
48MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
49MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
50MODULE_LICENSE("GPL");
51
52#define UNSET (-1U)
18fc59e2 53
1da177e4
LT		 54/* ---------------------------------------------------------------------- */
55/* our structs */
56
4c6c390e 57#define MAXREGS 256
1da177e4
LT		 58
59struct CHIPSTATE;
60typedef int (*getvalue)(int);
61typedef int (*checkit)(struct CHIPSTATE*);
62typedef int (*initialize)(struct CHIPSTATE*);
63typedef int (*getmode)(struct CHIPSTATE*);
64typedef void (*setmode)(struct CHIPSTATE*, int mode);
1da177e4
LT		 65
66/* i2c command */
67typedef struct AUDIOCMD {
68 int count; /* # of bytes to send */
69 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
70} audiocmd;
71
72/* chip description */
73struct CHIPDESC {
74 char *name; /* chip name */
1da177e4
LT		 75 int addr_lo, addr_hi; /* i2c address range */
76 int registers; /* # of registers */
77
78 int *insmodopt;
79 checkit checkit;
80 initialize initialize;
81 int flags;
82#define CHIP_HAS_VOLUME 1
83#define CHIP_HAS_BASSTREBLE 2
84#define CHIP_HAS_INPUTSEL 4
dd03e970 85#define CHIP_NEED_CHECKMODE 8
1da177e4
LT		 86
87 /* various i2c command sequences */
88 audiocmd init;
89
90 /* which register has which value */
91 int leftreg,rightreg,treblereg,bassreg;
92
93 /* initialize with (defaults to 65535/65535/32768/32768 */
94 int leftinit,rightinit,trebleinit,bassinit;
95
96 /* functions to convert the values (v4l -> chip) */
97 getvalue volfunc,treblefunc,bassfunc;
98
99 /* get/set mode */
100 getmode getmode;
101 setmode setmode;
102
1da177e4
LT		 103 /* input switch register + values for v4l inputs */
104 int inputreg;
8bf2f8e7 105 int inputmap[4];
1da177e4
LT		 106 int inputmute;
107 int inputmask;
108};
1da177e4
LT		 109
110/* current state of the chip */
111struct CHIPSTATE {
64f70e7e 112 struct v4l2_subdev sd;
1da177e4 113
81cb5c4f
MCC		 114 /* chip-specific description - should point to
115 an entry at CHIPDESC table */
116 struct CHIPDESC *desc;
1da177e4
LT		 117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
8bf2f8e7 122 __u16 left,right,treble,bass,muted,mode;
1da177e4 123 int prevmode;
8a854284 124 int radio;
8bf2f8e7 125 int input;
1da177e4
LT		 126
127 /* thread */
bc282879 128 struct task_struct *thread;
1da177e4 129 struct timer_list wt;
1da177e4 130 int watch_stereo;
8a4b275f 131 int audmode;
1da177e4
LT		 132};
133
64f70e7e
HV		 134static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
135{
136 return container_of(sd, struct CHIPSTATE, sd);
137}
138
1da177e4
LT		 139/* ---------------------------------------------------------------------- */
140/* i2c addresses */
141
142static unsigned short normal_i2c[] = {
09df1c16
MCC		 143 I2C_ADDR_TDA8425 >> 1,
144 I2C_ADDR_TEA6300 >> 1,
145 I2C_ADDR_TEA6420 >> 1,
146 I2C_ADDR_TDA9840 >> 1,
147 I2C_ADDR_TDA985x_L >> 1,
148 I2C_ADDR_TDA985x_H >> 1,
149 I2C_ADDR_TDA9874 >> 1,
150 I2C_ADDR_PIC16C54 >> 1,
1da177e4 151 I2C_CLIENT_END };
1da177e4
LT		 152I2C_CLIENT_INSMOD;
153
1da177e4
LT		 154/* ---------------------------------------------------------------------- */
155/* i2c I/O functions */
156
157static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
158{
64f70e7e
HV		 159 struct v4l2_subdev *sd = &chip->sd;
160 struct i2c_client *c = v4l2_get_subdevdata(sd);
1da177e4
LT		 161 unsigned char buffer[2];
162
49426437 163 if (subaddr < 0) {
64f70e7e 164 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
1da177e4
LT		 165 chip->shadow.bytes[1] = val;
166 buffer[0] = val;
64f70e7e
HV		 167 if (1 != i2c_master_send(c, buffer, 1)) {
168 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
1da177e4
LT		 169 return -1;
170 }
171 } else {
49426437 172 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
64f70e7e 173 v4l2_info(sd,
49426437
MCC		 174 "Tried to access a non-existent register: %d\n",
175 subaddr);
176 return -EINVAL;
177 }
178
64f70e7e
HV		 179 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
180 subaddr, val);
1da177e4
LT		 181 chip->shadow.bytes[subaddr+1] = val;
182 buffer[0] = subaddr;
183 buffer[1] = val;
64f70e7e
HV		 184 if (2 != i2c_master_send(c, buffer, 2)) {
185 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
186 subaddr, val);
1da177e4
LT		 187 return -1;
188 }
189 }
190 return 0;
191}
192
49426437
MCC		 193static int chip_write_masked(struct CHIPSTATE *chip,
194 int subaddr, int val, int mask)
1da177e4 195{
64f70e7e
HV		 196 struct v4l2_subdev *sd = &chip->sd;
197
1da177e4 198 if (mask != 0) {
49426437 199 if (subaddr < 0) {
1da177e4
LT		 200 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
201 } else {
49426437 202 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
64f70e7e 203 v4l2_info(sd,
49426437
MCC		 204 "Tried to access a non-existent register: %d\n",
205 subaddr);
206 return -EINVAL;
207 }
208
1da177e4
LT		 209 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
210 }
211 }
212 return chip_write(chip, subaddr, val);
213}
214
215static int chip_read(struct CHIPSTATE *chip)
216{
64f70e7e
HV		 217 struct v4l2_subdev *sd = &chip->sd;
218 struct i2c_client *c = v4l2_get_subdevdata(sd);
1da177e4
LT		 219 unsigned char buffer;
220
64f70e7e
HV		 221 if (1 != i2c_master_recv(c, &buffer, 1)) {
222 v4l2_warn(sd, "I/O error (read)\n");
1da177e4
LT		 223 return -1;
224 }
64f70e7e 225 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
1da177e4
LT		 226 return buffer;
227}
228
229static int chip_read2(struct CHIPSTATE *chip, int subaddr)
230{
64f70e7e
HV		 231 struct v4l2_subdev *sd = &chip->sd;
232 struct i2c_client *c = v4l2_get_subdevdata(sd);
18fc59e2
MCC		 233 unsigned char write[1];
234 unsigned char read[1];
235 struct i2c_msg msgs[2] = {
64f70e7e
HV		 236 { c->addr, 0, 1, write },
237 { c->addr, I2C_M_RD, 1, read }
18fc59e2 238 };
64f70e7e 239
18fc59e2 240 write[0] = subaddr;
1da177e4 241
64f70e7e
HV		 242 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
243 v4l2_warn(sd, "I/O error (read2)\n");
1da177e4
LT		 244 return -1;
245 }
64f70e7e
HV		 246 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
247 subaddr, read[0]);
1da177e4
LT		 248 return read[0];
249}
250
251static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
252{
64f70e7e
HV		 253 struct v4l2_subdev *sd = &chip->sd;
254 struct i2c_client *c = v4l2_get_subdevdata(sd);
1da177e4
LT		 255 int i;
256
257 if (0 == cmd->count)
258 return 0;
259
49426437 260 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
64f70e7e 261 v4l2_info(sd,
49426437
MCC		 262 "Tried to access a non-existent register range: %d to %d\n",
263 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
264 return -EINVAL;
265 }
266
267 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
268
1da177e4 269 /* update our shadow register set; print bytes if (debug > 0) */
64f70e7e
HV		 270 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
271 name, cmd->bytes[0]);
1da177e4 272 for (i = 1; i < cmd->count; i++) {
18fc59e2 273 if (debug)
64f70e7e 274 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
1da177e4
LT		 275 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
276 }
18fc59e2 277 if (debug)
64f70e7e 278 printk(KERN_CONT "\n");
1da177e4
LT		 279
280 /* send data to the chip */
64f70e7e
HV		 281 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
282 v4l2_warn(sd, "I/O error (%s)\n", name);
1da177e4
LT		 283 return -1;
284 }
285 return 0;
286}
287
288/* ---------------------------------------------------------------------- */
289/* kernel thread for doing i2c stuff asyncronly
290 * right now it is used only to check the audio mode (mono/stereo/whatever)
291 * some time after switching to another TV channel, then turn on stereo
292 * if available, ...
293 */
294
295static void chip_thread_wake(unsigned long data)
296{
18fc59e2 297 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
bc282879 298 wake_up_process(chip->thread);
1da177e4
LT		 299}
300
301static int chip_thread(void *data)
302{
18fc59e2 303 struct CHIPSTATE *chip = data;
81cb5c4f 304 struct CHIPDESC *desc = chip->desc;
64f70e7e 305 struct v4l2_subdev *sd = &chip->sd;
dd03e970 306 int mode;
1da177e4 307
64f70e7e 308 v4l2_dbg(1, debug, sd, "thread started\n");
83144186 309 set_freezable();
1da177e4 310 for (;;) {
bc282879
CLG		 311 set_current_state(TASK_INTERRUPTIBLE);
312 if (!kthread_should_stop())
1da177e4 313 schedule();
bc282879 314 set_current_state(TASK_RUNNING);
5e50e7a9 315 try_to_freeze();
bc282879 316 if (kthread_should_stop())
1da177e4 317 break;
64f70e7e 318 v4l2_dbg(1, debug, sd, "thread wakeup\n");
1da177e4
LT		 319
320 /* don't do anything for radio or if mode != auto */
8a854284 321 if (chip->radio || chip->mode != 0)
1da177e4
LT		 322 continue;
323
324 /* have a look what's going on */
dd03e970
MCC		 325 mode = desc->getmode(chip);
326 if (mode == chip->prevmode)
327 continue;
328
329 /* chip detected a new audio mode - set it */
64f70e7e 330 v4l2_dbg(1, debug, sd, "thread checkmode\n");
dd03e970
MCC		 331
332 chip->prevmode = mode;
333
334 if (mode & V4L2_TUNER_MODE_STEREO)
335 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
336 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
337 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
338 else if (mode & V4L2_TUNER_MODE_LANG1)
339 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
340 else if (mode & V4L2_TUNER_MODE_LANG2)
341 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
342 else
343 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1da177e4
LT		 344
345 /* schedule next check */
09df5cbe 346 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1da177e4
LT		 347 }
348
64f70e7e 349 v4l2_dbg(1, debug, sd, "thread exiting\n");
1da177e4
LT		 350 return 0;
351}
352
1da177e4
LT		 353/* ---------------------------------------------------------------------- */
354/* audio chip descriptions - defines+functions for tda9840 */
355
356#define TDA9840_SW 0x00
357#define TDA9840_LVADJ 0x02
358#define TDA9840_STADJ 0x03
359#define TDA9840_TEST 0x04
360
361#define TDA9840_MONO 0x10
362#define TDA9840_STEREO 0x2a
363#define TDA9840_DUALA 0x12
364#define TDA9840_DUALB 0x1e
365#define TDA9840_DUALAB 0x1a
366#define TDA9840_DUALBA 0x16
367#define TDA9840_EXTERNAL 0x7a
368
369#define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
370#define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
371#define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
372
373#define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
374#define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
375
376static int tda9840_getmode(struct CHIPSTATE *chip)
377{
64f70e7e 378 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 379 int val, mode;
380
381 val = chip_read(chip);
dc3d75da 382 mode = V4L2_TUNER_MODE_MONO;
1da177e4 383 if (val & TDA9840_DS_DUAL)
dc3d75da 384 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4 385 if (val & TDA9840_ST_STEREO)
dc3d75da 386 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 387
64f70e7e 388 v4l2_dbg(1, debug, sd, "tda9840_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 389 val, mode);
1da177e4
LT		 390 return mode;
391}
392
393static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
394{
395 int update = 1;
396 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
397
398 switch (mode) {
dc3d75da 399 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 400 t |= TDA9840_MONO;
401 break;
dc3d75da 402 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 403 t |= TDA9840_STEREO;
404 break;
dc3d75da 405 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 406 t |= TDA9840_DUALA;
407 break;
dc3d75da 408 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 409 t |= TDA9840_DUALB;
410 break;
411 default:
412 update = 0;
413 }
414
415 if (update)
416 chip_write(chip, TDA9840_SW, t);
417}
418
94f9e56e
HV		 419static int tda9840_checkit(struct CHIPSTATE *chip)
420{
421 int rc;
422 rc = chip_read(chip);
423 /* lower 5 bits should be 0 */
424 return ((rc & 0x1f) == 0) ? 1 : 0;
425}
426
1da177e4
LT		 427/* ---------------------------------------------------------------------- */
428/* audio chip descriptions - defines+functions for tda985x */
429
430/* subaddresses for TDA9855 */
431#define TDA9855_VR 0x00 /* Volume, right */
432#define TDA9855_VL 0x01 /* Volume, left */
433#define TDA9855_BA 0x02 /* Bass */
434#define TDA9855_TR 0x03 /* Treble */
435#define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
436
437/* subaddresses for TDA9850 */
438#define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
439
440/* subaddesses for both chips */
441#define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
442#define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
443#define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
444#define TDA985x_A1 0x08 /* Alignment 1 for both chips */
445#define TDA985x_A2 0x09 /* Alignment 2 for both chips */
446#define TDA985x_A3 0x0a /* Alignment 3 for both chips */
447
448/* Masks for bits in TDA9855 subaddresses */
449/* 0x00 - VR in TDA9855 */
450/* 0x01 - VL in TDA9855 */
451/* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
452 * in 1dB steps - mute is 0x27 */
453
454
455/* 0x02 - BA in TDA9855 */
456/* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
457 * in .5dB steps - 0 is 0x0E */
458
459
460/* 0x03 - TR in TDA9855 */
461/* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
462 * in 3dB steps - 0 is 0x7 */
463
464/* Masks for bits in both chips' subaddresses */
465/* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
466/* Unique to TDA9855: */
467/* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
468 * in 3dB steps - mute is 0x0 */
469
470/* Unique to TDA9850: */
471/* lower 4 bits control stereo noise threshold, over which stereo turns off
472 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
473
474
475/* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
476/* Unique to TDA9855: */
477#define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
478#define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
479#define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
480#define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
481 /* Bits 0 to 3 select various combinations
4ac97914
MCC		 482 * of line in and line out, only the
483 * interesting ones are defined */
1da177e4
LT		 484#define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
485#define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
486
487/* Unique to TDA9850: */
488/* lower 4 bits contol SAP noise threshold, over which SAP turns off
489 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
490
491
492/* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
493/* Common to TDA9855 and TDA9850: */
494#define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
495#define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
496#define TDA985x_MONO 0 /* Forces Mono output */
497#define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
498
499/* Unique to TDA9855: */
500#define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
501#define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
502#define TDA9855_LINEAR 0 /* Linear Stereo */
503#define TDA9855_PSEUDO 1 /* Pseudo Stereo */
504#define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
505#define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
506#define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
507
508/* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
509/* Common to both TDA9855 and TDA9850: */
510/* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
511 * in .5dB steps - 0dB is 0x7 */
512
513/* 0x08, 0x09 - A1 and A2 (read/write) */
514/* Common to both TDA9855 and TDA9850: */
515/* lower 5 bites are wideband and spectral expander alignment
516 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
517#define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
518#define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
519#define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
520
521/* 0x0a - A3 */
522/* Common to both TDA9855 and TDA9850: */
523/* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
524 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
525#define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
526
527static int tda9855_volume(int val) { return val/0x2e8+0x27; }
528static int tda9855_bass(int val) { return val/0xccc+0x06; }
529static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
530
531static int tda985x_getmode(struct CHIPSTATE *chip)
532{
533 int mode;
534
535 mode = ((TDA985x_STP | TDA985x_SAPP) &
536 chip_read(chip)) >> 4;
537 /* Add mono mode regardless of SAP and stereo */
538 /* Allows forced mono */
dc3d75da 539 return mode | V4L2_TUNER_MODE_MONO;
1da177e4
LT		 540}
541
542static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
543{
544 int update = 1;
545 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
546
547 switch (mode) {
dc3d75da 548 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 549 c6 |= TDA985x_MONO;
550 break;
dc3d75da 551 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 552 c6 |= TDA985x_STEREO;
553 break;
dc3d75da 554 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 555 c6 |= TDA985x_SAP;
556 break;
557 default:
558 update = 0;
559 }
560 if (update)
561 chip_write(chip,TDA985x_C6,c6);
562}
563
564
565/* ---------------------------------------------------------------------- */
566/* audio chip descriptions - defines+functions for tda9873h */
567
568/* Subaddresses for TDA9873H */
569
570#define TDA9873_SW 0x00 /* Switching */
571#define TDA9873_AD 0x01 /* Adjust */
572#define TDA9873_PT 0x02 /* Port */
573
574/* Subaddress 0x00: Switching Data
575 * B7..B0:
576 *
577 * B1, B0: Input source selection
578 * 0, 0 internal
579 * 1, 0 external stereo
580 * 0, 1 external mono
581 */
582#define TDA9873_INP_MASK 3
583#define TDA9873_INTERNAL 0
584#define TDA9873_EXT_STEREO 2
585#define TDA9873_EXT_MONO 1
586
587/* B3, B2: output signal select
588 * B4 : transmission mode
589 * 0, 0, 1 Mono
590 * 1, 0, 0 Stereo
591 * 1, 1, 1 Stereo (reversed channel)
592 * 0, 0, 0 Dual AB
593 * 0, 0, 1 Dual AA
594 * 0, 1, 0 Dual BB
595 * 0, 1, 1 Dual BA
596 */
597
598#define TDA9873_TR_MASK (7 << 2)
599#define TDA9873_TR_MONO 4
600#define TDA9873_TR_STEREO 1 << 4
601#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
602#define TDA9873_TR_DUALA 1 << 2
603#define TDA9873_TR_DUALB 1 << 3
604
605/* output level controls
606 * B5: output level switch (0 = reduced gain, 1 = normal gain)
607 * B6: mute (1 = muted)
608 * B7: auto-mute (1 = auto-mute enabled)
609 */
610
611#define TDA9873_GAIN_NORMAL 1 << 5
612#define TDA9873_MUTE 1 << 6
613#define TDA9873_AUTOMUTE 1 << 7
614
615/* Subaddress 0x01: Adjust/standard */
616
617/* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
618 * Recommended value is +0 dB
619 */
620
621#define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
622
623/* Bits C6..C4 control FM stantard
624 * C6, C5, C4
625 * 0, 0, 0 B/G (PAL FM)
626 * 0, 0, 1 M
627 * 0, 1, 0 D/K(1)
628 * 0, 1, 1 D/K(2)
629 * 1, 0, 0 D/K(3)
630 * 1, 0, 1 I
631 */
632#define TDA9873_BG 0
633#define TDA9873_M 1
634#define TDA9873_DK1 2
635#define TDA9873_DK2 3
636#define TDA9873_DK3 4
637#define TDA9873_I 5
638
639/* C7 controls identification response time (1=fast/0=normal)
640 */
641#define TDA9873_IDR_NORM 0
642#define TDA9873_IDR_FAST 1 << 7
643
644
645/* Subaddress 0x02: Port data */
646
647/* E1, E0 free programmable ports P1/P2
648 0, 0 both ports low
649 0, 1 P1 high
650 1, 0 P2 high
651 1, 1 both ports high
652*/
653
654#define TDA9873_PORTS 3
655
656/* E2: test port */
657#define TDA9873_TST_PORT 1 << 2
658
659/* E5..E3 control mono output channel (together with transmission mode bit B4)
660 *
661 * E5 E4 E3 B4 OUTM
662 * 0 0 0 0 mono
663 * 0 0 1 0 DUAL B
664 * 0 1 0 1 mono (from stereo decoder)
665 */
666#define TDA9873_MOUT_MONO 0
667#define TDA9873_MOUT_FMONO 0
668#define TDA9873_MOUT_DUALA 0
669#define TDA9873_MOUT_DUALB 1 << 3
670#define TDA9873_MOUT_ST 1 << 4
671#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
672#define TDA9873_MOUT_EXTL 1 << 5
673#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
674#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
675#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
676
677/* Status bits: (chip read) */
678#define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
679#define TDA9873_STEREO 2 /* Stereo sound is identified */
680#define TDA9873_DUAL 4 /* Dual sound is identified */
681
682static int tda9873_getmode(struct CHIPSTATE *chip)
683{
64f70e7e 684 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 685 int val,mode;
686
687 val = chip_read(chip);
dc3d75da 688 mode = V4L2_TUNER_MODE_MONO;
1da177e4 689 if (val & TDA9873_STEREO)
dc3d75da 690 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 691 if (val & TDA9873_DUAL)
dc3d75da 692 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
64f70e7e 693 v4l2_dbg(1, debug, sd, "tda9873_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 694 val, mode);
1da177e4
LT		 695 return mode;
696}
697
698static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
699{
64f70e7e 700 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 701 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
702 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
703
704 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
64f70e7e 705 v4l2_dbg(1, debug, sd, "tda9873_setmode(): external input\n");
1da177e4
LT		 706 return;
707 }
708
64f70e7e
HV		 709 v4l2_dbg(1, debug, sd, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
710 v4l2_dbg(1, debug, sd, "tda9873_setmode(): sw_data = %d\n", sw_data);
1da177e4
LT		 711
712 switch (mode) {
dc3d75da 713 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 714 sw_data |= TDA9873_TR_MONO;
715 break;
dc3d75da 716 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 717 sw_data |= TDA9873_TR_STEREO;
718 break;
dc3d75da 719 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 720 sw_data |= TDA9873_TR_DUALA;
721 break;
dc3d75da 722 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 723 sw_data |= TDA9873_TR_DUALB;
724 break;
725 default:
726 chip->mode = 0;
727 return;
728 }
729
730 chip_write(chip, TDA9873_SW, sw_data);
64f70e7e 731 v4l2_dbg(1, debug, sd, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
1da177e4
LT		 732 mode, sw_data);
733}
734
735static int tda9873_checkit(struct CHIPSTATE *chip)
736{
737 int rc;
738
739 if (-1 == (rc = chip_read2(chip,254)))
740 return 0;
741 return (rc & ~0x1f) == 0x80;
742}
743
744
745/* ---------------------------------------------------------------------- */
746/* audio chip description - defines+functions for tda9874h and tda9874a */
747/* Dariusz Kowalewski <darekk@automex.pl> */
748
749/* Subaddresses for TDA9874H and TDA9874A (slave rx) */
750#define TDA9874A_AGCGR 0x00 /* AGC gain */
751#define TDA9874A_GCONR 0x01 /* general config */
752#define TDA9874A_MSR 0x02 /* monitor select */
753#define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
754#define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
755#define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
756#define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
757#define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
758#define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
759#define TDA9874A_DCR 0x09 /* demodulator config */
760#define TDA9874A_FMER 0x0a /* FM de-emphasis */
761#define TDA9874A_FMMR 0x0b /* FM dematrix */
762#define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
763#define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
764#define TDA9874A_NCONR 0x0e /* NICAM config */
765#define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
766#define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
767#define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
768#define TDA9874A_AMCONR 0x12 /* audio mute control */
769#define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
770#define TDA9874A_AOSR 0x14 /* analog output select */
771#define TDA9874A_DAICONR 0x15 /* digital audio interface config */
772#define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
773#define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
774#define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
775#define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
776
777/* Subaddresses for TDA9874H and TDA9874A (slave tx) */
778#define TDA9874A_DSR 0x00 /* device status */
779#define TDA9874A_NSR 0x01 /* NICAM status */
780#define TDA9874A_NECR 0x02 /* NICAM error count */
781#define TDA9874A_DR1 0x03 /* add. data LSB */
782#define TDA9874A_DR2 0x04 /* add. data MSB */
783#define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
784#define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
785#define TDA9874A_SIFLR 0x07 /* SIF level */
786#define TDA9874A_TR2 252 /* test reg. 2 */
787#define TDA9874A_TR1 253 /* test reg. 1 */
788#define TDA9874A_DIC 254 /* device id. code */
789#define TDA9874A_SIC 255 /* software id. code */
790
791
792static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
793static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
794static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
795static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
796static int tda9874a_dic = -1; /* device id. code */
797
798/* insmod options for tda9874a */
799static unsigned int tda9874a_SIF = UNSET;
800static unsigned int tda9874a_AMSEL = UNSET;
801static unsigned int tda9874a_STD = UNSET;
802module_param(tda9874a_SIF, int, 0444);
803module_param(tda9874a_AMSEL, int, 0444);
804module_param(tda9874a_STD, int, 0444);
805
806/*
807 * initialization table for tda9874 decoder:
808 * - carrier 1 freq. registers (3 bytes)
809 * - carrier 2 freq. registers (3 bytes)
810 * - demudulator config register
811 * - FM de-emphasis register (slow identification mode)
812 * Note: frequency registers must be written in single i2c transfer.
813 */
814static struct tda9874a_MODES {
815 char *name;
816 audiocmd cmd;
817} tda9874a_modelist[9] = {
04e6f990 818 { "A2, B/G", /* default */
1da177e4
LT		 819 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
820 { "A2, M (Korea)",
821 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
822 { "A2, D/K (1)",
823 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
824 { "A2, D/K (2)",
825 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
826 { "A2, D/K (3)",
827 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
828 { "NICAM, I",
829 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
830 { "NICAM, B/G",
831 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
04e6f990 832 { "NICAM, D/K",
1da177e4
LT		 833 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
834 { "NICAM, L",
835 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
836};
837
838static int tda9874a_setup(struct CHIPSTATE *chip)
839{
64f70e7e
HV		 840 struct v4l2_subdev *sd = &chip->sd;
841
1da177e4
LT		 842 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
843 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
844 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
845 if(tda9874a_dic == 0x11) {
846 chip_write(chip, TDA9874A_FMMR, 0x80);
847 } else { /* dic == 0x07 */
848 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
849 chip_write(chip, TDA9874A_FMMR, 0x00);
850 }
851 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
852 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
853 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
854 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
855 /* Note: If signal quality is poor you may want to change NICAM */
856 /* error limit registers (NLELR and NUELR) to some greater values. */
857 /* Then the sound would remain stereo, but won't be so clear. */
858 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
859 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
860
861 if(tda9874a_dic == 0x11) {
862 chip_write(chip, TDA9874A_AMCONR, 0xf9);
863 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
864 chip_write(chip, TDA9874A_AOSR, 0x80);
865 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
866 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
867 } else { /* dic == 0x07 */
868 chip_write(chip, TDA9874A_AMCONR, 0xfb);
869 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
18fc59e2 870 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
1da177e4 871 }
64f70e7e 872 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
1da177e4
LT		 873 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
874 return 1;
875}
876
877static int tda9874a_getmode(struct CHIPSTATE *chip)
878{
64f70e7e 879 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 880 int dsr,nsr,mode;
881 int necr; /* just for debugging */
882
dc3d75da 883 mode = V4L2_TUNER_MODE_MONO;
1da177e4
LT		 884
885 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
886 return mode;
887 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
888 return mode;
889 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
890 return mode;
891
892 /* need to store dsr/nsr somewhere */
893 chip->shadow.bytes[MAXREGS-2] = dsr;
894 chip->shadow.bytes[MAXREGS-1] = nsr;
895
896 if(tda9874a_mode) {
897 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
898 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
899 * that sound has (temporarily) switched from NICAM to
900 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
901 * error count. So in fact there is no stereo in this case :-(
dc3d75da 902 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
1da177e4
LT		 903 * external 4052 multiplexer in audio_hook().
904 */
1da177e4 905 if(nsr & 0x02) /* NSR.S/MB=1 */
dc3d75da 906 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 907 if(nsr & 0x01) /* NSR.D/SB=1 */
dc3d75da 908 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4
LT		 909 } else {
910 if(dsr & 0x02) /* DSR.IDSTE=1 */
dc3d75da 911 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 912 if(dsr & 0x04) /* DSR.IDDUA=1 */
dc3d75da 913 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4
LT		 914 }
915
64f70e7e 916 v4l2_dbg(1, debug, sd, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
1da177e4
LT		 917 dsr, nsr, necr, mode);
918 return mode;
919}
920
921static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
922{
64f70e7e
HV		 923 struct v4l2_subdev *sd = &chip->sd;
924
1da177e4
LT		 925 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
926 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
64f70e7e 927 if (tda9874a_mode) {
1da177e4
LT		 928 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
929 tda9874a_NCONR &= 0xfe; /* enable */
930 else
931 tda9874a_NCONR |= 0x01; /* disable */
932 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
933 }
934
935 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
936 * and has auto-select function for audio output (AOSR register).
937 * Old TDA9874H doesn't support these features.
938 * TDA9874A also has additional mono output pin (OUTM), which
939 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
940 */
941 if(tda9874a_dic == 0x11) {
942 int aosr = 0x80;
943 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
944
945 switch(mode) {
dc3d75da
MCC		 946 case V4L2_TUNER_MODE_MONO:
947 case V4L2_TUNER_MODE_STEREO:
1da177e4 948 break;
dc3d75da 949 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 950 aosr = 0x80; /* auto-select, dual A/A */
951 mdacosr = (tda9874a_mode) ? 0x82:0x80;
952 break;
dc3d75da 953 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 954 aosr = 0xa0; /* auto-select, dual B/B */
955 mdacosr = (tda9874a_mode) ? 0x83:0x81;
956 break;
957 default:
958 chip->mode = 0;
959 return;
960 }
961 chip_write(chip, TDA9874A_AOSR, aosr);
962 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
963
64f70e7e 964 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1da177e4
LT		 965 mode, aosr, mdacosr);
966
967 } else { /* dic == 0x07 */
968 int fmmr,aosr;
969
970 switch(mode) {
dc3d75da 971 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 972 fmmr = 0x00; /* mono */
973 aosr = 0x10; /* A/A */
974 break;
dc3d75da 975 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 976 if(tda9874a_mode) {
977 fmmr = 0x00;
978 aosr = 0x00; /* handled by NICAM auto-mute */
979 } else {
980 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
981 aosr = 0x00;
982 }
983 break;
dc3d75da 984 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 985 fmmr = 0x02; /* dual */
986 aosr = 0x10; /* dual A/A */
987 break;
dc3d75da 988 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 989 fmmr = 0x02; /* dual */
990 aosr = 0x20; /* dual B/B */
991 break;
992 default:
993 chip->mode = 0;
994 return;
995 }
996 chip_write(chip, TDA9874A_FMMR, fmmr);
997 chip_write(chip, TDA9874A_AOSR, aosr);
998
64f70e7e 999 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1da177e4
LT		 1000 mode, fmmr, aosr);
1001 }
1002}
1003
1004static int tda9874a_checkit(struct CHIPSTATE *chip)
1005{
64f70e7e 1006 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 1007 int dic,sic; /* device id. and software id. codes */
1008
1009 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
1010 return 0;
1011 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
1012 return 0;
1013
64f70e7e 1014 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1da177e4
LT		 1015
1016 if((dic == 0x11)||(dic == 0x07)) {
64f70e7e 1017 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1da177e4
LT		 1018 tda9874a_dic = dic; /* remember device id. */
1019 return 1;
1020 }
1021 return 0; /* not found */
1022}
1023
1024static int tda9874a_initialize(struct CHIPSTATE *chip)
1025{
1026 if (tda9874a_SIF > 2)
1027 tda9874a_SIF = 1;
04e6f990 1028 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1da177e4
LT		 1029 tda9874a_STD = 0;
1030 if(tda9874a_AMSEL > 1)
1031 tda9874a_AMSEL = 0;
1032
1033 if(tda9874a_SIF == 1)
1034 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1035 else
1036 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1037
1038 tda9874a_ESP = tda9874a_STD;
1039 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1040
1041 if(tda9874a_AMSEL == 0)
1042 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1043 else
1044 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1045
1046 tda9874a_setup(chip);
1047 return 0;
1048}
1049
1050
1051/* ---------------------------------------------------------------------- */
1052/* audio chip descriptions - defines+functions for tea6420 */
1053
1054#define TEA6300_VL 0x00 /* volume left */
1055#define TEA6300_VR 0x01 /* volume right */
1056#define TEA6300_BA 0x02 /* bass */
1057#define TEA6300_TR 0x03 /* treble */
1058#define TEA6300_FA 0x04 /* fader control */
1059#define TEA6300_S 0x05 /* switch register */
f2421ca3 1060 /* values for those registers: */
1da177e4
LT		 1061#define TEA6300_S_SA 0x01 /* stereo A input */
1062#define TEA6300_S_SB 0x02 /* stereo B */
1063#define TEA6300_S_SC 0x04 /* stereo C */
1064#define TEA6300_S_GMU 0x80 /* general mute */
1065
1066#define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1067#define TEA6320_FFR 0x01 /* fader front right (0-5) */
1068#define TEA6320_FFL 0x02 /* fader front left (0-5) */
1069#define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1070#define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1071#define TEA6320_BA 0x05 /* bass (0-4) */
1072#define TEA6320_TR 0x06 /* treble (0-4) */
1073#define TEA6320_S 0x07 /* switch register */
f2421ca3 1074 /* values for those registers: */
1da177e4
LT		 1075#define TEA6320_S_SA 0x07 /* stereo A input */
1076#define TEA6320_S_SB 0x06 /* stereo B */
1077#define TEA6320_S_SC 0x05 /* stereo C */
1078#define TEA6320_S_SD 0x04 /* stereo D */
1079#define TEA6320_S_GMU 0x80 /* general mute */
1080
1081#define TEA6420_S_SA 0x00 /* stereo A input */
1082#define TEA6420_S_SB 0x01 /* stereo B */
1083#define TEA6420_S_SC 0x02 /* stereo C */
1084#define TEA6420_S_SD 0x03 /* stereo D */
1085#define TEA6420_S_SE 0x04 /* stereo E */
1086#define TEA6420_S_GMU 0x05 /* general mute */
1087
1088static int tea6300_shift10(int val) { return val >> 10; }
1089static int tea6300_shift12(int val) { return val >> 12; }
1090
1091/* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1092/* 0x0c mirror those immediately higher) */
1093static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1094static int tea6320_shift11(int val) { return val >> 11; }
1095static int tea6320_initialize(struct CHIPSTATE * chip)
1096{
1097 chip_write(chip, TEA6320_FFR, 0x3f);
1098 chip_write(chip, TEA6320_FFL, 0x3f);
1099 chip_write(chip, TEA6320_FRR, 0x3f);
1100 chip_write(chip, TEA6320_FRL, 0x3f);
1101
1102 return 0;
1103}
1104
1105
1106/* ---------------------------------------------------------------------- */
1107/* audio chip descriptions - defines+functions for tda8425 */
1108
1109#define TDA8425_VL 0x00 /* volume left */
1110#define TDA8425_VR 0x01 /* volume right */
1111#define TDA8425_BA 0x02 /* bass */
1112#define TDA8425_TR 0x03 /* treble */
1113#define TDA8425_S1 0x08 /* switch functions */
f2421ca3 1114 /* values for those registers: */
1da177e4
LT		 1115#define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1116#define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1117#define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1118#define TDA8425_S1_MU 0x20 /* mute bit */
1119#define TDA8425_S1_STEREO 0x18 /* stereo bits */
1120#define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1121#define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1122#define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1123#define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1124#define TDA8425_S1_ML 0x06 /* language selector */
1125#define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1126#define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1127#define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1128#define TDA8425_S1_IS 0x01 /* channel selector */
1129
1130
1131static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1132static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1133
1134static int tda8425_initialize(struct CHIPSTATE *chip)
1135{
81cb5c4f 1136 struct CHIPDESC *desc = chip->desc;
64f70e7e 1137 struct i2c_client *c = v4l2_get_subdevdata(&chip->sd);
8bf2f8e7
HV		 1138 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1139 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1da177e4 1140
64f70e7e
HV		 1141 if (c->adapter->id == I2C_HW_B_RIVA)
1142 memcpy(desc->inputmap, inputmap, sizeof(inputmap));
1da177e4
LT		 1143 return 0;
1144}
1145
1146static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1147{
1148 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1149
dc3d75da 1150 if (mode & V4L2_TUNER_MODE_LANG1) {
1da177e4
LT		 1151 s1 |= TDA8425_S1_ML_SOUND_A;
1152 s1 |= TDA8425_S1_STEREO_PSEUDO;
1153
dc3d75da 1154 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1da177e4
LT		 1155 s1 |= TDA8425_S1_ML_SOUND_B;
1156 s1 |= TDA8425_S1_STEREO_PSEUDO;
1157
1158 } else {
1159 s1 |= TDA8425_S1_ML_STEREO;
1160
dc3d75da 1161 if (mode & V4L2_TUNER_MODE_MONO)
1da177e4 1162 s1 |= TDA8425_S1_STEREO_MONO;
dc3d75da 1163 if (mode & V4L2_TUNER_MODE_STEREO)
1da177e4
LT		 1164 s1 |= TDA8425_S1_STEREO_SPATIAL;
1165 }
1166 chip_write(chip,TDA8425_S1,s1);
1167}
1168
1169
1170/* ---------------------------------------------------------------------- */
1171/* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1172
1173/* the registers of 16C54, I2C sub address. */
1174#define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1175#define PIC16C54_REG_MISC 0x02
1176
1177/* bit definition of the RESET register, I2C data. */
1178#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
f2421ca3 1179 /* code of remote controller */
1da177e4
LT		 1180#define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1181#define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1182#define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1183#define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1184#define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1185#define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1186#define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1187
1188/* ---------------------------------------------------------------------- */
1189/* audio chip descriptions - defines+functions for TA8874Z */
1190
18fc59e2 1191/* write 1st byte */
1da177e4
LT		 1192#define TA8874Z_LED_STE 0x80
1193#define TA8874Z_LED_BIL 0x40
1194#define TA8874Z_LED_EXT 0x20
1195#define TA8874Z_MONO_SET 0x10
1196#define TA8874Z_MUTE 0x08
1197#define TA8874Z_F_MONO 0x04
1198#define TA8874Z_MODE_SUB 0x02
1199#define TA8874Z_MODE_MAIN 0x01
1200
18fc59e2
MCC		 1201/* write 2nd byte */
1202/*#define TA8874Z_TI 0x80 */ /* test mode */
1da177e4
LT		 1203#define TA8874Z_SEPARATION 0x3f
1204#define TA8874Z_SEPARATION_DEFAULT 0x10
1205
18fc59e2 1206/* read */
1da177e4
LT		 1207#define TA8874Z_B1 0x80
1208#define TA8874Z_B0 0x40
1209#define TA8874Z_CHAG_FLAG 0x20
1210
18fc59e2
MCC		 1211/*
1212 * B1 B0
1213 * mono L H
1214 * stereo L L
1215 * BIL H L
1216 */
1da177e4
LT		 1217static int ta8874z_getmode(struct CHIPSTATE *chip)
1218{
1219 int val, mode;
1220
1221 val = chip_read(chip);
dc3d75da 1222 mode = V4L2_TUNER_MODE_MONO;
1da177e4 1223 if (val & TA8874Z_B1){
dc3d75da 1224 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4 1225 }else if (!(val & TA8874Z_B0)){
dc3d75da 1226 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 1227 }
08e14054 1228 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1da177e4
LT		 1229 return mode;
1230}
1231
1232static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1233static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1234static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1235static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1236
1237static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1238{
64f70e7e 1239 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 1240 int update = 1;
1241 audiocmd *t = NULL;
64f70e7e
HV		 1242
1243 v4l2_dbg(1, debug, sd, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1da177e4
LT		 1244
1245 switch(mode){
dc3d75da 1246 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 1247 t = &ta8874z_mono;
1248 break;
dc3d75da 1249 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 1250 t = &ta8874z_stereo;
1251 break;
dc3d75da 1252 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 1253 t = &ta8874z_main;
1254 break;
dc3d75da 1255 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 1256 t = &ta8874z_sub;
1257 break;
1258 default:
1259 update = 0;
1260 }
1261
1262 if(update)
1263 chip_cmd(chip, "TA8874Z", t);
1264}
1265
1266static int ta8874z_checkit(struct CHIPSTATE *chip)
1267{
1268 int rc;
1269 rc = chip_read(chip);
1270 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1271}
1272
1273/* ---------------------------------------------------------------------- */
1274/* audio chip descriptions - struct CHIPDESC */
1275
1276/* insmod options to enable/disable individual audio chips */
52c1da39
AB		 1277static int tda8425 = 1;
1278static int tda9840 = 1;
1279static int tda9850 = 1;
1280static int tda9855 = 1;
1281static int tda9873 = 1;
1282static int tda9874a = 1;
ff699e6b
DSL		 1283static int tea6300; /* default 0 - address clash with msp34xx */
1284static int tea6320; /* default 0 - address clash with msp34xx */
52c1da39
AB		 1285static int tea6420 = 1;
1286static int pic16c54 = 1;
ff699e6b 1287static int ta8874z; /* default 0 - address clash with tda9840 */
1da177e4
LT		 1288
1289module_param(tda8425, int, 0444);
1290module_param(tda9840, int, 0444);
1291module_param(tda9850, int, 0444);
1292module_param(tda9855, int, 0444);
1293module_param(tda9873, int, 0444);
1294module_param(tda9874a, int, 0444);
1295module_param(tea6300, int, 0444);
1296module_param(tea6320, int, 0444);
1297module_param(tea6420, int, 0444);
1298module_param(pic16c54, int, 0444);
1299module_param(ta8874z, int, 0444);
1300
1301static struct CHIPDESC chiplist[] = {
1302 {
1303 .name = "tda9840",
1da177e4 1304 .insmodopt = &tda9840,
09df1c16
MCC		 1305 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1306 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1da177e4 1307 .registers = 5,
dd03e970 1308 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1309
af1a9951 1310 /* callbacks */
94f9e56e 1311 .checkit = tda9840_checkit,
1da177e4
LT		 1312 .getmode = tda9840_getmode,
1313 .setmode = tda9840_setmode,
1da177e4 1314
4ac97914 1315 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1da177e4
LT		 1316 /* ,TDA9840_SW, TDA9840_MONO */} }
1317 },
1318 {
1319 .name = "tda9873h",
1da177e4 1320 .insmodopt = &tda9873,
09df1c16
MCC		 1321 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1322 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4 1323 .registers = 3,
dd03e970 1324 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1da177e4 1325
af1a9951
MCC		 1326 /* callbacks */
1327 .checkit = tda9873_checkit,
1da177e4
LT		 1328 .getmode = tda9873_getmode,
1329 .setmode = tda9873_setmode,
1da177e4
LT		 1330
1331 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1332 .inputreg = TDA9873_SW,
1333 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
8bf2f8e7 1334 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1da177e4
LT		 1335 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1336
1337 },
1338 {
1339 .name = "tda9874h/a",
1da177e4 1340 .insmodopt = &tda9874a,
09df1c16
MCC		 1341 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1342 .addr_hi = I2C_ADDR_TDA9874 >> 1,
dd03e970 1343 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1344
af1a9951
MCC		 1345 /* callbacks */
1346 .initialize = tda9874a_initialize,
1347 .checkit = tda9874a_checkit,
1da177e4
LT		 1348 .getmode = tda9874a_getmode,
1349 .setmode = tda9874a_setmode,
1da177e4
LT		 1350 },
1351 {
1352 .name = "tda9850",
1da177e4 1353 .insmodopt = &tda9850,
09df1c16
MCC		 1354 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1355 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1356 .registers = 11,
1357
1358 .getmode = tda985x_getmode,
1359 .setmode = tda985x_setmode,
1360
1361 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1362 },
1363 {
1364 .name = "tda9855",
1da177e4 1365 .insmodopt = &tda9855,
09df1c16
MCC		 1366 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1367 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1368 .registers = 11,
1369 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1370
1371 .leftreg = TDA9855_VL,
1372 .rightreg = TDA9855_VR,
1373 .bassreg = TDA9855_BA,
1374 .treblereg = TDA9855_TR,
af1a9951
MCC		 1375
1376 /* callbacks */
1da177e4
LT		 1377 .volfunc = tda9855_volume,
1378 .bassfunc = tda9855_bass,
1379 .treblefunc = tda9855_treble,
1da177e4
LT		 1380 .getmode = tda985x_getmode,
1381 .setmode = tda985x_setmode,
1382
1383 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1384 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1385 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1386 0x07, 0x10, 0x10, 0x03 }}
1387 },
1388 {
1389 .name = "tea6300",
1da177e4 1390 .insmodopt = &tea6300,
09df1c16
MCC		 1391 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1392 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1da177e4
LT		 1393 .registers = 6,
1394 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1395
1396 .leftreg = TEA6300_VR,
1397 .rightreg = TEA6300_VL,
1398 .bassreg = TEA6300_BA,
1399 .treblereg = TEA6300_TR,
af1a9951
MCC		 1400
1401 /* callbacks */
1da177e4
LT		 1402 .volfunc = tea6300_shift10,
1403 .bassfunc = tea6300_shift12,
1404 .treblefunc = tea6300_shift12,
1405
1406 .inputreg = TEA6300_S,
1407 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1408 .inputmute = TEA6300_S_GMU,
1409 },
1410 {
1411 .name = "tea6320",
1da177e4 1412 .insmodopt = &tea6320,
09df1c16
MCC		 1413 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1414 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1da177e4
LT		 1415 .registers = 8,
1416 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1417
1418 .leftreg = TEA6320_V,
1419 .rightreg = TEA6320_V,
1420 .bassreg = TEA6320_BA,
1421 .treblereg = TEA6320_TR,
af1a9951
MCC		 1422
1423 /* callbacks */
1424 .initialize = tea6320_initialize,
1da177e4
LT		 1425 .volfunc = tea6320_volume,
1426 .bassfunc = tea6320_shift11,
1427 .treblefunc = tea6320_shift11,
1428
1429 .inputreg = TEA6320_S,
1430 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1431 .inputmute = TEA6300_S_GMU,
1432 },
1433 {
1434 .name = "tea6420",
1da177e4 1435 .insmodopt = &tea6420,
09df1c16
MCC		 1436 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1437 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1da177e4
LT		 1438 .registers = 1,
1439 .flags = CHIP_HAS_INPUTSEL,
1440
1441 .inputreg = -1,
1442 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1443 .inputmute = TEA6300_S_GMU,
1444 },
1445 {
1446 .name = "tda8425",
1da177e4 1447 .insmodopt = &tda8425,
09df1c16
MCC		 1448 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1449 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1da177e4
LT		 1450 .registers = 9,
1451 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1452
1453 .leftreg = TDA8425_VL,
1454 .rightreg = TDA8425_VR,
1455 .bassreg = TDA8425_BA,
1456 .treblereg = TDA8425_TR,
af1a9951
MCC		 1457
1458 /* callbacks */
1459 .initialize = tda8425_initialize,
1da177e4
LT		 1460 .volfunc = tda8425_shift10,
1461 .bassfunc = tda8425_shift12,
1462 .treblefunc = tda8425_shift12,
af1a9951 1463 .setmode = tda8425_setmode,
1da177e4
LT		 1464
1465 .inputreg = TDA8425_S1,
1466 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1467 .inputmute = TDA8425_S1_OFF,
1468
1da177e4
LT		 1469 },
1470 {
1471 .name = "pic16c54 (PV951)",
1da177e4 1472 .insmodopt = &pic16c54,
09df1c16
MCC		 1473 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1474 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1da177e4
LT		 1475 .registers = 2,
1476 .flags = CHIP_HAS_INPUTSEL,
1477
1478 .inputreg = PIC16C54_REG_MISC,
1479 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1480 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1481 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
8bf2f8e7 1482 PIC16C54_MISC_SND_MUTE},
1da177e4
LT		 1483 .inputmute = PIC16C54_MISC_SND_MUTE,
1484 },
1485 {
1486 .name = "ta8874z",
1da177e4
LT		 1487 .checkit = ta8874z_checkit,
1488 .insmodopt = &ta8874z,
09df1c16
MCC		 1489 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1490 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1da177e4 1491 .registers = 2,
dd03e970 1492 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1493
af1a9951 1494 /* callbacks */
1da177e4
LT		 1495 .getmode = ta8874z_getmode,
1496 .setmode = ta8874z_setmode,
1da177e4 1497
4ac97914 1498 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1da177e4
LT		 1499 },
1500 { .name = NULL } /* EOF */
1501};
1502
1503
1504/* ---------------------------------------------------------------------- */
1da177e4 1505
64f70e7e 1506static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
dc3d75da
MCC		 1507 struct v4l2_control *ctrl)
1508{
64f70e7e 1509 struct CHIPSTATE *chip = to_state(sd);
81cb5c4f 1510 struct CHIPDESC *desc = chip->desc;
dc3d75da
MCC		 1511
1512 switch (ctrl->id) {
1513 case V4L2_CID_AUDIO_MUTE:
1514 ctrl->value=chip->muted;
1515 return 0;
1516 case V4L2_CID_AUDIO_VOLUME:
18c0ecf1 1517 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1518 break;
1519 ctrl->value = max(chip->left,chip->right);
1520 return 0;
1521 case V4L2_CID_AUDIO_BALANCE:
1522 {
1523 int volume;
18c0ecf1 1524 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1525 break;
1526 volume = max(chip->left,chip->right);
1527 if (volume)
1528 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1529 else
1530 ctrl->value=32768;
1531 return 0;
1532 }
1533 case V4L2_CID_AUDIO_BASS:
01a1a3cc 1534 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
dc3d75da
MCC		 1535 break;
1536 ctrl->value = chip->bass;
1537 return 0;
1538 case V4L2_CID_AUDIO_TREBLE:
01a1a3cc
MCC		 1539 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1540 break;
dc3d75da
MCC		 1541 ctrl->value = chip->treble;
1542 return 0;
1543 }
1544 return -EINVAL;
1545}
1546
64f70e7e 1547static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
dc3d75da 1548 struct v4l2_control *ctrl)
8bf2f8e7 1549{
64f70e7e 1550 struct CHIPSTATE *chip = to_state(sd);
81cb5c4f 1551 struct CHIPDESC *desc = chip->desc;
8bf2f8e7
HV		 1552
1553 switch (ctrl->id) {
1554 case V4L2_CID_AUDIO_MUTE:
1555 if (ctrl->value < 0 || ctrl->value >= 2)
1556 return -ERANGE;
1557 chip->muted = ctrl->value;
1558 if (chip->muted)
1559 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1560 else
1561 chip_write_masked(chip,desc->inputreg,
1562 desc->inputmap[chip->input],desc->inputmask);
dc3d75da
MCC		 1563 return 0;
1564 case V4L2_CID_AUDIO_VOLUME:
1565 {
1566 int volume,balance;
1567
18c0ecf1 1568 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1569 break;
1570
1571 volume = max(chip->left,chip->right);
1572 if (volume)
1573 balance=(32768*min(chip->left,chip->right))/volume;
1574 else
1575 balance=32768;
1576
1577 volume=ctrl->value;
1578 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1579 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1580
1581 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1582 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1583
1584 return 0;
8bf2f8e7 1585 }
dc3d75da
MCC		 1586 case V4L2_CID_AUDIO_BALANCE:
1587 {
1588 int volume, balance;
18c0ecf1 1589 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1590 break;
1591
1592 volume = max(chip->left,chip->right);
1593 balance = ctrl->value;
1594
1595 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1596 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1597
1598 return 0;
1599 }
1600 case V4L2_CID_AUDIO_BASS:
01a1a3cc 1601 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
dc3d75da
MCC		 1602 break;
1603 chip->bass = ctrl->value;
1604 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1605
1606 return 0;
1607 case V4L2_CID_AUDIO_TREBLE:
01a1a3cc
MCC		 1608 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1609 break;
dc3d75da
MCC		 1610 chip->treble = ctrl->value;
1611 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1612
1613 return 0;
1614 }
1615 return -EINVAL;
8bf2f8e7
HV		 1616}
1617
1618
1da177e4
LT		 1619/* ---------------------------------------------------------------------- */
1620/* video4linux interface */
1621
64f70e7e 1622static int tvaudio_s_radio(struct v4l2_subdev *sd)
1da177e4 1623{
64f70e7e 1624 struct CHIPSTATE *chip = to_state(sd);
1da177e4 1625
64f70e7e
HV		 1626 chip->radio = 1;
1627 chip->watch_stereo = 0;
1628 /* del_timer(&chip->wt); */
1629 return 0;
1630}
1631
1632static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1633{
1634 struct CHIPSTATE *chip = to_state(sd);
1635 struct CHIPDESC *desc = chip->desc;
1636
1637 switch (qc->id) {
1638 case V4L2_CID_AUDIO_MUTE:
1639 break;
1640 case V4L2_CID_AUDIO_VOLUME:
1641 case V4L2_CID_AUDIO_BALANCE:
1642 if (!(desc->flags & CHIP_HAS_VOLUME))
1643 return -EINVAL;
1644 break;
1645 case V4L2_CID_AUDIO_BASS:
1646 case V4L2_CID_AUDIO_TREBLE:
1647 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1648 return -EINVAL;
1649 break;
1650 default:
1651 return -EINVAL;
c6241b6c 1652 }
64f70e7e
HV		 1653 return v4l2_ctrl_query_fill_std(qc);
1654}
1655
1656static int tvaudio_s_routing(struct v4l2_subdev *sd, const struct v4l2_routing *rt)
1657{
1658 struct CHIPSTATE *chip = to_state(sd);
1659 struct CHIPDESC *desc = chip->desc;
1da177e4 1660
64f70e7e
HV		 1661 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1662 return -EINVAL;
1663 /* There are four inputs: tuner, radio, extern and intern. */
1664 chip->input = rt->input;
1665 if (chip->muted)
1666 return 0;
1667 chip_write_masked(chip, desc->inputreg,
1668 desc->inputmap[chip->input], desc->inputmask);
1669 return 0;
1670}
1671
1672static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1673{
1674 struct CHIPSTATE *chip = to_state(sd);
1675 struct CHIPDESC *desc = chip->desc;
1676 int mode = 0;
1677
1678 if (chip->radio)
1679 return 0;
1680 switch (vt->audmode) {
1681 case V4L2_TUNER_MODE_MONO:
1682 case V4L2_TUNER_MODE_STEREO:
1683 case V4L2_TUNER_MODE_LANG1:
1684 case V4L2_TUNER_MODE_LANG2:
1685 mode = vt->audmode;
1686 break;
1687 case V4L2_TUNER_MODE_LANG1_LANG2:
1688 mode = V4L2_TUNER_MODE_STEREO;
1689 break;
1690 default:
1691 return -EINVAL;
1692 }
1693 chip->audmode = vt->audmode;
1694
1695 if (desc->setmode && mode) {
1da177e4
LT		 1696 chip->watch_stereo = 0;
1697 /* del_timer(&chip->wt); */
64f70e7e
HV		 1698 chip->mode = mode;
1699 desc->setmode(chip, mode);
1da177e4 1700 }
64f70e7e
HV		 1701 return 0;
1702}
8bf2f8e7 1703
64f70e7e
HV		 1704static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1705{
1706 struct CHIPSTATE *chip = to_state(sd);
1707 struct CHIPDESC *desc = chip->desc;
1708 int mode = V4L2_TUNER_MODE_MONO;
2474ed44 1709
64f70e7e
HV		 1710 if (chip->radio)
1711 return 0;
1712 vt->audmode = chip->audmode;
1713 vt->rxsubchans = 0;
1714 vt->capability = V4L2_TUNER_CAP_STEREO |
1715 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1716
1717 if (desc->getmode)
1718 mode = desc->getmode(chip);
1719
1720 if (mode & V4L2_TUNER_MODE_MONO)
1721 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1722 if (mode & V4L2_TUNER_MODE_STEREO)
1723 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1724 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1725 When this module is converted fully to v4l2, then this
1726 should change for those chips that can detect SAP. */
1727 if (mode & V4L2_TUNER_MODE_LANG1)
1728 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1729 V4L2_TUNER_SUB_LANG2;
1730 return 0;
1731}
1732
1733static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1734{
1735 struct CHIPSTATE *chip = to_state(sd);
1736
1737 chip->radio = 0;
1738 return 0;
1739}
1740
1741static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1742{
1743 struct CHIPSTATE *chip = to_state(sd);
1744 struct CHIPDESC *desc = chip->desc;
1745
1746 chip->mode = 0; /* automatic */
1747
1748 /* For chips that provide getmode and setmode, and doesn't
1749 automatically follows the stereo carrier, a kthread is
1750 created to set the audio standard. In this case, when then
1751 the video channel is changed, tvaudio starts on MONO mode.
1752 After waiting for 2 seconds, the kernel thread is called,
1753 to follow whatever audio standard is pointed by the
1754 audio carrier.
1755 */
1756 if (chip->thread) {
1757 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1758 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1759 chip->prevmode = -1; /* reset previous mode */
1760 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
2474ed44 1761 }
64f70e7e
HV		 1762 return 0;
1763}
2474ed44 1764
aecde8b5 1765static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
64f70e7e
HV		 1766{
1767 struct i2c_client *client = v4l2_get_subdevdata(sd);
1768
1769 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1770}
1771
1772static int tvaudio_command(struct i2c_client *client, unsigned cmd, void *arg)
1773{
1774 return v4l2_subdev_command(i2c_get_clientdata(client), cmd, arg);
1775}
1776
1777/* ----------------------------------------------------------------------- */
1778
1779static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1780 .g_chip_ident = tvaudio_g_chip_ident,
1781 .queryctrl = tvaudio_queryctrl,
1782 .g_ctrl = tvaudio_g_ctrl,
1783 .s_ctrl = tvaudio_s_ctrl,
1784};
1785
1786static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1787 .s_radio = tvaudio_s_radio,
1788 .s_frequency = tvaudio_s_frequency,
1789 .s_std = tvaudio_s_std,
1790 .s_tuner = tvaudio_s_tuner,
1791 .s_tuner = tvaudio_g_tuner,
1792};
1793
1794static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1795 .s_routing = tvaudio_s_routing,
1796};
1797
1798static const struct v4l2_subdev_ops tvaudio_ops = {
1799 .core = &tvaudio_core_ops,
1800 .tuner = &tvaudio_tuner_ops,
1801 .audio = &tvaudio_audio_ops,
1802};
1803
1804/* ----------------------------------------------------------------------- */
1805
1806
1807/* i2c registration */
1808
1809static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1810{
1811 struct CHIPSTATE *chip;
1812 struct CHIPDESC *desc;
1813 struct v4l2_subdev *sd;
1814
1815 if (debug) {
1816 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1817 printk(KERN_INFO "tvaudio: known chips: ");
1818 for (desc = chiplist; desc->name != NULL; desc++)
1819 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1820 printk("\n");
2474ed44 1821 }
1da177e4 1822
64f70e7e
HV		 1823 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1824 if (!chip)
1825 return -ENOMEM;
1826 sd = &chip->sd;
1827 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
8a854284 1828
64f70e7e
HV		 1829 /* find description for the chip */
1830 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1831 for (desc = chiplist; desc->name != NULL; desc++) {
1832 if (0 == *(desc->insmodopt))
1833 continue;
1834 if (client->addr < desc->addr_lo ||
1835 client->addr > desc->addr_hi)
1836 continue;
1837 if (desc->checkit && !desc->checkit(chip))
1838 continue;
1da177e4
LT		 1839 break;
1840 }
64f70e7e
HV		 1841 if (desc->name == NULL) {
1842 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1843 kfree(chip);
1844 return -EIO;
1845 }
1846 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1847 if (desc->flags) {
1848 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1849 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1850 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1851 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1852 }
8a854284 1853
64f70e7e
HV		 1854 /* fill required data structures */
1855 if (!id)
1856 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1857 chip->desc = desc;
1858 chip->shadow.count = desc->registers+1;
1859 chip->prevmode = -1;
1860 chip->audmode = V4L2_TUNER_MODE_LANG1;
8a854284 1861
64f70e7e
HV		 1862 /* initialization */
1863 if (desc->initialize != NULL)
1864 desc->initialize(chip);
1865 else
1866 chip_cmd(chip, "init", &desc->init);
8a854284 1867
64f70e7e
HV		 1868 if (desc->flags & CHIP_HAS_VOLUME) {
1869 if (!desc->volfunc) {
1870 /* This shouldn't be happen. Warn user, but keep working
1871 without volume controls
1872 */
1873 v4l2_info(sd, "volume callback undefined!\n");
1874 desc->flags &= ~CHIP_HAS_VOLUME;
1875 } else {
1876 chip->left = desc->leftinit ? desc->leftinit : 65535;
1877 chip->right = desc->rightinit ? desc->rightinit : 65535;
1878 chip_write(chip, desc->leftreg,
1879 desc->volfunc(chip->left));
1880 chip_write(chip, desc->rightreg,
1881 desc->volfunc(chip->right));
1882 }
8a854284 1883 }
64f70e7e
HV		 1884 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1885 if (!desc->bassfunc || !desc->treblefunc) {
1886 /* This shouldn't be happen. Warn user, but keep working
1887 without bass/treble controls
1888 */
1889 v4l2_info(sd, "bass/treble callbacks undefined!\n");
1890 desc->flags &= ~CHIP_HAS_BASSTREBLE;
1891 } else {
1892 chip->treble = desc->trebleinit ?
1893 desc->trebleinit : 32768;
1894 chip->bass = desc->bassinit ?
1895 desc->bassinit : 32768;
1896 chip_write(chip, desc->bassreg,
1897 desc->bassfunc(chip->bass));
1898 chip_write(chip, desc->treblereg,
1899 desc->treblefunc(chip->treble));
1da177e4 1900 }
64f70e7e 1901 }
74cab31c 1902
64f70e7e
HV		 1903 chip->thread = NULL;
1904 if (desc->flags & CHIP_NEED_CHECKMODE) {
1905 if (!desc->getmode || !desc->setmode) {
1906 /* This shouldn't be happen. Warn user, but keep working
1907 without kthread
1908 */
1909 v4l2_info(sd, "set/get mode callbacks undefined!\n");
1910 return 0;
1911 }
1912 /* start async thread */
1913 init_timer(&chip->wt);
1914 chip->wt.function = chip_thread_wake;
1915 chip->wt.data = (unsigned long)chip;
1916 chip->thread = kthread_run(chip_thread, chip, client->name);
1917 if (IS_ERR(chip->thread)) {
1918 v4l2_warn(sd, "failed to create kthread\n");
1919 chip->thread = NULL;
1920 }
1da177e4
LT		 1921 }
1922 return 0;
1923}
1924
64f70e7e
HV		 1925static int tvaudio_remove(struct i2c_client *client)
1926{
1927 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1928 struct CHIPSTATE *chip = to_state(sd);
1929
1930 del_timer_sync(&chip->wt);
1931 if (chip->thread) {
1932 /* shutdown async thread */
1933 kthread_stop(chip->thread);
1934 chip->thread = NULL;
1935 }
1936
1937 v4l2_device_unregister_subdev(sd);
1938 kfree(chip);
1939 return 0;
1940}
1941
1942static int tvaudio_legacy_probe(struct i2c_adapter *adap)
1da177e4 1943{
08e14054
HV		 1944 /* don't attach on saa7146 based cards,
1945 because dedicated drivers are used */
1946 if ((adap->id == I2C_HW_SAA7146))
1947 return 0;
1948 if (adap->class & I2C_CLASS_TV_ANALOG)
1949 return 1;
1950 return 0;
1da177e4
LT		 1951}
1952
ae429083
JD		 1953/* This driver supports many devices and the idea is to let the driver
1954 detect which device is present. So rather than listing all supported
1955 devices here, we pretend to support a single, fake device type. */
64f70e7e 1956static const struct i2c_device_id tvaudio_id[] = {
ae429083
JD		 1957 { "tvaudio", 0 },
1958 { }
1959};
64f70e7e 1960MODULE_DEVICE_TABLE(i2c, tvaudio_id);
ae429083 1961
08e14054
HV		 1962static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1963 .name = "tvaudio",
1964 .driverid = I2C_DRIVERID_TVAUDIO,
64f70e7e
HV		 1965 .command = tvaudio_command,
1966 .probe = tvaudio_probe,
1967 .remove = tvaudio_remove,
1968 .legacy_probe = tvaudio_legacy_probe,
1969 .id_table = tvaudio_id,
08e14054 1970};
Linux 6.x block layer and io_uring tree(s)