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V4L/DVB (12532): soc-camera: Use camera device object for core output
[linux-2.6-block.git] / drivers / media / video / mx1_camera.c
CommitLineData
6acc81c3
PZ		 1/*
2 * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
3 *
4 * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
6 *
7 * Based on PXA SoC camera driver
8 * Copyright (C) 2006, Sascha Hauer, Pengutronix
9 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/clk.h>
17#include <linux/delay.h>
18#include <linux/device.h>
19#include <linux/dma-mapping.h>
20#include <linux/errno.h>
21#include <linux/fs.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/io.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/mutex.h>
30#include <linux/platform_device.h>
31#include <linux/time.h>
32#include <linux/version.h>
33#include <linux/videodev2.h>
34
35#include <media/soc_camera.h>
36#include <media/v4l2-common.h>
37#include <media/v4l2-dev.h>
38#include <media/videobuf-dma-contig.h>
39
40#include <asm/dma.h>
41#include <asm/fiq.h>
42#include <mach/dma-mx1-mx2.h>
43#include <mach/hardware.h>
44#include <mach/mx1_camera.h>
45
46/*
47 * CSI registers
48 */
49#define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
50#define DMA_DIMR 0x08 /* Interrupt mask Register */
51#define CSICR1 0x00 /* CSI Control Register 1 */
52#define CSISR 0x08 /* CSI Status Register */
53#define CSIRXR 0x10 /* CSI RxFIFO Register */
54
55#define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
56#define CSICR1_SOF_POL (1 << 17)
57#define CSICR1_SOF_INTEN (1 << 16)
58#define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
59#define CSICR1_MCLKEN (1 << 9)
60#define CSICR1_FCC (1 << 8)
61#define CSICR1_BIG_ENDIAN (1 << 7)
62#define CSICR1_CLR_RXFIFO (1 << 5)
63#define CSICR1_GCLK_MODE (1 << 4)
64#define CSICR1_DATA_POL (1 << 2)
65#define CSICR1_REDGE (1 << 1)
66#define CSICR1_EN (1 << 0)
67
68#define CSISR_SFF_OR_INT (1 << 25)
69#define CSISR_RFF_OR_INT (1 << 24)
70#define CSISR_STATFF_INT (1 << 21)
71#define CSISR_RXFF_INT (1 << 18)
72#define CSISR_SOF_INT (1 << 16)
73#define CSISR_DRDY (1 << 0)
74
75#define VERSION_CODE KERNEL_VERSION(0, 0, 1)
76#define DRIVER_NAME "mx1-camera"
77
78#define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
79 CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
80
81#define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
82 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
83 SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
84 SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
85 SOCAM_DATAWIDTH_8)
86
87#define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
88
89/*
90 * Structures
91 */
92
93/* buffer for one video frame */
94struct mx1_buffer {
95 /* common v4l buffer stuff -- must be first */
96 struct videobuf_buffer vb;
97 const struct soc_camera_data_format *fmt;
98 int inwork;
99};
100
101/* i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
102 * Interface. If anyone ever builds hardware to enable more than
103 * one camera, they will have to modify this driver too */
104struct mx1_camera_dev {
eb6c8558 105 struct soc_camera_host soc_host;
6acc81c3
PZ		 106 struct soc_camera_device *icd;
107 struct mx1_camera_pdata *pdata;
108 struct mx1_buffer *active;
6acc81c3
PZ		 109 struct resource *res;
110 struct clk *clk;
111 struct list_head capture;
112
113 void __iomem *base;
114 int dma_chan;
115 unsigned int irq;
116 unsigned long mclk;
117
118 spinlock_t lock;
119};
120
121/*
122 * Videobuf operations
123 */
124static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
125 unsigned int *size)
126{
127 struct soc_camera_device *icd = vq->priv_data;
128
a0705b07 129 *size = icd->rect_current.width * icd->rect_current.height *
6acc81c3
PZ		 130 ((icd->current_fmt->depth + 7) >> 3);
131
132 if (!*count)
133 *count = 32;
134
135 while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
136 (*count)--;
137
138 dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size);
139
140 return 0;
141}
142
143static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
144{
145 struct soc_camera_device *icd = vq->priv_data;
146 struct videobuf_buffer *vb = &buf->vb;
147
148 BUG_ON(in_interrupt());
149
150 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
151 vb, vb->baddr, vb->bsize);
152
153 /* This waits until this buffer is out of danger, i.e., until it is no
154 * longer in STATE_QUEUED or STATE_ACTIVE */
155 videobuf_waiton(vb, 0, 0);
156 videobuf_dma_contig_free(vq, vb);
157
158 vb->state = VIDEOBUF_NEEDS_INIT;
159}
160
161static int mx1_videobuf_prepare(struct videobuf_queue *vq,
162 struct videobuf_buffer *vb, enum v4l2_field field)
163{
164 struct soc_camera_device *icd = vq->priv_data;
165 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
166 int ret;
167
168 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
169 vb, vb->baddr, vb->bsize);
170
171 /* Added list head initialization on alloc */
172 WARN_ON(!list_empty(&vb->queue));
173
174 BUG_ON(NULL == icd->current_fmt);
175
176 /* I think, in buf_prepare you only have to protect global data,
177 * the actual buffer is yours */
178 buf->inwork = 1;
179
180 if (buf->fmt != icd->current_fmt ||
a0705b07
GL		 181 vb->width != icd->rect_current.width ||
182 vb->height != icd->rect_current.height ||
6acc81c3
PZ		 183 vb->field != field) {
184 buf->fmt = icd->current_fmt;
a0705b07
GL		 185 vb->width = icd->rect_current.width;
186 vb->height = icd->rect_current.height;
6acc81c3
PZ		 187 vb->field = field;
188 vb->state = VIDEOBUF_NEEDS_INIT;
189 }
190
191 vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
192 if (0 != vb->baddr && vb->bsize < vb->size) {
193 ret = -EINVAL;
194 goto out;
195 }
196
197 if (vb->state == VIDEOBUF_NEEDS_INIT) {
198 ret = videobuf_iolock(vq, vb, NULL);
199 if (ret)
200 goto fail;
201
202 vb->state = VIDEOBUF_PREPARED;
203 }
204
205 buf->inwork = 0;
206
207 return 0;
208
209fail:
210 free_buffer(vq, buf);
211out:
212 buf->inwork = 0;
213 return ret;
214}
215
216static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
217{
218 struct videobuf_buffer *vbuf = &pcdev->active->vb;
219 int ret;
220
221 if (unlikely(!pcdev->active)) {
979ea1dd 222 dev_err(pcdev->icd->dev.parent, "DMA End IRQ with no active buffer\n");
6acc81c3
PZ		 223 return -EFAULT;
224 }
225
226 /* setup sg list for future DMA */
227 ret = imx_dma_setup_single(pcdev->dma_chan,
228 videobuf_to_dma_contig(vbuf),
229 vbuf->size, pcdev->res->start +
230 CSIRXR, DMA_MODE_READ);
231 if (unlikely(ret))
979ea1dd 232 dev_err(pcdev->icd->dev.parent, "Failed to setup DMA sg list\n");
6acc81c3
PZ		 233
234 return ret;
235}
236
2dd54a54 237/* Called under spinlock_irqsave(&pcdev->lock, ...) */
6acc81c3
PZ		 238static void mx1_videobuf_queue(struct videobuf_queue *vq,
239 struct videobuf_buffer *vb)
240{
241 struct soc_camera_device *icd = vq->priv_data;
242 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
243 struct mx1_camera_dev *pcdev = ici->priv;
244 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
6acc81c3
PZ		 245
246 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
247 vb, vb->baddr, vb->bsize);
248
6acc81c3
PZ		 249 list_add_tail(&vb->queue, &pcdev->capture);
250
251 vb->state = VIDEOBUF_ACTIVE;
252
253 if (!pcdev->active) {
254 pcdev->active = buf;
255
256 /* setup sg list for future DMA */
257 if (!mx1_camera_setup_dma(pcdev)) {
258 unsigned int temp;
259 /* enable SOF irq */
260 temp = __raw_readl(pcdev->base + CSICR1) |
261 CSICR1_SOF_INTEN;
262 __raw_writel(temp, pcdev->base + CSICR1);
263 }
264 }
6acc81c3
PZ		 265}
266
267static void mx1_videobuf_release(struct videobuf_queue *vq,
268 struct videobuf_buffer *vb)
269{
270 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
271#ifdef DEBUG
272 struct soc_camera_device *icd = vq->priv_data;
273
274 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
275 vb, vb->baddr, vb->bsize);
276
277 switch (vb->state) {
278 case VIDEOBUF_ACTIVE:
279 dev_dbg(&icd->dev, "%s (active)\n", __func__);
280 break;
281 case VIDEOBUF_QUEUED:
282 dev_dbg(&icd->dev, "%s (queued)\n", __func__);
283 break;
284 case VIDEOBUF_PREPARED:
285 dev_dbg(&icd->dev, "%s (prepared)\n", __func__);
286 break;
287 default:
288 dev_dbg(&icd->dev, "%s (unknown)\n", __func__);
289 break;
290 }
291#endif
292
293 free_buffer(vq, buf);
294}
295
296static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
297 struct videobuf_buffer *vb,
298 struct mx1_buffer *buf)
299{
300 /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
301 list_del_init(&vb->queue);
302 vb->state = VIDEOBUF_DONE;
303 do_gettimeofday(&vb->ts);
304 vb->field_count++;
305 wake_up(&vb->done);
306
307 if (list_empty(&pcdev->capture)) {
308 pcdev->active = NULL;
309 return;
310 }
311
312 pcdev->active = list_entry(pcdev->capture.next,
313 struct mx1_buffer, vb.queue);
314
315 /* setup sg list for future DMA */
316 if (likely(!mx1_camera_setup_dma(pcdev))) {
317 unsigned int temp;
318
319 /* enable SOF irq */
320 temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
321 __raw_writel(temp, pcdev->base + CSICR1);
322 }
323}
324
325static void mx1_camera_dma_irq(int channel, void *data)
326{
327 struct mx1_camera_dev *pcdev = data;
328 struct mx1_buffer *buf;
329 struct videobuf_buffer *vb;
330 unsigned long flags;
331
332 spin_lock_irqsave(&pcdev->lock, flags);
333
334 imx_dma_disable(channel);
335
336 if (unlikely(!pcdev->active)) {
979ea1dd 337 dev_err(pcdev->icd->dev.parent, "DMA End IRQ with no active buffer\n");
6acc81c3
PZ		 338 goto out;
339 }
340
341 vb = &pcdev->active->vb;
342 buf = container_of(vb, struct mx1_buffer, vb);
343 WARN_ON(buf->inwork || list_empty(&vb->queue));
979ea1dd 344 dev_dbg(pcdev->icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 345 vb, vb->baddr, vb->bsize);
346
347 mx1_camera_wakeup(pcdev, vb, buf);
348out:
349 spin_unlock_irqrestore(&pcdev->lock, flags);
350}
351
352static struct videobuf_queue_ops mx1_videobuf_ops = {
353 .buf_setup = mx1_videobuf_setup,
354 .buf_prepare = mx1_videobuf_prepare,
355 .buf_queue = mx1_videobuf_queue,
356 .buf_release = mx1_videobuf_release,
357};
358
359static void mx1_camera_init_videobuf(struct videobuf_queue *q,
360 struct soc_camera_device *icd)
361{
362 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
363 struct mx1_camera_dev *pcdev = ici->priv;
364
979ea1dd 365 videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
6acc81c3
PZ		 366 &pcdev->lock,
367 V4L2_BUF_TYPE_VIDEO_CAPTURE,
368 V4L2_FIELD_NONE,
369 sizeof(struct mx1_buffer), icd);
370}
371
372static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
373{
374 unsigned int mclk = pcdev->mclk;
375 unsigned long div;
376 unsigned long lcdclk;
377
378 lcdclk = clk_get_rate(pcdev->clk);
379
380 /* We verify platform_mclk_10khz != 0, so if anyone breaks it, here
381 * they get a nice Oops */
382 div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
383
979ea1dd 384 dev_dbg(pcdev->icd->dev.parent, "System clock %lukHz, target freq %dkHz, "
6acc81c3
PZ		 385 "divisor %lu\n", lcdclk / 1000, mclk / 1000, div);
386
387 return div;
388}
389
390static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
391{
392 unsigned int csicr1 = CSICR1_EN;
393
979ea1dd 394 dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
6acc81c3
PZ		 395
396 clk_enable(pcdev->clk);
397
398 /* enable CSI before doing anything else */
399 __raw_writel(csicr1, pcdev->base + CSICR1);
400
401 csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
402 csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
403 csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
404
405 __raw_writel(csicr1, pcdev->base + CSICR1);
406}
407
408static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
409{
979ea1dd 410 dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
6acc81c3
PZ		 411
412 /* Disable all CSI interface */
413 __raw_writel(0x00, pcdev->base + CSICR1);
414
415 clk_disable(pcdev->clk);
416}
417
418/* The following two functions absolutely depend on the fact, that
419 * there can be only one camera on i.MX1/i.MXL camera sensor interface */
420static int mx1_camera_add_device(struct soc_camera_device *icd)
421{
422 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
423 struct mx1_camera_dev *pcdev = ici->priv;
424 int ret;
425
426 if (pcdev->icd) {
427 ret = -EBUSY;
428 goto ebusy;
429 }
430
431 dev_info(&icd->dev, "MX1 Camera driver attached to camera %d\n",
432 icd->devnum);
433
434 mx1_camera_activate(pcdev);
6acc81c3 435
979ea1dd 436 pcdev->icd = icd;
6acc81c3
PZ		 437
438ebusy:
439 return ret;
440}
441
442static void mx1_camera_remove_device(struct soc_camera_device *icd)
443{
444 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
445 struct mx1_camera_dev *pcdev = ici->priv;
446 unsigned int csicr1;
447
448 BUG_ON(icd != pcdev->icd);
449
450 /* disable interrupts */
451 csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
452 __raw_writel(csicr1, pcdev->base + CSICR1);
453
454 /* Stop DMA engine */
455 imx_dma_disable(pcdev->dma_chan);
456
457 dev_info(&icd->dev, "MX1 Camera driver detached from camera %d\n",
458 icd->devnum);
459
6acc81c3
PZ		 460 mx1_camera_deactivate(pcdev);
461
462 pcdev->icd = NULL;
463}
464
465static int mx1_camera_set_crop(struct soc_camera_device *icd,
08590b96 466 struct v4l2_crop *a)
6acc81c3 467{
c9c1f1c0 468 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
08590b96
GL		 469
470 return v4l2_subdev_call(sd, video, s_crop, a);
6acc81c3
PZ		 471}
472
473static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
474{
475 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
476 struct mx1_camera_dev *pcdev = ici->priv;
477 unsigned long camera_flags, common_flags;
478 unsigned int csicr1;
479 int ret;
480
481 camera_flags = icd->ops->query_bus_param(icd);
482
483 /* MX1 supports only 8bit buswidth */
484 common_flags = soc_camera_bus_param_compatible(camera_flags,
485 CSI_BUS_FLAGS);
486 if (!common_flags)
487 return -EINVAL;
488
489 icd->buswidth = 8;
490
491 /* Make choises, based on platform choice */
492 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
493 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
494 if (!pcdev->pdata ||
495 pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
496 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
497 else
498 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
499 }
500
501 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
502 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
503 if (!pcdev->pdata ||
504 pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
505 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
506 else
507 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
508 }
509
510 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
511 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
512 if (!pcdev->pdata ||
513 pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
514 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
515 else
516 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
517 }
518
519 ret = icd->ops->set_bus_param(icd, common_flags);
520 if (ret < 0)
521 return ret;
522
523 csicr1 = __raw_readl(pcdev->base + CSICR1);
524
525 if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
526 csicr1 |= CSICR1_REDGE;
527 if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
528 csicr1 |= CSICR1_SOF_POL;
529 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
530 csicr1 |= CSICR1_DATA_POL;
531
532 __raw_writel(csicr1, pcdev->base + CSICR1);
533
534 return 0;
535}
536
537static int mx1_camera_set_fmt(struct soc_camera_device *icd,
538 struct v4l2_format *f)
539{
c9c1f1c0 540 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
6acc81c3
PZ		 541 const struct soc_camera_format_xlate *xlate;
542 struct v4l2_pix_format *pix = &f->fmt.pix;
543 int ret;
544
545 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
546 if (!xlate) {
979ea1dd 547 dev_warn(icd->dev.parent, "Format %x not found\n", pix->pixelformat);
6acc81c3
PZ		 548 return -EINVAL;
549 }
550
c9c1f1c0 551 ret = v4l2_subdev_call(sd, video, s_fmt, f);
6acc81c3
PZ		 552 if (!ret) {
553 icd->buswidth = xlate->buswidth;
554 icd->current_fmt = xlate->host_fmt;
555 }
556
557 return ret;
558}
559
560static int mx1_camera_try_fmt(struct soc_camera_device *icd,
561 struct v4l2_format *f)
562{
c9c1f1c0 563 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
6acc81c3
PZ		 564 /* TODO: limit to mx1 hardware capabilities */
565
566 /* limit to sensor capabilities */
c9c1f1c0 567 return v4l2_subdev_call(sd, video, try_fmt, f);
6acc81c3
PZ		 568}
569
570static int mx1_camera_reqbufs(struct soc_camera_file *icf,
571 struct v4l2_requestbuffers *p)
572{
573 int i;
574
575 /* This is for locking debugging only. I removed spinlocks and now I
576 * check whether .prepare is ever called on a linked buffer, or whether
577 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
578 * it hadn't triggered */
579 for (i = 0; i < p->count; i++) {
580 struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
581 struct mx1_buffer, vb);
582 buf->inwork = 0;
583 INIT_LIST_HEAD(&buf->vb.queue);
584 }
585
586 return 0;
587}
588
589static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
590{
591 struct soc_camera_file *icf = file->private_data;
592 struct mx1_buffer *buf;
593
594 buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
595 vb.stream);
596
597 poll_wait(file, &buf->vb.done, pt);
598
599 if (buf->vb.state == VIDEOBUF_DONE ||
600 buf->vb.state == VIDEOBUF_ERROR)
601 return POLLIN | POLLRDNORM;
602
603 return 0;
604}
605
606static int mx1_camera_querycap(struct soc_camera_host *ici,
607 struct v4l2_capability *cap)
608{
609 /* cap->name is set by the friendly caller:-> */
610 strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
611 cap->version = VERSION_CODE;
612 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
613
614 return 0;
615}
616
617static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
618 .owner = THIS_MODULE,
619 .add = mx1_camera_add_device,
620 .remove = mx1_camera_remove_device,
621 .set_bus_param = mx1_camera_set_bus_param,
622 .set_crop = mx1_camera_set_crop,
623 .set_fmt = mx1_camera_set_fmt,
624 .try_fmt = mx1_camera_try_fmt,
625 .init_videobuf = mx1_camera_init_videobuf,
626 .reqbufs = mx1_camera_reqbufs,
627 .poll = mx1_camera_poll,
628 .querycap = mx1_camera_querycap,
629};
630
6acc81c3
PZ		 631static struct fiq_handler fh = {
632 .name = "csi_sof"
633};
634
635static int __init mx1_camera_probe(struct platform_device *pdev)
636{
637 struct mx1_camera_dev *pcdev;
638 struct resource *res;
639 struct pt_regs regs;
640 struct clk *clk;
641 void __iomem *base;
642 unsigned int irq;
643 int err = 0;
644
645 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
646 irq = platform_get_irq(pdev, 0);
647 if (!res || !irq) {
648 err = -ENODEV;
649 goto exit;
650 }
651
652 clk = clk_get(&pdev->dev, "csi_clk");
653 if (IS_ERR(clk)) {
654 err = PTR_ERR(clk);
655 goto exit;
656 }
657
658 pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
659 if (!pcdev) {
660 dev_err(&pdev->dev, "Could not allocate pcdev\n");
661 err = -ENOMEM;
662 goto exit_put_clk;
663 }
664
6acc81c3
PZ		 665 pcdev->res = res;
666 pcdev->clk = clk;
667
668 pcdev->pdata = pdev->dev.platform_data;
669
670 if (pcdev->pdata)
671 pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
672
673 if (!pcdev->mclk) {
674 dev_warn(&pdev->dev,
675 "mclk_10khz == 0! Please, fix your platform data. "
676 "Using default 20MHz\n");
677 pcdev->mclk = 20000000;
678 }
679
680 INIT_LIST_HEAD(&pcdev->capture);
681 spin_lock_init(&pcdev->lock);
682
683 /*
684 * Request the regions.
685 */
686 if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
687 err = -EBUSY;
688 goto exit_kfree;
689 }
690
691 base = ioremap(res->start, resource_size(res));
692 if (!base) {
693 err = -ENOMEM;
694 goto exit_release;
695 }
696 pcdev->irq = irq;
697 pcdev->base = base;
6acc81c3
PZ		 698
699 /* request dma */
700 pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
701 if (pcdev->dma_chan < 0) {
eff505fa 702 dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
6acc81c3
PZ		 703 err = -EBUSY;
704 goto exit_iounmap;
705 }
eff505fa 706 dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
6acc81c3
PZ		 707
708 imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
709 pcdev);
710
711 imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
712 IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
713 /* burst length : 16 words = 64 bytes */
714 imx_dma_config_burstlen(pcdev->dma_chan, 0);
715
716 /* request irq */
717 err = claim_fiq(&fh);
718 if (err) {
eff505fa 719 dev_err(&pdev->dev, "Camera interrupt register failed \n");
6acc81c3
PZ		 720 goto exit_free_dma;
721 }
722
723 set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
724 &mx1_camera_sof_fiq_start);
725
726 regs.ARM_r8 = DMA_BASE + DMA_DIMR;
727 regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
728 regs.ARM_r10 = (long)pcdev->base + CSICR1;
729 regs.ARM_fp = (long)pcdev->base + CSISR;
730 regs.ARM_sp = 1 << pcdev->dma_chan;
731 set_fiq_regs(&regs);
732
733 mxc_set_irq_fiq(irq, 1);
734 enable_fiq(irq);
735
eb6c8558
GL		 736 pcdev->soc_host.drv_name = DRIVER_NAME;
737 pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
738 pcdev->soc_host.priv = pcdev;
979ea1dd 739 pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
eb6c8558
GL		 740 pcdev->soc_host.nr = pdev->id;
741 err = soc_camera_host_register(&pcdev->soc_host);
6acc81c3
PZ		 742 if (err)
743 goto exit_free_irq;
744
745 dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
746
747 return 0;
748
749exit_free_irq:
750 disable_fiq(irq);
751 mxc_set_irq_fiq(irq, 0);
752 release_fiq(&fh);
753exit_free_dma:
754 imx_dma_free(pcdev->dma_chan);
755exit_iounmap:
756 iounmap(base);
757exit_release:
758 release_mem_region(res->start, resource_size(res));
759exit_kfree:
760 kfree(pcdev);
761exit_put_clk:
762 clk_put(clk);
763exit:
764 return err;
765}
766
767static int __exit mx1_camera_remove(struct platform_device *pdev)
768{
eff505fa
GL		 769 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
770 struct mx1_camera_dev *pcdev = container_of(soc_host,
771 struct mx1_camera_dev, soc_host);
6acc81c3
PZ		 772 struct resource *res;
773
774 imx_dma_free(pcdev->dma_chan);
775 disable_fiq(pcdev->irq);
776 mxc_set_irq_fiq(pcdev->irq, 0);
777 release_fiq(&fh);
778
779 clk_put(pcdev->clk);
780
eff505fa 781 soc_camera_host_unregister(soc_host);
6acc81c3
PZ		 782
783 iounmap(pcdev->base);
784
785 res = pcdev->res;
786 release_mem_region(res->start, resource_size(res));
787
788 kfree(pcdev);
789
790 dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
791
792 return 0;
793}
794
795static struct platform_driver mx1_camera_driver = {
796 .driver = {
797 .name = DRIVER_NAME,
798 },
799 .remove = __exit_p(mx1_camera_remove),
800};
801
802static int __init mx1_camera_init(void)
803{
804 return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
805}
806
807static void __exit mx1_camera_exit(void)
808{
809 return platform_driver_unregister(&mx1_camera_driver);
810}
811
812module_init(mx1_camera_init);
813module_exit(mx1_camera_exit);
814
815MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
816MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
817MODULE_LICENSE("GPL v2");
818MODULE_ALIAS("platform:" DRIVER_NAME);
Linux 6.x block layer and io_uring tree(s)