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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[linux-2.6-block.git] / drivers / media / video / cx18 / cx18-driver.h
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1c1e45d1
HV		 1/*
2 * cx18 driver internal defines and structures
3 *
4 * Derived from ivtv-driver.h
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
1ed9dcc8 7 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
1c1e45d1
HV		 8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#ifndef CX18_DRIVER_H
26#define CX18_DRIVER_H
27
28#include <linux/version.h>
29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/sched.h>
34#include <linux/fs.h>
35#include <linux/pci.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/i2c.h>
39#include <linux/i2c-algo-bit.h>
40#include <linux/list.h>
41#include <linux/unistd.h>
1c1e45d1
HV		 42#include <linux/pagemap.h>
43#include <linux/workqueue.h>
44#include <linux/mutex.h>
5a0e3ad6 45#include <linux/slab.h>
1a651a00 46#include <asm/byteorder.h>
1c1e45d1
HV		 47
48#include <linux/dvb/video.h>
49#include <linux/dvb/audio.h>
50#include <media/v4l2-common.h>
35ea11ff 51#include <media/v4l2-ioctl.h>
888cdb07 52#include <media/v4l2-device.h>
1c1e45d1 53#include <media/tuner.h>
83526190 54#include <media/ir-kbd-i2c.h>
1c1e45d1
HV		 55#include "cx18-mailbox.h"
56#include "cx18-av-core.h"
57#include "cx23418.h"
58
59/* DVB */
60#include "demux.h"
61#include "dmxdev.h"
62#include "dvb_demux.h"
63#include "dvb_frontend.h"
64#include "dvb_net.h"
65#include "dvbdev.h"
66
67#ifndef CONFIG_PCI
68# error "This driver requires kernel PCI support."
69#endif
70
71#define CX18_MEM_OFFSET 0x00000000
72#define CX18_MEM_SIZE 0x04000000
73#define CX18_REG_OFFSET 0x02000000
74
75/* Maximum cx18 driver instances. */
76#define CX18_MAX_CARDS 32
77
78/* Supported cards */
79#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
80#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
81#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
82#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
03c28085 83#define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */
9eee4fb6 84#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/
9d5af862
AW		 85#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */
86#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */
87#define CX18_CARD_LAST 7
1c1e45d1
HV		 88
89#define CX18_ENC_STREAM_TYPE_MPG 0
90#define CX18_ENC_STREAM_TYPE_TS 1
91#define CX18_ENC_STREAM_TYPE_YUV 2
92#define CX18_ENC_STREAM_TYPE_VBI 3
93#define CX18_ENC_STREAM_TYPE_PCM 4
94#define CX18_ENC_STREAM_TYPE_IDX 5
95#define CX18_ENC_STREAM_TYPE_RAD 6
96#define CX18_MAX_STREAMS 7
97
98/* system vendor and device IDs */
99#define PCI_VENDOR_ID_CX 0x14f1
100#define PCI_DEVICE_ID_CX23418 0x5b7a
101
102/* subsystem vendor ID */
103#define CX18_PCI_ID_HAUPPAUGE 0x0070
104#define CX18_PCI_ID_COMPRO 0x185b
105#define CX18_PCI_ID_YUAN 0x12ab
03c28085 106#define CX18_PCI_ID_CONEXANT 0x14f1
9eee4fb6
AW		 107#define CX18_PCI_ID_TOSHIBA 0x1179
108#define CX18_PCI_ID_LEADTEK 0x107D
1c1e45d1
HV		 109
110/* ======================================================================== */
111/* ========================== START USER SETTABLE DMA VARIABLES =========== */
112/* ======================================================================== */
113
114/* DMA Buffers, Default size in MB allocated */
115#define CX18_DEFAULT_ENC_TS_BUFFERS 1
116#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
117#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
118#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
119#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
120#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
121
6ecd86dc 122/* Maximum firmware DMA buffers per stream */
0ef02892 123#define CX18_MAX_FW_MDLS_PER_STREAM 63
6ecd86dc 124
22dce188
AW		 125/* YUV buffer sizes in bytes to ensure integer # of frames per buffer */
126#define CX18_UNIT_ENC_YUV_BUFSIZE (720 * 32 * 3 / 2) /* bytes */
127#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32)
128#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32)
129
efc0b127
AW		 130/* IDX buffer size should be a multiple of the index entry size from the chip */
131struct cx18_enc_idx_entry {
132 __le32 length;
133 __le32 offset_low;
134 __le32 offset_high;
135 __le32 flags;
136 __le32 pts_low;
137 __le32 pts_high;
138} __attribute__ ((packed));
139#define CX18_UNIT_ENC_IDX_BUFSIZE \
140 (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES)
141
6ecd86dc
AW		 142/* DMA buffer, default size in kB allocated */
143#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
144#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32
efc0b127 145#define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1)
22dce188 146#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1)
6ecd86dc
AW		 147#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4
148
1c1e45d1
HV		 149/* i2c stuff */
150#define I2C_CLIENTS_MAX 16
151
152/* debugging */
153
154/* Flag to turn on high volume debugging */
155#define CX18_DBGFLG_WARN (1 << 0)
156#define CX18_DBGFLG_INFO (1 << 1)
157#define CX18_DBGFLG_API (1 << 2)
158#define CX18_DBGFLG_DMA (1 << 3)
159#define CX18_DBGFLG_IOCTL (1 << 4)
160#define CX18_DBGFLG_FILE (1 << 5)
161#define CX18_DBGFLG_I2C (1 << 6)
162#define CX18_DBGFLG_IRQ (1 << 7)
163/* Flag to turn on high volume debugging */
164#define CX18_DBGFLG_HIGHVOL (1 << 8)
165
5811cf99 166/* NOTE: extra space before comma in 'fmt , ## args' is required for
1c1e45d1
HV		 167 gcc-2.95, otherwise it won't compile. */
168#define CX18_DEBUG(x, type, fmt, args...) \
169 do { \
170 if ((x) & cx18_debug) \
5811cf99 171 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
1c1e45d1
HV		 172 } while (0)
173#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
174#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
175#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
176#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
177#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
178#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
179#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
180#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
181
182#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
183 do { \
184 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
5811cf99 185 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
1c1e45d1
HV		 186 } while (0)
187#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
188#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
189#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
190#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
191#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
192#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
193#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
194#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
195
196/* Standard kernel messages */
5811cf99
AW		 197#define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args)
198#define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args)
199#define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args)
1c1e45d1 200
6246d4e1
AW		 201/* Messages for internal subdevs to use */
202#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \
203 do { \
204 if ((x) & cx18_debug) \
205 v4l2_info(dev, " " type ": " fmt , ## args); \
206 } while (0)
207#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \
208 CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
209#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \
210 CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
211#define CX18_DEBUG_API_DEV(dev, fmt, args...) \
212 CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
213#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \
214 CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
215#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \
216 CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
217#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \
218 CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
219#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \
220 CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
221#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \
222 CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
223
224#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \
225 do { \
226 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
227 v4l2_info(dev, " " type ": " fmt , ## args); \
228 } while (0)
229#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \
230 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
231#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \
232 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
233#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \
234 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
235#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \
236 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
237#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \
238 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
239#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \
240 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
241#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \
242 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
243#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \
244 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
245
246#define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args)
247#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args)
248#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args)
249
1c1e45d1
HV		 250extern int cx18_debug;
251
1c1e45d1
HV		 252struct cx18_options {
253 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
254 int cardtype; /* force card type on load */
255 int tuner; /* set tuner on load */
256 int radio; /* enable/disable radio */
257};
258
52fcb3ec
AW		 259/* per-mdl bit flags */
260#define CX18_F_M_NEED_SWAP 0 /* mdl buffer data must be endianess swapped */
1c1e45d1
HV		 261
262/* per-stream, s_flags */
263#define CX18_F_S_CLAIMED 3 /* this stream is claimed */
264#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
265#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
266#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
267#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
87116159 268#define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */
1c1e45d1
HV		 269
270/* per-cx18, i_flags */
1d6782bd
AW		 271#define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */
272#define CX18_F_I_EOS 4 /* End of encoder stream */
273#define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */
274#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
1d6782bd
AW		 275#define CX18_F_I_INITED 21 /* set after first open */
276#define CX18_F_I_FAILED 22 /* set if first open failed */
1c1e45d1
HV		 277
278/* These are the VBI types as they appear in the embedded VBI private packets. */
279#define CX18_SLICED_TYPE_TELETEXT_B (1)
280#define CX18_SLICED_TYPE_CAPTION_525 (4)
281#define CX18_SLICED_TYPE_WSS_625 (5)
282#define CX18_SLICED_TYPE_VPS (7)
283
82acdc84
AW		 284/**
285 * list_entry_is_past_end - check if a previous loop cursor is off list end
286 * @pos: the type * previously used as a loop cursor.
287 * @head: the head for your list.
288 * @member: the name of the list_struct within the struct.
289 *
290 * Check if the entry's list_head is the head of the list, thus it's not a
291 * real entry but was the loop cursor that walked past the end
292 */
293#define list_entry_is_past_end(pos, head, member) \
294 (&pos->member == (head))
295
1c1e45d1
HV		 296struct cx18_buffer {
297 struct list_head list;
298 dma_addr_t dma_handle;
1c1e45d1
HV		 299 char *buf;
300
301 u32 bytesused;
302 u32 readpos;
303};
304
52fcb3ec
AW		 305struct cx18_mdl {
306 struct list_head list;
307 u32 id; /* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */
308
309 unsigned int skipped;
310 unsigned long m_flags;
311
312 struct list_head buf_list;
313 struct cx18_buffer *curr_buf; /* current buffer in list for reading */
314
315 u32 bytesused;
316 u32 readpos;
317};
318
1c1e45d1
HV		 319struct cx18_queue {
320 struct list_head list;
c37b11bf 321 atomic_t depth;
1c1e45d1 322 u32 bytesused;
40c5520f 323 spinlock_t lock;
1c1e45d1
HV		 324};
325
326struct cx18_dvb {
327 struct dmx_frontend hw_frontend;
328 struct dmx_frontend mem_frontend;
329 struct dmxdev dmxdev;
330 struct dvb_adapter dvb_adapter;
331 struct dvb_demux demux;
332 struct dvb_frontend *fe;
333 struct dvb_net dvbnet;
334 int enabled;
335 int feeding;
1c1e45d1 336 struct mutex feedlock;
1c1e45d1
HV		 337};
338
339struct cx18; /* forward reference */
340struct cx18_scb; /* forward reference */
341
72a4f808 342
ee2d64f5 343#define CX18_MAX_MDL_ACKS 2
deed75ed 344#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
0ef02892 345/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
ee2d64f5 346
72a4f808
AW		 347#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
348#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2
349#define CX18_F_EWO_MB_STALE \
350 (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC)
351
deed75ed 352struct cx18_in_work_order {
ee2d64f5
AW		 353 struct work_struct work;
354 atomic_t pending;
355 struct cx18 *cx;
72a4f808 356 unsigned long flags;
ee2d64f5
AW		 357 int rpu;
358 struct cx18_mailbox mb;
359 struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS];
360 char *str;
361};
362
d3c5e707
AW		 363#define CX18_INVALID_TASK_HANDLE 0xffffffff
364
1c1e45d1
HV		 365struct cx18_stream {
366 /* These first four fields are always set, even if the stream
367 is not actually created. */
3d05913d 368 struct video_device *video_dev; /* NULL when stream not created */
1c1e45d1
HV		 369 struct cx18 *cx; /* for ease of use */
370 const char *name; /* name of the stream */
371 int type; /* stream type */
372 u32 handle; /* task handle */
fa655dda 373 unsigned int mdl_base_idx;
1c1e45d1
HV		 374
375 u32 id;
1c1e45d1
HV		 376 unsigned long s_flags; /* status flags, see above */
377 int dma; /* can be PCI_DMA_TODEVICE,
378 PCI_DMA_FROMDEVICE or
379 PCI_DMA_NONE */
1c1e45d1
HV		 380 wait_queue_head_t waitq;
381
52fcb3ec
AW		 382 /* Buffers */
383 struct list_head buf_pool; /* buffers not attached to an MDL */
384 u32 buffers; /* total buffers owned by this stream */
385 u32 buf_size; /* size in bytes of a single buffer */
386
387 /* MDL sizes - all stream MDLs are the same size */
388 u32 bufs_per_mdl;
389 u32 mdl_size; /* total bytes in all buffers in a mdl */
1c1e45d1 390
52fcb3ec
AW		 391 /* MDL Queues */
392 struct cx18_queue q_free; /* free - in rotation, not committed */
393 struct cx18_queue q_busy; /* busy - in use by firmware */
394 struct cx18_queue q_full; /* full - data for user apps */
395 struct cx18_queue q_idle; /* idle - not in rotation */
1c1e45d1 396
21a278b8
AW		 397 struct work_struct out_work_order;
398
1c1e45d1
HV		 399 /* DVB / Digital Transport */
400 struct cx18_dvb dvb;
401};
402
403struct cx18_open_id {
404 u32 open_id;
405 int type;
406 enum v4l2_priority prio;
407 struct cx18 *cx;
408};
409
410/* forward declaration of struct defined in cx18-cards.h */
411struct cx18_card;
412
302df970
AW		 413/*
414 * A note about "sliced" VBI data as implemented in this driver:
415 *
416 * Currently we collect the sliced VBI in the form of Ancillary Data
417 * packets, inserted by the AV core decoder/digitizer/slicer in the
418 * horizontal blanking region of the VBI lines, in "raw" mode as far as
419 * the Encoder is concerned. We don't ever tell the Encoder itself
420 * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode)
421 *
422 * We then process the ancillary data ourselves to send the sliced data
423 * to the user application directly or build up MPEG-2 private stream 1
424 * packets to splice into (only!) MPEG-2 PS streams for the user app.
425 *
426 * (That's how ivtv essentially does it.)
427 *
428 * The Encoder should be able to extract certain sliced VBI data for
429 * us and provide it in a separate stream or splice it into any type of
430 * MPEG PS or TS stream, but this isn't implemented yet.
431 */
432
433/*
434 * Number of "raw" VBI samples per horizontal line we tell the Encoder to
435 * grab from the decoder/digitizer/slicer output for raw or sliced VBI.
436 * It depends on the pixel clock and the horiz rate:
437 *
438 * (1/Fh)*(2*Fp) = Samples/line
439 * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples
440 *
441 * Sliced VBI data is sent as ancillary data during horizontal blanking
442 * Raw VBI is sent as active video samples during vertcal blanking
443 *
444 * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line
445 * length of 720 pixels @ 4:2:2 sampling. Thus...
446 *
447 * For systems that use a 15.734 kHz horizontal rate, such as
448 * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have:
449 *
450 * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line =
451 * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples
452 *
453 * For systems that use a 15.625 kHz horizontal rate, such as
454 * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have:
455 *
456 * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line =
457 * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples
458 */
459static const u32 vbi_active_samples = 1444; /* 4 byte SAV + 720 Y + 720 U/V */
460static const u32 vbi_hblank_samples_60Hz = 272; /* 4 byte EAV + 268 anc/fill */
461static const u32 vbi_hblank_samples_50Hz = 284; /* 4 byte EAV + 280 anc/fill */
1c1e45d1
HV		 462
463#define CX18_VBI_FRAMES 32
464
1c1e45d1 465struct vbi_info {
302df970 466 /* Current state of v4l2 VBI settings for this device */
1c1e45d1 467 struct v4l2_format in;
302df970
AW		 468 struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */
469 u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */
470 u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */
1c1e45d1 471
302df970 472 u32 frame; /* Count of VBI buffers/frames received from Encoder */
1c1e45d1 473
302df970
AW		 474 /*
475 * Vars for creation and insertion of MPEG Private Stream 1 packets
476 * of sliced VBI data into an MPEG PS
477 */
1c1e45d1 478
302df970
AW		 479 /* Boolean: create and insert Private Stream 1 packets into the PS */
480 int insert_mpeg;
481
482 /*
483 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
484 * Used in cx18-vbi.c only for collecting sliced data, and as a source
485 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets.
486 * We don't need to save state here, but the array may have been a bit
487 * too big (2304 bytes) to alloc from the stack.
488 */
489 struct v4l2_sliced_vbi_data sliced_data[36];
1c1e45d1 490
302df970
AW		 491 /*
492 * A ring buffer of driver-generated MPEG-2 PS
493 * Program Pack/Private Stream 1 packets for sliced VBI data insertion
494 * into the MPEG PS stream.
495 *
496 * In each sliced_mpeg_data[] buffer is:
497 * 16 byte MPEG-2 PS Program Pack Header
498 * 16 byte MPEG-2 Private Stream 1 PES Header
499 * 4 byte magic number: "itv0" or "ITV0"
500 * 4 byte first field line mask, if "itv0"
501 * 4 byte second field line mask, if "itv0"
502 * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data
503 *
504 * Each line in the payload is
505 * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.)
506 * 42 bytes of line data
507 *
508 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet
509 * which is the payload size a PVR-350 (CX23415) MPEG decoder will
510 * accept for VBI data. So, including the headers, it's a maximum 1584
511 * bytes total.
512 */
513#define CX18_SLICED_MPEG_DATA_MAXSZ 1584
514 /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */
515#define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8)
1c1e45d1
HV		 516 u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
517 u32 sliced_mpeg_size[CX18_VBI_FRAMES];
302df970
AW		 518
519 /* Count of Program Pack/Program Stream 1 packets inserted into PS */
1c1e45d1
HV		 520 u32 inserted_frame;
521
302df970 522 /*
52fcb3ec 523 * A dummy driver stream transfer mdl & buffer with a copy of the next
302df970
AW		 524 * sliced_mpeg_data[] buffer for output to userland apps.
525 * Only used in cx18-fileops.c, but its state needs to persist at times.
526 */
52fcb3ec 527 struct cx18_mdl sliced_mpeg_mdl;
302df970 528 struct cx18_buffer sliced_mpeg_buf;
1c1e45d1
HV		 529};
530
531/* Per cx23418, per I2C bus private algo callback data */
532struct cx18_i2c_algo_callback_data {
533 struct cx18 *cx;
534 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
535};
536
f7823f8f 537#define CX18_MAX_MMIO_WR_RETRIES 10
330c6ec8 538
1c1e45d1
HV		 539/* Struct to hold info about cx18 cards */
540struct cx18 {
5811cf99 541 int instance;
3d05913d 542 struct pci_dev *pci_dev;
888cdb07 543 struct v4l2_device v4l2_dev;
ff2a2001 544 struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */
eefe1010 545 struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */
888cdb07 546
1c1e45d1
HV		 547 const struct cx18_card *card; /* card information */
548 const char *card_name; /* full name of the card */
549 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
550 u8 is_50hz;
551 u8 is_60hz;
1c1e45d1
HV		 552 u8 nof_inputs; /* number of video inputs */
553 u8 nof_audio_inputs; /* number of audio inputs */
1c1e45d1
HV		 554 u32 v4l2_cap; /* V4L2 capabilities of card */
555 u32 hw_flags; /* Hardware description of the board */
fa655dda 556 unsigned int free_mdl_idx;
72c2d6d3
AW		 557 struct cx18_scb __iomem *scb; /* pointer to SCB */
558 struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/
559 struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/
560
1c1e45d1
HV		 561 struct cx18_av_state av_state;
562
563 /* codec settings */
564 struct cx2341x_mpeg_params params;
565 u32 filter_mode;
566 u32 temporal_strength;
567 u32 spatial_strength;
568
569 /* dualwatch */
570 unsigned long dualwatch_jiffies;
0d82fe80 571 u32 dualwatch_stereo_mode;
1c1e45d1 572
1c1e45d1
HV		 573 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
574 struct cx18_options options; /* User options */
6ecd86dc 575 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
1c1e45d1
HV		 576 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
577 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
9722c8f9 578 struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */
9972de90
DH		 579 void (*pcm_announce_callback)(struct snd_cx18_card *card, u8 *pcm_data,
580 size_t num_bytes);
581
1c1e45d1 582 unsigned long i_flags; /* global cx18 flags */
31554ae5
HV		 583 atomic_t ana_capturing; /* count number of active analog capture streams */
584 atomic_t tot_capturing; /* total count number of active capture streams */
1c1e45d1
HV		 585 int search_pack_header;
586
1c1e45d1
HV		 587 int open_id; /* incremented each time an open occurs, used as
588 unique ID. Starts at 1, so 0 can be used as
589 uninitialized value in the stream->id. */
590
591 u32 base_addr;
592 struct v4l2_prio_state prio;
593
594 u8 card_rev;
595 void __iomem *enc_mem, *reg_mem;
596
597 struct vbi_info vbi;
598
1c1e45d1
HV		 599 u64 mpg_data_received;
600 u64 vbi_data_inserted;
601
602 wait_queue_head_t mb_apu_waitq;
603 wait_queue_head_t mb_cpu_waitq;
1c1e45d1
HV		 604 wait_queue_head_t cap_w;
605 /* when the current DMA is finished this queue is woken up */
606 wait_queue_head_t dma_waitq;
607
d6c7e5f8
AW		 608 u32 sw1_irq_mask;
609 u32 sw2_irq_mask;
610 u32 hw2_irq_mask;
611
deed75ed
AW		 612 struct workqueue_struct *in_work_queue;
613 char in_workq_name[11]; /* "cx18-NN-in" */
614 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
ee2d64f5 615 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
1d6782bd 616
87116159
AW		 617 struct workqueue_struct *out_work_queue;
618 char out_workq_name[12]; /* "cx18-NN-out" */
87116159 619
1c1e45d1
HV		 620 /* i2c */
621 struct i2c_adapter i2c_adap[2];
622 struct i2c_algo_bit_data i2c_algo[2];
623 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
1c1e45d1 624
83526190
AW		 625 struct IR_i2c_init_data ir_i2c_init_data;
626
ba60bc67
HV		 627 /* gpio */
628 u32 gpio_dir;
629 u32 gpio_val;
8abdd00d 630 struct mutex gpio_lock;
eefe1010
AW		 631 struct v4l2_subdev sd_gpiomux;
632 struct v4l2_subdev sd_resetctrl;
ba60bc67 633
1c1e45d1
HV		 634 /* v4l2 and User settings */
635
636 /* codec settings */
637 u32 audio_input;
638 u32 active_input;
1c1e45d1
HV		 639 v4l2_std_id std;
640 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
d68b687b
DH		 641
642 /* Used for cx18-alsa module loading */
643 struct work_struct request_module_wk;
1c1e45d1
HV		 644};
645
5811cf99
AW		 646static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
647{
648 return container_of(v4l2_dev, struct cx18, v4l2_dev);
649}
650
d68b687b
DH		 651/* cx18 extensions to be loaded */
652extern int (*cx18_ext_init)(struct cx18 *);
653
1c1e45d1 654/* Globals */
1c1e45d1 655extern int cx18_first_minor;
1c1e45d1
HV		 656
657/*==============Prototypes==================*/
658
659/* Return non-zero if a signal is pending */
660int cx18_msleep_timeout(unsigned int msecs, int intr);
661
1c1e45d1
HV		 662/* Read Hauppauge eeprom */
663struct tveeprom; /* forward reference */
664void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
665
666/* First-open initialization: load firmware, etc. */
667int cx18_init_on_first_open(struct cx18 *cx);
668
dd073434
AW		 669/* Test if the current VBI mode is raw (1) or sliced (0) */
670static inline int cx18_raw_vbi(const struct cx18 *cx)
671{
672 return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
673}
674
ff2a2001
AW		 675/* Call the specified callback for all subdevs with a grp_id bit matching the
676 * mask in hw (if 0, then match them all). Ignore any errors. */
677#define cx18_call_hw(cx, hw, o, f, args...) \
678 __v4l2_device_call_subdevs(&(cx)->v4l2_dev, \
679 !(hw) || (sd->grp_id & (hw)), o, f , ##args)
680
681#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args)
682
683/* Call the specified callback for all subdevs with a grp_id bit matching the
684 * mask in hw (if 0, then match them all). If the callback returns an error
685 * other than 0 or -ENOIOCTLCMD, then return with that error code. */
686#define cx18_call_hw_err(cx, hw, o, f, args...) \
687 __v4l2_device_call_subdevs_until_err( \
688 &(cx)->v4l2_dev, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
689
690#define cx18_call_all_err(cx, o, f, args...) \
691 cx18_call_hw_err(cx, 0, o, f , ##args)
692
1c1e45d1 693#endif /* CX18_DRIVER_H */
Linux 6.x block layer and io_uring tree(s)