[linux-2.6-block.git] / drivers / media / dvb-frontends / cxd2820r_c.c

/*
 * Sony CXD2820R demodulator driver
 *
 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; either version 2 of the License, or
 *    (at your option) any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License along
 *    with this program; if not, write to the Free Software Foundation, Inc.,
 *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 */


#include "cxd2820r_priv.h"

int cxd2820r_set_frontend_c(struct dvb_frontend *fe)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	int ret, i;
	u8 buf[2];
	u32 if_freq;
	u16 if_ctl;
	u64 num;
	struct reg_val_mask tab[] = {
		{ 0x00080, 0x01, 0xff },
		{ 0x00081, 0x05, 0xff },
		{ 0x00085, 0x07, 0xff },
		{ 0x00088, 0x01, 0xff },

		{ 0x00082, 0x20, 0x60 },
		{ 0x1016a, 0x48, 0xff },
		{ 0x100a5, 0x00, 0x01 },
		{ 0x10020, 0x06, 0x07 },
		{ 0x10059, 0x50, 0xff },
		{ 0x10087, 0x0c, 0x3c },
		{ 0x1008b, 0x07, 0xff },
		{ 0x1001f, priv->cfg.if_agc_polarity << 7, 0x80 },
		{ 0x10070, priv->cfg.ts_mode, 0xff },
		{ 0x10071, !priv->cfg.ts_clock_inv << 4, 0x10 },
	};

	dev_dbg(&priv->i2c->dev, "%s: frequency=%d symbol_rate=%d\n", __func__,
			c->frequency, c->symbol_rate);

	/* program tuner */
	if (fe->ops.tuner_ops.set_params)
		fe->ops.tuner_ops.set_params(fe);

	if (priv->delivery_system !=  SYS_DVBC_ANNEX_A) {
		for (i = 0; i < ARRAY_SIZE(tab); i++) {
			ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
				tab[i].val, tab[i].mask);
			if (ret)
				goto error;
		}
	}

	priv->delivery_system = SYS_DVBC_ANNEX_A;
	priv->ber_running = false; /* tune stops BER counter */

	/* program IF frequency */
	if (fe->ops.tuner_ops.get_if_frequency) {
		ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
		if (ret)
			goto error;
	} else
		if_freq = 0;

	dev_dbg(&priv->i2c->dev, "%s: if_freq=%d\n", __func__, if_freq);

	num = if_freq / 1000; /* Hz => kHz */
	num *= 0x4000;
	if_ctl = 0x4000 - DIV_ROUND_CLOSEST_ULL(num, 41000);
	buf[0] = (if_ctl >> 8) & 0x3f;
	buf[1] = (if_ctl >> 0) & 0xff;

	ret = cxd2820r_wr_regs(priv, 0x10042, buf, 2);
	if (ret)
		goto error;

	ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
	if (ret)
		goto error;

	ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
	if (ret)
		goto error;

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_get_frontend_c(struct dvb_frontend *fe)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	int ret;
	u8 buf[2];

	ret = cxd2820r_rd_regs(priv, 0x1001a, buf, 2);
	if (ret)
		goto error;

	c->symbol_rate = 2500 * ((buf[0] & 0x0f) << 8 | buf[1]);

	ret = cxd2820r_rd_reg(priv, 0x10019, &buf[0]);
	if (ret)
		goto error;

	switch ((buf[0] >> 0) & 0x07) {
	case 0:
		c->modulation = QAM_16;
		break;
	case 1:
		c->modulation = QAM_32;
		break;
	case 2:
		c->modulation = QAM_64;
		break;
	case 3:
		c->modulation = QAM_128;
		break;
	case 4:
		c->modulation = QAM_256;
		break;
	}

	switch ((buf[0] >> 7) & 0x01) {
	case 0:
		c->inversion = INVERSION_OFF;
		break;
	case 1:
		c->inversion = INVERSION_ON;
		break;
	}

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_ber_c(struct dvb_frontend *fe, u32 *ber)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[3], start_ber = 0;
	*ber = 0;

	if (priv->ber_running) {
		ret = cxd2820r_rd_regs(priv, 0x10076, buf, sizeof(buf));
		if (ret)
			goto error;

		if ((buf[2] >> 7) & 0x01 || (buf[2] >> 4) & 0x01) {
			*ber = (buf[2] & 0x0f) << 16 | buf[1] << 8 | buf[0];
			start_ber = 1;
		}
	} else {
		priv->ber_running = true;
		start_ber = 1;
	}

	if (start_ber) {
		/* (re)start BER */
		ret = cxd2820r_wr_reg(priv, 0x10079, 0x01);
		if (ret)
			goto error;
	}

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_signal_strength_c(struct dvb_frontend *fe,
	u16 *strength)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[2];
	u16 tmp;

	ret = cxd2820r_rd_regs(priv, 0x10049, buf, sizeof(buf));
	if (ret)
		goto error;

	tmp = (buf[0] & 0x03) << 8 | buf[1];
	tmp = (~tmp & 0x03ff);

	if (tmp == 512)
		/* ~no signal */
		tmp = 0;
	else if (tmp > 350)
		tmp = 350;

	/* scale value to 0x0000-0xffff */
	*strength = tmp * 0xffff / (350-0);

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_snr_c(struct dvb_frontend *fe, u16 *snr)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 tmp;
	unsigned int A, B;
	/* report SNR in dB * 10 */

	ret = cxd2820r_rd_reg(priv, 0x10019, &tmp);
	if (ret)
		goto error;

	if (((tmp >> 0) & 0x03) % 2) {
		A = 875;
		B = 650;
	} else {
		A = 950;
		B = 760;
	}

	ret = cxd2820r_rd_reg(priv, 0x1004d, &tmp);
	if (ret)
		goto error;

	#define CXD2820R_LOG2_E_24 24204406 /* log2(e) << 24 */
	if (tmp)
		*snr = A * (intlog2(B / tmp) >> 5) / (CXD2820R_LOG2_E_24 >> 5)
			/ 10;
	else
		*snr = 0;

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_ucblocks_c(struct dvb_frontend *fe, u32 *ucblocks)
{
	*ucblocks = 0;
	/* no way to read ? */
	return 0;
}

int cxd2820r_read_status_c(struct dvb_frontend *fe, enum fe_status *status)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[2];
	*status = 0;

	ret = cxd2820r_rd_regs(priv, 0x10088, buf, sizeof(buf));
	if (ret)
		goto error;

	if (((buf[0] >> 0) & 0x01) == 1) {
		*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
			FE_HAS_VITERBI | FE_HAS_SYNC;

		if (((buf[1] >> 3) & 0x01) == 1) {
			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
				FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
		}
	}

	dev_dbg(&priv->i2c->dev, "%s: lock=%02x %02x\n", __func__, buf[0],
			buf[1]);

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_init_c(struct dvb_frontend *fe)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;

	ret = cxd2820r_wr_reg(priv, 0x00085, 0x07);
	if (ret)
		goto error;

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_sleep_c(struct dvb_frontend *fe)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret, i;
	struct reg_val_mask tab[] = {
		{ 0x000ff, 0x1f, 0xff },
		{ 0x00085, 0x00, 0xff },
		{ 0x00088, 0x01, 0xff },
		{ 0x00081, 0x00, 0xff },
		{ 0x00080, 0x00, 0xff },
	};

	dev_dbg(&priv->i2c->dev, "%s\n", __func__);

	priv->delivery_system = SYS_UNDEFINED;

	for (i = 0; i < ARRAY_SIZE(tab); i++) {
		ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
			tab[i].mask);
		if (ret)
			goto error;
	}

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
	struct dvb_frontend_tune_settings *s)
{
	s->min_delay_ms = 500;
	s->step_size = 0; /* no zigzag */
	s->max_drift = 0;

	return 0;
}
Commit	Line	Data
27cfc85e AP	1	/*
	2	* Sony CXD2820R demodulator driver
	3	*
	4	* Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License along
	17	* with this program; if not, write to the Free Software Foundation, Inc.,
	18	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
	19	*/
	20
	21
9ac51c5e SK	22	#include "cxd2820r_priv.h"
9ac51c5e SK	23
f311f68a	24	int cxd2820r_set_frontend_c(struct dvb_frontend *fe)
27cfc85e AP	25	{
	26	struct cxd2820r_priv *priv = fe->demodulator_priv;
	27	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	28	int ret, i;
	29	u8 buf[2];
fda23faa	30	u32 if_freq;
27cfc85e AP	31	u16 if_ctl;
	32	u64 num;
	33	struct reg_val_mask tab[] = {
	34	{ 0x00080, 0x01, 0xff },
	35	{ 0x00081, 0x05, 0xff },
	36	{ 0x00085, 0x07, 0xff },
	37	{ 0x00088, 0x01, 0xff },
	38
	39	{ 0x00082, 0x20, 0x60 },
	40	{ 0x1016a, 0x48, 0xff },
	41	{ 0x100a5, 0x00, 0x01 },
	42	{ 0x10020, 0x06, 0x07 },
	43	{ 0x10059, 0x50, 0xff },
	44	{ 0x10087, 0x0c, 0x3c },
	45	{ 0x1008b, 0x07, 0xff },
	46	{ 0x1001f, priv->cfg.if_agc_polarity << 7, 0x80 },
	47	{ 0x10070, priv->cfg.ts_mode, 0xff },
4d1ab185	48	{ 0x10071, !priv->cfg.ts_clock_inv << 4, 0x10 },
27cfc85e AP	49	};
27cfc85e AP	50
75aeafc9 AP	51	dev_dbg(&priv->i2c->dev, "%s: frequency=%d symbol_rate=%d\n", __func__,
75aeafc9 AP	52	c->frequency, c->symbol_rate);
27cfc85e	53
27cfc85e AP	54	/* program tuner */
27cfc85e AP	55	if (fe->ops.tuner_ops.set_params)
14d24d14	56	fe->ops.tuner_ops.set_params(fe);
27cfc85e	57
0349471b	58	if (priv->delivery_system != SYS_DVBC_ANNEX_A) {
27cfc85e AP	59	for (i = 0; i < ARRAY_SIZE(tab); i++) {
	60	ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
	61	tab[i].val, tab[i].mask);
	62	if (ret)
	63	goto error;
	64	}
	65	}
	66
0349471b	67	priv->delivery_system = SYS_DVBC_ANNEX_A;
285c0b00	68	priv->ber_running = false; /* tune stops BER counter */
27cfc85e	69
fda23faa AP	70	/* program IF frequency */
	71	if (fe->ops.tuner_ops.get_if_frequency) {
	72	ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
	73	if (ret)
	74	goto error;
	75	} else
	76	if_freq = 0;
	77
75aeafc9	78	dev_dbg(&priv->i2c->dev, "%s: if_freq=%d\n", __func__, if_freq);
fda23faa AP	79
fda23faa AP	80	num = if_freq / 1000; /* Hz => kHz */
27cfc85e	81	num *= 0x4000;
512eb720	82	if_ctl = 0x4000 - DIV_ROUND_CLOSEST_ULL(num, 41000);
27cfc85e AP	83	buf[0] = (if_ctl >> 8) & 0x3f;
	84	buf[1] = (if_ctl >> 0) & 0xff;
	85
	86	ret = cxd2820r_wr_regs(priv, 0x10042, buf, 2);
	87	if (ret)
	88	goto error;
	89
	90	ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
	91	if (ret)
	92	goto error;
	93
	94	ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
	95	if (ret)
	96	goto error;
	97
	98	return ret;
	99	error:
75aeafc9	100	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	101	return ret;
	102	}
	103
f311f68a	104	int cxd2820r_get_frontend_c(struct dvb_frontend *fe)
27cfc85e AP	105	{
	106	struct cxd2820r_priv *priv = fe->demodulator_priv;
	107	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	108	int ret;
	109	u8 buf[2];
	110
	111	ret = cxd2820r_rd_regs(priv, 0x1001a, buf, 2);
	112	if (ret)
	113	goto error;
	114
	115	c->symbol_rate = 2500 * ((buf[0] & 0x0f) << 8 \| buf[1]);
	116
	117	ret = cxd2820r_rd_reg(priv, 0x10019, &buf[0]);
	118	if (ret)
	119	goto error;
	120
cba5d0b2	121	switch ((buf[0] >> 0) & 0x07) {
27cfc85e AP	122	case 0:
	123	c->modulation = QAM_16;
	124	break;
	125	case 1:
	126	c->modulation = QAM_32;
	127	break;
	128	case 2:
	129	c->modulation = QAM_64;
	130	break;
	131	case 3:
	132	c->modulation = QAM_128;
	133	break;
	134	case 4:
	135	c->modulation = QAM_256;
	136	break;
	137	}
	138
	139	switch ((buf[0] >> 7) & 0x01) {
	140	case 0:
	141	c->inversion = INVERSION_OFF;
	142	break;
	143	case 1:
	144	c->inversion = INVERSION_ON;
	145	break;
	146	}
	147
	148	return ret;
	149	error:
75aeafc9	150	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	151	return ret;
	152	}
	153
9ac51c5e	154	int cxd2820r_read_ber_c(struct dvb_frontend fe, u32 ber)
27cfc85e AP	155	{
	156	struct cxd2820r_priv *priv = fe->demodulator_priv;
	157	int ret;
	158	u8 buf[3], start_ber = 0;
	159	*ber = 0;
	160
	161	if (priv->ber_running) {
	162	ret = cxd2820r_rd_regs(priv, 0x10076, buf, sizeof(buf));
	163	if (ret)
	164	goto error;
	165
	166	if ((buf[2] >> 7) & 0x01 \|\| (buf[2] >> 4) & 0x01) {
	167	*ber = (buf[2] & 0x0f) << 16 \| buf[1] << 8 \| buf[0];
	168	start_ber = 1;
	169	}
	170	} else {
285c0b00	171	priv->ber_running = true;
27cfc85e AP	172	start_ber = 1;
	173	}
	174
	175	if (start_ber) {
	176	/* (re)start BER */
	177	ret = cxd2820r_wr_reg(priv, 0x10079, 0x01);
	178	if (ret)
	179	goto error;
	180	}
	181
	182	return ret;
	183	error:
75aeafc9	184	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	185	return ret;
	186	}
	187
9ac51c5e	188	int cxd2820r_read_signal_strength_c(struct dvb_frontend *fe,
27cfc85e AP	189	u16 *strength)
	190	{
	191	struct cxd2820r_priv *priv = fe->demodulator_priv;
	192	int ret;
	193	u8 buf[2];
	194	u16 tmp;
	195
	196	ret = cxd2820r_rd_regs(priv, 0x10049, buf, sizeof(buf));
	197	if (ret)
	198	goto error;
	199
	200	tmp = (buf[0] & 0x03) << 8 \| buf[1];
	201	tmp = (~tmp & 0x03ff);
	202
	203	if (tmp == 512)
	204	/* ~no signal */
	205	tmp = 0;
	206	else if (tmp > 350)
	207	tmp = 350;
	208
	209	/* scale value to 0x0000-0xffff */
	210	strength = tmp 0xffff / (350-0);
	211
	212	return ret;
	213	error:
75aeafc9	214	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	215	return ret;
	216	}
	217
9ac51c5e	218	int cxd2820r_read_snr_c(struct dvb_frontend fe, u16 snr)
27cfc85e AP	219	{
	220	struct cxd2820r_priv *priv = fe->demodulator_priv;
	221	int ret;
	222	u8 tmp;
	223	unsigned int A, B;
	224	/* report SNR in dB * 10 */
	225
	226	ret = cxd2820r_rd_reg(priv, 0x10019, &tmp);
	227	if (ret)
	228	goto error;
	229
	230	if (((tmp >> 0) & 0x03) % 2) {
	231	A = 875;
	232	B = 650;
	233	} else {
	234	A = 950;
	235	B = 760;
	236	}
	237
	238	ret = cxd2820r_rd_reg(priv, 0x1004d, &tmp);
	239	if (ret)
	240	goto error;
	241
	242	#define CXD2820R_LOG2_E_24 24204406 /* log2(e) << 24 */
	243	if (tmp)
	244	snr = A (intlog2(B / tmp) >> 5) / (CXD2820R_LOG2_E_24 >> 5)
	245	/ 10;
	246	else
	247	*snr = 0;
	248
	249	return ret;
	250	error:
75aeafc9	251	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	252	return ret;
	253	}
	254
9ac51c5e	255	int cxd2820r_read_ucblocks_c(struct dvb_frontend fe, u32 ucblocks)
27cfc85e AP	256	{
	257	*ucblocks = 0;
	258	/* no way to read ? */
	259	return 0;
	260	}
	261
0df289a2	262	int cxd2820r_read_status_c(struct dvb_frontend fe, enum fe_status status)
27cfc85e AP	263	{
	264	struct cxd2820r_priv *priv = fe->demodulator_priv;
	265	int ret;
	266	u8 buf[2];
	267	*status = 0;
	268
	269	ret = cxd2820r_rd_regs(priv, 0x10088, buf, sizeof(buf));
	270	if (ret)
	271	goto error;
	272
	273	if (((buf[0] >> 0) & 0x01) == 1) {
	274	*status \|= FE_HAS_SIGNAL \| FE_HAS_CARRIER \|
	275	FE_HAS_VITERBI \| FE_HAS_SYNC;
	276
	277	if (((buf[1] >> 3) & 0x01) == 1) {
	278	*status \|= FE_HAS_SIGNAL \| FE_HAS_CARRIER \|
	279	FE_HAS_VITERBI \| FE_HAS_SYNC \| FE_HAS_LOCK;
	280	}
	281	}
	282
75aeafc9 AP	283	dev_dbg(&priv->i2c->dev, "%s: lock=%02x %02x\n", __func__, buf[0],
75aeafc9 AP	284	buf[1]);
27cfc85e AP	285
	286	return ret;
	287	error:
75aeafc9	288	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	289	return ret;
	290	}
	291
9ac51c5e	292	int cxd2820r_init_c(struct dvb_frontend *fe)
27cfc85e AP	293	{
	294	struct cxd2820r_priv *priv = fe->demodulator_priv;
	295	int ret;
	296
	297	ret = cxd2820r_wr_reg(priv, 0x00085, 0x07);
	298	if (ret)
	299	goto error;
	300
	301	return ret;
	302	error:
75aeafc9	303	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	304	return ret;
	305	}
	306
9ac51c5e	307	int cxd2820r_sleep_c(struct dvb_frontend *fe)
27cfc85e AP	308	{
	309	struct cxd2820r_priv *priv = fe->demodulator_priv;
	310	int ret, i;
	311	struct reg_val_mask tab[] = {
	312	{ 0x000ff, 0x1f, 0xff },
	313	{ 0x00085, 0x00, 0xff },
	314	{ 0x00088, 0x01, 0xff },
	315	{ 0x00081, 0x00, 0xff },
	316	{ 0x00080, 0x00, 0xff },
	317	};
	318
75aeafc9	319	dev_dbg(&priv->i2c->dev, "%s\n", __func__);
27cfc85e AP	320
	321	priv->delivery_system = SYS_UNDEFINED;
	322
	323	for (i = 0; i < ARRAY_SIZE(tab); i++) {
	324	ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
	325	tab[i].mask);
	326	if (ret)
	327	goto error;
	328	}
	329
	330	return ret;
	331	error:
75aeafc9	332	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	333	return ret;
	334	}
	335
9ac51c5e	336	int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
27cfc85e AP	337	struct dvb_frontend_tune_settings *s)
	338	{
	339	s->min_delay_ms = 500;
	340	s->step_size = 0; /* no zigzag */
	341	s->max_drift = 0;
	342
	343	return 0;
	344	}