projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge tag 'char-misc-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[linux-2.6-block.git] / drivers / media / dvb-frontends / af9013.c
CommitLineData
825b9670 1/*
c89f66f6 2 * Afatech AF9013 demodulator driver
825b9670
AP		 3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
f571e004 5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
825b9670
AP		 6 *
7 * Thanks to Afatech who kindly provided information.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 */
24
825b9670 25#include "af9013_priv.h"
825b9670 26
37ebaf68
MCC		 27/* Max transfer size done by I2C transfer functions */
28#define MAX_XFER_SIZE 64
29
825b9670
AP		 30struct af9013_state {
31 struct i2c_adapter *i2c;
f571e004 32 struct dvb_frontend fe;
825b9670
AP		 33 struct af9013_config config;
34
9e35cd22
AP		 35 /* tuner/demod RF and IF AGC limits used for signal strength calc */
36 u8 signal_strength_en, rf_50, rf_80, if_50, if_80;
825b9670
AP		 37 u16 signal_strength;
38 u32 ber;
39 u32 ucblocks;
40 u16 snr;
f571e004 41 u32 bandwidth_hz;
0df289a2 42 enum fe_status fe_status;
f571e004
AP		 43 unsigned long set_frontend_jiffies;
44 unsigned long read_status_jiffies;
45 bool first_tune;
46 bool i2c_gate_state;
47 unsigned int statistics_step:3;
48 struct delayed_work statistics_work;
825b9670
AP		 49};
50
f571e004
AP		 51/* write multiple registers */
52static int af9013_wr_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
53 const u8 *val, int len)
825b9670 54{
f571e004 55 int ret;
37ebaf68 56 u8 buf[MAX_XFER_SIZE];
f571e004
AP		 57 struct i2c_msg msg[1] = {
58 {
59 .addr = priv->config.i2c_addr,
60 .flags = 0,
37ebaf68 61 .len = 3 + len,
f571e004
AP		 62 .buf = buf,
63 }
64 };
65
37ebaf68
MCC		 66 if (3 + len > sizeof(buf)) {
67 dev_warn(&priv->i2c->dev,
68 "%s: i2c wr reg=%04x: len=%d is too big!\n",
69 KBUILD_MODNAME, reg, len);
70 return -EINVAL;
71 }
72
f571e004
AP		 73 buf[0] = (reg >> 8) & 0xff;
74 buf[1] = (reg >> 0) & 0xff;
825b9670
AP		 75 buf[2] = mbox;
76 memcpy(&buf[3], val, len);
77
f571e004
AP		 78 ret = i2c_transfer(priv->i2c, msg, 1);
79 if (ret == 1) {
80 ret = 0;
81 } else {
8df379c5
AP		 82 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%04x " \
83 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
f571e004 84 ret = -EREMOTEIO;
825b9670 85 }
f571e004 86 return ret;
825b9670
AP		 87}
88
f571e004
AP		 89/* read multiple registers */
90static int af9013_rd_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
91 u8 *val, int len)
825b9670 92{
f571e004
AP		 93 int ret;
94 u8 buf[3];
95 struct i2c_msg msg[2] = {
96 {
97 .addr = priv->config.i2c_addr,
98 .flags = 0,
99 .len = 3,
100 .buf = buf,
101 }, {
102 .addr = priv->config.i2c_addr,
103 .flags = I2C_M_RD,
104 .len = len,
105 .buf = val,
106 }
107 };
108
109 buf[0] = (reg >> 8) & 0xff;
110 buf[1] = (reg >> 0) & 0xff;
111 buf[2] = mbox;
112
113 ret = i2c_transfer(priv->i2c, msg, 2);
114 if (ret == 2) {
115 ret = 0;
116 } else {
8df379c5
AP		 117 dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%04x " \
118 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
f571e004
AP		 119 ret = -EREMOTEIO;
120 }
121 return ret;
825b9670
AP		 122}
123
f571e004
AP		 124/* write multiple registers */
125static int af9013_wr_regs(struct af9013_state *priv, u16 reg, const u8 *val,
126 int len)
825b9670 127{
f571e004
AP		 128 int ret, i;
129 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(1 << 0);
130
938ca36e
DC		 131 if ((priv->config.ts_mode == AF9013_TS_USB) &&
132 ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
f571e004
AP		 133 mbox |= ((len - 1) << 2);
134 ret = af9013_wr_regs_i2c(priv, mbox, reg, val, len);
135 } else {
136 for (i = 0; i < len; i++) {
137 ret = af9013_wr_regs_i2c(priv, mbox, reg+i, val+i, 1);
138 if (ret)
139 goto err;
140 }
141 }
142
143err:
144 return 0;
145}
146
147/* read multiple registers */
148static int af9013_rd_regs(struct af9013_state *priv, u16 reg, u8 *val, int len)
149{
150 int ret, i;
151 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(0 << 0);
152
938ca36e
DC		 153 if ((priv->config.ts_mode == AF9013_TS_USB) &&
154 ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
f571e004
AP		 155 mbox |= ((len - 1) << 2);
156 ret = af9013_rd_regs_i2c(priv, mbox, reg, val, len);
157 } else {
158 for (i = 0; i < len; i++) {
159 ret = af9013_rd_regs_i2c(priv, mbox, reg+i, val+i, 1);
160 if (ret)
161 goto err;
162 }
163 }
164
165err:
166 return 0;
825b9670
AP		 167}
168
169/* write single register */
f571e004 170static int af9013_wr_reg(struct af9013_state *priv, u16 reg, u8 val)
825b9670 171{
f571e004 172 return af9013_wr_regs(priv, reg, &val, 1);
825b9670
AP		 173}
174
175/* read single register */
f571e004 176static int af9013_rd_reg(struct af9013_state *priv, u16 reg, u8 *val)
825b9670 177{
f571e004
AP		 178 return af9013_rd_regs(priv, reg, val, 1);
179}
825b9670 180
f571e004
AP		 181static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val,
182 u8 len)
183{
184 u8 mbox = (1 << 7)|(1 << 6)|((len - 1) << 2)|(1 << 1)|(1 << 0);
185 return af9013_wr_regs_i2c(state, mbox, reg, val, len);
825b9670
AP		 186}
187
f571e004
AP		 188static int af9013_wr_reg_bits(struct af9013_state *state, u16 reg, int pos,
189 int len, u8 val)
825b9670
AP		 190{
191 int ret;
192 u8 tmp, mask;
193
f571e004
AP		 194 /* no need for read if whole reg is written */
195 if (len != 8) {
196 ret = af9013_rd_reg(state, reg, &tmp);
197 if (ret)
198 return ret;
825b9670 199
f571e004
AP		 200 mask = (0xff >> (8 - len)) << pos;
201 val <<= pos;
202 tmp &= ~mask;
203 val |= tmp;
204 }
825b9670 205
f571e004 206 return af9013_wr_reg(state, reg, val);
825b9670
AP		 207}
208
f571e004
AP		 209static int af9013_rd_reg_bits(struct af9013_state *state, u16 reg, int pos,
210 int len, u8 *val)
825b9670
AP		 211{
212 int ret;
213 u8 tmp;
214
f571e004 215 ret = af9013_rd_reg(state, reg, &tmp);
825b9670
AP		 216 if (ret)
217 return ret;
f571e004
AP		 218
219 *val = (tmp >> pos);
220 *val &= (0xff >> (8 - len));
221
825b9670
AP		 222 return 0;
223}
224
225static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
226{
227 int ret;
228 u8 pos;
229 u16 addr;
825b9670 230
8df379c5
AP		 231 dev_dbg(&state->i2c->dev, "%s: gpio=%d gpioval=%02x\n",
232 __func__, gpio, gpioval);
f571e004
AP		 233
234 /*
235 * GPIO0 & GPIO1 0xd735
236 * GPIO2 & GPIO3 0xd736
237 */
825b9670
AP		 238
239 switch (gpio) {
240 case 0:
241 case 1:
242 addr = 0xd735;
243 break;
244 case 2:
245 case 3:
246 addr = 0xd736;
247 break;
248
249 default:
8df379c5
AP		 250 dev_err(&state->i2c->dev, "%s: invalid gpio=%d\n",
251 KBUILD_MODNAME, gpio);
825b9670 252 ret = -EINVAL;
f571e004 253 goto err;
c2c1b415 254 }
825b9670
AP		 255
256 switch (gpio) {
257 case 0:
258 case 2:
259 pos = 0;
260 break;
261 case 1:
262 case 3:
263 default:
264 pos = 4;
265 break;
c2c1b415 266 }
825b9670 267
f571e004
AP		 268 ret = af9013_wr_reg_bits(state, addr, pos, 4, gpioval);
269 if (ret)
270 goto err;
825b9670 271
f571e004
AP		 272 return ret;
273err:
8df379c5 274 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP		 275 return ret;
276}
277
8df379c5 278static u32 af9013_div(struct af9013_state *state, u32 a, u32 b, u32 x)
825b9670
AP		 279{
280 u32 r = 0, c = 0, i;
f571e004 281
8df379c5 282 dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d\n", __func__, a, b, x);
825b9670
AP		 283
284 if (a > b) {
285 c = a / b;
286 a = a - c * b;
287 }
288
289 for (i = 0; i < x; i++) {
290 if (a >= b) {
291 r += 1;
292 a -= b;
293 }
294 a <<= 1;
295 r <<= 1;
296 }
297 r = (c << (u32)x) + r;
298
8df379c5
AP		 299 dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d r=%d r=%x\n",
300 __func__, a, b, x, r, r);
301
825b9670
AP		 302 return r;
303}
304
f571e004 305static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
825b9670 306{
f571e004
AP		 307 int ret, i;
308 u8 tmp;
9b22edd4 309
8df379c5 310 dev_dbg(&state->i2c->dev, "%s: onoff=%d\n", __func__, onoff);
f571e004
AP		 311
312 /* enable reset */
313 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 1);
314 if (ret)
315 goto err;
316
317 /* start reset mechanism */
318 ret = af9013_wr_reg(state, 0xaeff, 1);
319 if (ret)
320 goto err;
321
322 /* wait reset performs */
323 for (i = 0; i < 150; i++) {
324 ret = af9013_rd_reg_bits(state, 0xd417, 1, 1, &tmp);
325 if (ret)
326 goto err;
327
328 if (tmp)
329 break; /* reset done */
330
331 usleep_range(5000, 25000);
825b9670
AP		 332 }
333
f571e004
AP		 334 if (!tmp)
335 return -ETIMEDOUT;
825b9670 336
f571e004
AP		 337 if (onoff) {
338 /* clear reset */
339 ret = af9013_wr_reg_bits(state, 0xd417, 1, 1, 0);
825b9670 340 if (ret)
f571e004
AP		 341 goto err;
342
343 /* disable reset */
344 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 0);
345
346 /* power on */
347 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 0);
348 } else {
349 /* power off */
350 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 1);
825b9670
AP		 351 }
352
f571e004
AP		 353 return ret;
354err:
8df379c5 355 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP		 356 return ret;
357}
358
f571e004 359static int af9013_statistics_ber_unc_start(struct dvb_frontend *fe)
825b9670 360{
f571e004 361 struct af9013_state *state = fe->demodulator_priv;
825b9670 362 int ret;
825b9670 363
8df379c5 364 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
825b9670 365
f571e004
AP		 366 /* reset and start BER counter */
367 ret = af9013_wr_reg_bits(state, 0xd391, 4, 1, 1);
368 if (ret)
369 goto err;
370
371 return ret;
372err:
8df379c5 373 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP		 374 return ret;
375}
376
377static int af9013_statistics_ber_unc_result(struct dvb_frontend *fe)
378{
379 struct af9013_state *state = fe->demodulator_priv;
380 int ret;
381 u8 buf[5];
382
8df379c5 383 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP		 384
385 /* check if error bit count is ready */
386 ret = af9013_rd_reg_bits(state, 0xd391, 4, 1, &buf[0]);
387 if (ret)
388 goto err;
389
390 if (!buf[0]) {
8df379c5 391 dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__);
f571e004
AP		 392 return 0;
393 }
394
395 ret = af9013_rd_regs(state, 0xd387, buf, 5);
396 if (ret)
397 goto err;
398
399 state->ber = (buf[2] << 16) | (buf[1] << 8) | buf[0];
400 state->ucblocks += (buf[4] << 8) | buf[3];
401
402 return ret;
403err:
8df379c5 404 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP		 405 return ret;
406}
407
408static int af9013_statistics_snr_start(struct dvb_frontend *fe)
409{
410 struct af9013_state *state = fe->demodulator_priv;
411 int ret;
412
8df379c5 413 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP		 414
415 /* start SNR meas */
416 ret = af9013_wr_reg_bits(state, 0xd2e1, 3, 1, 1);
417 if (ret)
418 goto err;
419
420 return ret;
421err:
8df379c5 422 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP		 423 return ret;
424}
425
426static int af9013_statistics_snr_result(struct dvb_frontend *fe)
427{
428 struct af9013_state *state = fe->demodulator_priv;
429 int ret, i, len;
430 u8 buf[3], tmp;
431 u32 snr_val;
432 const struct af9013_snr *uninitialized_var(snr_lut);
433
8df379c5 434 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP		 435
436 /* check if SNR ready */
437 ret = af9013_rd_reg_bits(state, 0xd2e1, 3, 1, &tmp);
438 if (ret)
439 goto err;
440
441 if (!tmp) {
8df379c5 442 dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__);
f571e004
AP		 443 return 0;
444 }
445
446 /* read value */
447 ret = af9013_rd_regs(state, 0xd2e3, buf, 3);
448 if (ret)
449 goto err;
450
451 snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0];
452
453 /* read current modulation */
454 ret = af9013_rd_reg(state, 0xd3c1, &tmp);
455 if (ret)
456 goto err;
457
458 switch ((tmp >> 6) & 3) {
459 case 0:
460 len = ARRAY_SIZE(qpsk_snr_lut);
461 snr_lut = qpsk_snr_lut;
825b9670 462 break;
f571e004
AP		 463 case 1:
464 len = ARRAY_SIZE(qam16_snr_lut);
465 snr_lut = qam16_snr_lut;
825b9670 466 break;
f571e004
AP		 467 case 2:
468 len = ARRAY_SIZE(qam64_snr_lut);
469 snr_lut = qam64_snr_lut;
825b9670
AP		 470 break;
471 default:
f571e004 472 goto err;
825b9670
AP		 473 }
474
f571e004
AP		 475 for (i = 0; i < len; i++) {
476 tmp = snr_lut[i].snr;
825b9670 477
f571e004
AP		 478 if (snr_val < snr_lut[i].val)
479 break;
480 }
481 state->snr = tmp * 10; /* dB/10 */
825b9670 482
f571e004
AP		 483 return ret;
484err:
8df379c5 485 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP		 486 return ret;
487}
825b9670 488
f571e004
AP		 489static int af9013_statistics_signal_strength(struct dvb_frontend *fe)
490{
491 struct af9013_state *state = fe->demodulator_priv;
492 int ret = 0;
493 u8 buf[2], rf_gain, if_gain;
494 int signal_strength;
495
8df379c5 496 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP		 497
498 if (!state->signal_strength_en)
499 return 0;
500
501 ret = af9013_rd_regs(state, 0xd07c, buf, 2);
502 if (ret)
503 goto err;
504
505 rf_gain = buf[0];
506 if_gain = buf[1];
507
508 signal_strength = (0xffff / \
509 (9 * (state->rf_50 + state->if_50) - \
510 11 * (state->rf_80 + state->if_80))) * \
511 (10 * (rf_gain + if_gain) - \
512 11 * (state->rf_80 + state->if_80));
513 if (signal_strength < 0)
514 signal_strength = 0;
515 else if (signal_strength > 0xffff)
516 signal_strength = 0xffff;
517
518 state->signal_strength = signal_strength;
519
520 return ret;
521err:
8df379c5 522 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP		 523 return ret;
524}
525
f571e004 526static void af9013_statistics_work(struct work_struct *work)
825b9670 527{
f571e004
AP		 528 struct af9013_state *state = container_of(work,
529 struct af9013_state, statistics_work.work);
530 unsigned int next_msec;
531
532 /* update only signal strength when demod is not locked */
533 if (!(state->fe_status & FE_HAS_LOCK)) {
534 state->statistics_step = 0;
535 state->ber = 0;
536 state->snr = 0;
537 }
538
539 switch (state->statistics_step) {
540 default:
541 state->statistics_step = 0;
542 case 0:
fdf07b02 543 af9013_statistics_signal_strength(&state->fe);
f571e004
AP		 544 state->statistics_step++;
545 next_msec = 300;
546 break;
547 case 1:
fdf07b02 548 af9013_statistics_snr_start(&state->fe);
f571e004
AP		 549 state->statistics_step++;
550 next_msec = 200;
551 break;
552 case 2:
fdf07b02 553 af9013_statistics_ber_unc_start(&state->fe);
f571e004
AP		 554 state->statistics_step++;
555 next_msec = 1000;
556 break;
557 case 3:
fdf07b02 558 af9013_statistics_snr_result(&state->fe);
f571e004
AP		 559 state->statistics_step++;
560 next_msec = 400;
561 break;
562 case 4:
fdf07b02 563 af9013_statistics_ber_unc_result(&state->fe);
f571e004
AP		 564 state->statistics_step++;
565 next_msec = 100;
566 break;
567 }
568
569 schedule_delayed_work(&state->statistics_work,
570 msecs_to_jiffies(next_msec));
f571e004
AP		 571}
572
573static int af9013_get_tune_settings(struct dvb_frontend *fe,
574 struct dvb_frontend_tune_settings *fesettings)
575{
576 fesettings->min_delay_ms = 800;
577 fesettings->step_size = 0;
578 fesettings->max_drift = 0;
579
580 return 0;
581}
582
59d3cc19 583static int af9013_set_frontend(struct dvb_frontend *fe)
f571e004
AP		 584{
585 struct af9013_state *state = fe->demodulator_priv;
586 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
587 int ret, i, sampling_freq;
588 bool auto_mode, spec_inv;
589 u8 buf[6];
590 u32 if_frequency, freq_cw;
591
8df379c5
AP		 592 dev_dbg(&state->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n",
593 __func__, c->frequency, c->bandwidth_hz);
f571e004
AP		 594
595 /* program tuner */
596 if (fe->ops.tuner_ops.set_params)
14d24d14 597 fe->ops.tuner_ops.set_params(fe);
f571e004
AP		 598
599 /* program CFOE coefficients */
600 if (c->bandwidth_hz != state->bandwidth_hz) {
601 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
602 if (coeff_lut[i].clock == state->config.clock &&
603 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
604 break;
605 }
825b9670
AP		 606 }
607
d7b76c91
MCC		 608 /* Return an error if can't find bandwidth or the right clock */
609 if (i == ARRAY_SIZE(coeff_lut))
610 return -EINVAL;
611
f571e004
AP		 612 ret = af9013_wr_regs(state, 0xae00, coeff_lut[i].val,
613 sizeof(coeff_lut[i].val));
614 }
6d42b218 615
f571e004
AP		 616 /* program frequency control */
617 if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
6d42b218
AP		 618 /* get used IF frequency */
619 if (fe->ops.tuner_ops.get_if_frequency)
f571e004 620 fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
6d42b218 621 else
f571e004 622 if_frequency = state->config.if_frequency;
825b9670 623
8df379c5
AP		 624 dev_dbg(&state->i2c->dev, "%s: if_frequency=%d\n",
625 __func__, if_frequency);
ab2e06ac 626
f571e004 627 sampling_freq = if_frequency;
825b9670 628
f571e004
AP		 629 while (sampling_freq > (state->config.clock / 2))
630 sampling_freq -= state->config.clock;
825b9670 631
f571e004
AP		 632 if (sampling_freq < 0) {
633 sampling_freq *= -1;
634 spec_inv = state->config.spec_inv;
635 } else {
636 spec_inv = !state->config.spec_inv;
637 }
825b9670 638
8df379c5
AP		 639 freq_cw = af9013_div(state, sampling_freq, state->config.clock,
640 23);
825b9670 641
f571e004
AP		 642 if (spec_inv)
643 freq_cw = 0x800000 - freq_cw;
825b9670 644
f571e004
AP		 645 buf[0] = (freq_cw >> 0) & 0xff;
646 buf[1] = (freq_cw >> 8) & 0xff;
647 buf[2] = (freq_cw >> 16) & 0x7f;
825b9670 648
f571e004 649 freq_cw = 0x800000 - freq_cw;
825b9670 650
f571e004
AP		 651 buf[3] = (freq_cw >> 0) & 0xff;
652 buf[4] = (freq_cw >> 8) & 0xff;
653 buf[5] = (freq_cw >> 16) & 0x7f;
654
655 ret = af9013_wr_regs(state, 0xd140, buf, 3);
656 if (ret)
657 goto err;
658
659 ret = af9013_wr_regs(state, 0x9be7, buf, 6);
660 if (ret)
661 goto err;
825b9670 662 }
825b9670 663
f571e004
AP		 664 /* clear TPS lock flag */
665 ret = af9013_wr_reg_bits(state, 0xd330, 3, 1, 1);
666 if (ret)
667 goto err;
825b9670 668
f571e004
AP		 669 /* clear MPEG2 lock flag */
670 ret = af9013_wr_reg_bits(state, 0xd507, 6, 1, 0);
671 if (ret)
672 goto err;
a2f5a811 673
f571e004
AP		 674 /* empty channel function */
675 ret = af9013_wr_reg_bits(state, 0x9bfe, 0, 1, 0);
676 if (ret)
677 goto err;
678
679 /* empty DVB-T channel function */
680 ret = af9013_wr_reg_bits(state, 0x9bc2, 0, 1, 0);
681 if (ret)
682 goto err;
683
684 /* transmission parameters */
685 auto_mode = false;
686 memset(buf, 0, 3);
687
688 switch (c->transmission_mode) {
825b9670 689 case TRANSMISSION_MODE_AUTO:
6a5e7fde 690 auto_mode = true;
f571e004 691 break;
825b9670
AP		 692 case TRANSMISSION_MODE_2K:
693 break;
694 case TRANSMISSION_MODE_8K:
695 buf[0] |= (1 << 0);
696 break;
697 default:
8df379c5
AP		 698 dev_dbg(&state->i2c->dev, "%s: invalid transmission_mode\n",
699 __func__);
6a5e7fde 700 auto_mode = true;
825b9670
AP		 701 }
702
f571e004 703 switch (c->guard_interval) {
825b9670 704 case GUARD_INTERVAL_AUTO:
6a5e7fde 705 auto_mode = true;
f571e004 706 break;
825b9670
AP		 707 case GUARD_INTERVAL_1_32:
708 break;
709 case GUARD_INTERVAL_1_16:
710 buf[0] |= (1 << 2);
711 break;
712 case GUARD_INTERVAL_1_8:
713 buf[0] |= (2 << 2);
714 break;
715 case GUARD_INTERVAL_1_4:
716 buf[0] |= (3 << 2);
717 break;
718 default:
8df379c5
AP		 719 dev_dbg(&state->i2c->dev, "%s: invalid guard_interval\n",
720 __func__);
6a5e7fde 721 auto_mode = true;
825b9670
AP		 722 }
723
f571e004 724 switch (c->hierarchy) {
825b9670 725 case HIERARCHY_AUTO:
6a5e7fde 726 auto_mode = true;
f571e004 727 break;
825b9670
AP		 728 case HIERARCHY_NONE:
729 break;
730 case HIERARCHY_1:
731 buf[0] |= (1 << 4);
732 break;
733 case HIERARCHY_2:
734 buf[0] |= (2 << 4);
735 break;
736 case HIERARCHY_4:
737 buf[0] |= (3 << 4);
738 break;
739 default:
8df379c5 740 dev_dbg(&state->i2c->dev, "%s: invalid hierarchy\n", __func__);
6a5e7fde 741 auto_mode = true;
c2c1b415 742 }
825b9670 743
f571e004 744 switch (c->modulation) {
825b9670 745 case QAM_AUTO:
6a5e7fde 746 auto_mode = true;
f571e004 747 break;
825b9670
AP		 748 case QPSK:
749 break;
750 case QAM_16:
751 buf[1] |= (1 << 6);
752 break;
753 case QAM_64:
754 buf[1] |= (2 << 6);
755 break;
756 default:
8df379c5 757 dev_dbg(&state->i2c->dev, "%s: invalid modulation\n", __func__);
6a5e7fde 758 auto_mode = true;
825b9670
AP		 759 }
760
761 /* Use HP. How and which case we can switch to LP? */
762 buf[1] |= (1 << 4);
763
f571e004 764 switch (c->code_rate_HP) {
825b9670 765 case FEC_AUTO:
6a5e7fde 766 auto_mode = true;
f571e004 767 break;
825b9670
AP		 768 case FEC_1_2:
769 break;
770 case FEC_2_3:
771 buf[2] |= (1 << 0);
772 break;
773 case FEC_3_4:
774 buf[2] |= (2 << 0);
775 break;
776 case FEC_5_6:
777 buf[2] |= (3 << 0);
778 break;
779 case FEC_7_8:
780 buf[2] |= (4 << 0);
781 break;
782 default:
8df379c5
AP		 783 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_HP\n",
784 __func__);
6a5e7fde 785 auto_mode = true;
825b9670
AP		 786 }
787
f571e004 788 switch (c->code_rate_LP) {
825b9670 789 case FEC_AUTO:
6a5e7fde 790 auto_mode = true;
f571e004 791 break;
825b9670
AP		 792 case FEC_1_2:
793 break;
794 case FEC_2_3:
795 buf[2] |= (1 << 3);
796 break;
797 case FEC_3_4:
798 buf[2] |= (2 << 3);
799 break;
800 case FEC_5_6:
801 buf[2] |= (3 << 3);
802 break;
803 case FEC_7_8:
804 buf[2] |= (4 << 3);
805 break;
806 case FEC_NONE:
f571e004 807 break;
825b9670 808 default:
8df379c5
AP		 809 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_LP\n",
810 __func__);
6a5e7fde 811 auto_mode = true;
825b9670
AP		 812 }
813
f571e004
AP		 814 switch (c->bandwidth_hz) {
815 case 6000000:
825b9670 816 break;
f571e004 817 case 7000000:
825b9670
AP		 818 buf[1] |= (1 << 2);
819 break;
f571e004 820 case 8000000:
825b9670
AP		 821 buf[1] |= (2 << 2);
822 break;
823 default:
8df379c5
AP		 824 dev_dbg(&state->i2c->dev, "%s: invalid bandwidth_hz\n",
825 __func__);
f571e004
AP		 826 ret = -EINVAL;
827 goto err;
825b9670
AP		 828 }
829
f571e004 830 ret = af9013_wr_regs(state, 0xd3c0, buf, 3);
825b9670 831 if (ret)
f571e004 832 goto err;
825b9670 833
f571e004
AP		 834 if (auto_mode) {
835 /* clear easy mode flag */
836 ret = af9013_wr_reg(state, 0xaefd, 0);
825b9670 837 if (ret)
f571e004 838 goto err;
825b9670 839
8df379c5 840 dev_dbg(&state->i2c->dev, "%s: auto params\n", __func__);
825b9670 841 } else {
f571e004
AP		 842 /* set easy mode flag */
843 ret = af9013_wr_reg(state, 0xaefd, 1);
825b9670 844 if (ret)
f571e004 845 goto err;
825b9670 846
f571e004 847 ret = af9013_wr_reg(state, 0xaefe, 0);
825b9670 848 if (ret)
f571e004
AP		 849 goto err;
850
8df379c5 851 dev_dbg(&state->i2c->dev, "%s: manual params\n", __func__);
825b9670 852 }
825b9670 853
f571e004
AP		 854 /* tune */
855 ret = af9013_wr_reg(state, 0xffff, 0);
825b9670 856 if (ret)
f571e004
AP		 857 goto err;
858
859 state->bandwidth_hz = c->bandwidth_hz;
860 state->set_frontend_jiffies = jiffies;
861 state->first_tune = false;
825b9670 862
f571e004
AP		 863 return ret;
864err:
8df379c5 865 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP		 866 return ret;
867}
868
7e3e68bc
MCC		 869static int af9013_get_frontend(struct dvb_frontend *fe,
870 struct dtv_frontend_properties *c)
825b9670
AP		 871{
872 struct af9013_state *state = fe->demodulator_priv;
873 int ret;
f571e004 874 u8 buf[3];
825b9670 875
8df379c5 876 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP		 877
878 ret = af9013_rd_regs(state, 0xd3c0, buf, 3);
879 if (ret)
880 goto err;
825b9670
AP		 881
882 switch ((buf[1] >> 6) & 3) {
883 case 0:
f571e004 884 c->modulation = QPSK;
825b9670
AP		 885 break;
886 case 1:
f571e004 887 c->modulation = QAM_16;
825b9670
AP		 888 break;
889 case 2:
f571e004 890 c->modulation = QAM_64;
825b9670
AP		 891 break;
892 }
893
894 switch ((buf[0] >> 0) & 3) {
895 case 0:
f571e004 896 c->transmission_mode = TRANSMISSION_MODE_2K;
825b9670
AP		 897 break;
898 case 1:
f571e004 899 c->transmission_mode = TRANSMISSION_MODE_8K;
825b9670
AP		 900 }
901
902 switch ((buf[0] >> 2) & 3) {
903 case 0:
6a2329ad 904 c->guard_interval = GUARD_INTERVAL_1_32;
825b9670
AP		 905 break;
906 case 1:
6a2329ad 907 c->guard_interval = GUARD_INTERVAL_1_16;
825b9670
AP		 908 break;
909 case 2:
6a2329ad 910 c->guard_interval = GUARD_INTERVAL_1_8;
825b9670
AP		 911 break;
912 case 3:
6a2329ad 913 c->guard_interval = GUARD_INTERVAL_1_4;
825b9670
AP		 914 break;
915 }
916
917 switch ((buf[0] >> 4) & 7) {
918 case 0:
f571e004 919 c->hierarchy = HIERARCHY_NONE;
825b9670
AP		 920 break;
921 case 1:
f571e004 922 c->hierarchy = HIERARCHY_1;
825b9670
AP		 923 break;
924 case 2:
f571e004 925 c->hierarchy = HIERARCHY_2;
825b9670
AP		 926 break;
927 case 3:
f571e004 928 c->hierarchy = HIERARCHY_4;
825b9670
AP		 929 break;
930 }
931
932 switch ((buf[2] >> 0) & 7) {
933 case 0:
f571e004 934 c->code_rate_HP = FEC_1_2;
825b9670
AP		 935 break;
936 case 1:
f571e004
AP		 937 c->code_rate_HP = FEC_2_3;
938 break;
939 case 2:
940 c->code_rate_HP = FEC_3_4;
941 break;
942 case 3:
943 c->code_rate_HP = FEC_5_6;
944 break;
945 case 4:
946 c->code_rate_HP = FEC_7_8;
947 break;
825b9670
AP		 948 }
949
f571e004
AP		 950 switch ((buf[2] >> 3) & 7) {
951 case 0:
952 c->code_rate_LP = FEC_1_2;
953 break;
954 case 1:
955 c->code_rate_LP = FEC_2_3;
956 break;
957 case 2:
958 c->code_rate_LP = FEC_3_4;
959 break;
960 case 3:
961 c->code_rate_LP = FEC_5_6;
962 break;
963 case 4:
964 c->code_rate_LP = FEC_7_8;
965 break;
966 }
825b9670 967
f571e004
AP		 968 switch ((buf[1] >> 2) & 3) {
969 case 0:
970 c->bandwidth_hz = 6000000;
971 break;
972 case 1:
973 c->bandwidth_hz = 7000000;
974 break;
975 case 2:
976 c->bandwidth_hz = 8000000;
977 break;
825b9670
AP		 978 }
979
825b9670 980 return ret;
f571e004 981err:
8df379c5 982 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP		 983 return ret;
984}
985
0df289a2 986static int af9013_read_status(struct dvb_frontend *fe, enum fe_status *status)
825b9670
AP		 987{
988 struct af9013_state *state = fe->demodulator_priv;
f571e004 989 int ret;
825b9670 990 u8 tmp;
f571e004
AP		 991
992 /*
993 * Return status from the cache if it is younger than 2000ms with the
994 * exception of last tune is done during 4000ms.
995 */
996 if (time_is_after_jiffies(
997 state->read_status_jiffies + msecs_to_jiffies(2000)) &&
998 time_is_before_jiffies(
999 state->set_frontend_jiffies + msecs_to_jiffies(4000))
1000 ) {
1001 *status = state->fe_status;
1002 return 0;
1003 } else {
1004 *status = 0;
1005 }
825b9670 1006
825b9670 1007 /* MPEG2 lock */
f571e004 1008 ret = af9013_rd_reg_bits(state, 0xd507, 6, 1, &tmp);
825b9670 1009 if (ret)
f571e004
AP		 1010 goto err;
1011
825b9670 1012 if (tmp)
8af5e381
AP		 1013 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
1014 FE_HAS_SYNC | FE_HAS_LOCK;
825b9670 1015
8af5e381
AP		 1016 if (!*status) {
1017 /* TPS lock */
f571e004 1018 ret = af9013_rd_reg_bits(state, 0xd330, 3, 1, &tmp);
825b9670 1019 if (ret)
f571e004
AP		 1020 goto err;
1021
825b9670 1022 if (tmp)
8af5e381
AP		 1023 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
1024 FE_HAS_VITERBI;
825b9670
AP		 1025 }
1026
f571e004
AP		 1027 state->fe_status = *status;
1028 state->read_status_jiffies = jiffies;
825b9670 1029
f571e004
AP		 1030 return ret;
1031err:
8df379c5 1032 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP		 1033 return ret;
1034}
1035
f571e004 1036static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
825b9670
AP		 1037{
1038 struct af9013_state *state = fe->demodulator_priv;
f571e004
AP		 1039 *snr = state->snr;
1040 return 0;
825b9670
AP		 1041}
1042
1043static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1044{
1045 struct af9013_state *state = fe->demodulator_priv;
825b9670 1046 *strength = state->signal_strength;
f571e004 1047 return 0;
825b9670
AP		 1048}
1049
f571e004 1050static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
825b9670
AP		 1051{
1052 struct af9013_state *state = fe->demodulator_priv;
f571e004
AP		 1053 *ber = state->ber;
1054 return 0;
825b9670
AP		 1055}
1056
1057static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1058{
1059 struct af9013_state *state = fe->demodulator_priv;
825b9670 1060 *ucblocks = state->ucblocks;
f571e004 1061 return 0;
825b9670
AP		 1062}
1063
1064static int af9013_init(struct dvb_frontend *fe)
1065{
1066 struct af9013_state *state = fe->demodulator_priv;
1067 int ret, i, len;
f571e004
AP		 1068 u8 buf[3], tmp;
1069 u32 adc_cw;
1070 const struct af9013_reg_bit *init;
825b9670 1071
8df379c5 1072 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
825b9670
AP		 1073
1074 /* power on */
1075 ret = af9013_power_ctrl(state, 1);
1076 if (ret)
f571e004 1077 goto err;
825b9670
AP		 1078
1079 /* enable ADC */
f571e004 1080 ret = af9013_wr_reg(state, 0xd73a, 0xa4);
825b9670 1081 if (ret)
f571e004 1082 goto err;
825b9670
AP		 1083
1084 /* write API version to firmware */
f571e004
AP		 1085 ret = af9013_wr_regs(state, 0x9bf2, state->config.api_version, 4);
1086 if (ret)
1087 goto err;
825b9670
AP		 1088
1089 /* program ADC control */
f571e004
AP		 1090 switch (state->config.clock) {
1091 case 28800000: /* 28.800 MHz */
1092 tmp = 0;
1093 break;
1094 case 20480000: /* 20.480 MHz */
1095 tmp = 1;
1096 break;
1097 case 28000000: /* 28.000 MHz */
1098 tmp = 2;
1099 break;
1100 case 25000000: /* 25.000 MHz */
1101 tmp = 3;
1102 break;
1103 default:
8df379c5
AP		 1104 dev_err(&state->i2c->dev, "%s: invalid clock\n",
1105 KBUILD_MODNAME);
f571e004
AP		 1106 return -EINVAL;
1107 }
1108
8df379c5 1109 adc_cw = af9013_div(state, state->config.clock, 1000000ul, 19);
f571e004
AP		 1110 buf[0] = (adc_cw >> 0) & 0xff;
1111 buf[1] = (adc_cw >> 8) & 0xff;
1112 buf[2] = (adc_cw >> 16) & 0xff;
1113
1114 ret = af9013_wr_regs(state, 0xd180, buf, 3);
1115 if (ret)
1116 goto err;
1117
1118 ret = af9013_wr_reg_bits(state, 0x9bd2, 0, 4, tmp);
825b9670 1119 if (ret)
f571e004 1120 goto err;
825b9670
AP		 1121
1122 /* set I2C master clock */
f571e004 1123 ret = af9013_wr_reg(state, 0xd416, 0x14);
825b9670 1124 if (ret)
f571e004 1125 goto err;
825b9670
AP		 1126
1127 /* set 16 embx */
f571e004 1128 ret = af9013_wr_reg_bits(state, 0xd700, 1, 1, 1);
825b9670 1129 if (ret)
f571e004 1130 goto err;
825b9670
AP		 1131
1132 /* set no trigger */
f571e004 1133 ret = af9013_wr_reg_bits(state, 0xd700, 2, 1, 0);
825b9670 1134 if (ret)
f571e004 1135 goto err;
825b9670
AP		 1136
1137 /* set read-update bit for constellation */
f571e004 1138 ret = af9013_wr_reg_bits(state, 0xd371, 1, 1, 1);
825b9670 1139 if (ret)
f571e004 1140 goto err;
825b9670 1141
f571e004
AP		 1142 /* settings for mp2if */
1143 if (state->config.ts_mode == AF9013_TS_USB) {
1144 /* AF9015 split PSB to 1.5k + 0.5k */
1145 ret = af9013_wr_reg_bits(state, 0xd50b, 2, 1, 1);
1146 if (ret)
1147 goto err;
1148 } else {
1149 /* AF9013 change the output bit to data7 */
1150 ret = af9013_wr_reg_bits(state, 0xd500, 3, 1, 1);
1151 if (ret)
1152 goto err;
1153
1154 /* AF9013 set mpeg to full speed */
1155 ret = af9013_wr_reg_bits(state, 0xd502, 4, 1, 1);
1156 if (ret)
1157 goto err;
1158 }
1159
1160 ret = af9013_wr_reg_bits(state, 0xd520, 4, 1, 1);
825b9670 1161 if (ret)
f571e004 1162 goto err;
825b9670
AP		 1163
1164 /* load OFSM settings */
8df379c5 1165 dev_dbg(&state->i2c->dev, "%s: load ofsm settings\n", __func__);
825b9670
AP		 1166 len = ARRAY_SIZE(ofsm_init);
1167 init = ofsm_init;
1168 for (i = 0; i < len; i++) {
f571e004 1169 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
825b9670
AP		 1170 init[i].len, init[i].val);
1171 if (ret)
f571e004 1172 goto err;
825b9670
AP		 1173 }
1174
1175 /* load tuner specific settings */
8df379c5
AP		 1176 dev_dbg(&state->i2c->dev, "%s: load tuner specific settings\n",
1177 __func__);
825b9670
AP		 1178 switch (state->config.tuner) {
1179 case AF9013_TUNER_MXL5003D:
1180 len = ARRAY_SIZE(tuner_init_mxl5003d);
1181 init = tuner_init_mxl5003d;
1182 break;
1183 case AF9013_TUNER_MXL5005D:
1184 case AF9013_TUNER_MXL5005R:
a4f31d0d 1185 case AF9013_TUNER_MXL5007T:
825b9670
AP		 1186 len = ARRAY_SIZE(tuner_init_mxl5005);
1187 init = tuner_init_mxl5005;
1188 break;
1189 case AF9013_TUNER_ENV77H11D5:
1190 len = ARRAY_SIZE(tuner_init_env77h11d5);
1191 init = tuner_init_env77h11d5;
1192 break;
1193 case AF9013_TUNER_MT2060:
1194 len = ARRAY_SIZE(tuner_init_mt2060);
1195 init = tuner_init_mt2060;
1196 break;
1197 case AF9013_TUNER_MC44S803:
1198 len = ARRAY_SIZE(tuner_init_mc44s803);
1199 init = tuner_init_mc44s803;
1200 break;
1201 case AF9013_TUNER_QT1010:
1202 case AF9013_TUNER_QT1010A:
1203 len = ARRAY_SIZE(tuner_init_qt1010);
1204 init = tuner_init_qt1010;
1205 break;
1206 case AF9013_TUNER_MT2060_2:
1207 len = ARRAY_SIZE(tuner_init_mt2060_2);
1208 init = tuner_init_mt2060_2;
1209 break;
1210 case AF9013_TUNER_TDA18271:
2158e509 1211 case AF9013_TUNER_TDA18218:
825b9670
AP		 1212 len = ARRAY_SIZE(tuner_init_tda18271);
1213 init = tuner_init_tda18271;
1214 break;
1215 case AF9013_TUNER_UNKNOWN:
1216 default:
1217 len = ARRAY_SIZE(tuner_init_unknown);
1218 init = tuner_init_unknown;
1219 break;
1220 }
1221
1222 for (i = 0; i < len; i++) {
f571e004 1223 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
825b9670
AP		 1224 init[i].len, init[i].val);
1225 if (ret)
f571e004 1226 goto err;
825b9670
AP		 1227 }
1228
f571e004
AP		 1229 /* TS mode */
1230 ret = af9013_wr_reg_bits(state, 0xd500, 1, 2, state->config.ts_mode);
825b9670 1231 if (ret)
f571e004 1232 goto err;
825b9670
AP		 1233
1234 /* enable lock led */
f571e004 1235 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 1);
825b9670 1236 if (ret)
f571e004 1237 goto err;
825b9670 1238
f571e004
AP		 1239 /* check if we support signal strength */
1240 if (!state->signal_strength_en) {
1241 ret = af9013_rd_reg_bits(state, 0x9bee, 0, 1,
1242 &state->signal_strength_en);
1243 if (ret)
1244 goto err;
1245 }
9e35cd22 1246
f571e004
AP		 1247 /* read values needed for signal strength calculation */
1248 if (state->signal_strength_en && !state->rf_50) {
1249 ret = af9013_rd_reg(state, 0x9bbd, &state->rf_50);
9e35cd22 1250 if (ret)
f571e004
AP		 1251 goto err;
1252
1253 ret = af9013_rd_reg(state, 0x9bd0, &state->rf_80);
9e35cd22 1254 if (ret)
f571e004
AP		 1255 goto err;
1256
1257 ret = af9013_rd_reg(state, 0x9be2, &state->if_50);
9e35cd22 1258 if (ret)
f571e004
AP		 1259 goto err;
1260
1261 ret = af9013_rd_reg(state, 0x9be4, &state->if_80);
9e35cd22 1262 if (ret)
f571e004 1263 goto err;
9e35cd22
AP		 1264 }
1265
f571e004
AP		 1266 /* SNR */
1267 ret = af9013_wr_reg(state, 0xd2e2, 1);
1268 if (ret)
1269 goto err;
1270
1271 /* BER / UCB */
1272 buf[0] = (10000 >> 0) & 0xff;
1273 buf[1] = (10000 >> 8) & 0xff;
1274 ret = af9013_wr_regs(state, 0xd385, buf, 2);
1275 if (ret)
1276 goto err;
1277
1278 /* enable FEC monitor */
1279 ret = af9013_wr_reg_bits(state, 0xd392, 1, 1, 1);
1280 if (ret)
1281 goto err;
1282
1283 state->first_tune = true;
1284 schedule_delayed_work(&state->statistics_work, msecs_to_jiffies(400));
1285
1286 return ret;
1287err:
8df379c5 1288 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP		 1289 return ret;
1290}
1291
1292static int af9013_sleep(struct dvb_frontend *fe)
1293{
1294 struct af9013_state *state = fe->demodulator_priv;
1295 int ret;
1296
8df379c5 1297 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP		 1298
1299 /* stop statistics polling */
1300 cancel_delayed_work_sync(&state->statistics_work);
1301
1302 /* disable lock led */
1303 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 0);
1304 if (ret)
1305 goto err;
1306
1307 /* power off */
1308 ret = af9013_power_ctrl(state, 0);
1309 if (ret)
1310 goto err;
1311
1312 return ret;
1313err:
8df379c5 1314 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP		 1315 return ret;
1316}
1317
1318static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
1319{
1320 int ret;
1321 struct af9013_state *state = fe->demodulator_priv;
1322
8df379c5 1323 dev_dbg(&state->i2c->dev, "%s: enable=%d\n", __func__, enable);
f571e004
AP		 1324
1325 /* gate already open or close */
1326 if (state->i2c_gate_state == enable)
1327 return 0;
1328
1329 if (state->config.ts_mode == AF9013_TS_USB)
1330 ret = af9013_wr_reg_bits(state, 0xd417, 3, 1, enable);
1331 else
1332 ret = af9013_wr_reg_bits(state, 0xd607, 2, 1, enable);
1333 if (ret)
1334 goto err;
1335
1336 state->i2c_gate_state = enable;
1337
1338 return ret;
1339err:
8df379c5 1340 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP		 1341 return ret;
1342}
1343
f571e004
AP		 1344static void af9013_release(struct dvb_frontend *fe)
1345{
1346 struct af9013_state *state = fe->demodulator_priv;
631c694f
EMW		 1347
1348 /* stop statistics polling */
1349 cancel_delayed_work_sync(&state->statistics_work);
1350
f571e004
AP		 1351 kfree(state);
1352}
1353
825b9670
AP		 1354static struct dvb_frontend_ops af9013_ops;
1355
1356static int af9013_download_firmware(struct af9013_state *state)
1357{
6ed9d560 1358 int i, len, remaining, ret;
825b9670 1359 const struct firmware *fw;
825b9670
AP		 1360 u16 checksum = 0;
1361 u8 val;
1362 u8 fw_params[4];
a71103a6 1363 u8 *fw_file = AF9013_FIRMWARE;
825b9670
AP		 1364
1365 msleep(100);
1366 /* check whether firmware is already running */
f571e004 1367 ret = af9013_rd_reg(state, 0x98be, &val);
825b9670 1368 if (ret)
f571e004 1369 goto err;
825b9670 1370 else
8df379c5
AP		 1371 dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n",
1372 __func__, val);
825b9670
AP		 1373
1374 if (val == 0x0c) /* fw is running, no need for download */
1375 goto exit;
1376
8df379c5
AP		 1377 dev_info(&state->i2c->dev, "%s: found a '%s' in cold state, will try " \
1378 "to load a firmware\n",
1379 KBUILD_MODNAME, af9013_ops.info.name);
825b9670
AP		 1380
1381 /* request the firmware, this will block and timeout */
e9785250 1382 ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
825b9670 1383 if (ret) {
8df379c5
AP		 1384 dev_info(&state->i2c->dev, "%s: did not find the firmware " \
1385 "file. (%s) Please see linux/Documentation/dvb/ for " \
1386 "more details on firmware-problems. (%d)\n",
1387 KBUILD_MODNAME, fw_file, ret);
f571e004 1388 goto err;
825b9670
AP		 1389 }
1390
8df379c5
AP		 1391 dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s'\n",
1392 KBUILD_MODNAME, fw_file);
825b9670
AP		 1393
1394 /* calc checksum */
1395 for (i = 0; i < fw->size; i++)
1396 checksum += fw->data[i];
1397
1398 fw_params[0] = checksum >> 8;
1399 fw_params[1] = checksum & 0xff;
1400 fw_params[2] = fw->size >> 8;
1401 fw_params[3] = fw->size & 0xff;
1402
1403 /* write fw checksum & size */
1404 ret = af9013_write_ofsm_regs(state, 0x50fc,
1405 fw_params, sizeof(fw_params));
1406 if (ret)
f571e004 1407 goto err_release;
825b9670 1408
6ed9d560
AP		 1409 #define FW_ADDR 0x5100 /* firmware start address */
1410 #define LEN_MAX 16 /* max packet size */
1411 for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) {
1412 len = remaining;
1413 if (len > LEN_MAX)
1414 len = LEN_MAX;
825b9670 1415
6ed9d560
AP		 1416 ret = af9013_write_ofsm_regs(state,
1417 FW_ADDR + fw->size - remaining,
1418 (u8 *) &fw->data[fw->size - remaining], len);
825b9670 1419 if (ret) {
8df379c5
AP		 1420 dev_err(&state->i2c->dev,
1421 "%s: firmware download failed=%d\n",
1422 KBUILD_MODNAME, ret);
f571e004 1423 goto err_release;
825b9670
AP		 1424 }
1425 }
1426
825b9670 1427 /* request boot firmware */
f571e004 1428 ret = af9013_wr_reg(state, 0xe205, 1);
825b9670 1429 if (ret)
f571e004 1430 goto err_release;
825b9670
AP		 1431
1432 for (i = 0; i < 15; i++) {
1433 msleep(100);
1434
1435 /* check firmware status */
f571e004 1436 ret = af9013_rd_reg(state, 0x98be, &val);
825b9670 1437 if (ret)
f571e004 1438 goto err_release;
825b9670 1439
8df379c5
AP		 1440 dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n",
1441 __func__, val);
825b9670
AP		 1442
1443 if (val == 0x0c || val == 0x04) /* success or fail */
1444 break;
1445 }
1446
1447 if (val == 0x04) {
8df379c5
AP		 1448 dev_err(&state->i2c->dev, "%s: firmware did not run\n",
1449 KBUILD_MODNAME);
f571e004 1450 ret = -ENODEV;
825b9670 1451 } else if (val != 0x0c) {
8df379c5
AP		 1452 dev_err(&state->i2c->dev, "%s: firmware boot timeout\n",
1453 KBUILD_MODNAME);
f571e004 1454 ret = -ENODEV;
825b9670
AP		 1455 }
1456
f571e004 1457err_release:
825b9670 1458 release_firmware(fw);
f571e004 1459err:
825b9670
AP		 1460exit:
1461 if (!ret)
8df379c5
AP		 1462 dev_info(&state->i2c->dev, "%s: found a '%s' in warm state\n",
1463 KBUILD_MODNAME, af9013_ops.info.name);
825b9670
AP		 1464 return ret;
1465}
1466
825b9670
AP		 1467struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1468 struct i2c_adapter *i2c)
1469{
1470 int ret;
1471 struct af9013_state *state = NULL;
ce99efa5 1472 u8 buf[4], i;
825b9670
AP		 1473
1474 /* allocate memory for the internal state */
1475 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
1476 if (state == NULL)
f571e004 1477 goto err;
825b9670
AP		 1478
1479 /* setup the state */
1480 state->i2c = i2c;
1481 memcpy(&state->config, config, sizeof(struct af9013_config));
1482
825b9670 1483 /* download firmware */
f571e004 1484 if (state->config.ts_mode != AF9013_TS_USB) {
825b9670
AP		 1485 ret = af9013_download_firmware(state);
1486 if (ret)
f571e004 1487 goto err;
825b9670
AP		 1488 }
1489
1490 /* firmware version */
f571e004 1491 ret = af9013_rd_regs(state, 0x5103, buf, 4);
109a2990 1492 if (ret)
f571e004 1493 goto err;
109a2990 1494
8df379c5
AP		 1495 dev_info(&state->i2c->dev, "%s: firmware version %d.%d.%d.%d\n",
1496 KBUILD_MODNAME, buf[0], buf[1], buf[2], buf[3]);
825b9670
AP		 1497
1498 /* set GPIOs */
1499 for (i = 0; i < sizeof(state->config.gpio); i++) {
1500 ret = af9013_set_gpio(state, i, state->config.gpio[i]);
1501 if (ret)
f571e004 1502 goto err;
825b9670
AP		 1503 }
1504
1505 /* create dvb_frontend */
f571e004 1506 memcpy(&state->fe.ops, &af9013_ops,
825b9670 1507 sizeof(struct dvb_frontend_ops));
f571e004
AP		 1508 state->fe.demodulator_priv = state;
1509
1510 INIT_DELAYED_WORK(&state->statistics_work, af9013_statistics_work);
825b9670 1511
f571e004
AP		 1512 return &state->fe;
1513err:
825b9670
AP		 1514 kfree(state);
1515 return NULL;
1516}
1517EXPORT_SYMBOL(af9013_attach);
1518
1519static struct dvb_frontend_ops af9013_ops = {
59d3cc19 1520 .delsys = { SYS_DVBT },
825b9670 1521 .info = {
f571e004 1522 .name = "Afatech AF9013",
825b9670
AP		 1523 .frequency_min = 174000000,
1524 .frequency_max = 862000000,
1525 .frequency_stepsize = 250000,
1526 .frequency_tolerance = 0,
f571e004
AP		 1527 .caps = FE_CAN_FEC_1_2 |
1528 FE_CAN_FEC_2_3 |
1529 FE_CAN_FEC_3_4 |
1530 FE_CAN_FEC_5_6 |
1531 FE_CAN_FEC_7_8 |
1532 FE_CAN_FEC_AUTO |
1533 FE_CAN_QPSK |
1534 FE_CAN_QAM_16 |
1535 FE_CAN_QAM_64 |
1536 FE_CAN_QAM_AUTO |
825b9670
AP		 1537 FE_CAN_TRANSMISSION_MODE_AUTO |
1538 FE_CAN_GUARD_INTERVAL_AUTO |
1539 FE_CAN_HIERARCHY_AUTO |
1540 FE_CAN_RECOVER |
1541 FE_CAN_MUTE_TS
1542 },
1543
1544 .release = af9013_release,
f571e004 1545
825b9670
AP		 1546 .init = af9013_init,
1547 .sleep = af9013_sleep,
825b9670 1548
f571e004 1549 .get_tune_settings = af9013_get_tune_settings,
59d3cc19
MCC		 1550 .set_frontend = af9013_set_frontend,
1551 .get_frontend = af9013_get_frontend,
825b9670 1552
825b9670 1553 .read_status = af9013_read_status,
825b9670 1554 .read_snr = af9013_read_snr,
f571e004
AP		 1555 .read_signal_strength = af9013_read_signal_strength,
1556 .read_ber = af9013_read_ber,
825b9670 1557 .read_ucblocks = af9013_read_ucblocks,
825b9670 1558
f571e004
AP		 1559 .i2c_gate_ctrl = af9013_i2c_gate_ctrl,
1560};
825b9670
AP		 1561
1562MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1563MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
1564MODULE_LICENSE("GPL");
a71103a6 1565MODULE_FIRMWARE(AF9013_FIRMWARE);
Linux 6.x block layer and io_uring tree(s)