cleancache: constify cleancache_ops structure
[linux-2.6-block.git] / drivers / iommu / Kconfig
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1# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
b10f127e 4
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5menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
e5144c93 7 depends on MMU
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8 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
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17menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
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23config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
ffcb6d16 26 depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST)
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27 help
28 Enable support for the ARM long descriptor pagetable format.
29 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
30 sizes at both stage-1 and stage-2, as well as address spaces
31 up to 48-bits in size.
32
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33config IOMMU_IO_PGTABLE_LPAE_SELFTEST
34 bool "LPAE selftests"
35 depends on IOMMU_IO_PGTABLE_LPAE
36 help
37 Enable self-tests for LPAE page table allocator. This performs
38 a series of page-table consistency checks during boot.
39
40 If unsure, say N here.
41
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42endmenu
43
114150d8 44config IOMMU_IOVA
15bbdec3 45 tristate
114150d8 46
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47config OF_IOMMU
48 def_bool y
7eba1d51 49 depends on OF && IOMMU_API
4e0ee78f 50
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51# IOMMU-agnostic DMA-mapping layer
52config IOMMU_DMA
53 bool
54 depends on NEED_SG_DMA_LENGTH
55 select IOMMU_API
56 select IOMMU_IOVA
57
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58config FSL_PAMU
59 bool "Freescale IOMMU support"
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60 depends on PPC32
61 depends on PPC_E500MC || COMPILE_TEST
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62 select IOMMU_API
63 select GENERIC_ALLOCATOR
64 help
65 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
66 PAMU can authorize memory access, remap the memory address, and remap I/O
67 transaction types.
68
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69# MSM IOMMU support
70config MSM_IOMMU
71 bool "MSM IOMMU Support"
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72 depends on ARM
73 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
a3f447a4 74 depends on BROKEN
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75 select IOMMU_API
76 help
77 Support for the IOMMUs found on certain Qualcomm SOCs.
78 These IOMMUs allow virtualization of the address space used by most
79 cores within the multimedia subsystem.
80
81 If unsure, say N here.
82
83config IOMMU_PGTABLES_L2
84 def_bool y
85 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
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86
87# AMD IOMMU support
88config AMD_IOMMU
89 bool "AMD IOMMU support"
90 select SWIOTLB
91 select PCI_MSI
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92 select PCI_ATS
93 select PCI_PRI
94 select PCI_PASID
29b68415 95 select IOMMU_API
0dbc6078 96 depends on X86_64 && PCI && ACPI
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97 ---help---
98 With this option you can enable support for AMD IOMMU hardware in
99 your system. An IOMMU is a hardware component which provides
100 remapping of DMA memory accesses from devices. With an AMD IOMMU you
59bf8964 101 can isolate the DMA memory of different devices and protect the
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102 system from misbehaving device drivers or hardware.
103
104 You can find out if your system has an AMD IOMMU if you look into
105 your BIOS for an option to enable it or if you have an IVRS ACPI
106 table.
107
108config AMD_IOMMU_STATS
109 bool "Export AMD IOMMU statistics to debugfs"
110 depends on AMD_IOMMU
111 select DEBUG_FS
112 ---help---
113 This option enables code in the AMD IOMMU driver to collect various
114 statistics about whats happening in the driver and exports that
115 information to userspace via debugfs.
116 If unsure, say N.
166e9278 117
e3c495c7 118config AMD_IOMMU_V2
a446e219 119 tristate "AMD IOMMU Version 2 driver"
e5cac32c 120 depends on AMD_IOMMU
8736b2c3 121 select MMU_NOTIFIER
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122 ---help---
123 This option enables support for the AMD IOMMUv2 features of the IOMMU
124 hardware. Select this option if you want to use devices that support
59bf8964 125 the PCI PRI and PASID interface.
e3c495c7 126
166e9278 127# Intel IOMMU support
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128config DMAR_TABLE
129 bool
130
131config INTEL_IOMMU
132 bool "Support for Intel IOMMU using DMA Remapping Devices"
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133 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
134 select IOMMU_API
114150d8 135 select IOMMU_IOVA
d3f13810 136 select DMAR_TABLE
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137 help
138 DMA remapping (DMAR) devices support enables independent address
139 translations for Direct Memory Access (DMA) from devices.
140 These DMA remapping devices are reported via ACPI tables
141 and include PCI device scope covered by these DMA
142 remapping devices.
143
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144config INTEL_IOMMU_SVM
145 bool "Support for Shared Virtual Memory with Intel IOMMU"
146 depends on INTEL_IOMMU && X86
b16d0cb9 147 select PCI_PASID
2f26e0a9 148 select MMU_NOTIFIER
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149 help
150 Shared Virtual Memory (SVM) provides a facility for devices
151 to access DMA resources through process address space by
152 means of a Process Address Space ID (PASID).
153
d3f13810 154config INTEL_IOMMU_DEFAULT_ON
166e9278 155 def_bool y
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156 prompt "Enable Intel DMA Remapping Devices by default"
157 depends on INTEL_IOMMU
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158 help
159 Selecting this option will enable a DMAR device at boot time if
160 one is found. If this option is not selected, DMAR support can
161 be enabled by passing intel_iommu=on to the kernel.
162
d3f13810 163config INTEL_IOMMU_BROKEN_GFX_WA
166e9278 164 bool "Workaround broken graphics drivers (going away soon)"
d3f13810 165 depends on INTEL_IOMMU && BROKEN && X86
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166 ---help---
167 Current Graphics drivers tend to use physical address
168 for DMA and avoid using DMA APIs. Setting this config
169 option permits the IOMMU driver to set a unity map for
170 all the OS-visible memory. Hence the driver can continue
171 to use physical addresses for DMA, at least until this
172 option is removed in the 2.6.32 kernel.
173
d3f13810 174config INTEL_IOMMU_FLOPPY_WA
166e9278 175 def_bool y
d3f13810 176 depends on INTEL_IOMMU && X86
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177 ---help---
178 Floppy disk drivers are known to bypass DMA API calls
179 thereby failing to work when IOMMU is enabled. This
180 workaround will setup a 1:1 mapping for the first
181 16MiB to make floppy (an ISA device) work.
182
d3f13810 183config IRQ_REMAP
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184 bool "Support for Interrupt Remapping"
185 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
d3f13810 186 select DMAR_TABLE
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187 ---help---
188 Supports Interrupt remapping for IO-APIC and MSI devices.
189 To use x2apic mode in the CPU's which support x2APIC enhancements or
190 to support platforms with CPU's having > 8 bit APIC ID, say Y.
68255b62 191
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192# OMAP IOMMU support
193config OMAP_IOMMU
194 bool "OMAP IOMMU Support"
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195 depends on ARM && MMU
196 depends on ARCH_OMAP2PLUS || COMPILE_TEST
fcf3a6ef 197 select IOMMU_API
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198 ---help---
199 The OMAP3 media platform drivers depend on iommu support,
200 if you need them say Y here.
fcf3a6ef 201
fcf3a6ef 202config OMAP_IOMMU_DEBUG
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203 bool "Export OMAP IOMMU internals in DebugFS"
204 depends on OMAP_IOMMU && DEBUG_FS
205 ---help---
206 Select this to see extensive information about
207 the internal state of OMAP IOMMU in debugfs.
fcf3a6ef 208
61c75352 209 Say N unless you know you need this.
fcf3a6ef 210
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211config ROCKCHIP_IOMMU
212 bool "Rockchip IOMMU Support"
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213 depends on ARM
214 depends on ARCH_ROCKCHIP || COMPILE_TEST
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215 select IOMMU_API
216 select ARM_DMA_USE_IOMMU
217 help
218 Support for IOMMUs found on Rockchip rk32xx SOCs.
219 These IOMMUs allow virtualization of the address space used by most
220 cores within the multimedia subsystem.
221 Say Y here if you are using a Rockchip SoC that includes an IOMMU
222 device.
fcf3a6ef 223
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224config TEGRA_IOMMU_GART
225 bool "Tegra GART IOMMU Support"
226 depends on ARCH_TEGRA_2x_SOC
227 select IOMMU_API
228 help
229 Enables support for remapping discontiguous physical memory
230 shared with the operating system into contiguous I/O virtual
231 space through the GART (Graphics Address Relocation Table)
232 hardware included on Tegra SoCs.
233
7a31f6f4 234config TEGRA_IOMMU_SMMU
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235 bool "NVIDIA Tegra SMMU Support"
236 depends on ARCH_TEGRA
237 depends on TEGRA_AHB
238 depends on TEGRA_MC
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239 select IOMMU_API
240 help
89184651 241 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
588c43a7 242 SoCs (Tegra30 up to Tegra210).
7a31f6f4 243
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244config EXYNOS_IOMMU
245 bool "Exynos IOMMU Support"
e5144c93 246 depends on ARCH_EXYNOS && ARM && MMU
2a96536e 247 select IOMMU_API
4802c1d0 248 select ARM_DMA_USE_IOMMU
2a96536e 249 help
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250 Support for the IOMMU (System MMU) of Samsung Exynos application
251 processor family. This enables H/W multimedia accelerators to see
252 non-linear physical memory chunks as linear memory in their
253 address space.
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254
255 If unsure, say N here.
256
257config EXYNOS_IOMMU_DEBUG
258 bool "Debugging log for Exynos IOMMU"
259 depends on EXYNOS_IOMMU
260 help
261 Select this to see the detailed log message that shows what
5455d700 262 happens in the IOMMU driver.
2a96536e 263
5455d700 264 Say N unless you need kernel log message for IOMMU debugging.
2a96536e 265
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266config SHMOBILE_IPMMU
267 bool
268
269config SHMOBILE_IPMMU_TLB
270 bool
271
272config SHMOBILE_IOMMU
273 bool "IOMMU for Renesas IPMMU/IPMMUI"
274 default n
e5144c93 275 depends on ARM && MMU
b8354439 276 depends on ARCH_SHMOBILE || COMPILE_TEST
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277 select IOMMU_API
278 select ARM_DMA_USE_IOMMU
279 select SHMOBILE_IPMMU
280 select SHMOBILE_IPMMU_TLB
281 help
282 Support for Renesas IPMMU/IPMMUI. This option enables
283 remapping of DMA memory accesses from all of the IP blocks
284 on the ICB.
285
286 Warning: Drivers (including userspace drivers of UIO
287 devices) of the IP blocks on the ICB *must* use addresses
288 allocated from the IPMMU (iova) for DMA with this option
289 enabled.
290
291 If unsure, say N.
292
293choice
294 prompt "IPMMU/IPMMUI address space size"
295 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
296 depends on SHMOBILE_IOMMU
297 help
298 This option sets IPMMU/IPMMUI address space size by
299 adjusting the 1st level page table size. The page table size
300 is calculated as follows:
301
302 page table size = number of page table entries * 4 bytes
303 number of page table entries = address space size / 1 MiB
304
305 For example, when the address space size is 2048 MiB, the
306 1st level page table size is 8192 bytes.
307
308 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
309 bool "2 GiB"
310
311 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
312 bool "1 GiB"
313
314 config SHMOBILE_IOMMU_ADDRSIZE_512MB
315 bool "512 MiB"
316
317 config SHMOBILE_IOMMU_ADDRSIZE_256MB
318 bool "256 MiB"
319
320 config SHMOBILE_IOMMU_ADDRSIZE_128MB
321 bool "128 MiB"
322
323 config SHMOBILE_IOMMU_ADDRSIZE_64MB
324 bool "64 MiB"
325
326 config SHMOBILE_IOMMU_ADDRSIZE_32MB
327 bool "32 MiB"
328
329endchoice
330
331config SHMOBILE_IOMMU_L1SIZE
332 int
333 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
334 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
335 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
336 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
337 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
338 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
339 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
340
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341config IPMMU_VMSA
342 bool "Renesas VMSA-compatible IPMMU"
343 depends on ARM_LPAE
344 depends on ARCH_SHMOBILE || COMPILE_TEST
345 select IOMMU_API
f20ed39f 346 select IOMMU_IO_PGTABLE_LPAE
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347 select ARM_DMA_USE_IOMMU
348 help
349 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
350 R-Mobile APE6 and R-Car H2/M2 SoCs.
351
352 If unsure, say N.
353
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354config SPAPR_TCE_IOMMU
355 bool "sPAPR TCE IOMMU Support"
5b25199e 356 depends on PPC_POWERNV || PPC_PSERIES
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357 select IOMMU_API
358 help
359 Enables bits of IOMMU API required by VFIO. The iommu_ops
360 is not implemented as it is not necessary for VFIO.
361
48ec83bc 362# ARM IOMMU support
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363config ARM_SMMU
364 bool "ARM Ltd. System MMU (SMMU) Support"
a20cc76b 365 depends on (ARM64 || ARM) && MMU
45ae7cff 366 select IOMMU_API
518f7136 367 select IOMMU_IO_PGTABLE_LPAE
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368 select ARM_DMA_USE_IOMMU if ARM
369 help
370 Support for implementations of the ARM System MMU architecture
518f7136 371 versions 1 and 2.
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372
373 Say Y here if your SoC includes an IOMMU device implementing
374 the ARM SMMU architecture.
375
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376config ARM_SMMU_V3
377 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
378 depends on ARM64 && PCI
379 select IOMMU_API
380 select IOMMU_IO_PGTABLE_LPAE
166bdbd2 381 select GENERIC_MSI_IRQ_DOMAIN
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382 help
383 Support for implementations of the ARM System MMU architecture
384 version 3 providing translation support to a PCIe root complex.
385
386 Say Y here if your system includes an IOMMU device implementing
387 the ARM SMMUv3 architecture.
388
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389config S390_IOMMU
390 def_bool y if S390 && PCI
391 depends on S390 && PCI
392 select IOMMU_API
393 help
394 Support for the IOMMU API for s390 PCI devices.
395
68255b62 396endif # IOMMU_SUPPORT