net: remove NETIF_F_NO_CSUM feature bit
[linux-2.6-block.git] / drivers / infiniband / hw / nes / nes_nic.c
CommitLineData
3c2d774c 1/*
fa6c87d5 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3c2d774c
GS
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/netdevice.h>
37#include <linux/etherdevice.h>
38#include <linux/ip.h>
39#include <linux/tcp.h>
40#include <linux/if_arp.h>
41#include <linux/if_vlan.h>
42#include <linux/ethtool.h>
5a0e3ad6 43#include <linux/slab.h>
3c2d774c
GS
44#include <net/tcp.h>
45
46#include <net/inet_common.h>
47#include <linux/inet.h>
48
49#include "nes.h"
50
51static struct nic_qp_map nic_qp_mapping_0[] = {
52 {16,0,0,1},{24,4,0,0},{28,8,0,0},{32,12,0,0},
53 {20,2,2,1},{26,6,2,0},{30,10,2,0},{34,14,2,0},
54 {18,1,1,1},{25,5,1,0},{29,9,1,0},{33,13,1,0},
55 {22,3,3,1},{27,7,3,0},{31,11,3,0},{35,15,3,0}
56};
57
58static struct nic_qp_map nic_qp_mapping_1[] = {
59 {18,1,1,1},{25,5,1,0},{29,9,1,0},{33,13,1,0},
60 {22,3,3,1},{27,7,3,0},{31,11,3,0},{35,15,3,0}
61};
62
63static struct nic_qp_map nic_qp_mapping_2[] = {
64 {20,2,2,1},{26,6,2,0},{30,10,2,0},{34,14,2,0}
65};
66
67static struct nic_qp_map nic_qp_mapping_3[] = {
68 {22,3,3,1},{27,7,3,0},{31,11,3,0},{35,15,3,0}
69};
70
71static struct nic_qp_map nic_qp_mapping_4[] = {
72 {28,8,0,0},{32,12,0,0}
73};
74
75static struct nic_qp_map nic_qp_mapping_5[] = {
76 {29,9,1,0},{33,13,1,0}
77};
78
79static struct nic_qp_map nic_qp_mapping_6[] = {
80 {30,10,2,0},{34,14,2,0}
81};
82
83static struct nic_qp_map nic_qp_mapping_7[] = {
84 {31,11,3,0},{35,15,3,0}
85};
86
87static struct nic_qp_map *nic_qp_mapping_per_function[] = {
88 nic_qp_mapping_0, nic_qp_mapping_1, nic_qp_mapping_2, nic_qp_mapping_3,
89 nic_qp_mapping_4, nic_qp_mapping_5, nic_qp_mapping_6, nic_qp_mapping_7
90};
91
92static const u32 default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
93 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
94static int debug = -1;
7e36d3d7 95static int nics_per_function = 1;
3c2d774c 96
3c2d774c
GS
97/**
98 * nes_netdev_poll
99 */
100static int nes_netdev_poll(struct napi_struct *napi, int budget)
101{
102 struct nes_vnic *nesvnic = container_of(napi, struct nes_vnic, napi);
3c2d774c
GS
103 struct nes_device *nesdev = nesvnic->nesdev;
104 struct nes_hw_nic_cq *nescq = &nesvnic->nic_cq;
105
106 nesvnic->budget = budget;
107 nescq->cqes_pending = 0;
108 nescq->rx_cqes_completed = 0;
109 nescq->cqe_allocs_pending = 0;
110 nescq->rx_pkts_indicated = 0;
111
112 nes_nic_ce_handler(nesdev, nescq);
113
114 if (nescq->cqes_pending == 0) {
288379f0 115 napi_complete(napi);
3c2d774c
GS
116 /* clear out completed cqes and arm */
117 nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
118 nescq->cq_number | (nescq->cqe_allocs_pending << 16));
119 nes_read32(nesdev->regs+NES_CQE_ALLOC);
120 } else {
121 /* clear out completed cqes but don't arm */
122 nes_write32(nesdev->regs+NES_CQE_ALLOC,
123 nescq->cq_number | (nescq->cqe_allocs_pending << 16));
124 nes_debug(NES_DBG_NETDEV, "%s: exiting with work pending\n",
125 nesvnic->netdev->name);
126 }
127 return nescq->rx_pkts_indicated;
128}
129
130
131/**
132 * nes_netdev_open - Activate the network interface; ifconfig
133 * ethx up.
134 */
135static int nes_netdev_open(struct net_device *netdev)
136{
137 u32 macaddr_low;
138 u16 macaddr_high;
139 struct nes_vnic *nesvnic = netdev_priv(netdev);
140 struct nes_device *nesdev = nesvnic->nesdev;
141 int ret;
142 int i;
11e0704b 143 struct nes_vnic *first_nesvnic = NULL;
3c2d774c
GS
144 u32 nic_active_bit;
145 u32 nic_active;
11e0704b 146 struct list_head *list_pos, *list_temp;
ea623455 147 unsigned long flags;
3c2d774c
GS
148
149 assert(nesdev != NULL);
150
11e0704b
GS
151 if (nesvnic->netdev_open == 1)
152 return 0;
3c2d774c
GS
153
154 if (netif_msg_ifup(nesvnic))
155 printk(KERN_INFO PFX "%s: enabling interface\n", netdev->name);
156
157 ret = nes_init_nic_qp(nesdev, netdev);
158 if (ret) {
159 return ret;
160 }
161
162 netif_carrier_off(netdev);
163 netif_stop_queue(netdev);
164
165 if ((!nesvnic->of_device_registered) && (nesvnic->rdma_enabled)) {
166 nesvnic->nesibdev = nes_init_ofa_device(netdev);
167 if (nesvnic->nesibdev == NULL) {
168 printk(KERN_ERR PFX "%s: nesvnic->nesibdev alloc failed", netdev->name);
169 } else {
170 nesvnic->nesibdev->nesvnic = nesvnic;
171 ret = nes_register_ofa_device(nesvnic->nesibdev);
172 if (ret) {
173 printk(KERN_ERR PFX "%s: Unable to register RDMA device, ret = %d\n",
174 netdev->name, ret);
175 }
176 }
177 }
178 /* Set packet filters */
179 nic_active_bit = 1 << nesvnic->nic_index;
180 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_ACTIVE);
181 nic_active |= nic_active_bit;
182 nes_write_indexed(nesdev, NES_IDX_NIC_ACTIVE, nic_active);
183 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ENABLE);
184 nic_active |= nic_active_bit;
185 nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ENABLE, nic_active);
186 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON);
187 nic_active |= nic_active_bit;
188 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active);
189
7495ab68 190 macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
3c2d774c 191 macaddr_high += (u16)netdev->dev_addr[1];
7495ab68
GS
192
193 macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
194 macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
195 macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
196 macaddr_low += (u32)netdev->dev_addr[5];
3c2d774c
GS
197
198 /* Program the various MAC regs */
199 for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
200 if (nesvnic->qp_nic_index[i] == 0xf) {
201 break;
202 }
203 nes_debug(NES_DBG_NETDEV, "i=%d, perfect filter table index= %d, PERF FILTER LOW"
204 " (Addr:%08X) = %08X, HIGH = %08X.\n",
205 i, nesvnic->qp_nic_index[i],
7e36d3d7
VM
206 NES_IDX_PERFECT_FILTER_LOW+
207 (nesvnic->qp_nic_index[i] * 8),
3c2d774c
GS
208 macaddr_low,
209 (u32)macaddr_high | NES_MAC_ADDR_VALID |
210 ((((u32)nesvnic->nic_index) << 16)));
211 nes_write_indexed(nesdev,
212 NES_IDX_PERFECT_FILTER_LOW + (nesvnic->qp_nic_index[i] * 8),
213 macaddr_low);
214 nes_write_indexed(nesdev,
215 NES_IDX_PERFECT_FILTER_HIGH + (nesvnic->qp_nic_index[i] * 8),
216 (u32)macaddr_high | NES_MAC_ADDR_VALID |
217 ((((u32)nesvnic->nic_index) << 16)));
218 }
219
220
221 nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
222 nesvnic->nic_cq.cq_number);
223 nes_read32(nesdev->regs+NES_CQE_ALLOC);
11e0704b
GS
224 list_for_each_safe(list_pos, list_temp, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]) {
225 first_nesvnic = container_of(list_pos, struct nes_vnic, list);
226 if (first_nesvnic->netdev_open == 1)
227 break;
228 }
229 if (first_nesvnic->netdev_open == 0) {
230 nes_debug(NES_DBG_INIT, "Setting up MAC interrupt mask.\n");
231 nes_write_indexed(nesdev, NES_IDX_MAC_INT_MASK + (0x200 * nesdev->mac_index),
232 ~(NES_MAC_INT_LINK_STAT_CHG | NES_MAC_INT_XGMII_EXT |
233 NES_MAC_INT_TX_UNDERFLOW | NES_MAC_INT_TX_ERROR));
234 first_nesvnic = nesvnic;
235 }
cd6860eb 236
3c2d774c
GS
237 if (first_nesvnic->linkup) {
238 /* Enable network packets */
239 nesvnic->linkup = 1;
240 netif_start_queue(netdev);
241 netif_carrier_on(netdev);
242 }
ea623455 243
843276ad
MS
244 spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags);
245 if (nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_SFP_D) {
246 if (nesdev->link_recheck)
247 cancel_delayed_work(&nesdev->work);
248 nesdev->link_recheck = 1;
249 schedule_delayed_work(&nesdev->work, NES_LINK_RECHECK_DELAY);
250 }
251 spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
252
ea623455
MS
253 spin_lock_irqsave(&nesvnic->port_ibevent_lock, flags);
254 if (nesvnic->of_device_registered) {
255 nesdev->nesadapter->send_term_ok = 1;
256 if (nesvnic->linkup == 1) {
257 if (nesdev->iw_status == 0) {
258 nesdev->iw_status = 1;
259 nes_port_ibevent(nesvnic);
260 }
261 } else {
262 nesdev->iw_status = 0;
263 }
264 }
265 spin_unlock_irqrestore(&nesvnic->port_ibevent_lock, flags);
266
3c2d774c
GS
267 napi_enable(&nesvnic->napi);
268 nesvnic->netdev_open = 1;
269
270 return 0;
271}
272
273
274/**
275 * nes_netdev_stop
276 */
277static int nes_netdev_stop(struct net_device *netdev)
278{
279 struct nes_vnic *nesvnic = netdev_priv(netdev);
280 struct nes_device *nesdev = nesvnic->nesdev;
281 u32 nic_active_mask;
282 u32 nic_active;
11e0704b
GS
283 struct nes_vnic *first_nesvnic = NULL;
284 struct list_head *list_pos, *list_temp;
ea623455 285 unsigned long flags;
3c2d774c
GS
286
287 nes_debug(NES_DBG_SHUTDOWN, "nesvnic=%p, nesdev=%p, netdev=%p %s\n",
288 nesvnic, nesdev, netdev, netdev->name);
289 if (nesvnic->netdev_open == 0)
290 return 0;
291
292 if (netif_msg_ifdown(nesvnic))
293 printk(KERN_INFO PFX "%s: disabling interface\n", netdev->name);
52106bd2 294 netif_carrier_off(netdev);
3c2d774c
GS
295
296 /* Disable network packets */
297 napi_disable(&nesvnic->napi);
298 netif_stop_queue(netdev);
11e0704b
GS
299 list_for_each_safe(list_pos, list_temp, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]) {
300 first_nesvnic = container_of(list_pos, struct nes_vnic, list);
301 if ((first_nesvnic->netdev_open == 1) && (first_nesvnic != nesvnic))
302 break;
303 }
304
068e80de
CT
305 if ((first_nesvnic->netdev_open == 1) && (first_nesvnic != nesvnic) &&
306 (PCI_FUNC(first_nesvnic->nesdev->pcidev->devfn) !=
307 PCI_FUNC(nesvnic->nesdev->pcidev->devfn))) {
308 nes_write_indexed(nesdev, NES_IDX_MAC_INT_MASK+
309 (0x200*nesdev->mac_index), 0xffffffff);
310 nes_write_indexed(first_nesvnic->nesdev,
311 NES_IDX_MAC_INT_MASK+
312 (0x200*first_nesvnic->nesdev->mac_index),
313 ~(NES_MAC_INT_LINK_STAT_CHG | NES_MAC_INT_XGMII_EXT |
314 NES_MAC_INT_TX_UNDERFLOW | NES_MAC_INT_TX_ERROR));
315 } else {
11e0704b 316 nes_write_indexed(nesdev, NES_IDX_MAC_INT_MASK+(0x200*nesdev->mac_index), 0xffffffff);
3c2d774c
GS
317 }
318
319 nic_active_mask = ~((u32)(1 << nesvnic->nic_index));
320 nes_write_indexed(nesdev, NES_IDX_PERFECT_FILTER_HIGH+
321 (nesvnic->perfect_filter_index*8), 0);
322 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_ACTIVE);
323 nic_active &= nic_active_mask;
324 nes_write_indexed(nesdev, NES_IDX_NIC_ACTIVE, nic_active);
325 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL);
326 nic_active &= nic_active_mask;
327 nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL, nic_active);
328 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ENABLE);
329 nic_active &= nic_active_mask;
330 nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ENABLE, nic_active);
331 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
332 nic_active &= nic_active_mask;
333 nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
334 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON);
335 nic_active &= nic_active_mask;
336 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active);
337
ea623455 338 spin_lock_irqsave(&nesvnic->port_ibevent_lock, flags);
3c2d774c 339 if (nesvnic->of_device_registered) {
cd6860eb
FL
340 nesdev->nesadapter->send_term_ok = 0;
341 nesdev->iw_status = 0;
ea623455
MS
342 if (nesvnic->linkup == 1)
343 nes_port_ibevent(nesvnic);
3c2d774c 344 }
ea623455
MS
345 del_timer_sync(&nesvnic->event_timer);
346 nesvnic->event_timer.function = NULL;
347 spin_unlock_irqrestore(&nesvnic->port_ibevent_lock, flags);
348
3c2d774c
GS
349 nes_destroy_nic_qp(nesvnic);
350
351 nesvnic->netdev_open = 0;
352
353 return 0;
354}
355
356
357/**
358 * nes_nic_send
359 */
360static int nes_nic_send(struct sk_buff *skb, struct net_device *netdev)
361{
362 struct nes_vnic *nesvnic = netdev_priv(netdev);
363 struct nes_device *nesdev = nesvnic->nesdev;
364 struct nes_hw_nic *nesnic = &nesvnic->nic;
365 struct nes_hw_nic_sq_wqe *nic_sqe;
366 struct tcphdr *tcph;
367 __le16 *wqe_fragment_length;
368 u32 wqe_misc;
369 u16 wqe_fragment_index = 1; /* first fragment (0) is used by copy buffer */
370 u16 skb_fragment_index;
371 dma_addr_t bus_address;
372
373 nic_sqe = &nesnic->sq_vbase[nesnic->sq_head];
374 wqe_fragment_length = (__le16 *)&nic_sqe->wqe_words[NES_NIC_SQ_WQE_LENGTH_0_TAG_IDX];
375
376 /* setup the VLAN tag if present */
377 if (vlan_tx_tag_present(skb)) {
378 nes_debug(NES_DBG_NIC_TX, "%s: VLAN packet to send... VLAN = %08X\n",
379 netdev->name, vlan_tx_tag_get(skb));
380 wqe_misc = NES_NIC_SQ_WQE_TAGVALUE_ENABLE;
381 wqe_fragment_length[0] = (__force __le16) vlan_tx_tag_get(skb);
382 } else
383 wqe_misc = 0;
384
385 /* bump past the vlan tag */
386 wqe_fragment_length++;
387 /* wqe_fragment_address = (u64 *)&nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX]; */
388
389 if (skb->ip_summed == CHECKSUM_PARTIAL) {
390 tcph = tcp_hdr(skb);
391 if (1) {
392 if (skb_is_gso(skb)) {
393 /* nes_debug(NES_DBG_NIC_TX, "%s: TSO request... seg size = %u\n",
394 netdev->name, skb_is_gso(skb)); */
395 wqe_misc |= NES_NIC_SQ_WQE_LSO_ENABLE |
396 NES_NIC_SQ_WQE_COMPLETION | (u16)skb_is_gso(skb);
397 set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_LSO_INFO_IDX,
398 ((u32)tcph->doff) |
399 (((u32)(((unsigned char *)tcph) - skb->data)) << 4));
400 } else {
401 wqe_misc |= NES_NIC_SQ_WQE_COMPLETION;
402 }
403 }
404 } else { /* CHECKSUM_HW */
405 wqe_misc |= NES_NIC_SQ_WQE_DISABLE_CHKSUM | NES_NIC_SQ_WQE_COMPLETION;
406 }
407
408 set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_TOTAL_LENGTH_IDX,
409 skb->len);
410 memcpy(&nesnic->first_frag_vbase[nesnic->sq_head].buffer,
411 skb->data, min(((unsigned int)NES_FIRST_FRAG_SIZE), skb_headlen(skb)));
412 wqe_fragment_length[0] = cpu_to_le16(min(((unsigned int)NES_FIRST_FRAG_SIZE),
413 skb_headlen(skb)));
414 wqe_fragment_length[1] = 0;
415 if (skb_headlen(skb) > NES_FIRST_FRAG_SIZE) {
416 if ((skb_shinfo(skb)->nr_frags + 1) > 4) {
417 nes_debug(NES_DBG_NIC_TX, "%s: Packet with %u fragments not sent, skb_headlen=%u\n",
418 netdev->name, skb_shinfo(skb)->nr_frags + 2, skb_headlen(skb));
419 kfree_skb(skb);
420 nesvnic->tx_sw_dropped++;
421 return NETDEV_TX_LOCKED;
422 }
423 set_bit(nesnic->sq_head, nesnic->first_frag_overflow);
424 bus_address = pci_map_single(nesdev->pcidev, skb->data + NES_FIRST_FRAG_SIZE,
425 skb_headlen(skb) - NES_FIRST_FRAG_SIZE, PCI_DMA_TODEVICE);
426 wqe_fragment_length[wqe_fragment_index++] =
427 cpu_to_le16(skb_headlen(skb) - NES_FIRST_FRAG_SIZE);
428 wqe_fragment_length[wqe_fragment_index] = 0;
429 set_wqe_64bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_FRAG1_LOW_IDX,
430 ((u64)(bus_address)));
431 nesnic->tx_skb[nesnic->sq_head] = skb;
432 }
433
434 if (skb_headlen(skb) == skb->len) {
435 if (skb_headlen(skb) <= NES_FIRST_FRAG_SIZE) {
436 nic_sqe->wqe_words[NES_NIC_SQ_WQE_LENGTH_2_1_IDX] = 0;
2869975c 437 nesnic->tx_skb[nesnic->sq_head] = skb;
3c2d774c
GS
438 }
439 } else {
440 /* Deal with Fragments */
441 nesnic->tx_skb[nesnic->sq_head] = skb;
442 for (skb_fragment_index = 0; skb_fragment_index < skb_shinfo(skb)->nr_frags;
443 skb_fragment_index++) {
cf383ebb
IC
444 skb_frag_t *frag =
445 &skb_shinfo(skb)->frags[skb_fragment_index];
446 bus_address = skb_frag_dma_map(&nesdev->pcidev->dev,
9e903e08 447 frag, 0, skb_frag_size(frag),
5d6bcdfe 448 DMA_TO_DEVICE);
3c2d774c 449 wqe_fragment_length[wqe_fragment_index] =
9e903e08 450 cpu_to_le16(skb_frag_size(&skb_shinfo(skb)->frags[skb_fragment_index]));
3c2d774c
GS
451 set_wqe_64bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_FRAG0_LOW_IDX+(2*wqe_fragment_index),
452 bus_address);
453 wqe_fragment_index++;
454 if (wqe_fragment_index < 5)
455 wqe_fragment_length[wqe_fragment_index] = 0;
456 }
457 }
458
459 set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_MISC_IDX, wqe_misc);
460 nesnic->sq_head++;
461 nesnic->sq_head &= nesnic->sq_size - 1;
462
463 return NETDEV_TX_OK;
464}
465
466
467/**
468 * nes_netdev_start_xmit
469 */
470static int nes_netdev_start_xmit(struct sk_buff *skb, struct net_device *netdev)
471{
472 struct nes_vnic *nesvnic = netdev_priv(netdev);
473 struct nes_device *nesdev = nesvnic->nesdev;
474 struct nes_hw_nic *nesnic = &nesvnic->nic;
475 struct nes_hw_nic_sq_wqe *nic_sqe;
476 struct tcphdr *tcph;
477 /* struct udphdr *udph; */
a06fd26d 478#define NES_MAX_TSO_FRAGS MAX_SKB_FRAGS
3c2d774c
GS
479 /* 64K segment plus overflow on each side */
480 dma_addr_t tso_bus_address[NES_MAX_TSO_FRAGS];
481 dma_addr_t bus_address;
482 u32 tso_frag_index;
483 u32 tso_frag_count;
484 u32 tso_wqe_length;
485 u32 curr_tcp_seq;
486 u32 wqe_count=1;
487 u32 send_rc;
488 struct iphdr *iph;
3c2d774c
GS
489 __le16 *wqe_fragment_length;
490 u32 nr_frags;
491 u32 original_first_length;
7495ab68 492 /* u64 *wqe_fragment_address; */
3c2d774c
GS
493 /* first fragment (0) is used by copy buffer */
494 u16 wqe_fragment_index=1;
495 u16 hoffset;
496 u16 nhoffset;
497 u16 wqes_needed;
498 u16 wqes_available;
3c2d774c
GS
499 u32 wqe_misc;
500
7495ab68
GS
501 /*
502 * nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u,"
503 * " (%u frags), tso_size=%u\n",
504 * netdev->name, skb->len, skb_headlen(skb),
505 * skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
506 */
3c2d774c
GS
507
508 if (!netif_carrier_ok(netdev))
509 return NETDEV_TX_OK;
510
511 if (netif_queue_stopped(netdev))
512 return NETDEV_TX_BUSY;
513
3c2d774c
GS
514 /* Check if SQ is full */
515 if ((((nesnic->sq_tail+(nesnic->sq_size*2))-nesnic->sq_head) & (nesnic->sq_size - 1)) == 1) {
516 if (!netif_queue_stopped(netdev)) {
517 netif_stop_queue(netdev);
518 barrier();
519 if ((((((volatile u16)nesnic->sq_tail)+(nesnic->sq_size*2))-nesnic->sq_head) & (nesnic->sq_size - 1)) != 1) {
520 netif_start_queue(netdev);
521 goto sq_no_longer_full;
522 }
523 }
524 nesvnic->sq_full++;
3c2d774c
GS
525 return NETDEV_TX_BUSY;
526 }
527
528sq_no_longer_full:
529 nr_frags = skb_shinfo(skb)->nr_frags;
530 if (skb_headlen(skb) > NES_FIRST_FRAG_SIZE) {
531 nr_frags++;
532 }
533 /* Check if too many fragments */
534 if (unlikely((nr_frags > 4))) {
535 if (skb_is_gso(skb)) {
536 nesvnic->segmented_tso_requests++;
537 nesvnic->tso_requests++;
3c2d774c
GS
538 /* Basically 4 fragments available per WQE with extended fragments */
539 wqes_needed = nr_frags >> 2;
540 wqes_needed += (nr_frags&3)?1:0;
541 wqes_available = (((nesnic->sq_tail+nesnic->sq_size)-nesnic->sq_head) - 1) &
542 (nesnic->sq_size - 1);
543
544 if (unlikely(wqes_needed > wqes_available)) {
545 if (!netif_queue_stopped(netdev)) {
546 netif_stop_queue(netdev);
547 barrier();
548 wqes_available = (((((volatile u16)nesnic->sq_tail)+nesnic->sq_size)-nesnic->sq_head) - 1) &
549 (nesnic->sq_size - 1);
550 if (wqes_needed <= wqes_available) {
551 netif_start_queue(netdev);
552 goto tso_sq_no_longer_full;
553 }
554 }
555 nesvnic->sq_full++;
3c2d774c
GS
556 nes_debug(NES_DBG_NIC_TX, "%s: HNIC SQ full- TSO request has too many frags!\n",
557 netdev->name);
558 return NETDEV_TX_BUSY;
559 }
560tso_sq_no_longer_full:
561 /* Map all the buffers */
562 for (tso_frag_count=0; tso_frag_count < skb_shinfo(skb)->nr_frags;
563 tso_frag_count++) {
cf383ebb
IC
564 skb_frag_t *frag =
565 &skb_shinfo(skb)->frags[tso_frag_count];
566 tso_bus_address[tso_frag_count] =
567 skb_frag_dma_map(&nesdev->pcidev->dev,
9e903e08 568 frag, 0, skb_frag_size(frag),
5d6bcdfe 569 DMA_TO_DEVICE);
3c2d774c
GS
570 }
571
572 tso_frag_index = 0;
573 curr_tcp_seq = ntohl(tcp_hdr(skb)->seq);
574 hoffset = skb_transport_header(skb) - skb->data;
575 nhoffset = skb_network_header(skb) - skb->data;
576 original_first_length = hoffset + ((((struct tcphdr *)skb_transport_header(skb))->doff)<<2);
577
578 for (wqe_count=0; wqe_count<((u32)wqes_needed); wqe_count++) {
579 tso_wqe_length = 0;
580 nic_sqe = &nesnic->sq_vbase[nesnic->sq_head];
581 wqe_fragment_length =
582 (__le16 *)&nic_sqe->wqe_words[NES_NIC_SQ_WQE_LENGTH_0_TAG_IDX];
583 /* setup the VLAN tag if present */
584 if (vlan_tx_tag_present(skb)) {
585 nes_debug(NES_DBG_NIC_TX, "%s: VLAN packet to send... VLAN = %08X\n",
586 netdev->name, vlan_tx_tag_get(skb) );
587 wqe_misc = NES_NIC_SQ_WQE_TAGVALUE_ENABLE;
588 wqe_fragment_length[0] = (__force __le16) vlan_tx_tag_get(skb);
589 } else
590 wqe_misc = 0;
591
592 /* bump past the vlan tag */
593 wqe_fragment_length++;
594
595 /* Assumes header totally fits in allocated buffer and is in first fragment */
596 if (original_first_length > NES_FIRST_FRAG_SIZE) {
597 nes_debug(NES_DBG_NIC_TX, "ERROR: SKB header too big, headlen=%u, FIRST_FRAG_SIZE=%u\n",
598 original_first_length, NES_FIRST_FRAG_SIZE);
599 nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u,"
600 " (%u frags), tso_size=%u\n",
601 netdev->name,
602 skb->len, skb_headlen(skb),
603 skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
604 }
605 memcpy(&nesnic->first_frag_vbase[nesnic->sq_head].buffer,
606 skb->data, min(((unsigned int)NES_FIRST_FRAG_SIZE),
607 original_first_length));
608 iph = (struct iphdr *)
609 (&nesnic->first_frag_vbase[nesnic->sq_head].buffer[nhoffset]);
610 tcph = (struct tcphdr *)
611 (&nesnic->first_frag_vbase[nesnic->sq_head].buffer[hoffset]);
612 if ((wqe_count+1)!=(u32)wqes_needed) {
613 tcph->fin = 0;
614 tcph->psh = 0;
615 tcph->rst = 0;
616 tcph->urg = 0;
617 }
618 if (wqe_count) {
619 tcph->syn = 0;
620 }
621 tcph->seq = htonl(curr_tcp_seq);
622 wqe_fragment_length[0] = cpu_to_le16(min(((unsigned int)NES_FIRST_FRAG_SIZE),
623 original_first_length));
624
625 wqe_fragment_index = 1;
626 if ((wqe_count==0) && (skb_headlen(skb) > original_first_length)) {
627 set_bit(nesnic->sq_head, nesnic->first_frag_overflow);
628 bus_address = pci_map_single(nesdev->pcidev, skb->data + original_first_length,
629 skb_headlen(skb) - original_first_length, PCI_DMA_TODEVICE);
630 wqe_fragment_length[wqe_fragment_index++] =
631 cpu_to_le16(skb_headlen(skb) - original_first_length);
632 wqe_fragment_length[wqe_fragment_index] = 0;
633 set_wqe_64bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_FRAG1_LOW_IDX,
634 bus_address);
168ac824
CT
635 tso_wqe_length += skb_headlen(skb) -
636 original_first_length;
3c2d774c
GS
637 }
638 while (wqe_fragment_index < 5) {
639 wqe_fragment_length[wqe_fragment_index] =
9e903e08 640 cpu_to_le16(skb_frag_size(&skb_shinfo(skb)->frags[tso_frag_index]));
3c2d774c
GS
641 set_wqe_64bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_FRAG0_LOW_IDX+(2*wqe_fragment_index),
642 (u64)tso_bus_address[tso_frag_index]);
643 wqe_fragment_index++;
9e903e08 644 tso_wqe_length += skb_frag_size(&skb_shinfo(skb)->frags[tso_frag_index++]);
3c2d774c
GS
645 if (wqe_fragment_index < 5)
646 wqe_fragment_length[wqe_fragment_index] = 0;
647 if (tso_frag_index == tso_frag_count)
648 break;
649 }
650 if ((wqe_count+1) == (u32)wqes_needed) {
651 nesnic->tx_skb[nesnic->sq_head] = skb;
652 } else {
653 nesnic->tx_skb[nesnic->sq_head] = NULL;
654 }
655 wqe_misc |= NES_NIC_SQ_WQE_COMPLETION | (u16)skb_is_gso(skb);
656 if ((tso_wqe_length + original_first_length) > skb_is_gso(skb)) {
657 wqe_misc |= NES_NIC_SQ_WQE_LSO_ENABLE;
658 } else {
659 iph->tot_len = htons(tso_wqe_length + original_first_length - nhoffset);
660 }
661
662 set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_MISC_IDX,
663 wqe_misc);
664 set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_LSO_INFO_IDX,
665 ((u32)tcph->doff) | (((u32)hoffset) << 4));
666
667 set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_TOTAL_LENGTH_IDX,
668 tso_wqe_length + original_first_length);
669 curr_tcp_seq += tso_wqe_length;
670 nesnic->sq_head++;
671 nesnic->sq_head &= nesnic->sq_size-1;
672 }
673 } else {
674 nesvnic->linearized_skbs++;
675 hoffset = skb_transport_header(skb) - skb->data;
676 nhoffset = skb_network_header(skb) - skb->data;
677 skb_linearize(skb);
678 skb_set_transport_header(skb, hoffset);
679 skb_set_network_header(skb, nhoffset);
680 send_rc = nes_nic_send(skb, netdev);
2869975c 681 if (send_rc != NETDEV_TX_OK)
3c2d774c 682 return NETDEV_TX_OK;
3c2d774c
GS
683 }
684 } else {
685 send_rc = nes_nic_send(skb, netdev);
2869975c 686 if (send_rc != NETDEV_TX_OK)
3c2d774c 687 return NETDEV_TX_OK;
3c2d774c
GS
688 }
689
690 barrier();
691
692 if (wqe_count)
693 nes_write32(nesdev->regs+NES_WQE_ALLOC,
694 (wqe_count << 24) | (1 << 23) | nesvnic->nic.qp_id);
695
696 netdev->trans_start = jiffies;
3c2d774c
GS
697
698 return NETDEV_TX_OK;
699}
700
701
702/**
703 * nes_netdev_get_stats
704 */
705static struct net_device_stats *nes_netdev_get_stats(struct net_device *netdev)
706{
707 struct nes_vnic *nesvnic = netdev_priv(netdev);
708 struct nes_device *nesdev = nesvnic->nesdev;
709 u64 u64temp;
710 u32 u32temp;
711
712 u32temp = nes_read_indexed(nesdev,
713 NES_IDX_ENDNODE0_NSTAT_RX_DISCARD + (nesvnic->nic_index*0x200));
714 nesvnic->netstats.rx_dropped += u32temp;
715 nesvnic->endnode_nstat_rx_discard += u32temp;
716
717 u64temp = (u64)nes_read_indexed(nesdev,
718 NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_LO + (nesvnic->nic_index*0x200));
719 u64temp += ((u64)nes_read_indexed(nesdev,
720 NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_HI + (nesvnic->nic_index*0x200))) << 32;
721
722 nesvnic->endnode_nstat_rx_octets += u64temp;
723 nesvnic->netstats.rx_bytes += u64temp;
724
725 u64temp = (u64)nes_read_indexed(nesdev,
726 NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_LO + (nesvnic->nic_index*0x200));
727 u64temp += ((u64)nes_read_indexed(nesdev,
728 NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_HI + (nesvnic->nic_index*0x200))) << 32;
729
730 nesvnic->endnode_nstat_rx_frames += u64temp;
731 nesvnic->netstats.rx_packets += u64temp;
732
733 u64temp = (u64)nes_read_indexed(nesdev,
734 NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_LO + (nesvnic->nic_index*0x200));
735 u64temp += ((u64)nes_read_indexed(nesdev,
736 NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_HI + (nesvnic->nic_index*0x200))) << 32;
737
738 nesvnic->endnode_nstat_tx_octets += u64temp;
739 nesvnic->netstats.tx_bytes += u64temp;
740
741 u64temp = (u64)nes_read_indexed(nesdev,
742 NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_LO + (nesvnic->nic_index*0x200));
743 u64temp += ((u64)nes_read_indexed(nesdev,
744 NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_HI + (nesvnic->nic_index*0x200))) << 32;
745
746 nesvnic->endnode_nstat_tx_frames += u64temp;
747 nesvnic->netstats.tx_packets += u64temp;
748
749 u32temp = nes_read_indexed(nesdev,
750 NES_IDX_MAC_RX_SHORT_FRAMES + (nesvnic->nesdev->mac_index*0x200));
751 nesvnic->netstats.rx_dropped += u32temp;
752 nesvnic->nesdev->mac_rx_errors += u32temp;
753 nesvnic->nesdev->mac_rx_short_frames += u32temp;
754
755 u32temp = nes_read_indexed(nesdev,
756 NES_IDX_MAC_RX_OVERSIZED_FRAMES + (nesvnic->nesdev->mac_index*0x200));
757 nesvnic->netstats.rx_dropped += u32temp;
758 nesvnic->nesdev->mac_rx_errors += u32temp;
759 nesvnic->nesdev->mac_rx_oversized_frames += u32temp;
760
761 u32temp = nes_read_indexed(nesdev,
762 NES_IDX_MAC_RX_JABBER_FRAMES + (nesvnic->nesdev->mac_index*0x200));
763 nesvnic->netstats.rx_dropped += u32temp;
764 nesvnic->nesdev->mac_rx_errors += u32temp;
765 nesvnic->nesdev->mac_rx_jabber_frames += u32temp;
766
767 u32temp = nes_read_indexed(nesdev,
768 NES_IDX_MAC_RX_SYMBOL_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
769 nesvnic->netstats.rx_dropped += u32temp;
770 nesvnic->nesdev->mac_rx_errors += u32temp;
771 nesvnic->nesdev->mac_rx_symbol_err_frames += u32temp;
772
773 u32temp = nes_read_indexed(nesdev,
774 NES_IDX_MAC_RX_LENGTH_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
775 nesvnic->netstats.rx_length_errors += u32temp;
776 nesvnic->nesdev->mac_rx_errors += u32temp;
777
778 u32temp = nes_read_indexed(nesdev,
779 NES_IDX_MAC_RX_CRC_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
780 nesvnic->nesdev->mac_rx_errors += u32temp;
781 nesvnic->nesdev->mac_rx_crc_errors += u32temp;
782 nesvnic->netstats.rx_crc_errors += u32temp;
783
784 u32temp = nes_read_indexed(nesdev,
785 NES_IDX_MAC_TX_ERRORS + (nesvnic->nesdev->mac_index*0x200));
786 nesvnic->nesdev->mac_tx_errors += u32temp;
787 nesvnic->netstats.tx_errors += u32temp;
788
789 return &nesvnic->netstats;
790}
791
792
793/**
794 * nes_netdev_tx_timeout
795 */
796static void nes_netdev_tx_timeout(struct net_device *netdev)
797{
798 struct nes_vnic *nesvnic = netdev_priv(netdev);
799
800 if (netif_msg_timer(nesvnic))
801 nes_debug(NES_DBG_NIC_TX, "%s: tx timeout\n", netdev->name);
802}
803
804
805/**
806 * nes_netdev_set_mac_address
807 */
808static int nes_netdev_set_mac_address(struct net_device *netdev, void *p)
809{
810 struct nes_vnic *nesvnic = netdev_priv(netdev);
811 struct nes_device *nesdev = nesvnic->nesdev;
812 struct sockaddr *mac_addr = p;
813 int i;
814 u32 macaddr_low;
815 u16 macaddr_high;
816
817 if (!is_valid_ether_addr(mac_addr->sa_data))
818 return -EADDRNOTAVAIL;
819
820 memcpy(netdev->dev_addr, mac_addr->sa_data, netdev->addr_len);
e174961c
JB
821 printk(PFX "%s: Address length = %d, Address = %pM\n",
822 __func__, netdev->addr_len, mac_addr->sa_data);
7495ab68 823 macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
3c2d774c 824 macaddr_high += (u16)netdev->dev_addr[1];
7495ab68
GS
825 macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
826 macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
827 macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
828 macaddr_low += (u32)netdev->dev_addr[5];
3c2d774c
GS
829
830 for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
831 if (nesvnic->qp_nic_index[i] == 0xf) {
832 break;
833 }
834 nes_write_indexed(nesdev,
835 NES_IDX_PERFECT_FILTER_LOW + (nesvnic->qp_nic_index[i] * 8),
836 macaddr_low);
837 nes_write_indexed(nesdev,
838 NES_IDX_PERFECT_FILTER_HIGH + (nesvnic->qp_nic_index[i] * 8),
839 (u32)macaddr_high | NES_MAC_ADDR_VALID |
840 ((((u32)nesvnic->nic_index) << 16)));
841 }
842 return 0;
843}
844
845
fbf219f1
JP
846static void set_allmulti(struct nes_device *nesdev, u32 nic_active_bit)
847{
848 u32 nic_active;
849
850 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL);
851 nic_active |= nic_active_bit;
852 nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL, nic_active);
853 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
854 nic_active &= ~nic_active_bit;
855 nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
856}
857
858#define get_addr(addrs, index) ((addrs) + (index) * ETH_ALEN)
859
3c2d774c
GS
860/**
861 * nes_netdev_set_multicast_list
862 */
1a855fbf 863static void nes_netdev_set_multicast_list(struct net_device *netdev)
3c2d774c
GS
864{
865 struct nes_vnic *nesvnic = netdev_priv(netdev);
866 struct nes_device *nesdev = nesvnic->nesdev;
7e36d3d7 867 struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter;
3c2d774c
GS
868 u32 nic_active_bit;
869 u32 nic_active;
870 u32 perfect_filter_register_address;
871 u32 macaddr_low;
872 u16 macaddr_high;
873 u8 mc_all_on = 0;
874 u8 mc_index;
875 int mc_nic_index = -1;
7e36d3d7
VM
876 u8 pft_entries_preallocated = max(nesadapter->adapter_fcn_count *
877 nics_per_function, 4);
878 u8 max_pft_entries_avaiable = NES_PFT_SIZE - pft_entries_preallocated;
879 unsigned long flags;
fbf219f1 880 int mc_count = netdev_mc_count(netdev);
3c2d774c 881
7e36d3d7 882 spin_lock_irqsave(&nesadapter->resource_lock, flags);
3c2d774c
GS
883 nic_active_bit = 1 << nesvnic->nic_index;
884
885 if (netdev->flags & IFF_PROMISC) {
886 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL);
887 nic_active |= nic_active_bit;
888 nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL, nic_active);
889 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
890 nic_active |= nic_active_bit;
891 nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
892 mc_all_on = 1;
7e36d3d7 893 } else if ((netdev->flags & IFF_ALLMULTI) ||
3c2d774c 894 (nesvnic->nic_index > 3)) {
fbf219f1 895 set_allmulti(nesdev, nic_active_bit);
3c2d774c
GS
896 mc_all_on = 1;
897 } else {
898 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL);
899 nic_active &= ~nic_active_bit;
900 nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL, nic_active);
901 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
902 nic_active &= ~nic_active_bit;
903 nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
904 }
905
25985edc 906 nes_debug(NES_DBG_NIC_RX, "Number of MC entries = %d, Promiscuous = %d, All Multicast = %d.\n",
fbf219f1 907 mc_count, !!(netdev->flags & IFF_PROMISC),
7e36d3d7 908 !!(netdev->flags & IFF_ALLMULTI));
3c2d774c 909 if (!mc_all_on) {
fbf219f1
JP
910 char *addrs;
911 int i;
22bedad3 912 struct netdev_hw_addr *ha;
fbf219f1
JP
913
914 addrs = kmalloc(ETH_ALEN * mc_count, GFP_ATOMIC);
915 if (!addrs) {
916 set_allmulti(nesdev, nic_active_bit);
917 goto unlock;
918 }
919 i = 0;
22bedad3
JP
920 netdev_for_each_mc_addr(ha, netdev)
921 memcpy(get_addr(addrs, i++), ha->addr, ETH_ALEN);
fbf219f1 922
7e36d3d7
VM
923 perfect_filter_register_address = NES_IDX_PERFECT_FILTER_LOW +
924 pft_entries_preallocated * 0x8;
fbf219f1
JP
925 for (i = 0, mc_index = 0; mc_index < max_pft_entries_avaiable;
926 mc_index++) {
927 while (i < mc_count && nesvnic->mcrq_mcast_filter &&
7e36d3d7 928 ((mc_nic_index = nesvnic->mcrq_mcast_filter(nesvnic,
fbf219f1 929 get_addr(addrs, i++))) == 0));
3c2d774c
GS
930 if (mc_nic_index < 0)
931 mc_nic_index = nesvnic->nic_index;
7e36d3d7
VM
932 while (nesadapter->pft_mcast_map[mc_index] < 16 &&
933 nesadapter->pft_mcast_map[mc_index] !=
934 nesvnic->nic_index &&
935 mc_index < max_pft_entries_avaiable) {
936 nes_debug(NES_DBG_NIC_RX,
601d87b0
JP
937 "mc_index=%d skipping nic_index=%d, "
938 "used for=%d \n", mc_index,
7e36d3d7
VM
939 nesvnic->nic_index,
940 nesadapter->pft_mcast_map[mc_index]);
941 mc_index++;
942 }
943 if (mc_index >= max_pft_entries_avaiable)
944 break;
fbf219f1
JP
945 if (i < mc_count) {
946 char *addr = get_addr(addrs, i++);
947
e174961c 948 nes_debug(NES_DBG_NIC_RX, "Assigning MC Address %pM to register 0x%04X nic_idx=%d\n",
fbf219f1 949 addr,
2bd01c5d
RD
950 perfect_filter_register_address+(mc_index * 8),
951 mc_nic_index);
fbf219f1
JP
952 macaddr_high = ((u16) addr[0]) << 8;
953 macaddr_high += (u16) addr[1];
954 macaddr_low = ((u32) addr[2]) << 24;
955 macaddr_low += ((u32) addr[3]) << 16;
956 macaddr_low += ((u32) addr[4]) << 8;
957 macaddr_low += (u32) addr[5];
3c2d774c
GS
958 nes_write_indexed(nesdev,
959 perfect_filter_register_address+(mc_index * 8),
960 macaddr_low);
961 nes_write_indexed(nesdev,
962 perfect_filter_register_address+4+(mc_index * 8),
963 (u32)macaddr_high | NES_MAC_ADDR_VALID |
964 ((((u32)(1<<mc_nic_index)) << 16)));
7e36d3d7
VM
965 nesadapter->pft_mcast_map[mc_index] =
966 nesvnic->nic_index;
3c2d774c
GS
967 } else {
968 nes_debug(NES_DBG_NIC_RX, "Clearing MC Address at register 0x%04X\n",
969 perfect_filter_register_address+(mc_index * 8));
970 nes_write_indexed(nesdev,
971 perfect_filter_register_address+4+(mc_index * 8),
972 0);
7e36d3d7 973 nesadapter->pft_mcast_map[mc_index] = 255;
3c2d774c
GS
974 }
975 }
fbf219f1 976 kfree(addrs);
7e36d3d7 977 /* PFT is not large enough */
fbf219f1
JP
978 if (i < mc_count)
979 set_allmulti(nesdev, nic_active_bit);
3c2d774c 980 }
7e36d3d7 981
fbf219f1 982unlock:
7e36d3d7 983 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
3c2d774c
GS
984}
985
986
987/**
988 * nes_netdev_change_mtu
989 */
7495ab68 990static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu)
3c2d774c
GS
991{
992 struct nes_vnic *nesvnic = netdev_priv(netdev);
7495ab68
GS
993 struct nes_device *nesdev = nesvnic->nesdev;
994 int ret = 0;
995 u8 jumbomode = 0;
e0e31afb
BS
996 u32 nic_active;
997 u32 nic_active_bit;
998 u32 uc_all_active;
999 u32 mc_all_active;
3c2d774c 1000
7495ab68 1001 if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu))
3c2d774c
GS
1002 return -EINVAL;
1003
7495ab68 1004 netdev->mtu = new_mtu;
edd2fd64 1005 nesvnic->max_frame_size = new_mtu + VLAN_ETH_HLEN;
3c2d774c
GS
1006
1007 if (netdev->mtu > 1500) {
1008 jumbomode=1;
1009 }
7495ab68 1010 nes_nic_init_timer_defaults(nesdev, jumbomode);
3c2d774c
GS
1011
1012 if (netif_running(netdev)) {
e0e31afb
BS
1013 nic_active_bit = 1 << nesvnic->nic_index;
1014 mc_all_active = nes_read_indexed(nesdev,
1015 NES_IDX_NIC_MULTICAST_ALL) & nic_active_bit;
1016 uc_all_active = nes_read_indexed(nesdev,
1017 NES_IDX_NIC_UNICAST_ALL) & nic_active_bit;
1018
3c2d774c
GS
1019 nes_netdev_stop(netdev);
1020 nes_netdev_open(netdev);
e0e31afb
BS
1021
1022 nic_active = nes_read_indexed(nesdev,
1023 NES_IDX_NIC_MULTICAST_ALL);
1024 nic_active |= mc_all_active;
1025 nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL,
1026 nic_active);
1027
1028 nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
1029 nic_active |= uc_all_active;
1030 nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
3c2d774c
GS
1031 }
1032
1033 return ret;
1034}
1035
39942a02 1036
37dab411 1037static const char nes_ethtool_stringset[][ETH_GSTRING_LEN] = {
3c2d774c
GS
1038 "Link Change Interrupts",
1039 "Linearized SKBs",
1040 "T/GSO Requests",
1041 "Pause Frames Sent",
1042 "Pause Frames Received",
1043 "Internal Routing Errors",
1044 "SQ SW Dropped SKBs",
3c2d774c
GS
1045 "SQ Full",
1046 "Segmented TSO Requests",
1047 "Rx Symbol Errors",
1048 "Rx Jabber Errors",
1049 "Rx Oversized Frames",
1050 "Rx Short Frames",
39942a02
FL
1051 "Rx Length Errors",
1052 "Rx CRC Errors",
1053 "Rx Port Discard",
3c2d774c
GS
1054 "Endnode Rx Discards",
1055 "Endnode Rx Octets",
1056 "Endnode Rx Frames",
1057 "Endnode Tx Octets",
1058 "Endnode Tx Frames",
39942a02 1059 "Tx Errors",
3c2d774c
GS
1060 "mh detected",
1061 "mh pauses",
1062 "Retransmission Count",
1063 "CM Connects",
1064 "CM Accepts",
1065 "Disconnects",
1066 "Connected Events",
1067 "Connect Requests",
1068 "CM Rejects",
1069 "ModifyQP Timeouts",
1070 "CreateQPs",
1071 "SW DestroyQPs",
1072 "DestroyQPs",
1073 "CM Closes",
1074 "CM Packets Sent",
1075 "CM Packets Bounced",
1076 "CM Packets Created",
1077 "CM Packets Rcvd",
1078 "CM Packets Dropped",
1079 "CM Packets Retrans",
1080 "CM Listens Created",
1081 "CM Listens Destroyed",
1082 "CM Backlog Drops",
1083 "CM Loopbacks",
1084 "CM Nodes Created",
1085 "CM Nodes Destroyed",
1086 "CM Accel Drops",
1087 "CM Resets Received",
39942a02
FL
1088 "Free 4Kpbls",
1089 "Free 256pbls",
3c2d774c 1090 "Timer Inits",
37dab411
FL
1091 "LRO aggregated",
1092 "LRO flushed",
1093 "LRO no_desc",
0f0bee8b
FL
1094 "PAU CreateQPs",
1095 "PAU DestroyQPs",
3c2d774c 1096};
37dab411 1097#define NES_ETHTOOL_STAT_COUNT ARRAY_SIZE(nes_ethtool_stringset)
3c2d774c 1098
3c2d774c
GS
1099
1100/**
15f0a394 1101 * nes_netdev_get_sset_count
3c2d774c 1102 */
15f0a394 1103static int nes_netdev_get_sset_count(struct net_device *netdev, int stringset)
3c2d774c 1104{
15f0a394
BH
1105 if (stringset == ETH_SS_STATS)
1106 return NES_ETHTOOL_STAT_COUNT;
1107 else
1108 return -EINVAL;
3c2d774c
GS
1109}
1110
1111
1112/**
1113 * nes_netdev_get_strings
1114 */
1115static void nes_netdev_get_strings(struct net_device *netdev, u32 stringset,
1116 u8 *ethtool_strings)
1117{
1118 if (stringset == ETH_SS_STATS)
1119 memcpy(ethtool_strings,
1120 &nes_ethtool_stringset,
1121 sizeof(nes_ethtool_stringset));
1122}
1123
1124
1125/**
1126 * nes_netdev_get_ethtool_stats
1127 */
39942a02 1128
3c2d774c
GS
1129static void nes_netdev_get_ethtool_stats(struct net_device *netdev,
1130 struct ethtool_stats *target_ethtool_stats, u64 *target_stat_values)
1131{
1132 u64 u64temp;
1133 struct nes_vnic *nesvnic = netdev_priv(netdev);
1134 struct nes_device *nesdev = nesvnic->nesdev;
39942a02 1135 struct nes_adapter *nesadapter = nesdev->nesadapter;
3c2d774c
GS
1136 u32 nic_count;
1137 u32 u32temp;
2869975c 1138 u32 index = 0;
3c2d774c
GS
1139
1140 target_ethtool_stats->n_stats = NES_ETHTOOL_STAT_COUNT;
2869975c
FL
1141 target_stat_values[index] = nesvnic->nesdev->link_status_interrupts;
1142 target_stat_values[++index] = nesvnic->linearized_skbs;
1143 target_stat_values[++index] = nesvnic->tso_requests;
3c2d774c
GS
1144
1145 u32temp = nes_read_indexed(nesdev,
1146 NES_IDX_MAC_TX_PAUSE_FRAMES + (nesvnic->nesdev->mac_index*0x200));
1147 nesvnic->nesdev->mac_pause_frames_sent += u32temp;
2869975c 1148 target_stat_values[++index] = nesvnic->nesdev->mac_pause_frames_sent;
3c2d774c
GS
1149
1150 u32temp = nes_read_indexed(nesdev,
1151 NES_IDX_MAC_RX_PAUSE_FRAMES + (nesvnic->nesdev->mac_index*0x200));
1152 nesvnic->nesdev->mac_pause_frames_received += u32temp;
1153
1154 u32temp = nes_read_indexed(nesdev,
1155 NES_IDX_PORT_RX_DISCARDS + (nesvnic->nesdev->mac_index*0x40));
1156 nesvnic->nesdev->port_rx_discards += u32temp;
1157 nesvnic->netstats.rx_dropped += u32temp;
1158
1159 u32temp = nes_read_indexed(nesdev,
1160 NES_IDX_PORT_TX_DISCARDS + (nesvnic->nesdev->mac_index*0x40));
1161 nesvnic->nesdev->port_tx_discards += u32temp;
1162 nesvnic->netstats.tx_dropped += u32temp;
1163
39942a02
FL
1164 u32temp = nes_read_indexed(nesdev,
1165 NES_IDX_MAC_RX_SHORT_FRAMES + (nesvnic->nesdev->mac_index*0x200));
1166 nesvnic->netstats.rx_dropped += u32temp;
1167 nesvnic->nesdev->mac_rx_errors += u32temp;
1168 nesvnic->nesdev->mac_rx_short_frames += u32temp;
1169
1170 u32temp = nes_read_indexed(nesdev,
1171 NES_IDX_MAC_RX_OVERSIZED_FRAMES + (nesvnic->nesdev->mac_index*0x200));
1172 nesvnic->netstats.rx_dropped += u32temp;
1173 nesvnic->nesdev->mac_rx_errors += u32temp;
1174 nesvnic->nesdev->mac_rx_oversized_frames += u32temp;
1175
1176 u32temp = nes_read_indexed(nesdev,
1177 NES_IDX_MAC_RX_JABBER_FRAMES + (nesvnic->nesdev->mac_index*0x200));
1178 nesvnic->netstats.rx_dropped += u32temp;
1179 nesvnic->nesdev->mac_rx_errors += u32temp;
1180 nesvnic->nesdev->mac_rx_jabber_frames += u32temp;
1181
1182 u32temp = nes_read_indexed(nesdev,
1183 NES_IDX_MAC_RX_SYMBOL_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
1184 nesvnic->netstats.rx_dropped += u32temp;
1185 nesvnic->nesdev->mac_rx_errors += u32temp;
1186 nesvnic->nesdev->mac_rx_symbol_err_frames += u32temp;
1187
1188 u32temp = nes_read_indexed(nesdev,
1189 NES_IDX_MAC_RX_LENGTH_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
1190 nesvnic->netstats.rx_length_errors += u32temp;
1191 nesvnic->nesdev->mac_rx_errors += u32temp;
1192
1193 u32temp = nes_read_indexed(nesdev,
1194 NES_IDX_MAC_RX_CRC_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
1195 nesvnic->nesdev->mac_rx_errors += u32temp;
1196 nesvnic->nesdev->mac_rx_crc_errors += u32temp;
1197 nesvnic->netstats.rx_crc_errors += u32temp;
1198
1199 u32temp = nes_read_indexed(nesdev,
1200 NES_IDX_MAC_TX_ERRORS + (nesvnic->nesdev->mac_index*0x200));
1201 nesvnic->nesdev->mac_tx_errors += u32temp;
1202 nesvnic->netstats.tx_errors += u32temp;
1203
3c2d774c
GS
1204 for (nic_count = 0; nic_count < NES_MAX_PORT_COUNT; nic_count++) {
1205 if (nesvnic->qp_nic_index[nic_count] == 0xf)
1206 break;
1207
1208 u32temp = nes_read_indexed(nesdev,
1209 NES_IDX_ENDNODE0_NSTAT_RX_DISCARD +
1210 (nesvnic->qp_nic_index[nic_count]*0x200));
1211 nesvnic->netstats.rx_dropped += u32temp;
1212 nesvnic->endnode_nstat_rx_discard += u32temp;
1213
1214 u64temp = (u64)nes_read_indexed(nesdev,
1215 NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_LO +
1216 (nesvnic->qp_nic_index[nic_count]*0x200));
1217 u64temp += ((u64)nes_read_indexed(nesdev,
1218 NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_HI +
1219 (nesvnic->qp_nic_index[nic_count]*0x200))) << 32;
1220
1221 nesvnic->endnode_nstat_rx_octets += u64temp;
1222 nesvnic->netstats.rx_bytes += u64temp;
1223
1224 u64temp = (u64)nes_read_indexed(nesdev,
1225 NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_LO +
1226 (nesvnic->qp_nic_index[nic_count]*0x200));
1227 u64temp += ((u64)nes_read_indexed(nesdev,
1228 NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_HI +
1229 (nesvnic->qp_nic_index[nic_count]*0x200))) << 32;
1230
1231 nesvnic->endnode_nstat_rx_frames += u64temp;
1232 nesvnic->netstats.rx_packets += u64temp;
1233
1234 u64temp = (u64)nes_read_indexed(nesdev,
1235 NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_LO +
1236 (nesvnic->qp_nic_index[nic_count]*0x200));
1237 u64temp += ((u64)nes_read_indexed(nesdev,
1238 NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_HI +
1239 (nesvnic->qp_nic_index[nic_count]*0x200))) << 32;
1240
1241 nesvnic->endnode_nstat_tx_octets += u64temp;
1242 nesvnic->netstats.tx_bytes += u64temp;
1243
1244 u64temp = (u64)nes_read_indexed(nesdev,
1245 NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_LO +
1246 (nesvnic->qp_nic_index[nic_count]*0x200));
1247 u64temp += ((u64)nes_read_indexed(nesdev,
1248 NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_HI +
1249 (nesvnic->qp_nic_index[nic_count]*0x200))) << 32;
1250
1251 nesvnic->endnode_nstat_tx_frames += u64temp;
1252 nesvnic->netstats.tx_packets += u64temp;
1253
1254 u32temp = nes_read_indexed(nesdev,
1255 NES_IDX_IPV4_TCP_REXMITS + (nesvnic->qp_nic_index[nic_count]*0x200));
1256 nesvnic->endnode_ipv4_tcp_retransmits += u32temp;
1257 }
1258
2869975c
FL
1259 target_stat_values[++index] = nesvnic->nesdev->mac_pause_frames_received;
1260 target_stat_values[++index] = nesdev->nesadapter->nic_rx_eth_route_err;
1261 target_stat_values[++index] = nesvnic->tx_sw_dropped;
1262 target_stat_values[++index] = nesvnic->sq_full;
1263 target_stat_values[++index] = nesvnic->segmented_tso_requests;
1264 target_stat_values[++index] = nesvnic->nesdev->mac_rx_symbol_err_frames;
1265 target_stat_values[++index] = nesvnic->nesdev->mac_rx_jabber_frames;
1266 target_stat_values[++index] = nesvnic->nesdev->mac_rx_oversized_frames;
1267 target_stat_values[++index] = nesvnic->nesdev->mac_rx_short_frames;
39942a02
FL
1268 target_stat_values[++index] = nesvnic->netstats.rx_length_errors;
1269 target_stat_values[++index] = nesvnic->nesdev->mac_rx_crc_errors;
1270 target_stat_values[++index] = nesvnic->nesdev->port_rx_discards;
2869975c
FL
1271 target_stat_values[++index] = nesvnic->endnode_nstat_rx_discard;
1272 target_stat_values[++index] = nesvnic->endnode_nstat_rx_octets;
1273 target_stat_values[++index] = nesvnic->endnode_nstat_rx_frames;
1274 target_stat_values[++index] = nesvnic->endnode_nstat_tx_octets;
1275 target_stat_values[++index] = nesvnic->endnode_nstat_tx_frames;
39942a02 1276 target_stat_values[++index] = nesvnic->nesdev->mac_tx_errors;
2869975c
FL
1277 target_stat_values[++index] = mh_detected;
1278 target_stat_values[++index] = mh_pauses_sent;
1279 target_stat_values[++index] = nesvnic->endnode_ipv4_tcp_retransmits;
1280 target_stat_values[++index] = atomic_read(&cm_connects);
1281 target_stat_values[++index] = atomic_read(&cm_accepts);
1282 target_stat_values[++index] = atomic_read(&cm_disconnects);
1283 target_stat_values[++index] = atomic_read(&cm_connecteds);
1284 target_stat_values[++index] = atomic_read(&cm_connect_reqs);
1285 target_stat_values[++index] = atomic_read(&cm_rejects);
1286 target_stat_values[++index] = atomic_read(&mod_qp_timouts);
1287 target_stat_values[++index] = atomic_read(&qps_created);
1288 target_stat_values[++index] = atomic_read(&sw_qps_destroyed);
1289 target_stat_values[++index] = atomic_read(&qps_destroyed);
1290 target_stat_values[++index] = atomic_read(&cm_closes);
1291 target_stat_values[++index] = cm_packets_sent;
1292 target_stat_values[++index] = cm_packets_bounced;
1293 target_stat_values[++index] = cm_packets_created;
1294 target_stat_values[++index] = cm_packets_received;
1295 target_stat_values[++index] = cm_packets_dropped;
1296 target_stat_values[++index] = cm_packets_retrans;
6e10d2e4
FL
1297 target_stat_values[++index] = atomic_read(&cm_listens_created);
1298 target_stat_values[++index] = atomic_read(&cm_listens_destroyed);
2869975c
FL
1299 target_stat_values[++index] = cm_backlog_drops;
1300 target_stat_values[++index] = atomic_read(&cm_loopbacks);
1301 target_stat_values[++index] = atomic_read(&cm_nodes_created);
1302 target_stat_values[++index] = atomic_read(&cm_nodes_destroyed);
1303 target_stat_values[++index] = atomic_read(&cm_accel_dropped_pkts);
1304 target_stat_values[++index] = atomic_read(&cm_resets_recvd);
39942a02
FL
1305 target_stat_values[++index] = nesadapter->free_4kpbl;
1306 target_stat_values[++index] = nesadapter->free_256pbl;
2869975c 1307 target_stat_values[++index] = int_mod_timer_init;
2869975c
FL
1308 target_stat_values[++index] = nesvnic->lro_mgr.stats.aggregated;
1309 target_stat_values[++index] = nesvnic->lro_mgr.stats.flushed;
1310 target_stat_values[++index] = nesvnic->lro_mgr.stats.no_desc;
0f0bee8b
FL
1311 target_stat_values[++index] = atomic_read(&pau_qps_created);
1312 target_stat_values[++index] = atomic_read(&pau_qps_destroyed);
3c2d774c
GS
1313}
1314
3c2d774c
GS
1315/**
1316 * nes_netdev_get_drvinfo
1317 */
1318static void nes_netdev_get_drvinfo(struct net_device *netdev,
1319 struct ethtool_drvinfo *drvinfo)
1320{
1321 struct nes_vnic *nesvnic = netdev_priv(netdev);
0c93ae35 1322 struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter;
3c2d774c
GS
1323
1324 strcpy(drvinfo->driver, DRV_NAME);
1325 strcpy(drvinfo->bus_info, pci_name(nesvnic->nesdev->pcidev));
0c93ae35
CT
1326 sprintf(drvinfo->fw_version, "%u.%u", nesadapter->firmware_version>>16,
1327 nesadapter->firmware_version & 0x000000ff);
3c2d774c 1328 strcpy(drvinfo->version, DRV_VERSION);
3c2d774c
GS
1329 drvinfo->testinfo_len = 0;
1330 drvinfo->eedump_len = 0;
1331 drvinfo->regdump_len = 0;
1332}
1333
1334
1335/**
1336 * nes_netdev_set_coalesce
1337 */
1338static int nes_netdev_set_coalesce(struct net_device *netdev,
1339 struct ethtool_coalesce *et_coalesce)
1340{
1341 struct nes_vnic *nesvnic = netdev_priv(netdev);
7495ab68 1342 struct nes_device *nesdev = nesvnic->nesdev;
3c2d774c
GS
1343 struct nes_adapter *nesadapter = nesdev->nesadapter;
1344 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
1345 unsigned long flags;
1346
7495ab68 1347 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
3c2d774c 1348 if (et_coalesce->rx_max_coalesced_frames_low) {
7495ab68 1349 shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low;
3c2d774c
GS
1350 }
1351 if (et_coalesce->rx_max_coalesced_frames_irq) {
1352 shared_timer->threshold_target = et_coalesce->rx_max_coalesced_frames_irq;
1353 }
1354 if (et_coalesce->rx_max_coalesced_frames_high) {
1355 shared_timer->threshold_high = et_coalesce->rx_max_coalesced_frames_high;
1356 }
1357 if (et_coalesce->rx_coalesce_usecs_low) {
1358 shared_timer->timer_in_use_min = et_coalesce->rx_coalesce_usecs_low;
1359 }
1360 if (et_coalesce->rx_coalesce_usecs_high) {
1361 shared_timer->timer_in_use_max = et_coalesce->rx_coalesce_usecs_high;
1362 }
1363 spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
1364
1365 /* using this to drive total interrupt moderation */
1366 nesadapter->et_rx_coalesce_usecs_irq = et_coalesce->rx_coalesce_usecs_irq;
1367 if (et_coalesce->use_adaptive_rx_coalesce) {
1368 nesadapter->et_use_adaptive_rx_coalesce = 1;
7495ab68 1369 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC;
3c2d774c
GS
1370 nesadapter->et_rx_coalesce_usecs_irq = 0;
1371 if (et_coalesce->pkt_rate_low) {
7495ab68 1372 nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low;
3c2d774c
GS
1373 }
1374 } else {
1375 nesadapter->et_use_adaptive_rx_coalesce = 0;
7495ab68 1376 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT;
3c2d774c
GS
1377 if (nesadapter->et_rx_coalesce_usecs_irq) {
1378 nes_write32(nesdev->regs+NES_PERIODIC_CONTROL,
1379 0x80000000 | ((u32)(nesadapter->et_rx_coalesce_usecs_irq*8)));
1380 }
1381 }
1382 return 0;
1383}
1384
1385
1386/**
1387 * nes_netdev_get_coalesce
1388 */
1389static int nes_netdev_get_coalesce(struct net_device *netdev,
1390 struct ethtool_coalesce *et_coalesce)
1391{
1392 struct nes_vnic *nesvnic = netdev_priv(netdev);
7495ab68 1393 struct nes_device *nesdev = nesvnic->nesdev;
3c2d774c
GS
1394 struct nes_adapter *nesadapter = nesdev->nesadapter;
1395 struct ethtool_coalesce temp_et_coalesce;
1396 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
1397 unsigned long flags;
1398
1399 memset(&temp_et_coalesce, 0, sizeof(temp_et_coalesce));
7495ab68
GS
1400 temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq;
1401 temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce;
1402 temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval;
3c2d774c
GS
1403 temp_et_coalesce.pkt_rate_low = nesadapter->et_pkt_rate_low;
1404 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
7495ab68
GS
1405 temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low;
1406 temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target;
3c2d774c 1407 temp_et_coalesce.rx_max_coalesced_frames_high = shared_timer->threshold_high;
7495ab68 1408 temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min;
3c2d774c
GS
1409 temp_et_coalesce.rx_coalesce_usecs_high = shared_timer->timer_in_use_max;
1410 if (nesadapter->et_use_adaptive_rx_coalesce) {
1411 temp_et_coalesce.rx_coalesce_usecs_irq = shared_timer->timer_in_use;
1412 }
1413 spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
7495ab68 1414 memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce));
3c2d774c
GS
1415 return 0;
1416}
1417
1418
1419/**
1420 * nes_netdev_get_pauseparam
1421 */
1422static void nes_netdev_get_pauseparam(struct net_device *netdev,
1423 struct ethtool_pauseparam *et_pauseparam)
1424{
1425 struct nes_vnic *nesvnic = netdev_priv(netdev);
1426
1427 et_pauseparam->autoneg = 0;
1428 et_pauseparam->rx_pause = (nesvnic->nesdev->disable_rx_flow_control == 0) ? 1:0;
1429 et_pauseparam->tx_pause = (nesvnic->nesdev->disable_tx_flow_control == 0) ? 1:0;
1430}
1431
1432
1433/**
1434 * nes_netdev_set_pauseparam
1435 */
1436static int nes_netdev_set_pauseparam(struct net_device *netdev,
1437 struct ethtool_pauseparam *et_pauseparam)
1438{
1439 struct nes_vnic *nesvnic = netdev_priv(netdev);
1440 struct nes_device *nesdev = nesvnic->nesdev;
1441 u32 u32temp;
1442
1443 if (et_pauseparam->autoneg) {
1444 /* TODO: should return unsupported */
1445 return 0;
1446 }
1447 if ((et_pauseparam->tx_pause == 1) && (nesdev->disable_tx_flow_control == 1)) {
1448 u32temp = nes_read_indexed(nesdev,
1449 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200));
1450 u32temp |= NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE;
1451 nes_write_indexed(nesdev,
70c9db0f 1452 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200), u32temp);
3c2d774c
GS
1453 nesdev->disable_tx_flow_control = 0;
1454 } else if ((et_pauseparam->tx_pause == 0) && (nesdev->disable_tx_flow_control == 0)) {
1455 u32temp = nes_read_indexed(nesdev,
1456 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200));
1457 u32temp &= ~NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE;
1458 nes_write_indexed(nesdev,
70c9db0f 1459 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200), u32temp);
3c2d774c
GS
1460 nesdev->disable_tx_flow_control = 1;
1461 }
1462 if ((et_pauseparam->rx_pause == 1) && (nesdev->disable_rx_flow_control == 1)) {
1463 u32temp = nes_read_indexed(nesdev,
1464 NES_IDX_MPP_DEBUG + (nesdev->mac_index*0x40));
1465 u32temp &= ~NES_IDX_MPP_DEBUG_PORT_DISABLE_PAUSE;
1466 nes_write_indexed(nesdev,
1467 NES_IDX_MPP_DEBUG + (nesdev->mac_index*0x40), u32temp);
1468 nesdev->disable_rx_flow_control = 0;
1469 } else if ((et_pauseparam->rx_pause == 0) && (nesdev->disable_rx_flow_control == 0)) {
1470 u32temp = nes_read_indexed(nesdev,
1471 NES_IDX_MPP_DEBUG + (nesdev->mac_index*0x40));
1472 u32temp |= NES_IDX_MPP_DEBUG_PORT_DISABLE_PAUSE;
1473 nes_write_indexed(nesdev,
1474 NES_IDX_MPP_DEBUG + (nesdev->mac_index*0x40), u32temp);
1475 nesdev->disable_rx_flow_control = 1;
1476 }
1477
1478 return 0;
1479}
1480
1481
1482/**
1483 * nes_netdev_get_settings
1484 */
1485static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd *et_cmd)
1486{
1487 struct nes_vnic *nesvnic = netdev_priv(netdev);
1488 struct nes_device *nesdev = nesvnic->nesdev;
1489 struct nes_adapter *nesadapter = nesdev->nesadapter;
4303565d
CT
1490 u32 mac_index = nesdev->mac_index;
1491 u8 phy_type = nesadapter->phy_type[mac_index];
1492 u8 phy_index = nesadapter->phy_index[mac_index];
3c2d774c
GS
1493 u16 phy_data;
1494
1495 et_cmd->duplex = DUPLEX_FULL;
7495ab68 1496 et_cmd->port = PORT_MII;
4303565d
CT
1497 et_cmd->maxtxpkt = 511;
1498 et_cmd->maxrxpkt = 511;
0e1de5d6 1499
3c2d774c 1500 if (nesadapter->OneG_Mode) {
70739497 1501 ethtool_cmd_speed_set(et_cmd, SPEED_1000);
4303565d 1502 if (phy_type == NES_PHY_TYPE_PUMA_1G) {
0e1de5d6
ES
1503 et_cmd->supported = SUPPORTED_1000baseT_Full;
1504 et_cmd->advertising = ADVERTISED_1000baseT_Full;
1505 et_cmd->autoneg = AUTONEG_DISABLE;
1506 et_cmd->transceiver = XCVR_INTERNAL;
4303565d 1507 et_cmd->phy_address = mac_index;
3c2d774c 1508 } else {
ce6e74f2 1509 unsigned long flags;
4303565d
CT
1510 et_cmd->supported = SUPPORTED_1000baseT_Full
1511 | SUPPORTED_Autoneg;
1512 et_cmd->advertising = ADVERTISED_1000baseT_Full
1513 | ADVERTISED_Autoneg;
ce6e74f2 1514 spin_lock_irqsave(&nesadapter->phy_lock, flags);
4303565d 1515 nes_read_1G_phy_reg(nesdev, 0, phy_index, &phy_data);
ce6e74f2 1516 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
0e1de5d6
ES
1517 if (phy_data & 0x1000)
1518 et_cmd->autoneg = AUTONEG_ENABLE;
1519 else
1520 et_cmd->autoneg = AUTONEG_DISABLE;
1521 et_cmd->transceiver = XCVR_EXTERNAL;
4303565d 1522 et_cmd->phy_address = phy_index;
3c2d774c 1523 }
4303565d
CT
1524 return 0;
1525 }
09124e19
CT
1526 if ((phy_type == NES_PHY_TYPE_ARGUS) ||
1527 (phy_type == NES_PHY_TYPE_SFP_D) ||
1528 (phy_type == NES_PHY_TYPE_KR)) {
4303565d
CT
1529 et_cmd->transceiver = XCVR_EXTERNAL;
1530 et_cmd->port = PORT_FIBRE;
1531 et_cmd->supported = SUPPORTED_FIBRE;
1532 et_cmd->advertising = ADVERTISED_FIBRE;
1533 et_cmd->phy_address = phy_index;
3c2d774c 1534 } else {
4303565d
CT
1535 et_cmd->transceiver = XCVR_INTERNAL;
1536 et_cmd->supported = SUPPORTED_10000baseT_Full;
1537 et_cmd->advertising = ADVERTISED_10000baseT_Full;
1538 et_cmd->phy_address = mac_index;
3c2d774c 1539 }
70739497 1540 ethtool_cmd_speed_set(et_cmd, SPEED_10000);
4303565d 1541 et_cmd->autoneg = AUTONEG_DISABLE;
3c2d774c
GS
1542 return 0;
1543}
1544
1545
1546/**
1547 * nes_netdev_set_settings
1548 */
1549static int nes_netdev_set_settings(struct net_device *netdev, struct ethtool_cmd *et_cmd)
1550{
1551 struct nes_vnic *nesvnic = netdev_priv(netdev);
1552 struct nes_device *nesdev = nesvnic->nesdev;
1553 struct nes_adapter *nesadapter = nesdev->nesadapter;
3c2d774c 1554
0e1de5d6
ES
1555 if ((nesadapter->OneG_Mode) &&
1556 (nesadapter->phy_type[nesdev->mac_index] != NES_PHY_TYPE_PUMA_1G)) {
ce6e74f2
CT
1557 unsigned long flags;
1558 u16 phy_data;
1559 u8 phy_index = nesadapter->phy_index[nesdev->mac_index];
1560
1561 spin_lock_irqsave(&nesadapter->phy_lock, flags);
1562 nes_read_1G_phy_reg(nesdev, 0, phy_index, &phy_data);
3c2d774c
GS
1563 if (et_cmd->autoneg) {
1564 /* Turn on Full duplex, Autoneg, and restart autonegotiation */
1565 phy_data |= 0x1300;
1566 } else {
7495ab68 1567 /* Turn off autoneg */
3c2d774c
GS
1568 phy_data &= ~0x1000;
1569 }
ce6e74f2
CT
1570 nes_write_1G_phy_reg(nesdev, 0, phy_index, phy_data);
1571 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
3c2d774c
GS
1572 }
1573
1574 return 0;
1575}
1576
1577
0fc0b732 1578static const struct ethtool_ops nes_ethtool_ops = {
3c2d774c
GS
1579 .get_link = ethtool_op_get_link,
1580 .get_settings = nes_netdev_get_settings,
1581 .set_settings = nes_netdev_set_settings,
3c2d774c 1582 .get_strings = nes_netdev_get_strings,
15f0a394 1583 .get_sset_count = nes_netdev_get_sset_count,
3c2d774c
GS
1584 .get_ethtool_stats = nes_netdev_get_ethtool_stats,
1585 .get_drvinfo = nes_netdev_get_drvinfo,
1586 .get_coalesce = nes_netdev_get_coalesce,
1587 .set_coalesce = nes_netdev_set_coalesce,
1588 .get_pauseparam = nes_netdev_get_pauseparam,
1589 .set_pauseparam = nes_netdev_set_pauseparam,
3c2d774c
GS
1590};
1591
7033c4ad 1592static void nes_vlan_mode(struct net_device *netdev, struct nes_device *nesdev, u32 features)
3c2d774c 1593{
edd2fd64 1594 struct nes_adapter *nesadapter = nesdev->nesadapter;
3c2d774c 1595 u32 u32temp;
edd2fd64 1596 unsigned long flags;
3c2d774c 1597
edd2fd64 1598 spin_lock_irqsave(&nesadapter->phy_lock, flags);
3c2d774c 1599
edd2fd64
CT
1600 nes_debug(NES_DBG_NETDEV, "%s: %s\n", __func__, netdev->name);
1601
3c2d774c
GS
1602 /* Enable/Disable VLAN Stripping */
1603 u32temp = nes_read_indexed(nesdev, NES_IDX_PCIX_DIAG);
7033c4ad 1604 if (features & NETIF_F_HW_VLAN_RX)
3c2d774c
GS
1605 u32temp &= 0xfdffffff;
1606 else
1607 u32temp |= 0x02000000;
1608
1609 nes_write_indexed(nesdev, NES_IDX_PCIX_DIAG, u32temp);
edd2fd64 1610 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
3c2d774c
GS
1611}
1612
7033c4ad
JP
1613static u32 nes_fix_features(struct net_device *netdev, u32 features)
1614{
1615 /*
1616 * Since there is no support for separate rx/tx vlan accel
1617 * enable/disable make sure tx flag is always in same state as rx.
1618 */
1619 if (features & NETIF_F_HW_VLAN_RX)
1620 features |= NETIF_F_HW_VLAN_TX;
1621 else
1622 features &= ~NETIF_F_HW_VLAN_TX;
1623
1624 return features;
1625}
1626
1627static int nes_set_features(struct net_device *netdev, u32 features)
1628{
1629 struct nes_vnic *nesvnic = netdev_priv(netdev);
1630 struct nes_device *nesdev = nesvnic->nesdev;
1631 u32 changed = netdev->features ^ features;
1632
1633 if (changed & NETIF_F_HW_VLAN_RX)
1634 nes_vlan_mode(netdev, nesdev, features);
1635
1636 return 0;
1637}
1638
d0929553 1639static const struct net_device_ops nes_netdev_ops = {
7033c4ad 1640 .ndo_open = nes_netdev_open,
d0929553 1641 .ndo_stop = nes_netdev_stop,
7033c4ad 1642 .ndo_start_xmit = nes_netdev_start_xmit,
d0929553 1643 .ndo_get_stats = nes_netdev_get_stats,
7033c4ad 1644 .ndo_tx_timeout = nes_netdev_tx_timeout,
d0929553 1645 .ndo_set_mac_address = nes_netdev_set_mac_address,
afc4b13d 1646 .ndo_set_rx_mode = nes_netdev_set_multicast_list,
d0929553 1647 .ndo_change_mtu = nes_netdev_change_mtu,
d0929553 1648 .ndo_validate_addr = eth_validate_addr,
7033c4ad
JP
1649 .ndo_fix_features = nes_fix_features,
1650 .ndo_set_features = nes_set_features,
d0929553 1651};
3c2d774c
GS
1652
1653/**
1654 * nes_netdev_init - initialize network device
1655 */
1656struct net_device *nes_netdev_init(struct nes_device *nesdev,
1657 void __iomem *mmio_addr)
1658{
1659 u64 u64temp;
13220a94 1660 struct nes_vnic *nesvnic;
3c2d774c
GS
1661 struct net_device *netdev;
1662 struct nic_qp_map *curr_qp_map;
09124e19 1663 u8 phy_type = nesdev->nesadapter->phy_type[nesdev->mac_index];
3c2d774c
GS
1664
1665 netdev = alloc_etherdev(sizeof(struct nes_vnic));
1666 if (!netdev) {
1667 printk(KERN_ERR PFX "nesvnic etherdev alloc failed");
1668 return NULL;
1669 }
13220a94 1670 nesvnic = netdev_priv(netdev);
3c2d774c
GS
1671
1672 nes_debug(NES_DBG_INIT, "netdev = %p, %s\n", netdev, netdev->name);
1673
1674 SET_NETDEV_DEV(netdev, &nesdev->pcidev->dev);
1675
3c2d774c
GS
1676 netdev->watchdog_timeo = NES_TX_TIMEOUT;
1677 netdev->irq = nesdev->pcidev->irq;
1678 netdev->mtu = ETH_DATA_LEN;
1679 netdev->hard_header_len = ETH_HLEN;
1680 netdev->addr_len = ETH_ALEN;
1681 netdev->type = ARPHRD_ETHER;
1682 netdev->features = NETIF_F_HIGHDMA;
d0929553 1683 netdev->netdev_ops = &nes_netdev_ops;
3c2d774c
GS
1684 netdev->ethtool_ops = &nes_ethtool_ops;
1685 netif_napi_add(netdev, &nesvnic->napi, nes_netdev_poll, 128);
1686 nes_debug(NES_DBG_INIT, "Enabling VLAN Insert/Delete.\n");
7033c4ad 1687 netdev->features |= NETIF_F_HW_VLAN_TX;
3c2d774c
GS
1688
1689 /* Fill in the port structure */
1690 nesvnic->netdev = netdev;
1691 nesvnic->nesdev = nesdev;
1692 nesvnic->msg_enable = netif_msg_init(debug, default_msg);
1693 nesvnic->netdev_index = nesdev->netdev_count;
1694 nesvnic->perfect_filter_index = nesdev->nesadapter->netdev_count;
edd2fd64 1695 nesvnic->max_frame_size = netdev->mtu + netdev->hard_header_len + VLAN_HLEN;
3c2d774c
GS
1696
1697 curr_qp_map = nic_qp_mapping_per_function[PCI_FUNC(nesdev->pcidev->devfn)];
1698 nesvnic->nic.qp_id = curr_qp_map[nesdev->netdev_count].qpid;
1699 nesvnic->nic_index = curr_qp_map[nesdev->netdev_count].nic_index;
1700 nesvnic->logical_port = curr_qp_map[nesdev->netdev_count].logical_port;
1701
1702 /* Setup the burned in MAC address */
1703 u64temp = (u64)nesdev->nesadapter->mac_addr_low;
1704 u64temp += ((u64)nesdev->nesadapter->mac_addr_high) << 32;
1705 u64temp += nesvnic->nic_index;
1706 netdev->dev_addr[0] = (u8)(u64temp>>40);
1707 netdev->dev_addr[1] = (u8)(u64temp>>32);
1708 netdev->dev_addr[2] = (u8)(u64temp>>24);
1709 netdev->dev_addr[3] = (u8)(u64temp>>16);
1710 netdev->dev_addr[4] = (u8)(u64temp>>8);
1711 netdev->dev_addr[5] = (u8)u64temp;
1712 memcpy(netdev->perm_addr, netdev->dev_addr, 6);
1713
7033c4ad
JP
1714 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_IP_CSUM |
1715 NETIF_F_HW_VLAN_RX;
dd6f6d02
MM
1716 if ((nesvnic->logical_port < 2) || (nesdev->nesadapter->hw_rev != NE020_REV))
1717 netdev->hw_features |= NETIF_F_TSO;
1718 netdev->features |= netdev->hw_features;
1719 netdev->hw_features |= NETIF_F_LRO;
3c2d774c
GS
1720
1721 nes_debug(NES_DBG_INIT, "nesvnic = %p, reported features = 0x%lX, QPid = %d,"
1722 " nic_index = %d, logical_port = %d, mac_index = %d.\n",
1723 nesvnic, (unsigned long)netdev->features, nesvnic->nic.qp_id,
1724 nesvnic->nic_index, nesvnic->logical_port, nesdev->mac_index);
1725
7e36d3d7
VM
1726 if (nesvnic->nesdev->nesadapter->port_count == 1 &&
1727 nesvnic->nesdev->nesadapter->adapter_fcn_count == 1) {
1728
3c2d774c
GS
1729 nesvnic->qp_nic_index[0] = nesvnic->nic_index;
1730 nesvnic->qp_nic_index[1] = nesvnic->nic_index + 1;
1731 if (nes_drv_opt & NES_DRV_OPT_DUAL_LOGICAL_PORT) {
1732 nesvnic->qp_nic_index[2] = 0xf;
1733 nesvnic->qp_nic_index[3] = 0xf;
1734 } else {
1735 nesvnic->qp_nic_index[2] = nesvnic->nic_index + 2;
1736 nesvnic->qp_nic_index[3] = nesvnic->nic_index + 3;
1737 }
1738 } else {
7e36d3d7
VM
1739 if (nesvnic->nesdev->nesadapter->port_count == 2 ||
1740 (nesvnic->nesdev->nesadapter->port_count == 1 &&
1741 nesvnic->nesdev->nesadapter->adapter_fcn_count == 2)) {
1742 nesvnic->qp_nic_index[0] = nesvnic->nic_index;
1743 nesvnic->qp_nic_index[1] = nesvnic->nic_index
1744 + 2;
1745 nesvnic->qp_nic_index[2] = 0xf;
1746 nesvnic->qp_nic_index[3] = 0xf;
3c2d774c
GS
1747 } else {
1748 nesvnic->qp_nic_index[0] = nesvnic->nic_index;
1749 nesvnic->qp_nic_index[1] = 0xf;
1750 nesvnic->qp_nic_index[2] = 0xf;
1751 nesvnic->qp_nic_index[3] = 0xf;
1752 }
1753 }
1754 nesvnic->next_qp_nic_index = 0;
1755
1756 if (nesdev->netdev_count == 0) {
1757 nesvnic->rdma_enabled = 1;
1758 } else {
1759 nesvnic->rdma_enabled = 0;
1760 }
1761 nesvnic->nic_cq.cq_number = nesvnic->nic.qp_id;
ea623455
MS
1762 init_timer(&nesvnic->event_timer);
1763 nesvnic->event_timer.function = NULL;
3c2d774c 1764 spin_lock_init(&nesvnic->tx_lock);
ea623455 1765 spin_lock_init(&nesvnic->port_ibevent_lock);
3c2d774c
GS
1766 nesdev->netdev[nesdev->netdev_count] = netdev;
1767
1768 nes_debug(NES_DBG_INIT, "Adding nesvnic (%p) to the adapters nesvnic_list for MAC%d.\n",
1769 nesvnic, nesdev->mac_index);
1770 list_add_tail(&nesvnic->list, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]);
1771
1772 if ((nesdev->netdev_count == 0) &&
0e1de5d6 1773 ((PCI_FUNC(nesdev->pcidev->devfn) == nesdev->mac_index) ||
09124e19 1774 ((phy_type == NES_PHY_TYPE_PUMA_1G) &&
0e1de5d6
ES
1775 (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) ||
1776 ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) {
a72042c0 1777 u32 u32temp;
843276ad
MS
1778 u32 link_mask = 0;
1779 u32 link_val = 0;
1780 u16 temp_phy_data;
1781 u16 phy_data = 0;
1782 unsigned long flags;
a72042c0 1783
3c2d774c 1784 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
0e1de5d6 1785 (0x200 * (nesdev->mac_index & 1)));
09124e19 1786 if (phy_type != NES_PHY_TYPE_PUMA_1G) {
0e1de5d6
ES
1787 u32temp |= 0x00200000;
1788 nes_write_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1789 (0x200 * (nesdev->mac_index & 1)), u32temp);
1790 }
1791
a72042c0
CT
1792 /* Check and set linkup here. This is for back to back */
1793 /* configuration where second port won't get link interrupt */
1794 switch (phy_type) {
1795 case NES_PHY_TYPE_PUMA_1G:
1796 if (nesdev->mac_index < 2) {
1797 link_mask = 0x01010000;
1798 link_val = 0x01010000;
1799 } else {
1800 link_mask = 0x02020000;
1801 link_val = 0x02020000;
1802 }
1803 break;
843276ad
MS
1804 case NES_PHY_TYPE_SFP_D:
1805 spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags);
1806 nes_read_10G_phy_reg(nesdev,
1807 nesdev->nesadapter->phy_index[nesdev->mac_index],
1808 1, 0x9003);
1809 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1810 nes_read_10G_phy_reg(nesdev,
1811 nesdev->nesadapter->phy_index[nesdev->mac_index],
1812 3, 0x0021);
1813 nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1814 nes_read_10G_phy_reg(nesdev,
1815 nesdev->nesadapter->phy_index[nesdev->mac_index],
1816 3, 0x0021);
1817 phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1818 spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
1819 phy_data = (!temp_phy_data && (phy_data == 0x8000)) ? 0x4 : 0x0;
1820 break;
a72042c0
CT
1821 default:
1822 link_mask = 0x0f1f0000;
1823 link_val = 0x0f0f0000;
1824 break;
1825 }
1826
1827 u32temp = nes_read_indexed(nesdev,
1828 NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1829 (0x200 * (nesdev->mac_index & 1)));
843276ad
MS
1830
1831 if (phy_type == NES_PHY_TYPE_SFP_D) {
1832 if (phy_data & 0x0004)
1833 nesvnic->linkup = 1;
1834 } else {
1835 if ((u32temp & link_mask) == link_val)
1836 nesvnic->linkup = 1;
1837 }
a72042c0 1838
3c2d774c 1839 /* clear the MAC interrupt status, assumes direct logical to physical mapping */
11e0704b 1840 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index));
3c2d774c 1841 nes_debug(NES_DBG_INIT, "Phy interrupt status = 0x%X.\n", u32temp);
11e0704b 1842 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index), u32temp);
3c2d774c 1843
09124e19 1844 nes_init_phy(nesdev);
3c2d774c
GS
1845 }
1846
7033c4ad
JP
1847 nes_vlan_mode(netdev, nesdev, netdev->features);
1848
3c2d774c
GS
1849 return netdev;
1850}
1851
1852
1853/**
1854 * nes_netdev_destroy - destroy network device structure
1855 */
1856void nes_netdev_destroy(struct net_device *netdev)
1857{
1858 struct nes_vnic *nesvnic = netdev_priv(netdev);
1859
1860 /* make sure 'stop' method is called by Linux stack */
1861 /* nes_netdev_stop(netdev); */
1862
1863 list_del(&nesvnic->list);
1864
1865 if (nesvnic->of_device_registered) {
1866 nes_destroy_ofa_device(nesvnic->nesibdev);
1867 }
1868
1869 free_netdev(netdev);
1870}
1871
1872
1873/**
1874 * nes_nic_cm_xmit -- CM calls this to send out pkts
1875 */
1876int nes_nic_cm_xmit(struct sk_buff *skb, struct net_device *netdev)
1877{
1878 int ret;
1879
1880 skb->dev = netdev;
1881 ret = dev_queue_xmit(skb);
1882 if (ret) {
1883 nes_debug(NES_DBG_CM, "Bad return code from dev_queue_xmit %d\n", ret);
1884 }
1885
1886 return ret;
1887}