[linux-block.git] / drivers / infiniband / hw / mthca / mthca_srq.c

/*
 * Copyright (c) 2005 Cisco Systems. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 * $Id: mthca_srq.c 3047 2005-08-10 03:59:35Z roland $
 */

#include "mthca_dev.h"
#include "mthca_cmd.h"
#include "mthca_memfree.h"
#include "mthca_wqe.h"

enum {
	MTHCA_MAX_DIRECT_SRQ_SIZE = 4 * PAGE_SIZE
};

struct mthca_tavor_srq_context {
	__be64 wqe_base_ds;	/* low 6 bits is descriptor size */
	__be32 state_pd;
	__be32 lkey;
	__be32 uar;
	__be32 wqe_cnt;
	u32    reserved[2];
};

struct mthca_arbel_srq_context {
	__be32 state_logsize_srqn;
	__be32 lkey;
	__be32 db_index;
	__be32 logstride_usrpage;
	__be64 wqe_base;
	__be32 eq_pd;
	__be16 limit_watermark;
	__be16 wqe_cnt;
	u16    reserved1;
	__be16 wqe_counter;
	u32    reserved2[3];
};

static void *get_wqe(struct mthca_srq *srq, int n)
{
	if (srq->is_direct)
		return srq->queue.direct.buf + (n << srq->wqe_shift);
	else
		return srq->queue.page_list[(n << srq->wqe_shift) >> PAGE_SHIFT].buf +
			((n << srq->wqe_shift) & (PAGE_SIZE - 1));
}

/*
 * Return a pointer to the location within a WQE that we're using as a
 * link when the WQE is in the free list.  We use an offset of 4
 * because in the Tavor case, posting a WQE may overwrite the first
 * four bytes of the previous WQE.  The offset avoids corrupting our
 * free list if the WQE has already completed and been put on the free
 * list when we post the next WQE.
 */
static inline int *wqe_to_link(void *wqe)
{
	return (int *) (wqe + 4);
}

static void mthca_tavor_init_srq_context(struct mthca_dev *dev,
					 struct mthca_pd *pd,
					 struct mthca_srq *srq,
					 struct mthca_tavor_srq_context *context)
{
	memset(context, 0, sizeof *context);

	context->wqe_base_ds = cpu_to_be64(1 << (srq->wqe_shift - 4));
	context->state_pd    = cpu_to_be32(pd->pd_num);
	context->lkey        = cpu_to_be32(srq->mr.ibmr.lkey);

	if (pd->ibpd.uobject)
		context->uar =
			cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
	else
		context->uar = cpu_to_be32(dev->driver_uar.index);
}

static void mthca_arbel_init_srq_context(struct mthca_dev *dev,
					 struct mthca_pd *pd,
					 struct mthca_srq *srq,
					 struct mthca_arbel_srq_context *context)
{
	int logsize;

	memset(context, 0, sizeof *context);

	logsize = long_log2(srq->max) + srq->wqe_shift;
	context->state_logsize_srqn = cpu_to_be32(logsize << 24 | srq->srqn);
	context->lkey = cpu_to_be32(srq->mr.ibmr.lkey);
	context->db_index = cpu_to_be32(srq->db_index);
	context->logstride_usrpage = cpu_to_be32((srq->wqe_shift - 4) << 29);
	if (pd->ibpd.uobject)
		context->logstride_usrpage |=
			cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
	else
		context->logstride_usrpage |= cpu_to_be32(dev->driver_uar.index);
	context->eq_pd = cpu_to_be32(MTHCA_EQ_ASYNC << 24 | pd->pd_num);
}

static void mthca_free_srq_buf(struct mthca_dev *dev, struct mthca_srq *srq)
{
	mthca_buf_free(dev, srq->max << srq->wqe_shift, &srq->queue,
		       srq->is_direct, &srq->mr);
	kfree(srq->wrid);
}

static int mthca_alloc_srq_buf(struct mthca_dev *dev, struct mthca_pd *pd,
			       struct mthca_srq *srq)
{
	struct mthca_data_seg *scatter;
	void *wqe;
	int err;
	int i;

	if (pd->ibpd.uobject)
		return 0;

	srq->wrid = kmalloc(srq->max * sizeof (u64), GFP_KERNEL);
	if (!srq->wrid)
		return -ENOMEM;

	err = mthca_buf_alloc(dev, srq->max << srq->wqe_shift,
			      MTHCA_MAX_DIRECT_SRQ_SIZE,
			      &srq->queue, &srq->is_direct, pd, 1, &srq->mr);
	if (err) {
		kfree(srq->wrid);
		return err;
	}

	/*
	 * Now initialize the SRQ buffer so that all of the WQEs are
	 * linked into the list of free WQEs.  In addition, set the
	 * scatter list L_Keys to the sentry value of 0x100.
	 */
	for (i = 0; i < srq->max; ++i) {
		wqe = get_wqe(srq, i);

		*wqe_to_link(wqe) = i < srq->max - 1 ? i + 1 : -1;

		for (scatter = wqe + sizeof (struct mthca_next_seg);
		     (void *) scatter < wqe + (1 << srq->wqe_shift);
		     ++scatter)
			scatter->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
	}

	srq->last = get_wqe(srq, srq->max - 1);

	return 0;
}

int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
		    struct ib_srq_attr *attr, struct mthca_srq *srq)
{
	struct mthca_mailbox *mailbox;
	u8 status;
	int ds;
	int err;

	/* Sanity check SRQ size before proceeding */
	if (attr->max_wr > 16 << 20 || attr->max_sge > 64)
		return -EINVAL;

	srq->max      = attr->max_wr;
	srq->max_gs   = attr->max_sge;
	srq->counter  = 0;

	if (mthca_is_memfree(dev))
		srq->max = roundup_pow_of_two(srq->max + 1);

	ds = min(64UL,
		 roundup_pow_of_two(sizeof (struct mthca_next_seg) +
				    srq->max_gs * sizeof (struct mthca_data_seg)));
	srq->wqe_shift = long_log2(ds);

	srq->srqn = mthca_alloc(&dev->srq_table.alloc);
	if (srq->srqn == -1)
		return -ENOMEM;

	if (mthca_is_memfree(dev)) {
		err = mthca_table_get(dev, dev->srq_table.table, srq->srqn);
		if (err)
			goto err_out;

		if (!pd->ibpd.uobject) {
			srq->db_index = mthca_alloc_db(dev, MTHCA_DB_TYPE_SRQ,
						       srq->srqn, &srq->db);
			if (srq->db_index < 0) {
				err = -ENOMEM;
				goto err_out_icm;
			}
		}
	}

	mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
	if (IS_ERR(mailbox)) {
		err = PTR_ERR(mailbox);
		goto err_out_db;
	}

	err = mthca_alloc_srq_buf(dev, pd, srq);
	if (err)
		goto err_out_mailbox;

	spin_lock_init(&srq->lock);
	atomic_set(&srq->refcount, 1);
	init_waitqueue_head(&srq->wait);

	if (mthca_is_memfree(dev))
		mthca_arbel_init_srq_context(dev, pd, srq, mailbox->buf);
	else
		mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf);

	err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn, &status);

	if (err) {
		mthca_warn(dev, "SW2HW_SRQ failed (%d)\n", err);
		goto err_out_free_buf;
	}
	if (status) {
		mthca_warn(dev, "SW2HW_SRQ returned status 0x%02x\n",
			   status);
		err = -EINVAL;
		goto err_out_free_buf;
	}

	spin_lock_irq(&dev->srq_table.lock);
	if (mthca_array_set(&dev->srq_table.srq,
			    srq->srqn & (dev->limits.num_srqs - 1),
			    srq)) {
		spin_unlock_irq(&dev->srq_table.lock);
		goto err_out_free_srq;
	}
	spin_unlock_irq(&dev->srq_table.lock);

	mthca_free_mailbox(dev, mailbox);

	srq->first_free = 0;
	srq->last_free  = srq->max - 1;

	return 0;

err_out_free_srq:
	err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
	if (err)
		mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
	else if (status)
		mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);

err_out_free_buf:
	if (!pd->ibpd.uobject)
		mthca_free_srq_buf(dev, srq);

err_out_mailbox:
	mthca_free_mailbox(dev, mailbox);

err_out_db:
	if (!pd->ibpd.uobject && mthca_is_memfree(dev))
		mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);

err_out_icm:
	mthca_table_put(dev, dev->srq_table.table, srq->srqn);

err_out:
	mthca_free(&dev->srq_table.alloc, srq->srqn);

	return err;
}

void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq)
{
	struct mthca_mailbox *mailbox;
	int err;
	u8 status;

	mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
	if (IS_ERR(mailbox)) {
		mthca_warn(dev, "No memory for mailbox to free SRQ.\n");
		return;
	}

	err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
	if (err)
		mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
	else if (status)
		mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);

	spin_lock_irq(&dev->srq_table.lock);
	mthca_array_clear(&dev->srq_table.srq,
			  srq->srqn & (dev->limits.num_srqs - 1));
	spin_unlock_irq(&dev->srq_table.lock);

	atomic_dec(&srq->refcount);
	wait_event(srq->wait, !atomic_read(&srq->refcount));

	if (!srq->ibsrq.uobject) {
		mthca_free_srq_buf(dev, srq);
		if (mthca_is_memfree(dev))
			mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
	}

	mthca_table_put(dev, dev->srq_table.table, srq->srqn);
	mthca_free(&dev->srq_table.alloc, srq->srqn);
	mthca_free_mailbox(dev, mailbox);
}

void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
		     enum ib_event_type event_type)
{
	struct mthca_srq *srq;
	struct ib_event event;

	spin_lock(&dev->srq_table.lock);
	srq = mthca_array_get(&dev->srq_table.srq, srqn & (dev->limits.num_srqs - 1));
	if (srq)
		atomic_inc(&srq->refcount);
	spin_unlock(&dev->srq_table.lock);

	if (!srq) {
		mthca_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
		return;
	}

	if (!srq->ibsrq.event_handler)
		goto out;

	event.device      = &dev->ib_dev;
	event.event       = event_type;
	event.element.srq  = &srq->ibsrq;
	srq->ibsrq.event_handler(&event, srq->ibsrq.srq_context);

out:
	if (atomic_dec_and_test(&srq->refcount))
		wake_up(&srq->wait);
}

/*
 * This function must be called with IRQs disabled.
 */
void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr)
{
	int ind;

	ind = wqe_addr >> srq->wqe_shift;

	spin_lock(&srq->lock);

	if (likely(srq->first_free >= 0))
		*wqe_to_link(get_wqe(srq, srq->last_free)) = ind;
	else
		srq->first_free = ind;

	*wqe_to_link(get_wqe(srq, ind)) = -1;
	srq->last_free = ind;

	spin_unlock(&srq->lock);
}

int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
			      struct ib_recv_wr **bad_wr)
{
	struct mthca_dev *dev = to_mdev(ibsrq->device);
	struct mthca_srq *srq = to_msrq(ibsrq);
	unsigned long flags;
	int err = 0;
	int first_ind;
	int ind;
	int next_ind;
	int nreq;
	int i;
	void *wqe;
	void *prev_wqe;

	spin_lock_irqsave(&srq->lock, flags);

	first_ind = srq->first_free;

	for (nreq = 0; wr; ++nreq, wr = wr->next) {
		ind = srq->first_free;

		if (ind < 0) {
			mthca_err(dev, "SRQ %06x full\n", srq->srqn);
			err = -ENOMEM;
			*bad_wr = wr;
			break;
		}

		wqe       = get_wqe(srq, ind);
		next_ind  = *wqe_to_link(wqe);
		prev_wqe  = srq->last;
		srq->last = wqe;

		((struct mthca_next_seg *) wqe)->nda_op = 0;
		((struct mthca_next_seg *) wqe)->ee_nds = 0;
		/* flags field will always remain 0 */

		wqe += sizeof (struct mthca_next_seg);

		if (unlikely(wr->num_sge > srq->max_gs)) {
			err = -EINVAL;
			*bad_wr = wr;
			srq->last = prev_wqe;
			break;
		}

		for (i = 0; i < wr->num_sge; ++i) {
			((struct mthca_data_seg *) wqe)->byte_count =
				cpu_to_be32(wr->sg_list[i].length);
			((struct mthca_data_seg *) wqe)->lkey =
				cpu_to_be32(wr->sg_list[i].lkey);
			((struct mthca_data_seg *) wqe)->addr =
				cpu_to_be64(wr->sg_list[i].addr);
			wqe += sizeof (struct mthca_data_seg);
		}

		if (i < srq->max_gs) {
			((struct mthca_data_seg *) wqe)->byte_count = 0;
			((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
			((struct mthca_data_seg *) wqe)->addr = 0;
		}

		((struct mthca_next_seg *) prev_wqe)->nda_op =
			cpu_to_be32((ind << srq->wqe_shift) | 1);
		wmb();
		((struct mthca_next_seg *) prev_wqe)->ee_nds =
			cpu_to_be32(MTHCA_NEXT_DBD);

		srq->wrid[ind]  = wr->wr_id;
		srq->first_free = next_ind;
	}

	if (likely(nreq)) {
		__be32 doorbell[2];

		doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
		doorbell[1] = cpu_to_be32((srq->srqn << 8) | nreq);

		/*
		 * Make sure that descriptors are written before
		 * doorbell is rung.
		 */
		wmb();

		mthca_write64(doorbell,
			      dev->kar + MTHCA_RECEIVE_DOORBELL,
			      MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
	}

	spin_unlock_irqrestore(&srq->lock, flags);
	return err;
}

int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
			      struct ib_recv_wr **bad_wr)
{
	struct mthca_dev *dev = to_mdev(ibsrq->device);
	struct mthca_srq *srq = to_msrq(ibsrq);
	unsigned long flags;
	int err = 0;
	int ind;
	int next_ind;
	int nreq;
	int i;
	void *wqe;

	spin_lock_irqsave(&srq->lock, flags);

	for (nreq = 0; wr; ++nreq, wr = wr->next) {
		ind = srq->first_free;

		if (ind < 0) {
			mthca_err(dev, "SRQ %06x full\n", srq->srqn);
			err = -ENOMEM;
			*bad_wr = wr;
			break;
		}

		wqe       = get_wqe(srq, ind);
		next_ind  = *wqe_to_link(wqe);

		((struct mthca_next_seg *) wqe)->nda_op =
			cpu_to_be32((next_ind << srq->wqe_shift) | 1);
		((struct mthca_next_seg *) wqe)->ee_nds = 0;
		/* flags field will always remain 0 */

		wqe += sizeof (struct mthca_next_seg);

		if (unlikely(wr->num_sge > srq->max_gs)) {
			err = -EINVAL;
			*bad_wr = wr;
			break;
		}

		for (i = 0; i < wr->num_sge; ++i) {
			((struct mthca_data_seg *) wqe)->byte_count =
				cpu_to_be32(wr->sg_list[i].length);
			((struct mthca_data_seg *) wqe)->lkey =
				cpu_to_be32(wr->sg_list[i].lkey);
			((struct mthca_data_seg *) wqe)->addr =
				cpu_to_be64(wr->sg_list[i].addr);
			wqe += sizeof (struct mthca_data_seg);
		}

		if (i < srq->max_gs) {
			((struct mthca_data_seg *) wqe)->byte_count = 0;
			((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
			((struct mthca_data_seg *) wqe)->addr = 0;
		}

		srq->wrid[ind]  = wr->wr_id;
		srq->first_free = next_ind;
	}

	if (likely(nreq)) {
		srq->counter += nreq;

		/*
		 * Make sure that descriptors are written before
		 * we write doorbell record.
		 */
		wmb();
		*srq->db = cpu_to_be32(srq->counter);
	}

	spin_unlock_irqrestore(&srq->lock, flags);
	return err;
}

int __devinit mthca_init_srq_table(struct mthca_dev *dev)
{
	int err;

	if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
		return 0;

	spin_lock_init(&dev->srq_table.lock);

	err = mthca_alloc_init(&dev->srq_table.alloc,
			       dev->limits.num_srqs,
			       dev->limits.num_srqs - 1,
			       dev->limits.reserved_srqs);
	if (err)
		return err;

	err = mthca_array_init(&dev->srq_table.srq,
			       dev->limits.num_srqs);
	if (err)
		mthca_alloc_cleanup(&dev->srq_table.alloc);

	return err;
}

void __devexit mthca_cleanup_srq_table(struct mthca_dev *dev)
{
	if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
		return;

	mthca_array_cleanup(&dev->srq_table.srq, dev->limits.num_srqs);
	mthca_alloc_cleanup(&dev->srq_table.alloc);
}
Commit	Line	Data
ec34a922 RD	1	/*
	2	* Copyright (c) 2005 Cisco Systems. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*
	32	* $Id: mthca_srq.c 3047 2005-08-10 03:59:35Z roland $
	33	*/
	34
	35	#include "mthca_dev.h"
	36	#include "mthca_cmd.h"
	37	#include "mthca_memfree.h"
	38	#include "mthca_wqe.h"
	39
	40	enum {
	41	MTHCA_MAX_DIRECT_SRQ_SIZE = 4 * PAGE_SIZE
	42	};
	43
	44	struct mthca_tavor_srq_context {
	45	__be64 wqe_base_ds; /* low 6 bits is descriptor size */
	46	__be32 state_pd;
	47	__be32 lkey;
	48	__be32 uar;
	49	__be32 wqe_cnt;
	50	u32 reserved[2];
	51	};
	52
	53	struct mthca_arbel_srq_context {
	54	__be32 state_logsize_srqn;
	55	__be32 lkey;
	56	__be32 db_index;
	57	__be32 logstride_usrpage;
	58	__be64 wqe_base;
	59	__be32 eq_pd;
	60	__be16 limit_watermark;
	61	__be16 wqe_cnt;
	62	u16 reserved1;
	63	__be16 wqe_counter;
	64	u32 reserved2[3];
65	};
66
67	static void get_wqe(struct mthca_srq srq, int n)
68	{
69	if (srq->is_direct)
70	return srq->queue.direct.buf + (n << srq->wqe_shift);
71	else
72	return srq->queue.page_list[(n << srq->wqe_shift) >> PAGE_SHIFT].buf +
73	((n << srq->wqe_shift) & (PAGE_SIZE - 1));
74	}
75
76	/*
77	* Return a pointer to the location within a WQE that we're using as a
78	* link when the WQE is in the free list. We use an offset of 4
79	* because in the Tavor case, posting a WQE may overwrite the first
80	* four bytes of the previous WQE. The offset avoids corrupting our
81	* free list if the WQE has already completed and been put on the free
82	* list when we post the next WQE.
83	*/
84	static inline int wqe_to_link(void wqe)
85	{
86	return (int *) (wqe + 4);
87	}
88
89	static void mthca_tavor_init_srq_context(struct mthca_dev *dev,
90	struct mthca_pd *pd,
91	struct mthca_srq *srq,
92	struct mthca_tavor_srq_context *context)
93	{
94	memset(context, 0, sizeof *context);
95
96	context->wqe_base_ds = cpu_to_be64(1 << (srq->wqe_shift - 4));
97	context->state_pd = cpu_to_be32(pd->pd_num);
98	context->lkey = cpu_to_be32(srq->mr.ibmr.lkey);
99
100	if (pd->ibpd.uobject)
101	context->uar =
102	cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
103	else
104	context->uar = cpu_to_be32(dev->driver_uar.index);
105	}
106
107	static void mthca_arbel_init_srq_context(struct mthca_dev *dev,
108	struct mthca_pd *pd,
109	struct mthca_srq *srq,
110	struct mthca_arbel_srq_context *context)
111	{
112	int logsize;
113
114	memset(context, 0, sizeof *context);
115
116	logsize = long_log2(srq->max) + srq->wqe_shift;
117	context->state_logsize_srqn = cpu_to_be32(logsize << 24 \| srq->srqn);
118	context->lkey = cpu_to_be32(srq->mr.ibmr.lkey);
119	context->db_index = cpu_to_be32(srq->db_index);
120	context->logstride_usrpage = cpu_to_be32((srq->wqe_shift - 4) << 29);
121	if (pd->ibpd.uobject)
122	context->logstride_usrpage \|=
123	cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
124	else
125	context->logstride_usrpage \|= cpu_to_be32(dev->driver_uar.index);
126	context->eq_pd = cpu_to_be32(MTHCA_EQ_ASYNC << 24 \| pd->pd_num);
127	}
128
129	static void mthca_free_srq_buf(struct mthca_dev dev, struct mthca_srq srq)
130	{
131	mthca_buf_free(dev, srq->max << srq->wqe_shift, &srq->queue,
132	srq->is_direct, &srq->mr);
133	kfree(srq->wrid);
134	}
135
136	static int mthca_alloc_srq_buf(struct mthca_dev dev, struct mthca_pd pd,
137	struct mthca_srq *srq)
138	{
139	struct mthca_data_seg *scatter;
140	void *wqe;
141	int err;
142	int i;
143
144	if (pd->ibpd.uobject)
145	return 0;
146
147	srq->wrid = kmalloc(srq->max * sizeof (u64), GFP_KERNEL);
148	if (!srq->wrid)
149	return -ENOMEM;
150
151	err = mthca_buf_alloc(dev, srq->max << srq->wqe_shift,
152	MTHCA_MAX_DIRECT_SRQ_SIZE,
153	&srq->queue, &srq->is_direct, pd, 1, &srq->mr);
154	if (err) {
155	kfree(srq->wrid);
156	return err;
157	}
158
159	/*
160	* Now initialize the SRQ buffer so that all of the WQEs are
161	* linked into the list of free WQEs. In addition, set the
162	* scatter list L_Keys to the sentry value of 0x100.
163	*/
164	for (i = 0; i < srq->max; ++i) {
165	wqe = get_wqe(srq, i);
166
167	*wqe_to_link(wqe) = i < srq->max - 1 ? i + 1 : -1;
168
169	for (scatter = wqe + sizeof (struct mthca_next_seg);
170	(void *) scatter < wqe + (1 << srq->wqe_shift);
171	++scatter)
172	scatter->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
173	}
174
6577ae51 RD	175	srq->last = get_wqe(srq, srq->max - 1);
6577ae51 RD	176
ec34a922 RD	177	return 0;
	178	}
	179
	180	int mthca_alloc_srq(struct mthca_dev dev, struct mthca_pd pd,
	181	struct ib_srq_attr attr, struct mthca_srq srq)
	182	{
	183	struct mthca_mailbox *mailbox;
	184	u8 status;
	185	int ds;
	186	int err;
	187
	188	/* Sanity check SRQ size before proceeding */
	189	if (attr->max_wr > 16 << 20 \|\| attr->max_sge > 64)
	190	return -EINVAL;
	191
	192	srq->max = attr->max_wr;
	193	srq->max_gs = attr->max_sge;
ec34a922 RD	194	srq->counter = 0;
	195
	196	if (mthca_is_memfree(dev))
	197	srq->max = roundup_pow_of_two(srq->max + 1);
	198
	199	ds = min(64UL,
	200	roundup_pow_of_two(sizeof (struct mthca_next_seg) +
	201	srq->max_gs * sizeof (struct mthca_data_seg)));
	202	srq->wqe_shift = long_log2(ds);
	203
	204	srq->srqn = mthca_alloc(&dev->srq_table.alloc);
	205	if (srq->srqn == -1)
	206	return -ENOMEM;
	207
	208	if (mthca_is_memfree(dev)) {
	209	err = mthca_table_get(dev, dev->srq_table.table, srq->srqn);
	210	if (err)
	211	goto err_out;
	212
	213	if (!pd->ibpd.uobject) {
	214	srq->db_index = mthca_alloc_db(dev, MTHCA_DB_TYPE_SRQ,
	215	srq->srqn, &srq->db);
	216	if (srq->db_index < 0) {
	217	err = -ENOMEM;
	218	goto err_out_icm;
	219	}
	220	}
	221	}
	222
	223	mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
	224	if (IS_ERR(mailbox)) {
	225	err = PTR_ERR(mailbox);
	226	goto err_out_db;
	227	}
	228
	229	err = mthca_alloc_srq_buf(dev, pd, srq);
	230	if (err)
	231	goto err_out_mailbox;
	232
	233	spin_lock_init(&srq->lock);
	234	atomic_set(&srq->refcount, 1);
	235	init_waitqueue_head(&srq->wait);
	236
	237	if (mthca_is_memfree(dev))
	238	mthca_arbel_init_srq_context(dev, pd, srq, mailbox->buf);
	239	else
	240	mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf);
	241
	242	err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn, &status);
	243
	244	if (err) {
	245	mthca_warn(dev, "SW2HW_SRQ failed (%d)\n", err);
	246	goto err_out_free_buf;
	247	}
	248	if (status) {
	249	mthca_warn(dev, "SW2HW_SRQ returned status 0x%02x\n",
	250	status);
	251	err = -EINVAL;
	252	goto err_out_free_buf;
	253	}
	254
	255	spin_lock_irq(&dev->srq_table.lock);
	256	if (mthca_array_set(&dev->srq_table.srq,
	257	srq->srqn & (dev->limits.num_srqs - 1),
258	srq)) {
259	spin_unlock_irq(&dev->srq_table.lock);
260	goto err_out_free_srq;
261	}
262	spin_unlock_irq(&dev->srq_table.lock);
263
264	mthca_free_mailbox(dev, mailbox);
265
266	srq->first_free = 0;
267	srq->last_free = srq->max - 1;
268
269	return 0;
270
271	err_out_free_srq:
272	err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
273	if (err)
274	mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
275	else if (status)
276	mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
277
278	err_out_free_buf:
279	if (!pd->ibpd.uobject)
280	mthca_free_srq_buf(dev, srq);
281
282	err_out_mailbox:
283	mthca_free_mailbox(dev, mailbox);
284
285	err_out_db:
286	if (!pd->ibpd.uobject && mthca_is_memfree(dev))
287	mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
288
289	err_out_icm:
290	mthca_table_put(dev, dev->srq_table.table, srq->srqn);
291
292	err_out:
293	mthca_free(&dev->srq_table.alloc, srq->srqn);
294
295	return err;
296	}
297
298	void mthca_free_srq(struct mthca_dev dev, struct mthca_srq srq)
299	{
300	struct mthca_mailbox *mailbox;
301	int err;
302	u8 status;
303
304	mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
305	if (IS_ERR(mailbox)) {
306	mthca_warn(dev, "No memory for mailbox to free SRQ.\n");
307	return;
308	}
309
310	err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
311	if (err)
312	mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
313	else if (status)
314	mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
315
316	spin_lock_irq(&dev->srq_table.lock);
317	mthca_array_clear(&dev->srq_table.srq,
318	srq->srqn & (dev->limits.num_srqs - 1));
319	spin_unlock_irq(&dev->srq_table.lock);
320
321	atomic_dec(&srq->refcount);
322	wait_event(srq->wait, !atomic_read(&srq->refcount));
323
324	if (!srq->ibsrq.uobject) {
325	mthca_free_srq_buf(dev, srq);
326	if (mthca_is_memfree(dev))
327	mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
328	}
329
330	mthca_table_put(dev, dev->srq_table.table, srq->srqn);
331	mthca_free(&dev->srq_table.alloc, srq->srqn);
332	mthca_free_mailbox(dev, mailbox);
333	}
334
335	void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
336	enum ib_event_type event_type)
337	{
338	struct mthca_srq *srq;
339	struct ib_event event;
340
341	spin_lock(&dev->srq_table.lock);
342	srq = mthca_array_get(&dev->srq_table.srq, srqn & (dev->limits.num_srqs - 1));
343	if (srq)
344	atomic_inc(&srq->refcount);
345	spin_unlock(&dev->srq_table.lock);
346
347	if (!srq) {
348	mthca_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
349	return;
350	}
351
352	if (!srq->ibsrq.event_handler)
353	goto out;
354
355	event.device = &dev->ib_dev;
356	event.event = event_type;
357	event.element.srq = &srq->ibsrq;
358	srq->ibsrq.event_handler(&event, srq->ibsrq.srq_context);
359
360	out:
361	if (atomic_dec_and_test(&srq->refcount))
362	wake_up(&srq->wait);
363	}
364
365	/*
366	* This function must be called with IRQs disabled.
367	*/
368	void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr)
369	{
370	int ind;
371
372	ind = wqe_addr >> srq->wqe_shift;
373
374	spin_lock(&srq->lock);
375
376	if (likely(srq->first_free >= 0))
377	*wqe_to_link(get_wqe(srq, srq->last_free)) = ind;
378	else
379	srq->first_free = ind;
380
381	*wqe_to_link(get_wqe(srq, ind)) = -1;
382	srq->last_free = ind;
383
384	spin_unlock(&srq->lock);
385	}
386
387	int mthca_tavor_post_srq_recv(struct ib_srq ibsrq, struct ib_recv_wr wr,
388	struct ib_recv_wr **bad_wr)
389	{
390	struct mthca_dev *dev = to_mdev(ibsrq->device);
391	struct mthca_srq *srq = to_msrq(ibsrq);
392	unsigned long flags;
393	int err = 0;
394	int first_ind;
395	int ind;
396	int next_ind;
397	int nreq;
398	int i;
399	void *wqe;
400	void *prev_wqe;
401
402	spin_lock_irqsave(&srq->lock, flags);
403
404	first_ind = srq->first_free;
405
406	for (nreq = 0; wr; ++nreq, wr = wr->next) {
407	ind = srq->first_free;
408
409	if (ind < 0) {
410	mthca_err(dev, "SRQ %06x full\n", srq->srqn);
411	err = -ENOMEM;
412	*bad_wr = wr;
3853194c	413	break;
ec34a922 RD	414	}
	415
	416	wqe = get_wqe(srq, ind);
	417	next_ind = *wqe_to_link(wqe);
	418	prev_wqe = srq->last;
	419	srq->last = wqe;
	420
	421	((struct mthca_next_seg *) wqe)->nda_op = 0;
	422	((struct mthca_next_seg *) wqe)->ee_nds = 0;
	423	/* flags field will always remain 0 */
	424
	425	wqe += sizeof (struct mthca_next_seg);
	426
	427	if (unlikely(wr->num_sge > srq->max_gs)) {
	428	err = -EINVAL;
	429	*bad_wr = wr;
	430	srq->last = prev_wqe;
3853194c	431	break;
ec34a922 RD	432	}
	433
	434	for (i = 0; i < wr->num_sge; ++i) {
	435	((struct mthca_data_seg *) wqe)->byte_count =
	436	cpu_to_be32(wr->sg_list[i].length);
	437	((struct mthca_data_seg *) wqe)->lkey =
	438	cpu_to_be32(wr->sg_list[i].lkey);
	439	((struct mthca_data_seg *) wqe)->addr =
	440	cpu_to_be64(wr->sg_list[i].addr);
	441	wqe += sizeof (struct mthca_data_seg);
	442	}
	443
	444	if (i < srq->max_gs) {
	445	((struct mthca_data_seg *) wqe)->byte_count = 0;
	446	((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
	447	((struct mthca_data_seg *) wqe)->addr = 0;
	448	}
	449
d6cff021 RD	450	((struct mthca_next_seg *) prev_wqe)->nda_op =
	451	cpu_to_be32((ind << srq->wqe_shift) \| 1);
	452	wmb();
	453	((struct mthca_next_seg *) prev_wqe)->ee_nds =
	454	cpu_to_be32(MTHCA_NEXT_DBD);
ec34a922 RD	455
	456	srq->wrid[ind] = wr->wr_id;
	457	srq->first_free = next_ind;
	458	}
	459
ec34a922 RD	460	if (likely(nreq)) {
	461	__be32 doorbell[2];
	462
	463	doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
	464	doorbell[1] = cpu_to_be32((srq->srqn << 8) \| nreq);
	465
	466	/*
	467	* Make sure that descriptors are written before
	468	* doorbell is rung.
	469	*/
	470	wmb();
	471
	472	mthca_write64(doorbell,
	473	dev->kar + MTHCA_RECEIVE_DOORBELL,
	474	MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
	475	}
	476
	477	spin_unlock_irqrestore(&srq->lock, flags);
	478	return err;
	479	}
	480
	481	int mthca_arbel_post_srq_recv(struct ib_srq ibsrq, struct ib_recv_wr wr,
	482	struct ib_recv_wr **bad_wr)
	483	{
	484	struct mthca_dev *dev = to_mdev(ibsrq->device);
	485	struct mthca_srq *srq = to_msrq(ibsrq);
	486	unsigned long flags;
	487	int err = 0;
	488	int ind;
	489	int next_ind;
	490	int nreq;
	491	int i;
	492	void *wqe;
	493
	494	spin_lock_irqsave(&srq->lock, flags);
	495
	496	for (nreq = 0; wr; ++nreq, wr = wr->next) {
	497	ind = srq->first_free;
	498
	499	if (ind < 0) {
	500	mthca_err(dev, "SRQ %06x full\n", srq->srqn);
	501	err = -ENOMEM;
	502	*bad_wr = wr;
3853194c	503	break;
ec34a922 RD	504	}
	505
	506	wqe = get_wqe(srq, ind);
	507	next_ind = *wqe_to_link(wqe);
	508
	509	((struct mthca_next_seg *) wqe)->nda_op =
	510	cpu_to_be32((next_ind << srq->wqe_shift) \| 1);
	511	((struct mthca_next_seg *) wqe)->ee_nds = 0;
	512	/* flags field will always remain 0 */
	513
	514	wqe += sizeof (struct mthca_next_seg);
	515
	516	if (unlikely(wr->num_sge > srq->max_gs)) {
	517	err = -EINVAL;
	518	*bad_wr = wr;
3853194c	519	break;
ec34a922 RD	520	}
	521
	522	for (i = 0; i < wr->num_sge; ++i) {
	523	((struct mthca_data_seg *) wqe)->byte_count =
	524	cpu_to_be32(wr->sg_list[i].length);
	525	((struct mthca_data_seg *) wqe)->lkey =
	526	cpu_to_be32(wr->sg_list[i].lkey);
	527	((struct mthca_data_seg *) wqe)->addr =
	528	cpu_to_be64(wr->sg_list[i].addr);
	529	wqe += sizeof (struct mthca_data_seg);
	530	}
	531
	532	if (i < srq->max_gs) {
	533	((struct mthca_data_seg *) wqe)->byte_count = 0;
	534	((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
	535	((struct mthca_data_seg *) wqe)->addr = 0;
	536	}
	537
	538	srq->wrid[ind] = wr->wr_id;
	539	srq->first_free = next_ind;
	540	}
	541
	542	if (likely(nreq)) {
	543	srq->counter += nreq;
	544
	545	/*
	546	* Make sure that descriptors are written before
	547	* we write doorbell record.
	548	*/
	549	wmb();
	550	*srq->db = cpu_to_be32(srq->counter);
	551	}
	552
	553	spin_unlock_irqrestore(&srq->lock, flags);
	554	return err;
	555	}
	556
	557	int __devinit mthca_init_srq_table(struct mthca_dev *dev)
	558	{
	559	int err;
	560
	561	if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
	562	return 0;
	563
	564	spin_lock_init(&dev->srq_table.lock);
	565
	566	err = mthca_alloc_init(&dev->srq_table.alloc,
	567	dev->limits.num_srqs,
	568	dev->limits.num_srqs - 1,
	569	dev->limits.reserved_srqs);
	570	if (err)
	571	return err;
	572
	573	err = mthca_array_init(&dev->srq_table.srq,
	574	dev->limits.num_srqs);
	575	if (err)
	576	mthca_alloc_cleanup(&dev->srq_table.alloc);
	577
	578	return err;
	579	}
	580
	581	void __devexit mthca_cleanup_srq_table(struct mthca_dev *dev)
	582	{
	583	if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
584	return;
585
586	mthca_array_cleanup(&dev->srq_table.srq, dev->limits.num_srqs);
587	mthca_alloc_cleanup(&dev->srq_table.alloc);
588	}