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[PATCH] IB/mthca: update receive queue initialization for new HCAs
[linux-block.git] / drivers / infiniband / hw / mthca / mthca_main.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
33 */
34
35#include <linux/config.h>
36#include <linux/version.h>
37#include <linux/module.h>
38#include <linux/init.h>
39#include <linux/errno.h>
40#include <linux/pci.h>
41#include <linux/interrupt.h>
42
43#include "mthca_dev.h"
44#include "mthca_config_reg.h"
45#include "mthca_cmd.h"
46#include "mthca_profile.h"
47#include "mthca_memfree.h"
48
49MODULE_AUTHOR("Roland Dreier");
50MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
51MODULE_LICENSE("Dual BSD/GPL");
52MODULE_VERSION(DRV_VERSION);
53
54#ifdef CONFIG_PCI_MSI
55
56static int msi_x = 0;
57module_param(msi_x, int, 0444);
58MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
59
60static int msi = 0;
61module_param(msi, int, 0444);
62MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero");
63
64#else /* CONFIG_PCI_MSI */
65
66#define msi_x (0)
67#define msi (0)
68
69#endif /* CONFIG_PCI_MSI */
70
71static const char mthca_version[] __devinitdata =
72 "ib_mthca: Mellanox InfiniBand HCA driver v"
73 DRV_VERSION " (" DRV_RELDATE ")\n";
74
75static struct mthca_profile default_profile = {
e0f5fdca
MT		 76 .num_qp = 1 << 16,
77 .rdb_per_qp = 4,
78 .num_cq = 1 << 16,
79 .num_mcg = 1 << 13,
80 .num_mpt = 1 << 17,
81 .num_mtt = 1 << 20,
82 .num_udav = 1 << 15, /* Tavor only */
83 .fmr_reserved_mtts = 1 << 18, /* Tavor only */
84 .uarc_size = 1 << 18, /* Arbel only */
1da177e4
LT		 85};
86
87static int __devinit mthca_tune_pci(struct mthca_dev *mdev)
88{
89 int cap;
90 u16 val;
91
92 /* First try to max out Read Byte Count */
93 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
94 if (cap) {
95 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
96 mthca_err(mdev, "Couldn't read PCI-X command register, "
97 "aborting.\n");
98 return -ENODEV;
99 }
100 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
101 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
102 mthca_err(mdev, "Couldn't write PCI-X command register, "
103 "aborting.\n");
104 return -ENODEV;
105 }
106 } else if (mdev->hca_type == TAVOR)
107 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
108
109 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
110 if (cap) {
111 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
112 mthca_err(mdev, "Couldn't read PCI Express device control "
113 "register, aborting.\n");
114 return -ENODEV;
115 }
116 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
117 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
118 mthca_err(mdev, "Couldn't write PCI Express device control "
119 "register, aborting.\n");
120 return -ENODEV;
121 }
122 } else if (mdev->hca_type == ARBEL_NATIVE ||
123 mdev->hca_type == ARBEL_COMPAT)
124 mthca_info(mdev, "No PCI Express capability, "
125 "not setting Max Read Request Size.\n");
126
127 return 0;
128}
129
130static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
131{
132 int err;
133 u8 status;
134
135 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
136 if (err) {
137 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
138 return err;
139 }
140 if (status) {
141 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
142 "aborting.\n", status);
143 return -EINVAL;
144 }
145 if (dev_lim->min_page_sz > PAGE_SIZE) {
146 mthca_err(mdev, "HCA minimum page size of %d bigger than "
147 "kernel PAGE_SIZE of %ld, aborting.\n",
148 dev_lim->min_page_sz, PAGE_SIZE);
149 return -ENODEV;
150 }
151 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
152 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
153 "aborting.\n",
154 dev_lim->num_ports, MTHCA_MAX_PORTS);
155 return -ENODEV;
156 }
157
158 mdev->limits.num_ports = dev_lim->num_ports;
159 mdev->limits.vl_cap = dev_lim->max_vl;
160 mdev->limits.mtu_cap = dev_lim->max_mtu;
161 mdev->limits.gid_table_len = dev_lim->max_gids;
162 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
163 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
164 mdev->limits.max_sg = dev_lim->max_sg;
165 mdev->limits.reserved_qps = dev_lim->reserved_qps;
166 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
167 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
168 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
169 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
170 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
171 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
172 mdev->limits.reserved_uars = dev_lim->reserved_uars;
173 mdev->limits.reserved_pds = dev_lim->reserved_pds;
174
175 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
176 May be doable since hardware supports it for SRQ.
177
178 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
179
180 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
181 supported by driver. */
182 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
183 IB_DEVICE_PORT_ACTIVE_EVENT |
184 IB_DEVICE_SYS_IMAGE_GUID |
185 IB_DEVICE_RC_RNR_NAK_GEN;
186
187 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
188 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
189
190 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
191 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
192
193 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
194 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
195
196 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
197 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
198
199 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
200 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
201
202 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
203 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
204
205 return 0;
206}
207
208static int __devinit mthca_init_tavor(struct mthca_dev *mdev)
209{
210 u8 status;
211 int err;
212 struct mthca_dev_lim dev_lim;
213 struct mthca_profile profile;
214 struct mthca_init_hca_param init_hca;
215 struct mthca_adapter adapter;
216
217 err = mthca_SYS_EN(mdev, &status);
218 if (err) {
219 mthca_err(mdev, "SYS_EN command failed, aborting.\n");
220 return err;
221 }
222 if (status) {
223 mthca_err(mdev, "SYS_EN returned status 0x%02x, "
224 "aborting.\n", status);
225 return -EINVAL;
226 }
227
228 err = mthca_QUERY_FW(mdev, &status);
229 if (err) {
230 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
231 goto err_disable;
232 }
233 if (status) {
234 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
235 "aborting.\n", status);
236 err = -EINVAL;
237 goto err_disable;
238 }
239 err = mthca_QUERY_DDR(mdev, &status);
240 if (err) {
241 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
242 goto err_disable;
243 }
244 if (status) {
245 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
246 "aborting.\n", status);
247 err = -EINVAL;
248 goto err_disable;
249 }
250
251 err = mthca_dev_lim(mdev, &dev_lim);
252
253 profile = default_profile;
254 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
255 profile.uarc_size = 0;
256
257 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
258 if (err < 0)
259 goto err_disable;
260
261 err = mthca_INIT_HCA(mdev, &init_hca, &status);
262 if (err) {
263 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
264 goto err_disable;
265 }
266 if (status) {
267 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
268 "aborting.\n", status);
269 err = -EINVAL;
270 goto err_disable;
271 }
272
273 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
274 if (err) {
275 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
276 goto err_close;
277 }
278 if (status) {
279 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
280 "aborting.\n", status);
281 err = -EINVAL;
282 goto err_close;
283 }
284
285 mdev->eq_table.inta_pin = adapter.inta_pin;
286 mdev->rev_id = adapter.revision_id;
287
288 return 0;
289
290err_close:
291 mthca_CLOSE_HCA(mdev, 0, &status);
292
293err_disable:
294 mthca_SYS_DIS(mdev, &status);
295
296 return err;
297}
298
299static int __devinit mthca_load_fw(struct mthca_dev *mdev)
300{
301 u8 status;
302 int err;
303
304 /* FIXME: use HCA-attached memory for FW if present */
305
306 mdev->fw.arbel.fw_icm =
307 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
308 GFP_HIGHUSER | __GFP_NOWARN);
309 if (!mdev->fw.arbel.fw_icm) {
310 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
311 return -ENOMEM;
312 }
313
314 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
315 if (err) {
316 mthca_err(mdev, "MAP_FA command failed, aborting.\n");
317 goto err_free;
318 }
319 if (status) {
320 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
321 err = -EINVAL;
322 goto err_free;
323 }
324 err = mthca_RUN_FW(mdev, &status);
325 if (err) {
326 mthca_err(mdev, "RUN_FW command failed, aborting.\n");
327 goto err_unmap_fa;
328 }
329 if (status) {
330 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
331 err = -EINVAL;
332 goto err_unmap_fa;
333 }
334
335 return 0;
336
337err_unmap_fa:
338 mthca_UNMAP_FA(mdev, &status);
339
340err_free:
341 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
342 return err;
343}
344
345static int __devinit mthca_init_icm(struct mthca_dev *mdev,
346 struct mthca_dev_lim *dev_lim,
347 struct mthca_init_hca_param *init_hca,
348 u64 icm_size)
349{
350 u64 aux_pages;
351 u8 status;
352 int err;
353
354 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
355 if (err) {
356 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
357 return err;
358 }
359 if (status) {
360 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
361 "aborting.\n", status);
362 return -EINVAL;
363 }
364
365 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
366 (unsigned long long) icm_size >> 10,
367 (unsigned long long) aux_pages << 2);
368
369 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
370 GFP_HIGHUSER | __GFP_NOWARN);
371 if (!mdev->fw.arbel.aux_icm) {
372 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
373 return -ENOMEM;
374 }
375
376 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
377 if (err) {
378 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
379 goto err_free_aux;
380 }
381 if (status) {
382 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
383 err = -EINVAL;
384 goto err_free_aux;
385 }
386
387 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
388 if (err) {
389 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
390 goto err_unmap_aux;
391 }
392
393 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
44ea6687 394 MTHCA_MTT_SEG_SIZE,
1da177e4
LT		 395 mdev->limits.num_mtt_segs,
396 mdev->limits.reserved_mtts, 1);
397 if (!mdev->mr_table.mtt_table) {
398 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
399 err = -ENOMEM;
400 goto err_unmap_eq;
401 }
402
403 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
404 dev_lim->mpt_entry_sz,
405 mdev->limits.num_mpts,
406 mdev->limits.reserved_mrws, 1);
407 if (!mdev->mr_table.mpt_table) {
408 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
409 err = -ENOMEM;
410 goto err_unmap_mtt;
411 }
412
413 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
414 dev_lim->qpc_entry_sz,
415 mdev->limits.num_qps,
416 mdev->limits.reserved_qps, 0);
417 if (!mdev->qp_table.qp_table) {
418 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
419 err = -ENOMEM;
420 goto err_unmap_mpt;
421 }
422
423 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
424 dev_lim->eqpc_entry_sz,
425 mdev->limits.num_qps,
426 mdev->limits.reserved_qps, 0);
427 if (!mdev->qp_table.eqp_table) {
428 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
429 err = -ENOMEM;
430 goto err_unmap_qp;
431 }
432
433 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
434 dev_lim->cqc_entry_sz,
435 mdev->limits.num_cqs,
436 mdev->limits.reserved_cqs, 0);
437 if (!mdev->cq_table.table) {
438 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
439 err = -ENOMEM;
440 goto err_unmap_eqp;
441 }
442
443 /*
444 * It's not strictly required, but for simplicity just map the
445 * whole multicast group table now. The table isn't very big
446 * and it's a lot easier than trying to track ref counts.
447 */
448 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
449 MTHCA_MGM_ENTRY_SIZE,
450 mdev->limits.num_mgms +
451 mdev->limits.num_amgms,
452 mdev->limits.num_mgms +
453 mdev->limits.num_amgms,
454 0);
455 if (!mdev->mcg_table.table) {
456 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
457 err = -ENOMEM;
458 goto err_unmap_cq;
459 }
460
461 return 0;
462
463err_unmap_cq:
464 mthca_free_icm_table(mdev, mdev->cq_table.table);
465
466err_unmap_eqp:
467 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
468
469err_unmap_qp:
470 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
471
472err_unmap_mpt:
473 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
474
475err_unmap_mtt:
476 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
477
478err_unmap_eq:
479 mthca_unmap_eq_icm(mdev);
480
481err_unmap_aux:
482 mthca_UNMAP_ICM_AUX(mdev, &status);
483
484err_free_aux:
485 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
486
487 return err;
488}
489
490static int __devinit mthca_init_arbel(struct mthca_dev *mdev)
491{
492 struct mthca_dev_lim dev_lim;
493 struct mthca_profile profile;
494 struct mthca_init_hca_param init_hca;
495 struct mthca_adapter adapter;
496 u64 icm_size;
497 u8 status;
498 int err;
499
500 err = mthca_QUERY_FW(mdev, &status);
501 if (err) {
502 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
503 return err;
504 }
505 if (status) {
506 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
507 "aborting.\n", status);
508 return -EINVAL;
509 }
510
511 err = mthca_ENABLE_LAM(mdev, &status);
512 if (err) {
513 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
514 return err;
515 }
516 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
517 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
518 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
519 } else if (status) {
520 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
521 "aborting.\n", status);
522 return -EINVAL;
523 }
524
525 err = mthca_load_fw(mdev);
526 if (err) {
527 mthca_err(mdev, "Failed to start FW, aborting.\n");
528 goto err_disable;
529 }
530
531 err = mthca_dev_lim(mdev, &dev_lim);
532 if (err) {
533 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
534 goto err_stop_fw;
535 }
536
537 profile = default_profile;
538 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
539 profile.num_udav = 0;
540
541 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
542 if ((int) icm_size < 0) {
543 err = icm_size;
544 goto err_stop_fw;
545 }
546
547 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
548 if (err)
549 goto err_stop_fw;
550
551 err = mthca_INIT_HCA(mdev, &init_hca, &status);
552 if (err) {
553 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
554 goto err_free_icm;
555 }
556 if (status) {
557 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
558 "aborting.\n", status);
559 err = -EINVAL;
560 goto err_free_icm;
561 }
562
563 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
564 if (err) {
565 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
566 goto err_free_icm;
567 }
568 if (status) {
569 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
570 "aborting.\n", status);
571 err = -EINVAL;
572 goto err_free_icm;
573 }
574
575 mdev->eq_table.inta_pin = adapter.inta_pin;
576 mdev->rev_id = adapter.revision_id;
577
578 return 0;
579
580err_free_icm:
581 mthca_free_icm_table(mdev, mdev->cq_table.table);
582 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
583 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
584 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
585 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
586 mthca_unmap_eq_icm(mdev);
587
588 mthca_UNMAP_ICM_AUX(mdev, &status);
589 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
590
591err_stop_fw:
592 mthca_UNMAP_FA(mdev, &status);
593 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
594
595err_disable:
596 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
597 mthca_DISABLE_LAM(mdev, &status);
598
599 return err;
600}
601
602static int __devinit mthca_init_hca(struct mthca_dev *mdev)
603{
d10ddbf6 604 if (mthca_is_memfree(mdev))
1da177e4
LT		 605 return mthca_init_arbel(mdev);
606 else
607 return mthca_init_tavor(mdev);
608}
609
610static int __devinit mthca_setup_hca(struct mthca_dev *dev)
611{
612 int err;
613 u8 status;
614
615 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
616
617 err = mthca_init_uar_table(dev);
618 if (err) {
619 mthca_err(dev, "Failed to initialize "
620 "user access region table, aborting.\n");
621 return err;
622 }
623
624 err = mthca_uar_alloc(dev, &dev->driver_uar);
625 if (err) {
626 mthca_err(dev, "Failed to allocate driver access region, "
627 "aborting.\n");
628 goto err_uar_table_free;
629 }
630
631 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
632 if (!dev->kar) {
633 mthca_err(dev, "Couldn't map kernel access region, "
634 "aborting.\n");
635 err = -ENOMEM;
636 goto err_uar_free;
637 }
638
639 err = mthca_init_pd_table(dev);
640 if (err) {
641 mthca_err(dev, "Failed to initialize "
642 "protection domain table, aborting.\n");
643 goto err_kar_unmap;
644 }
645
646 err = mthca_init_mr_table(dev);
647 if (err) {
648 mthca_err(dev, "Failed to initialize "
649 "memory region table, aborting.\n");
650 goto err_pd_table_free;
651 }
652
653 err = mthca_pd_alloc(dev, &dev->driver_pd);
654 if (err) {
655 mthca_err(dev, "Failed to create driver PD, "
656 "aborting.\n");
657 goto err_mr_table_free;
658 }
659
660 err = mthca_init_eq_table(dev);
661 if (err) {
662 mthca_err(dev, "Failed to initialize "
663 "event queue table, aborting.\n");
664 goto err_pd_free;
665 }
666
667 err = mthca_cmd_use_events(dev);
668 if (err) {
669 mthca_err(dev, "Failed to switch to event-driven "
670 "firmware commands, aborting.\n");
671 goto err_eq_table_free;
672 }
673
674 err = mthca_NOP(dev, &status);
675 if (err || status) {
4ad81174
RD		 676 mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n",
677 dev->mthca_flags & MTHCA_FLAG_MSI_X ?
678 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
679 dev->pdev->irq);
1da177e4
LT		 680 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))
681 mthca_err(dev, "Try again with MSI/MSI-X disabled.\n");
682 else
683 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
684
685 goto err_cmd_poll;
686 }
687
688 mthca_dbg(dev, "NOP command IRQ test passed\n");
689
690 err = mthca_init_cq_table(dev);
691 if (err) {
692 mthca_err(dev, "Failed to initialize "
693 "completion queue table, aborting.\n");
694 goto err_cmd_poll;
695 }
696
697 err = mthca_init_qp_table(dev);
698 if (err) {
699 mthca_err(dev, "Failed to initialize "
700 "queue pair table, aborting.\n");
701 goto err_cq_table_free;
702 }
703
704 err = mthca_init_av_table(dev);
705 if (err) {
706 mthca_err(dev, "Failed to initialize "
707 "address vector table, aborting.\n");
708 goto err_qp_table_free;
709 }
710
711 err = mthca_init_mcg_table(dev);
712 if (err) {
713 mthca_err(dev, "Failed to initialize "
714 "multicast group table, aborting.\n");
715 goto err_av_table_free;
716 }
717
718 return 0;
719
720err_av_table_free:
721 mthca_cleanup_av_table(dev);
722
723err_qp_table_free:
724 mthca_cleanup_qp_table(dev);
725
726err_cq_table_free:
727 mthca_cleanup_cq_table(dev);
728
729err_cmd_poll:
730 mthca_cmd_use_polling(dev);
731
732err_eq_table_free:
733 mthca_cleanup_eq_table(dev);
734
735err_pd_free:
736 mthca_pd_free(dev, &dev->driver_pd);
737
738err_mr_table_free:
739 mthca_cleanup_mr_table(dev);
740
741err_pd_table_free:
742 mthca_cleanup_pd_table(dev);
743
744err_kar_unmap:
745 iounmap(dev->kar);
746
747err_uar_free:
748 mthca_uar_free(dev, &dev->driver_uar);
749
750err_uar_table_free:
751 mthca_cleanup_uar_table(dev);
752 return err;
753}
754
755static int __devinit mthca_request_regions(struct pci_dev *pdev,
756 int ddr_hidden)
757{
758 int err;
759
760 /*
761 * We can't just use pci_request_regions() because the MSI-X
762 * table is right in the middle of the first BAR. If we did
763 * pci_request_region and grab all of the first BAR, then
764 * setting up MSI-X would fail, since the PCI core wants to do
765 * request_mem_region on the MSI-X vector table.
766 *
767 * So just request what we need right now, and request any
768 * other regions we need when setting up EQs.
769 */
770 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
771 MTHCA_HCR_SIZE, DRV_NAME))
772 return -EBUSY;
773
774 err = pci_request_region(pdev, 2, DRV_NAME);
775 if (err)
776 goto err_bar2_failed;
777
778 if (!ddr_hidden) {
779 err = pci_request_region(pdev, 4, DRV_NAME);
780 if (err)
781 goto err_bar4_failed;
782 }
783
784 return 0;
785
786err_bar4_failed:
787 pci_release_region(pdev, 2);
788
789err_bar2_failed:
790 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
791 MTHCA_HCR_SIZE);
792
793 return err;
794}
795
796static void mthca_release_regions(struct pci_dev *pdev,
797 int ddr_hidden)
798{
799 if (!ddr_hidden)
800 pci_release_region(pdev, 4);
801
802 pci_release_region(pdev, 2);
803
804 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
805 MTHCA_HCR_SIZE);
806}
807
808static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev)
809{
810 struct msix_entry entries[3];
811 int err;
812
813 entries[0].entry = 0;
814 entries[1].entry = 1;
815 entries[2].entry = 2;
816
817 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
818 if (err) {
819 if (err > 0)
820 mthca_info(mdev, "Only %d MSI-X vectors available, "
821 "not using MSI-X\n", err);
822 return err;
823 }
824
825 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
826 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
827 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
828
829 return 0;
830}
831
832static void mthca_close_hca(struct mthca_dev *mdev)
833{
834 u8 status;
835
836 mthca_CLOSE_HCA(mdev, 0, &status);
837
d10ddbf6 838 if (mthca_is_memfree(mdev)) {
1da177e4
LT		 839 mthca_free_icm_table(mdev, mdev->cq_table.table);
840 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
841 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
842 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
843 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
844 mthca_unmap_eq_icm(mdev);
845
846 mthca_UNMAP_ICM_AUX(mdev, &status);
847 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
848
849 mthca_UNMAP_FA(mdev, &status);
850 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
851
852 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
853 mthca_DISABLE_LAM(mdev, &status);
854 } else
855 mthca_SYS_DIS(mdev, &status);
856}
857
858static int __devinit mthca_init_one(struct pci_dev *pdev,
859 const struct pci_device_id *id)
860{
861 static int mthca_version_printed = 0;
862 static int mthca_memfree_warned = 0;
863 int ddr_hidden = 0;
864 int err;
865 struct mthca_dev *mdev;
866
867 if (!mthca_version_printed) {
868 printk(KERN_INFO "%s", mthca_version);
869 ++mthca_version_printed;
870 }
871
872 printk(KERN_INFO PFX "Initializing %s (%s)\n",
873 pci_pretty_name(pdev), pci_name(pdev));
874
875 err = pci_enable_device(pdev);
876 if (err) {
877 dev_err(&pdev->dev, "Cannot enable PCI device, "
878 "aborting.\n");
879 return err;
880 }
881
882 /*
883 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
884 * be present)
885 */
886 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
887 pci_resource_len(pdev, 0) != 1 << 20) {
888 dev_err(&pdev->dev, "Missing DCS, aborting.");
889 err = -ENODEV;
890 goto err_disable_pdev;
891 }
892 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) ||
893 pci_resource_len(pdev, 2) != 1 << 23) {
894 dev_err(&pdev->dev, "Missing UAR, aborting.");
895 err = -ENODEV;
896 goto err_disable_pdev;
897 }
898 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
899 ddr_hidden = 1;
900
901 err = mthca_request_regions(pdev, ddr_hidden);
902 if (err) {
903 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
904 "aborting.\n");
905 goto err_disable_pdev;
906 }
907
908 pci_set_master(pdev);
909
910 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
911 if (err) {
912 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
913 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
914 if (err) {
915 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
916 goto err_free_res;
917 }
918 }
919 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
920 if (err) {
921 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
922 "consistent PCI DMA mask.\n");
923 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
924 if (err) {
925 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
926 "aborting.\n");
927 goto err_free_res;
928 }
929 }
930
931 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
932 if (!mdev) {
933 dev_err(&pdev->dev, "Device struct alloc failed, "
934 "aborting.\n");
935 err = -ENOMEM;
936 goto err_free_res;
937 }
938
939 mdev->pdev = pdev;
940 mdev->hca_type = id->driver_data;
941
d10ddbf6 942 if (mthca_is_memfree(mdev) && !mthca_memfree_warned++)
1da177e4
LT		 943 mthca_warn(mdev, "Warning: native MT25208 mode support is incomplete. "
944 "Your HCA may not work properly.\n");
945
946 if (ddr_hidden)
947 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
948
949 /*
950 * Now reset the HCA before we touch the PCI capabilities or
951 * attempt a firmware command, since a boot ROM may have left
952 * the HCA in an undefined state.
953 */
954 err = mthca_reset(mdev);
955 if (err) {
956 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
957 goto err_free_dev;
958 }
959
960 if (msi_x && !mthca_enable_msi_x(mdev))
961 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
962 if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) &&
963 !pci_enable_msi(pdev))
964 mdev->mthca_flags |= MTHCA_FLAG_MSI;
965
966 sema_init(&mdev->cmd.hcr_sem, 1);
967 sema_init(&mdev->cmd.poll_sem, 1);
968 mdev->cmd.use_events = 0;
969
970 mdev->hcr = ioremap(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, MTHCA_HCR_SIZE);
971 if (!mdev->hcr) {
972 mthca_err(mdev, "Couldn't map command register, "
973 "aborting.\n");
974 err = -ENOMEM;
975 goto err_free_dev;
976 }
977
978 err = mthca_tune_pci(mdev);
979 if (err)
980 goto err_iounmap;
981
982 err = mthca_init_hca(mdev);
983 if (err)
984 goto err_iounmap;
985
986 err = mthca_setup_hca(mdev);
987 if (err)
988 goto err_close;
989
990 err = mthca_register_device(mdev);
991 if (err)
992 goto err_cleanup;
993
994 err = mthca_create_agents(mdev);
995 if (err)
996 goto err_unregister;
997
998 pci_set_drvdata(pdev, mdev);
999
1000 return 0;
1001
1002err_unregister:
1003 mthca_unregister_device(mdev);
1004
1005err_cleanup:
1006 mthca_cleanup_mcg_table(mdev);
1007 mthca_cleanup_av_table(mdev);
1008 mthca_cleanup_qp_table(mdev);
1009 mthca_cleanup_cq_table(mdev);
1010 mthca_cmd_use_polling(mdev);
1011 mthca_cleanup_eq_table(mdev);
1012
1013 mthca_pd_free(mdev, &mdev->driver_pd);
1014
1015 mthca_cleanup_mr_table(mdev);
1016 mthca_cleanup_pd_table(mdev);
1017 mthca_cleanup_uar_table(mdev);
1018
1019err_close:
1020 mthca_close_hca(mdev);
1021
1022err_iounmap:
1023 iounmap(mdev->hcr);
1024
1025err_free_dev:
1026 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1027 pci_disable_msix(pdev);
1028 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1029 pci_disable_msi(pdev);
1030
1031 ib_dealloc_device(&mdev->ib_dev);
1032
1033err_free_res:
1034 mthca_release_regions(pdev, ddr_hidden);
1035
1036err_disable_pdev:
1037 pci_disable_device(pdev);
1038 pci_set_drvdata(pdev, NULL);
1039 return err;
1040}
1041
1042static void __devexit mthca_remove_one(struct pci_dev *pdev)
1043{
1044 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1045 u8 status;
1046 int p;
1047
1048 if (mdev) {
1049 mthca_free_agents(mdev);
1050 mthca_unregister_device(mdev);
1051
1052 for (p = 1; p <= mdev->limits.num_ports; ++p)
1053 mthca_CLOSE_IB(mdev, p, &status);
1054
1055 mthca_cleanup_mcg_table(mdev);
1056 mthca_cleanup_av_table(mdev);
1057 mthca_cleanup_qp_table(mdev);
1058 mthca_cleanup_cq_table(mdev);
1059 mthca_cmd_use_polling(mdev);
1060 mthca_cleanup_eq_table(mdev);
1061
1062 mthca_pd_free(mdev, &mdev->driver_pd);
1063
1064 mthca_cleanup_mr_table(mdev);
1065 mthca_cleanup_pd_table(mdev);
1066
1067 iounmap(mdev->kar);
1068 mthca_uar_free(mdev, &mdev->driver_uar);
1069 mthca_cleanup_uar_table(mdev);
1070
1071 mthca_close_hca(mdev);
1072
1073 iounmap(mdev->hcr);
1074
1075 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1076 pci_disable_msix(pdev);
1077 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1078 pci_disable_msi(pdev);
1079
1080 ib_dealloc_device(&mdev->ib_dev);
1081 mthca_release_regions(pdev, mdev->mthca_flags &
1082 MTHCA_FLAG_DDR_HIDDEN);
1083 pci_disable_device(pdev);
1084 pci_set_drvdata(pdev, NULL);
1085 }
1086}
1087
1088static struct pci_device_id mthca_pci_table[] = {
1089 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1090 .driver_data = TAVOR },
1091 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1092 .driver_data = TAVOR },
1093 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1094 .driver_data = ARBEL_COMPAT },
1095 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1096 .driver_data = ARBEL_COMPAT },
1097 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1098 .driver_data = ARBEL_NATIVE },
1099 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1100 .driver_data = ARBEL_NATIVE },
1101 { 0, }
1102};
1103
1104MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1105
1106static struct pci_driver mthca_driver = {
1107 .name = "ib_mthca",
1108 .id_table = mthca_pci_table,
1109 .probe = mthca_init_one,
1110 .remove = __devexit_p(mthca_remove_one)
1111};
1112
1113static int __init mthca_init(void)
1114{
1115 int ret;
1116
1117 ret = pci_register_driver(&mthca_driver);
1118 return ret < 0 ? ret : 0;
1119}
1120
1121static void __exit mthca_cleanup(void)
1122{
1123 pci_unregister_driver(&mthca_driver);
1124}
1125
1126module_init(mthca_init);
1127module_exit(mthca_cleanup);
Linux 6.x block layer and io_uring tree(s)