[PATCH] IB uverbs: add mthca mmap support
[linux-block.git] / drivers / infiniband / hw / mthca / mthca_main.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
cd4e8fb4 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
1da177e4
LT
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 *
33 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
34 */
35
36#include <linux/config.h>
37#include <linux/version.h>
38#include <linux/module.h>
39#include <linux/init.h>
40#include <linux/errno.h>
41#include <linux/pci.h>
42#include <linux/interrupt.h>
43
44#include "mthca_dev.h"
45#include "mthca_config_reg.h"
46#include "mthca_cmd.h"
47#include "mthca_profile.h"
48#include "mthca_memfree.h"
49
50MODULE_AUTHOR("Roland Dreier");
51MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
52MODULE_LICENSE("Dual BSD/GPL");
53MODULE_VERSION(DRV_VERSION);
54
55#ifdef CONFIG_PCI_MSI
56
57static int msi_x = 0;
58module_param(msi_x, int, 0444);
59MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
60
61static int msi = 0;
62module_param(msi, int, 0444);
63MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero");
64
65#else /* CONFIG_PCI_MSI */
66
67#define msi_x (0)
68#define msi (0)
69
70#endif /* CONFIG_PCI_MSI */
71
72static const char mthca_version[] __devinitdata =
177214af 73 DRV_NAME ": Mellanox InfiniBand HCA driver v"
1da177e4
LT
74 DRV_VERSION " (" DRV_RELDATE ")\n";
75
76static struct mthca_profile default_profile = {
e0f5fdca
MT
77 .num_qp = 1 << 16,
78 .rdb_per_qp = 4,
79 .num_cq = 1 << 16,
80 .num_mcg = 1 << 13,
81 .num_mpt = 1 << 17,
82 .num_mtt = 1 << 20,
83 .num_udav = 1 << 15, /* Tavor only */
84 .fmr_reserved_mtts = 1 << 18, /* Tavor only */
85 .uarc_size = 1 << 18, /* Arbel only */
1da177e4
LT
86};
87
88static int __devinit mthca_tune_pci(struct mthca_dev *mdev)
89{
90 int cap;
91 u16 val;
92
93 /* First try to max out Read Byte Count */
94 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
95 if (cap) {
96 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
97 mthca_err(mdev, "Couldn't read PCI-X command register, "
98 "aborting.\n");
99 return -ENODEV;
100 }
101 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
102 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
103 mthca_err(mdev, "Couldn't write PCI-X command register, "
104 "aborting.\n");
105 return -ENODEV;
106 }
68a3c212 107 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
1da177e4
LT
108 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
109
110 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
111 if (cap) {
112 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
113 mthca_err(mdev, "Couldn't read PCI Express device control "
114 "register, aborting.\n");
115 return -ENODEV;
116 }
117 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
118 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
119 mthca_err(mdev, "Couldn't write PCI Express device control "
120 "register, aborting.\n");
121 return -ENODEV;
122 }
68a3c212 123 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
1da177e4
LT
124 mthca_info(mdev, "No PCI Express capability, "
125 "not setting Max Read Request Size.\n");
126
127 return 0;
128}
129
130static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
131{
132 int err;
133 u8 status;
134
135 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
136 if (err) {
137 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
138 return err;
139 }
140 if (status) {
141 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
142 "aborting.\n", status);
143 return -EINVAL;
144 }
145 if (dev_lim->min_page_sz > PAGE_SIZE) {
146 mthca_err(mdev, "HCA minimum page size of %d bigger than "
147 "kernel PAGE_SIZE of %ld, aborting.\n",
148 dev_lim->min_page_sz, PAGE_SIZE);
149 return -ENODEV;
150 }
151 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
152 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
153 "aborting.\n",
154 dev_lim->num_ports, MTHCA_MAX_PORTS);
155 return -ENODEV;
156 }
157
158 mdev->limits.num_ports = dev_lim->num_ports;
159 mdev->limits.vl_cap = dev_lim->max_vl;
160 mdev->limits.mtu_cap = dev_lim->max_mtu;
161 mdev->limits.gid_table_len = dev_lim->max_gids;
162 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
163 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
164 mdev->limits.max_sg = dev_lim->max_sg;
165 mdev->limits.reserved_qps = dev_lim->reserved_qps;
166 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
167 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
168 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
169 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
170 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
171 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
172 mdev->limits.reserved_uars = dev_lim->reserved_uars;
173 mdev->limits.reserved_pds = dev_lim->reserved_pds;
174
175 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
176 May be doable since hardware supports it for SRQ.
177
178 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
179
180 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
181 supported by driver. */
182 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
183 IB_DEVICE_PORT_ACTIVE_EVENT |
184 IB_DEVICE_SYS_IMAGE_GUID |
185 IB_DEVICE_RC_RNR_NAK_GEN;
186
187 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
188 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
189
190 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
191 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
192
193 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
194 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
195
196 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
197 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
198
199 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
200 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
201
202 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
203 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
204
205 return 0;
206}
207
208static int __devinit mthca_init_tavor(struct mthca_dev *mdev)
209{
210 u8 status;
211 int err;
212 struct mthca_dev_lim dev_lim;
213 struct mthca_profile profile;
214 struct mthca_init_hca_param init_hca;
215 struct mthca_adapter adapter;
216
217 err = mthca_SYS_EN(mdev, &status);
218 if (err) {
219 mthca_err(mdev, "SYS_EN command failed, aborting.\n");
220 return err;
221 }
222 if (status) {
223 mthca_err(mdev, "SYS_EN returned status 0x%02x, "
224 "aborting.\n", status);
225 return -EINVAL;
226 }
227
228 err = mthca_QUERY_FW(mdev, &status);
229 if (err) {
230 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
231 goto err_disable;
232 }
233 if (status) {
234 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
235 "aborting.\n", status);
236 err = -EINVAL;
237 goto err_disable;
238 }
239 err = mthca_QUERY_DDR(mdev, &status);
240 if (err) {
241 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
242 goto err_disable;
243 }
244 if (status) {
245 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
246 "aborting.\n", status);
247 err = -EINVAL;
248 goto err_disable;
249 }
250
251 err = mthca_dev_lim(mdev, &dev_lim);
252
253 profile = default_profile;
254 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
255 profile.uarc_size = 0;
256
257 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
258 if (err < 0)
259 goto err_disable;
260
261 err = mthca_INIT_HCA(mdev, &init_hca, &status);
262 if (err) {
263 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
264 goto err_disable;
265 }
266 if (status) {
267 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
268 "aborting.\n", status);
269 err = -EINVAL;
270 goto err_disable;
271 }
272
273 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
274 if (err) {
275 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
276 goto err_close;
277 }
278 if (status) {
279 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
280 "aborting.\n", status);
281 err = -EINVAL;
282 goto err_close;
283 }
284
285 mdev->eq_table.inta_pin = adapter.inta_pin;
286 mdev->rev_id = adapter.revision_id;
287
288 return 0;
289
290err_close:
291 mthca_CLOSE_HCA(mdev, 0, &status);
292
293err_disable:
294 mthca_SYS_DIS(mdev, &status);
295
296 return err;
297}
298
299static int __devinit mthca_load_fw(struct mthca_dev *mdev)
300{
301 u8 status;
302 int err;
303
304 /* FIXME: use HCA-attached memory for FW if present */
305
306 mdev->fw.arbel.fw_icm =
307 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
308 GFP_HIGHUSER | __GFP_NOWARN);
309 if (!mdev->fw.arbel.fw_icm) {
310 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
311 return -ENOMEM;
312 }
313
314 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
315 if (err) {
316 mthca_err(mdev, "MAP_FA command failed, aborting.\n");
317 goto err_free;
318 }
319 if (status) {
320 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
321 err = -EINVAL;
322 goto err_free;
323 }
324 err = mthca_RUN_FW(mdev, &status);
325 if (err) {
326 mthca_err(mdev, "RUN_FW command failed, aborting.\n");
327 goto err_unmap_fa;
328 }
329 if (status) {
330 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
331 err = -EINVAL;
332 goto err_unmap_fa;
333 }
334
335 return 0;
336
337err_unmap_fa:
338 mthca_UNMAP_FA(mdev, &status);
339
340err_free:
341 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
342 return err;
343}
344
345static int __devinit mthca_init_icm(struct mthca_dev *mdev,
346 struct mthca_dev_lim *dev_lim,
347 struct mthca_init_hca_param *init_hca,
348 u64 icm_size)
349{
350 u64 aux_pages;
351 u8 status;
352 int err;
353
354 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
355 if (err) {
356 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
357 return err;
358 }
359 if (status) {
360 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
361 "aborting.\n", status);
362 return -EINVAL;
363 }
364
365 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
366 (unsigned long long) icm_size >> 10,
367 (unsigned long long) aux_pages << 2);
368
369 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
370 GFP_HIGHUSER | __GFP_NOWARN);
371 if (!mdev->fw.arbel.aux_icm) {
372 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
373 return -ENOMEM;
374 }
375
376 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
377 if (err) {
378 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
379 goto err_free_aux;
380 }
381 if (status) {
382 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
383 err = -EINVAL;
384 goto err_free_aux;
385 }
386
387 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
388 if (err) {
389 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
390 goto err_unmap_aux;
391 }
392
393 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
44ea6687 394 MTHCA_MTT_SEG_SIZE,
1da177e4
LT
395 mdev->limits.num_mtt_segs,
396 mdev->limits.reserved_mtts, 1);
397 if (!mdev->mr_table.mtt_table) {
398 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
399 err = -ENOMEM;
400 goto err_unmap_eq;
401 }
402
403 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
404 dev_lim->mpt_entry_sz,
405 mdev->limits.num_mpts,
406 mdev->limits.reserved_mrws, 1);
407 if (!mdev->mr_table.mpt_table) {
408 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
409 err = -ENOMEM;
410 goto err_unmap_mtt;
411 }
412
413 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
414 dev_lim->qpc_entry_sz,
415 mdev->limits.num_qps,
416 mdev->limits.reserved_qps, 0);
417 if (!mdev->qp_table.qp_table) {
418 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
419 err = -ENOMEM;
420 goto err_unmap_mpt;
421 }
422
423 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
424 dev_lim->eqpc_entry_sz,
425 mdev->limits.num_qps,
426 mdev->limits.reserved_qps, 0);
427 if (!mdev->qp_table.eqp_table) {
428 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
429 err = -ENOMEM;
430 goto err_unmap_qp;
431 }
432
08aeb14e
RD
433 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
434 MTHCA_RDB_ENTRY_SIZE,
435 mdev->limits.num_qps <<
436 mdev->qp_table.rdb_shift,
437 0, 0);
438 if (!mdev->qp_table.rdb_table) {
439 mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
440 err = -ENOMEM;
19272d43 441 goto err_unmap_eqp;
08aeb14e
RD
442 }
443
444 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
1da177e4
LT
445 dev_lim->cqc_entry_sz,
446 mdev->limits.num_cqs,
447 mdev->limits.reserved_cqs, 0);
448 if (!mdev->cq_table.table) {
449 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
450 err = -ENOMEM;
08aeb14e 451 goto err_unmap_rdb;
1da177e4
LT
452 }
453
454 /*
455 * It's not strictly required, but for simplicity just map the
456 * whole multicast group table now. The table isn't very big
457 * and it's a lot easier than trying to track ref counts.
458 */
459 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
460 MTHCA_MGM_ENTRY_SIZE,
461 mdev->limits.num_mgms +
462 mdev->limits.num_amgms,
463 mdev->limits.num_mgms +
464 mdev->limits.num_amgms,
465 0);
466 if (!mdev->mcg_table.table) {
467 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
468 err = -ENOMEM;
469 goto err_unmap_cq;
470 }
471
472 return 0;
473
474err_unmap_cq:
475 mthca_free_icm_table(mdev, mdev->cq_table.table);
476
08aeb14e
RD
477err_unmap_rdb:
478 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
479
1da177e4
LT
480err_unmap_eqp:
481 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
482
483err_unmap_qp:
484 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
485
486err_unmap_mpt:
487 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
488
489err_unmap_mtt:
490 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
491
492err_unmap_eq:
493 mthca_unmap_eq_icm(mdev);
494
495err_unmap_aux:
496 mthca_UNMAP_ICM_AUX(mdev, &status);
497
498err_free_aux:
499 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
500
501 return err;
502}
503
504static int __devinit mthca_init_arbel(struct mthca_dev *mdev)
505{
506 struct mthca_dev_lim dev_lim;
507 struct mthca_profile profile;
508 struct mthca_init_hca_param init_hca;
509 struct mthca_adapter adapter;
510 u64 icm_size;
511 u8 status;
512 int err;
513
514 err = mthca_QUERY_FW(mdev, &status);
515 if (err) {
516 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
517 return err;
518 }
519 if (status) {
520 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
521 "aborting.\n", status);
522 return -EINVAL;
523 }
524
525 err = mthca_ENABLE_LAM(mdev, &status);
526 if (err) {
527 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
528 return err;
529 }
530 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
531 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
532 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
533 } else if (status) {
534 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
535 "aborting.\n", status);
536 return -EINVAL;
537 }
538
539 err = mthca_load_fw(mdev);
540 if (err) {
541 mthca_err(mdev, "Failed to start FW, aborting.\n");
542 goto err_disable;
543 }
544
545 err = mthca_dev_lim(mdev, &dev_lim);
546 if (err) {
547 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
548 goto err_stop_fw;
549 }
550
551 profile = default_profile;
552 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
553 profile.num_udav = 0;
554
555 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
556 if ((int) icm_size < 0) {
557 err = icm_size;
558 goto err_stop_fw;
559 }
560
561 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
562 if (err)
563 goto err_stop_fw;
564
565 err = mthca_INIT_HCA(mdev, &init_hca, &status);
566 if (err) {
567 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
568 goto err_free_icm;
569 }
570 if (status) {
571 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
572 "aborting.\n", status);
573 err = -EINVAL;
574 goto err_free_icm;
575 }
576
577 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
578 if (err) {
579 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
580 goto err_free_icm;
581 }
582 if (status) {
583 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
584 "aborting.\n", status);
585 err = -EINVAL;
586 goto err_free_icm;
587 }
588
589 mdev->eq_table.inta_pin = adapter.inta_pin;
590 mdev->rev_id = adapter.revision_id;
591
592 return 0;
593
594err_free_icm:
595 mthca_free_icm_table(mdev, mdev->cq_table.table);
68a3c212 596 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
1da177e4
LT
597 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
598 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
599 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
600 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
601 mthca_unmap_eq_icm(mdev);
602
603 mthca_UNMAP_ICM_AUX(mdev, &status);
604 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
605
606err_stop_fw:
607 mthca_UNMAP_FA(mdev, &status);
608 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
609
610err_disable:
611 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
612 mthca_DISABLE_LAM(mdev, &status);
613
614 return err;
615}
616
617static int __devinit mthca_init_hca(struct mthca_dev *mdev)
618{
d10ddbf6 619 if (mthca_is_memfree(mdev))
1da177e4
LT
620 return mthca_init_arbel(mdev);
621 else
622 return mthca_init_tavor(mdev);
623}
624
625static int __devinit mthca_setup_hca(struct mthca_dev *dev)
626{
627 int err;
628 u8 status;
629
630 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
631
632 err = mthca_init_uar_table(dev);
633 if (err) {
634 mthca_err(dev, "Failed to initialize "
635 "user access region table, aborting.\n");
636 return err;
637 }
638
639 err = mthca_uar_alloc(dev, &dev->driver_uar);
640 if (err) {
641 mthca_err(dev, "Failed to allocate driver access region, "
642 "aborting.\n");
643 goto err_uar_table_free;
644 }
645
646 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
647 if (!dev->kar) {
648 mthca_err(dev, "Couldn't map kernel access region, "
649 "aborting.\n");
650 err = -ENOMEM;
651 goto err_uar_free;
652 }
653
654 err = mthca_init_pd_table(dev);
655 if (err) {
656 mthca_err(dev, "Failed to initialize "
657 "protection domain table, aborting.\n");
658 goto err_kar_unmap;
659 }
660
661 err = mthca_init_mr_table(dev);
662 if (err) {
663 mthca_err(dev, "Failed to initialize "
664 "memory region table, aborting.\n");
665 goto err_pd_table_free;
666 }
667
668 err = mthca_pd_alloc(dev, &dev->driver_pd);
669 if (err) {
670 mthca_err(dev, "Failed to create driver PD, "
671 "aborting.\n");
672 goto err_mr_table_free;
673 }
674
675 err = mthca_init_eq_table(dev);
676 if (err) {
677 mthca_err(dev, "Failed to initialize "
678 "event queue table, aborting.\n");
679 goto err_pd_free;
680 }
681
682 err = mthca_cmd_use_events(dev);
683 if (err) {
684 mthca_err(dev, "Failed to switch to event-driven "
685 "firmware commands, aborting.\n");
686 goto err_eq_table_free;
687 }
688
689 err = mthca_NOP(dev, &status);
690 if (err || status) {
4ad81174
RD
691 mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n",
692 dev->mthca_flags & MTHCA_FLAG_MSI_X ?
693 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
694 dev->pdev->irq);
1da177e4
LT
695 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))
696 mthca_err(dev, "Try again with MSI/MSI-X disabled.\n");
697 else
698 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
699
700 goto err_cmd_poll;
701 }
702
703 mthca_dbg(dev, "NOP command IRQ test passed\n");
704
705 err = mthca_init_cq_table(dev);
706 if (err) {
707 mthca_err(dev, "Failed to initialize "
708 "completion queue table, aborting.\n");
709 goto err_cmd_poll;
710 }
711
712 err = mthca_init_qp_table(dev);
713 if (err) {
714 mthca_err(dev, "Failed to initialize "
715 "queue pair table, aborting.\n");
716 goto err_cq_table_free;
717 }
718
719 err = mthca_init_av_table(dev);
720 if (err) {
721 mthca_err(dev, "Failed to initialize "
722 "address vector table, aborting.\n");
723 goto err_qp_table_free;
724 }
725
726 err = mthca_init_mcg_table(dev);
727 if (err) {
728 mthca_err(dev, "Failed to initialize "
729 "multicast group table, aborting.\n");
730 goto err_av_table_free;
731 }
732
733 return 0;
734
735err_av_table_free:
736 mthca_cleanup_av_table(dev);
737
738err_qp_table_free:
739 mthca_cleanup_qp_table(dev);
740
741err_cq_table_free:
742 mthca_cleanup_cq_table(dev);
743
744err_cmd_poll:
745 mthca_cmd_use_polling(dev);
746
747err_eq_table_free:
748 mthca_cleanup_eq_table(dev);
749
750err_pd_free:
751 mthca_pd_free(dev, &dev->driver_pd);
752
753err_mr_table_free:
754 mthca_cleanup_mr_table(dev);
755
756err_pd_table_free:
757 mthca_cleanup_pd_table(dev);
758
759err_kar_unmap:
760 iounmap(dev->kar);
761
762err_uar_free:
763 mthca_uar_free(dev, &dev->driver_uar);
764
765err_uar_table_free:
766 mthca_cleanup_uar_table(dev);
767 return err;
768}
769
770static int __devinit mthca_request_regions(struct pci_dev *pdev,
771 int ddr_hidden)
772{
773 int err;
774
775 /*
776 * We can't just use pci_request_regions() because the MSI-X
777 * table is right in the middle of the first BAR. If we did
778 * pci_request_region and grab all of the first BAR, then
779 * setting up MSI-X would fail, since the PCI core wants to do
780 * request_mem_region on the MSI-X vector table.
781 *
782 * So just request what we need right now, and request any
783 * other regions we need when setting up EQs.
784 */
785 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
786 MTHCA_HCR_SIZE, DRV_NAME))
787 return -EBUSY;
788
789 err = pci_request_region(pdev, 2, DRV_NAME);
790 if (err)
791 goto err_bar2_failed;
792
793 if (!ddr_hidden) {
794 err = pci_request_region(pdev, 4, DRV_NAME);
795 if (err)
796 goto err_bar4_failed;
797 }
798
799 return 0;
800
801err_bar4_failed:
802 pci_release_region(pdev, 2);
803
804err_bar2_failed:
805 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
806 MTHCA_HCR_SIZE);
807
808 return err;
809}
810
811static void mthca_release_regions(struct pci_dev *pdev,
812 int ddr_hidden)
813{
814 if (!ddr_hidden)
815 pci_release_region(pdev, 4);
816
817 pci_release_region(pdev, 2);
818
819 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
820 MTHCA_HCR_SIZE);
821}
822
823static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev)
824{
825 struct msix_entry entries[3];
826 int err;
827
828 entries[0].entry = 0;
829 entries[1].entry = 1;
830 entries[2].entry = 2;
831
832 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
833 if (err) {
834 if (err > 0)
835 mthca_info(mdev, "Only %d MSI-X vectors available, "
836 "not using MSI-X\n", err);
837 return err;
838 }
839
840 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
841 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
842 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
843
844 return 0;
845}
846
847static void mthca_close_hca(struct mthca_dev *mdev)
848{
849 u8 status;
850
851 mthca_CLOSE_HCA(mdev, 0, &status);
852
d10ddbf6 853 if (mthca_is_memfree(mdev)) {
1da177e4 854 mthca_free_icm_table(mdev, mdev->cq_table.table);
68a3c212 855 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
1da177e4
LT
856 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
857 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
858 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
859 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
860 mthca_unmap_eq_icm(mdev);
861
862 mthca_UNMAP_ICM_AUX(mdev, &status);
863 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
864
865 mthca_UNMAP_FA(mdev, &status);
866 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
867
868 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
869 mthca_DISABLE_LAM(mdev, &status);
870 } else
871 mthca_SYS_DIS(mdev, &status);
872}
873
68a3c212
RD
874/* Types of supported HCA */
875enum {
876 TAVOR, /* MT23108 */
877 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
878 ARBEL_NATIVE, /* MT25208 with extended features */
879 SINAI /* MT25204 */
880};
881
882#define MTHCA_FW_VER(major, minor, subminor) \
883 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
884
885static struct {
886 u64 latest_fw;
887 int is_memfree;
888 int is_pcie;
889} mthca_hca_table[] = {
890 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 3, 2), .is_memfree = 0, .is_pcie = 0 },
891 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 6, 2), .is_memfree = 0, .is_pcie = 1 },
892 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 0, 1), .is_memfree = 1, .is_pcie = 1 },
893 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 1), .is_memfree = 1, .is_pcie = 1 }
894};
895
1da177e4
LT
896static int __devinit mthca_init_one(struct pci_dev *pdev,
897 const struct pci_device_id *id)
898{
899 static int mthca_version_printed = 0;
1da177e4
LT
900 int ddr_hidden = 0;
901 int err;
902 struct mthca_dev *mdev;
903
904 if (!mthca_version_printed) {
905 printk(KERN_INFO "%s", mthca_version);
906 ++mthca_version_printed;
907 }
908
909 printk(KERN_INFO PFX "Initializing %s (%s)\n",
910 pci_pretty_name(pdev), pci_name(pdev));
911
68a3c212
RD
912 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
913 printk(KERN_ERR PFX "%s (%s) has invalid driver data %lx\n",
914 pci_pretty_name(pdev), pci_name(pdev), id->driver_data);
915 return -ENODEV;
916 }
917
1da177e4
LT
918 err = pci_enable_device(pdev);
919 if (err) {
920 dev_err(&pdev->dev, "Cannot enable PCI device, "
921 "aborting.\n");
922 return err;
923 }
924
925 /*
926 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
927 * be present)
928 */
929 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
930 pci_resource_len(pdev, 0) != 1 << 20) {
177214af 931 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
1da177e4
LT
932 err = -ENODEV;
933 goto err_disable_pdev;
934 }
935 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) ||
936 pci_resource_len(pdev, 2) != 1 << 23) {
177214af 937 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1da177e4
LT
938 err = -ENODEV;
939 goto err_disable_pdev;
940 }
941 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
942 ddr_hidden = 1;
943
944 err = mthca_request_regions(pdev, ddr_hidden);
945 if (err) {
946 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
947 "aborting.\n");
948 goto err_disable_pdev;
949 }
950
951 pci_set_master(pdev);
952
953 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
954 if (err) {
955 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
956 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
957 if (err) {
958 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
959 goto err_free_res;
960 }
961 }
962 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
963 if (err) {
964 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
965 "consistent PCI DMA mask.\n");
966 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
967 if (err) {
968 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
969 "aborting.\n");
970 goto err_free_res;
971 }
972 }
973
974 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
975 if (!mdev) {
976 dev_err(&pdev->dev, "Device struct alloc failed, "
977 "aborting.\n");
978 err = -ENOMEM;
979 goto err_free_res;
980 }
981
68a3c212 982 mdev->pdev = pdev;
1da177e4
LT
983
984 if (ddr_hidden)
985 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
68a3c212
RD
986 if (mthca_hca_table[id->driver_data].is_memfree)
987 mdev->mthca_flags |= MTHCA_FLAG_MEMFREE;
988 if (mthca_hca_table[id->driver_data].is_pcie)
989 mdev->mthca_flags |= MTHCA_FLAG_PCIE;
1da177e4
LT
990
991 /*
992 * Now reset the HCA before we touch the PCI capabilities or
993 * attempt a firmware command, since a boot ROM may have left
994 * the HCA in an undefined state.
995 */
996 err = mthca_reset(mdev);
997 if (err) {
998 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
999 goto err_free_dev;
1000 }
1001
1002 if (msi_x && !mthca_enable_msi_x(mdev))
1003 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
1004 if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) &&
1005 !pci_enable_msi(pdev))
1006 mdev->mthca_flags |= MTHCA_FLAG_MSI;
1007
80fd8238
RD
1008 if (mthca_cmd_init(mdev)) {
1009 mthca_err(mdev, "Failed to init command interface, aborting.\n");
1da177e4
LT
1010 goto err_free_dev;
1011 }
1012
1013 err = mthca_tune_pci(mdev);
1014 if (err)
80fd8238 1015 goto err_cmd;
1da177e4
LT
1016
1017 err = mthca_init_hca(mdev);
1018 if (err)
80fd8238 1019 goto err_cmd;
1da177e4 1020
68a3c212
RD
1021 if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) {
1022 mthca_warn(mdev, "HCA FW version %x.%x.%x is old (%x.%x.%x is current).\n",
1023 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
1024 (int) (mdev->fw_ver & 0xffff),
1025 (int) (mthca_hca_table[id->driver_data].latest_fw >> 32),
1026 (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff,
1027 (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff));
1028 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
1029 }
1030
1da177e4
LT
1031 err = mthca_setup_hca(mdev);
1032 if (err)
1033 goto err_close;
1034
1035 err = mthca_register_device(mdev);
1036 if (err)
1037 goto err_cleanup;
1038
1039 err = mthca_create_agents(mdev);
1040 if (err)
1041 goto err_unregister;
1042
1043 pci_set_drvdata(pdev, mdev);
1044
1045 return 0;
1046
1047err_unregister:
1048 mthca_unregister_device(mdev);
1049
1050err_cleanup:
1051 mthca_cleanup_mcg_table(mdev);
1052 mthca_cleanup_av_table(mdev);
1053 mthca_cleanup_qp_table(mdev);
1054 mthca_cleanup_cq_table(mdev);
1055 mthca_cmd_use_polling(mdev);
1056 mthca_cleanup_eq_table(mdev);
1057
1058 mthca_pd_free(mdev, &mdev->driver_pd);
1059
1060 mthca_cleanup_mr_table(mdev);
1061 mthca_cleanup_pd_table(mdev);
1062 mthca_cleanup_uar_table(mdev);
1063
1064err_close:
1065 mthca_close_hca(mdev);
1066
80fd8238
RD
1067err_cmd:
1068 mthca_cmd_cleanup(mdev);
1da177e4
LT
1069
1070err_free_dev:
1071 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1072 pci_disable_msix(pdev);
1073 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1074 pci_disable_msi(pdev);
1075
1076 ib_dealloc_device(&mdev->ib_dev);
1077
1078err_free_res:
1079 mthca_release_regions(pdev, ddr_hidden);
1080
1081err_disable_pdev:
1082 pci_disable_device(pdev);
1083 pci_set_drvdata(pdev, NULL);
1084 return err;
1085}
1086
1087static void __devexit mthca_remove_one(struct pci_dev *pdev)
1088{
1089 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1090 u8 status;
1091 int p;
1092
1093 if (mdev) {
1094 mthca_free_agents(mdev);
1095 mthca_unregister_device(mdev);
1096
1097 for (p = 1; p <= mdev->limits.num_ports; ++p)
1098 mthca_CLOSE_IB(mdev, p, &status);
1099
1100 mthca_cleanup_mcg_table(mdev);
1101 mthca_cleanup_av_table(mdev);
1102 mthca_cleanup_qp_table(mdev);
1103 mthca_cleanup_cq_table(mdev);
1104 mthca_cmd_use_polling(mdev);
1105 mthca_cleanup_eq_table(mdev);
1106
1107 mthca_pd_free(mdev, &mdev->driver_pd);
1108
1109 mthca_cleanup_mr_table(mdev);
1110 mthca_cleanup_pd_table(mdev);
1111
1112 iounmap(mdev->kar);
1113 mthca_uar_free(mdev, &mdev->driver_uar);
1114 mthca_cleanup_uar_table(mdev);
1da177e4 1115 mthca_close_hca(mdev);
80fd8238 1116 mthca_cmd_cleanup(mdev);
1da177e4
LT
1117
1118 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1119 pci_disable_msix(pdev);
1120 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1121 pci_disable_msi(pdev);
1122
1123 ib_dealloc_device(&mdev->ib_dev);
1124 mthca_release_regions(pdev, mdev->mthca_flags &
1125 MTHCA_FLAG_DDR_HIDDEN);
1126 pci_disable_device(pdev);
1127 pci_set_drvdata(pdev, NULL);
1128 }
1129}
1130
1131static struct pci_device_id mthca_pci_table[] = {
1132 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1133 .driver_data = TAVOR },
1134 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1135 .driver_data = TAVOR },
1136 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1137 .driver_data = ARBEL_COMPAT },
1138 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1139 .driver_data = ARBEL_COMPAT },
1140 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1141 .driver_data = ARBEL_NATIVE },
1142 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1143 .driver_data = ARBEL_NATIVE },
68a3c212
RD
1144 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
1145 .driver_data = SINAI },
1146 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
1147 .driver_data = SINAI },
1148 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1149 .driver_data = SINAI },
1150 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1151 .driver_data = SINAI },
1da177e4
LT
1152 { 0, }
1153};
1154
1155MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1156
1157static struct pci_driver mthca_driver = {
177214af 1158 .name = DRV_NAME,
1da177e4
LT
1159 .id_table = mthca_pci_table,
1160 .probe = mthca_init_one,
1161 .remove = __devexit_p(mthca_remove_one)
1162};
1163
1164static int __init mthca_init(void)
1165{
1166 int ret;
1167
1168 ret = pci_register_driver(&mthca_driver);
1169 return ret < 0 ? ret : 0;
1170}
1171
1172static void __exit mthca_cleanup(void)
1173{
1174 pci_unregister_driver(&mthca_driver);
1175}
1176
1177module_init(mthca_init);
1178module_exit(mthca_cleanup);