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e126ba97 EC |
1 | /* |
2 | * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <asm-generic/kmap_types.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/errno.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/dma-mapping.h> | |
39 | #include <linux/slab.h> | |
40 | #include <linux/io-mapping.h> | |
41 | #include <linux/sched.h> | |
42 | #include <rdma/ib_user_verbs.h> | |
43 | #include <rdma/ib_smi.h> | |
44 | #include <rdma/ib_umem.h> | |
45 | #include "user.h" | |
46 | #include "mlx5_ib.h" | |
47 | ||
48 | #define DRIVER_NAME "mlx5_ib" | |
49 | #define DRIVER_VERSION "1.0" | |
50 | #define DRIVER_RELDATE "June 2013" | |
51 | ||
52 | MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); | |
53 | MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); | |
54 | MODULE_LICENSE("Dual BSD/GPL"); | |
55 | MODULE_VERSION(DRIVER_VERSION); | |
56 | ||
57 | static int prof_sel = 2; | |
58 | module_param_named(prof_sel, prof_sel, int, 0444); | |
59 | MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); | |
60 | ||
61 | static char mlx5_version[] = | |
62 | DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" | |
63 | DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; | |
64 | ||
ad32b95f | 65 | static struct mlx5_profile profile[] = { |
e126ba97 EC |
66 | [0] = { |
67 | .mask = 0, | |
68 | }, | |
69 | [1] = { | |
70 | .mask = MLX5_PROF_MASK_QP_SIZE, | |
71 | .log_max_qp = 12, | |
72 | }, | |
73 | [2] = { | |
74 | .mask = MLX5_PROF_MASK_QP_SIZE | | |
75 | MLX5_PROF_MASK_MR_CACHE, | |
76 | .log_max_qp = 17, | |
77 | .mr_cache[0] = { | |
78 | .size = 500, | |
79 | .limit = 250 | |
80 | }, | |
81 | .mr_cache[1] = { | |
82 | .size = 500, | |
83 | .limit = 250 | |
84 | }, | |
85 | .mr_cache[2] = { | |
86 | .size = 500, | |
87 | .limit = 250 | |
88 | }, | |
89 | .mr_cache[3] = { | |
90 | .size = 500, | |
91 | .limit = 250 | |
92 | }, | |
93 | .mr_cache[4] = { | |
94 | .size = 500, | |
95 | .limit = 250 | |
96 | }, | |
97 | .mr_cache[5] = { | |
98 | .size = 500, | |
99 | .limit = 250 | |
100 | }, | |
101 | .mr_cache[6] = { | |
102 | .size = 500, | |
103 | .limit = 250 | |
104 | }, | |
105 | .mr_cache[7] = { | |
106 | .size = 500, | |
107 | .limit = 250 | |
108 | }, | |
109 | .mr_cache[8] = { | |
110 | .size = 500, | |
111 | .limit = 250 | |
112 | }, | |
113 | .mr_cache[9] = { | |
114 | .size = 500, | |
115 | .limit = 250 | |
116 | }, | |
117 | .mr_cache[10] = { | |
118 | .size = 500, | |
119 | .limit = 250 | |
120 | }, | |
121 | .mr_cache[11] = { | |
122 | .size = 500, | |
123 | .limit = 250 | |
124 | }, | |
125 | .mr_cache[12] = { | |
126 | .size = 64, | |
127 | .limit = 32 | |
128 | }, | |
129 | .mr_cache[13] = { | |
130 | .size = 32, | |
131 | .limit = 16 | |
132 | }, | |
133 | .mr_cache[14] = { | |
134 | .size = 16, | |
135 | .limit = 8 | |
136 | }, | |
137 | .mr_cache[15] = { | |
138 | .size = 8, | |
139 | .limit = 4 | |
140 | }, | |
141 | }, | |
142 | }; | |
143 | ||
144 | int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn) | |
145 | { | |
146 | struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; | |
147 | struct mlx5_eq *eq, *n; | |
148 | int err = -ENOENT; | |
149 | ||
150 | spin_lock(&table->lock); | |
151 | list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { | |
152 | if (eq->index == vector) { | |
153 | *eqn = eq->eqn; | |
154 | *irqn = eq->irqn; | |
155 | err = 0; | |
156 | break; | |
157 | } | |
158 | } | |
159 | spin_unlock(&table->lock); | |
160 | ||
161 | return err; | |
162 | } | |
163 | ||
164 | static int alloc_comp_eqs(struct mlx5_ib_dev *dev) | |
165 | { | |
166 | struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; | |
ada9f5d0 | 167 | char name[MLX5_MAX_EQ_NAME]; |
e126ba97 EC |
168 | struct mlx5_eq *eq, *n; |
169 | int ncomp_vec; | |
170 | int nent; | |
171 | int err; | |
172 | int i; | |
173 | ||
174 | INIT_LIST_HEAD(&dev->eqs_list); | |
175 | ncomp_vec = table->num_comp_vectors; | |
176 | nent = MLX5_COMP_EQ_SIZE; | |
177 | for (i = 0; i < ncomp_vec; i++) { | |
178 | eq = kzalloc(sizeof(*eq), GFP_KERNEL); | |
179 | if (!eq) { | |
180 | err = -ENOMEM; | |
181 | goto clean; | |
182 | } | |
183 | ||
ada9f5d0 | 184 | snprintf(name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i); |
e126ba97 EC |
185 | err = mlx5_create_map_eq(&dev->mdev, eq, |
186 | i + MLX5_EQ_VEC_COMP_BASE, nent, 0, | |
ada9f5d0 | 187 | name, &dev->mdev.priv.uuari.uars[0]); |
e126ba97 EC |
188 | if (err) { |
189 | kfree(eq); | |
190 | goto clean; | |
191 | } | |
192 | mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn); | |
193 | eq->index = i; | |
194 | spin_lock(&table->lock); | |
195 | list_add_tail(&eq->list, &dev->eqs_list); | |
196 | spin_unlock(&table->lock); | |
197 | } | |
198 | ||
199 | dev->num_comp_vectors = ncomp_vec; | |
200 | return 0; | |
201 | ||
202 | clean: | |
203 | spin_lock(&table->lock); | |
204 | list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { | |
205 | list_del(&eq->list); | |
206 | spin_unlock(&table->lock); | |
207 | if (mlx5_destroy_unmap_eq(&dev->mdev, eq)) | |
208 | mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); | |
209 | kfree(eq); | |
210 | spin_lock(&table->lock); | |
211 | } | |
212 | spin_unlock(&table->lock); | |
213 | return err; | |
214 | } | |
215 | ||
216 | static void free_comp_eqs(struct mlx5_ib_dev *dev) | |
217 | { | |
218 | struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; | |
219 | struct mlx5_eq *eq, *n; | |
220 | ||
221 | spin_lock(&table->lock); | |
222 | list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { | |
223 | list_del(&eq->list); | |
224 | spin_unlock(&table->lock); | |
225 | if (mlx5_destroy_unmap_eq(&dev->mdev, eq)) | |
226 | mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); | |
227 | kfree(eq); | |
228 | spin_lock(&table->lock); | |
229 | } | |
230 | spin_unlock(&table->lock); | |
231 | } | |
232 | ||
233 | static int mlx5_ib_query_device(struct ib_device *ibdev, | |
234 | struct ib_device_attr *props) | |
235 | { | |
236 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
237 | struct ib_smp *in_mad = NULL; | |
238 | struct ib_smp *out_mad = NULL; | |
239 | int err = -ENOMEM; | |
240 | int max_rq_sg; | |
241 | int max_sq_sg; | |
242 | u64 flags; | |
243 | ||
244 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
245 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
246 | if (!in_mad || !out_mad) | |
247 | goto out; | |
248 | ||
249 | init_query_mad(in_mad); | |
250 | in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; | |
251 | ||
252 | err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad); | |
253 | if (err) | |
254 | goto out; | |
255 | ||
256 | memset(props, 0, sizeof(*props)); | |
257 | ||
258 | props->fw_ver = ((u64)fw_rev_maj(&dev->mdev) << 32) | | |
259 | (fw_rev_min(&dev->mdev) << 16) | | |
260 | fw_rev_sub(&dev->mdev); | |
261 | props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | | |
262 | IB_DEVICE_PORT_ACTIVE_EVENT | | |
263 | IB_DEVICE_SYS_IMAGE_GUID | | |
264 | IB_DEVICE_RC_RNR_NAK_GEN | | |
265 | IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; | |
266 | flags = dev->mdev.caps.flags; | |
267 | if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR) | |
268 | props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; | |
269 | if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR) | |
270 | props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; | |
271 | if (flags & MLX5_DEV_CAP_FLAG_APM) | |
272 | props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; | |
273 | props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; | |
274 | if (flags & MLX5_DEV_CAP_FLAG_XRC) | |
275 | props->device_cap_flags |= IB_DEVICE_XRC; | |
276 | props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; | |
277 | ||
278 | props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & | |
279 | 0xffffff; | |
280 | props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30)); | |
281 | props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32)); | |
282 | memcpy(&props->sys_image_guid, out_mad->data + 4, 8); | |
283 | ||
284 | props->max_mr_size = ~0ull; | |
285 | props->page_size_cap = dev->mdev.caps.min_page_sz; | |
286 | props->max_qp = 1 << dev->mdev.caps.log_max_qp; | |
287 | props->max_qp_wr = dev->mdev.caps.max_wqes; | |
288 | max_rq_sg = dev->mdev.caps.max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg); | |
289 | max_sq_sg = (dev->mdev.caps.max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) / | |
290 | sizeof(struct mlx5_wqe_data_seg); | |
291 | props->max_sge = min(max_rq_sg, max_sq_sg); | |
292 | props->max_cq = 1 << dev->mdev.caps.log_max_cq; | |
293 | props->max_cqe = dev->mdev.caps.max_cqes - 1; | |
294 | props->max_mr = 1 << dev->mdev.caps.log_max_mkey; | |
295 | props->max_pd = 1 << dev->mdev.caps.log_max_pd; | |
296 | props->max_qp_rd_atom = dev->mdev.caps.max_ra_req_qp; | |
297 | props->max_qp_init_rd_atom = dev->mdev.caps.max_ra_res_qp; | |
298 | props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; | |
299 | props->max_srq = 1 << dev->mdev.caps.log_max_srq; | |
300 | props->max_srq_wr = dev->mdev.caps.max_srq_wqes - 1; | |
301 | props->max_srq_sge = max_rq_sg - 1; | |
302 | props->max_fast_reg_page_list_len = (unsigned int)-1; | |
303 | props->local_ca_ack_delay = dev->mdev.caps.local_ca_ack_delay; | |
81bea28f EC |
304 | props->atomic_cap = IB_ATOMIC_NONE; |
305 | props->masked_atomic_cap = IB_ATOMIC_NONE; | |
e126ba97 EC |
306 | props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28)); |
307 | props->max_mcast_grp = 1 << dev->mdev.caps.log_max_mcg; | |
308 | props->max_mcast_qp_attach = dev->mdev.caps.max_qp_mcg; | |
309 | props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * | |
310 | props->max_mcast_grp; | |
311 | props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ | |
312 | ||
313 | out: | |
314 | kfree(in_mad); | |
315 | kfree(out_mad); | |
316 | ||
317 | return err; | |
318 | } | |
319 | ||
320 | int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, | |
321 | struct ib_port_attr *props) | |
322 | { | |
323 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
324 | struct ib_smp *in_mad = NULL; | |
325 | struct ib_smp *out_mad = NULL; | |
326 | int ext_active_speed; | |
327 | int err = -ENOMEM; | |
328 | ||
329 | if (port < 1 || port > dev->mdev.caps.num_ports) { | |
330 | mlx5_ib_warn(dev, "invalid port number %d\n", port); | |
331 | return -EINVAL; | |
332 | } | |
333 | ||
334 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
335 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
336 | if (!in_mad || !out_mad) | |
337 | goto out; | |
338 | ||
339 | memset(props, 0, sizeof(*props)); | |
340 | ||
341 | init_query_mad(in_mad); | |
342 | in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; | |
343 | in_mad->attr_mod = cpu_to_be32(port); | |
344 | ||
345 | err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad); | |
346 | if (err) { | |
347 | mlx5_ib_warn(dev, "err %d\n", err); | |
348 | goto out; | |
349 | } | |
350 | ||
351 | ||
352 | props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16)); | |
353 | props->lmc = out_mad->data[34] & 0x7; | |
354 | props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18)); | |
355 | props->sm_sl = out_mad->data[36] & 0xf; | |
356 | props->state = out_mad->data[32] & 0xf; | |
357 | props->phys_state = out_mad->data[33] >> 4; | |
358 | props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20)); | |
359 | props->gid_tbl_len = out_mad->data[50]; | |
360 | props->max_msg_sz = 1 << to_mdev(ibdev)->mdev.caps.log_max_msg; | |
361 | props->pkey_tbl_len = to_mdev(ibdev)->mdev.caps.port[port - 1].pkey_table_len; | |
362 | props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46)); | |
363 | props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48)); | |
364 | props->active_width = out_mad->data[31] & 0xf; | |
365 | props->active_speed = out_mad->data[35] >> 4; | |
366 | props->max_mtu = out_mad->data[41] & 0xf; | |
367 | props->active_mtu = out_mad->data[36] >> 4; | |
368 | props->subnet_timeout = out_mad->data[51] & 0x1f; | |
369 | props->max_vl_num = out_mad->data[37] >> 4; | |
370 | props->init_type_reply = out_mad->data[41] >> 4; | |
371 | ||
372 | /* Check if extended speeds (EDR/FDR/...) are supported */ | |
373 | if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { | |
374 | ext_active_speed = out_mad->data[62] >> 4; | |
375 | ||
376 | switch (ext_active_speed) { | |
377 | case 1: | |
378 | props->active_speed = 16; /* FDR */ | |
379 | break; | |
380 | case 2: | |
381 | props->active_speed = 32; /* EDR */ | |
382 | break; | |
383 | } | |
384 | } | |
385 | ||
386 | /* If reported active speed is QDR, check if is FDR-10 */ | |
387 | if (props->active_speed == 4) { | |
388 | if (dev->mdev.caps.ext_port_cap[port - 1] & | |
389 | MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { | |
390 | init_query_mad(in_mad); | |
391 | in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO; | |
392 | in_mad->attr_mod = cpu_to_be32(port); | |
393 | ||
394 | err = mlx5_MAD_IFC(dev, 1, 1, port, | |
395 | NULL, NULL, in_mad, out_mad); | |
396 | if (err) | |
397 | goto out; | |
398 | ||
399 | /* Checking LinkSpeedActive for FDR-10 */ | |
400 | if (out_mad->data[15] & 0x1) | |
401 | props->active_speed = 8; | |
402 | } | |
403 | } | |
404 | ||
405 | out: | |
406 | kfree(in_mad); | |
407 | kfree(out_mad); | |
408 | ||
409 | return err; | |
410 | } | |
411 | ||
412 | static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, | |
413 | union ib_gid *gid) | |
414 | { | |
415 | struct ib_smp *in_mad = NULL; | |
416 | struct ib_smp *out_mad = NULL; | |
417 | int err = -ENOMEM; | |
418 | ||
419 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
420 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
421 | if (!in_mad || !out_mad) | |
422 | goto out; | |
423 | ||
424 | init_query_mad(in_mad); | |
425 | in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; | |
426 | in_mad->attr_mod = cpu_to_be32(port); | |
427 | ||
428 | err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); | |
429 | if (err) | |
430 | goto out; | |
431 | ||
432 | memcpy(gid->raw, out_mad->data + 8, 8); | |
433 | ||
434 | init_query_mad(in_mad); | |
435 | in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; | |
436 | in_mad->attr_mod = cpu_to_be32(index / 8); | |
437 | ||
438 | err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); | |
439 | if (err) | |
440 | goto out; | |
441 | ||
442 | memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); | |
443 | ||
444 | out: | |
445 | kfree(in_mad); | |
446 | kfree(out_mad); | |
447 | return err; | |
448 | } | |
449 | ||
450 | static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, | |
451 | u16 *pkey) | |
452 | { | |
453 | struct ib_smp *in_mad = NULL; | |
454 | struct ib_smp *out_mad = NULL; | |
455 | int err = -ENOMEM; | |
456 | ||
457 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
458 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
459 | if (!in_mad || !out_mad) | |
460 | goto out; | |
461 | ||
462 | init_query_mad(in_mad); | |
463 | in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; | |
464 | in_mad->attr_mod = cpu_to_be32(index / 32); | |
465 | ||
466 | err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); | |
467 | if (err) | |
468 | goto out; | |
469 | ||
470 | *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]); | |
471 | ||
472 | out: | |
473 | kfree(in_mad); | |
474 | kfree(out_mad); | |
475 | return err; | |
476 | } | |
477 | ||
478 | struct mlx5_reg_node_desc { | |
479 | u8 desc[64]; | |
480 | }; | |
481 | ||
482 | static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, | |
483 | struct ib_device_modify *props) | |
484 | { | |
485 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
486 | struct mlx5_reg_node_desc in; | |
487 | struct mlx5_reg_node_desc out; | |
488 | int err; | |
489 | ||
490 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) | |
491 | return -EOPNOTSUPP; | |
492 | ||
493 | if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) | |
494 | return 0; | |
495 | ||
496 | /* | |
497 | * If possible, pass node desc to FW, so it can generate | |
498 | * a 144 trap. If cmd fails, just ignore. | |
499 | */ | |
500 | memcpy(&in, props->node_desc, 64); | |
501 | err = mlx5_core_access_reg(&dev->mdev, &in, sizeof(in), &out, | |
502 | sizeof(out), MLX5_REG_NODE_DESC, 0, 1); | |
503 | if (err) | |
504 | return err; | |
505 | ||
506 | memcpy(ibdev->node_desc, props->node_desc, 64); | |
507 | ||
508 | return err; | |
509 | } | |
510 | ||
511 | static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, | |
512 | struct ib_port_modify *props) | |
513 | { | |
514 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
515 | struct ib_port_attr attr; | |
516 | u32 tmp; | |
517 | int err; | |
518 | ||
519 | mutex_lock(&dev->cap_mask_mutex); | |
520 | ||
521 | err = mlx5_ib_query_port(ibdev, port, &attr); | |
522 | if (err) | |
523 | goto out; | |
524 | ||
525 | tmp = (attr.port_cap_flags | props->set_port_cap_mask) & | |
526 | ~props->clr_port_cap_mask; | |
527 | ||
528 | err = mlx5_set_port_caps(&dev->mdev, port, tmp); | |
529 | ||
530 | out: | |
531 | mutex_unlock(&dev->cap_mask_mutex); | |
532 | return err; | |
533 | } | |
534 | ||
535 | static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, | |
536 | struct ib_udata *udata) | |
537 | { | |
538 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
78c0f98c | 539 | struct mlx5_ib_alloc_ucontext_req_v2 req; |
e126ba97 EC |
540 | struct mlx5_ib_alloc_ucontext_resp resp; |
541 | struct mlx5_ib_ucontext *context; | |
542 | struct mlx5_uuar_info *uuari; | |
543 | struct mlx5_uar *uars; | |
c1be5232 | 544 | int gross_uuars; |
e126ba97 | 545 | int num_uars; |
78c0f98c | 546 | int ver; |
e126ba97 EC |
547 | int uuarn; |
548 | int err; | |
549 | int i; | |
78c0f98c | 550 | int reqlen; |
e126ba97 EC |
551 | |
552 | if (!dev->ib_active) | |
553 | return ERR_PTR(-EAGAIN); | |
554 | ||
78c0f98c EC |
555 | memset(&req, 0, sizeof(req)); |
556 | reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); | |
557 | if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) | |
558 | ver = 0; | |
559 | else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) | |
560 | ver = 2; | |
561 | else | |
562 | return ERR_PTR(-EINVAL); | |
563 | ||
564 | err = ib_copy_from_udata(&req, udata, reqlen); | |
e126ba97 EC |
565 | if (err) |
566 | return ERR_PTR(err); | |
567 | ||
78c0f98c EC |
568 | if (req.flags || req.reserved) |
569 | return ERR_PTR(-EINVAL); | |
570 | ||
e126ba97 EC |
571 | if (req.total_num_uuars > MLX5_MAX_UUARS) |
572 | return ERR_PTR(-ENOMEM); | |
573 | ||
574 | if (req.total_num_uuars == 0) | |
575 | return ERR_PTR(-EINVAL); | |
576 | ||
c1be5232 EC |
577 | req.total_num_uuars = ALIGN(req.total_num_uuars, |
578 | MLX5_NON_FP_BF_REGS_PER_PAGE); | |
e126ba97 EC |
579 | if (req.num_low_latency_uuars > req.total_num_uuars - 1) |
580 | return ERR_PTR(-EINVAL); | |
581 | ||
c1be5232 EC |
582 | num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; |
583 | gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; | |
e126ba97 EC |
584 | resp.qp_tab_size = 1 << dev->mdev.caps.log_max_qp; |
585 | resp.bf_reg_size = dev->mdev.caps.bf_reg_size; | |
586 | resp.cache_line_size = L1_CACHE_BYTES; | |
587 | resp.max_sq_desc_sz = dev->mdev.caps.max_sq_desc_sz; | |
588 | resp.max_rq_desc_sz = dev->mdev.caps.max_rq_desc_sz; | |
589 | resp.max_send_wqebb = dev->mdev.caps.max_wqes; | |
590 | resp.max_recv_wr = dev->mdev.caps.max_wqes; | |
591 | resp.max_srq_recv_wr = dev->mdev.caps.max_srq_wqes; | |
592 | ||
593 | context = kzalloc(sizeof(*context), GFP_KERNEL); | |
594 | if (!context) | |
595 | return ERR_PTR(-ENOMEM); | |
596 | ||
597 | uuari = &context->uuari; | |
598 | mutex_init(&uuari->lock); | |
599 | uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); | |
600 | if (!uars) { | |
601 | err = -ENOMEM; | |
602 | goto out_ctx; | |
603 | } | |
604 | ||
c1be5232 | 605 | uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), |
e126ba97 EC |
606 | sizeof(*uuari->bitmap), |
607 | GFP_KERNEL); | |
608 | if (!uuari->bitmap) { | |
609 | err = -ENOMEM; | |
610 | goto out_uar_ctx; | |
611 | } | |
612 | /* | |
613 | * clear all fast path uuars | |
614 | */ | |
c1be5232 | 615 | for (i = 0; i < gross_uuars; i++) { |
e126ba97 EC |
616 | uuarn = i & 3; |
617 | if (uuarn == 2 || uuarn == 3) | |
618 | set_bit(i, uuari->bitmap); | |
619 | } | |
620 | ||
c1be5232 | 621 | uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); |
e126ba97 EC |
622 | if (!uuari->count) { |
623 | err = -ENOMEM; | |
624 | goto out_bitmap; | |
625 | } | |
626 | ||
627 | for (i = 0; i < num_uars; i++) { | |
628 | err = mlx5_cmd_alloc_uar(&dev->mdev, &uars[i].index); | |
629 | if (err) | |
630 | goto out_count; | |
631 | } | |
632 | ||
633 | INIT_LIST_HEAD(&context->db_page_list); | |
634 | mutex_init(&context->db_page_mutex); | |
635 | ||
636 | resp.tot_uuars = req.total_num_uuars; | |
637 | resp.num_ports = dev->mdev.caps.num_ports; | |
92b0ca7c DC |
638 | err = ib_copy_to_udata(udata, &resp, |
639 | sizeof(resp) - sizeof(resp.reserved)); | |
e126ba97 EC |
640 | if (err) |
641 | goto out_uars; | |
642 | ||
78c0f98c | 643 | uuari->ver = ver; |
e126ba97 EC |
644 | uuari->num_low_latency_uuars = req.num_low_latency_uuars; |
645 | uuari->uars = uars; | |
646 | uuari->num_uars = num_uars; | |
647 | return &context->ibucontext; | |
648 | ||
649 | out_uars: | |
650 | for (i--; i >= 0; i--) | |
651 | mlx5_cmd_free_uar(&dev->mdev, uars[i].index); | |
652 | out_count: | |
653 | kfree(uuari->count); | |
654 | ||
655 | out_bitmap: | |
656 | kfree(uuari->bitmap); | |
657 | ||
658 | out_uar_ctx: | |
659 | kfree(uars); | |
660 | ||
661 | out_ctx: | |
662 | kfree(context); | |
663 | return ERR_PTR(err); | |
664 | } | |
665 | ||
666 | static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) | |
667 | { | |
668 | struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); | |
669 | struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); | |
670 | struct mlx5_uuar_info *uuari = &context->uuari; | |
671 | int i; | |
672 | ||
673 | for (i = 0; i < uuari->num_uars; i++) { | |
674 | if (mlx5_cmd_free_uar(&dev->mdev, uuari->uars[i].index)) | |
675 | mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); | |
676 | } | |
677 | ||
678 | kfree(uuari->count); | |
679 | kfree(uuari->bitmap); | |
680 | kfree(uuari->uars); | |
681 | kfree(context); | |
682 | ||
683 | return 0; | |
684 | } | |
685 | ||
686 | static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) | |
687 | { | |
688 | return (pci_resource_start(dev->mdev.pdev, 0) >> PAGE_SHIFT) + index; | |
689 | } | |
690 | ||
691 | static int get_command(unsigned long offset) | |
692 | { | |
693 | return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; | |
694 | } | |
695 | ||
696 | static int get_arg(unsigned long offset) | |
697 | { | |
698 | return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); | |
699 | } | |
700 | ||
701 | static int get_index(unsigned long offset) | |
702 | { | |
703 | return get_arg(offset); | |
704 | } | |
705 | ||
706 | static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) | |
707 | { | |
708 | struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); | |
709 | struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); | |
710 | struct mlx5_uuar_info *uuari = &context->uuari; | |
711 | unsigned long command; | |
712 | unsigned long idx; | |
713 | phys_addr_t pfn; | |
714 | ||
715 | command = get_command(vma->vm_pgoff); | |
716 | switch (command) { | |
717 | case MLX5_IB_MMAP_REGULAR_PAGE: | |
718 | if (vma->vm_end - vma->vm_start != PAGE_SIZE) | |
719 | return -EINVAL; | |
720 | ||
721 | idx = get_index(vma->vm_pgoff); | |
722 | pfn = uar_index2pfn(dev, uuari->uars[idx].index); | |
723 | mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, | |
724 | (unsigned long long)pfn); | |
725 | ||
726 | if (idx >= uuari->num_uars) | |
727 | return -EINVAL; | |
728 | ||
729 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | |
730 | if (io_remap_pfn_range(vma, vma->vm_start, pfn, | |
731 | PAGE_SIZE, vma->vm_page_prot)) | |
732 | return -EAGAIN; | |
733 | ||
734 | mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", | |
735 | vma->vm_start, | |
736 | (unsigned long long)pfn << PAGE_SHIFT); | |
737 | break; | |
738 | ||
739 | case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: | |
740 | return -ENOSYS; | |
741 | ||
742 | default: | |
743 | return -EINVAL; | |
744 | } | |
745 | ||
746 | return 0; | |
747 | } | |
748 | ||
749 | static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) | |
750 | { | |
751 | struct mlx5_create_mkey_mbox_in *in; | |
752 | struct mlx5_mkey_seg *seg; | |
753 | struct mlx5_core_mr mr; | |
754 | int err; | |
755 | ||
756 | in = kzalloc(sizeof(*in), GFP_KERNEL); | |
757 | if (!in) | |
758 | return -ENOMEM; | |
759 | ||
760 | seg = &in->seg; | |
761 | seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; | |
762 | seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); | |
763 | seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); | |
764 | seg->start_addr = 0; | |
765 | ||
746b5583 EC |
766 | err = mlx5_core_create_mkey(&dev->mdev, &mr, in, sizeof(*in), |
767 | NULL, NULL, NULL); | |
e126ba97 EC |
768 | if (err) { |
769 | mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); | |
770 | goto err_in; | |
771 | } | |
772 | ||
773 | kfree(in); | |
774 | *key = mr.key; | |
775 | ||
776 | return 0; | |
777 | ||
778 | err_in: | |
779 | kfree(in); | |
780 | ||
781 | return err; | |
782 | } | |
783 | ||
784 | static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) | |
785 | { | |
786 | struct mlx5_core_mr mr; | |
787 | int err; | |
788 | ||
789 | memset(&mr, 0, sizeof(mr)); | |
790 | mr.key = key; | |
791 | err = mlx5_core_destroy_mkey(&dev->mdev, &mr); | |
792 | if (err) | |
793 | mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); | |
794 | } | |
795 | ||
796 | static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, | |
797 | struct ib_ucontext *context, | |
798 | struct ib_udata *udata) | |
799 | { | |
800 | struct mlx5_ib_alloc_pd_resp resp; | |
801 | struct mlx5_ib_pd *pd; | |
802 | int err; | |
803 | ||
804 | pd = kmalloc(sizeof(*pd), GFP_KERNEL); | |
805 | if (!pd) | |
806 | return ERR_PTR(-ENOMEM); | |
807 | ||
808 | err = mlx5_core_alloc_pd(&to_mdev(ibdev)->mdev, &pd->pdn); | |
809 | if (err) { | |
810 | kfree(pd); | |
811 | return ERR_PTR(err); | |
812 | } | |
813 | ||
814 | if (context) { | |
815 | resp.pdn = pd->pdn; | |
816 | if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { | |
817 | mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn); | |
818 | kfree(pd); | |
819 | return ERR_PTR(-EFAULT); | |
820 | } | |
821 | } else { | |
822 | err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); | |
823 | if (err) { | |
824 | mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn); | |
825 | kfree(pd); | |
826 | return ERR_PTR(err); | |
827 | } | |
828 | } | |
829 | ||
830 | return &pd->ibpd; | |
831 | } | |
832 | ||
833 | static int mlx5_ib_dealloc_pd(struct ib_pd *pd) | |
834 | { | |
835 | struct mlx5_ib_dev *mdev = to_mdev(pd->device); | |
836 | struct mlx5_ib_pd *mpd = to_mpd(pd); | |
837 | ||
838 | if (!pd->uobject) | |
839 | free_pa_mkey(mdev, mpd->pa_lkey); | |
840 | ||
841 | mlx5_core_dealloc_pd(&mdev->mdev, mpd->pdn); | |
842 | kfree(mpd); | |
843 | ||
844 | return 0; | |
845 | } | |
846 | ||
847 | static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |
848 | { | |
849 | struct mlx5_ib_dev *dev = to_mdev(ibqp->device); | |
850 | int err; | |
851 | ||
852 | err = mlx5_core_attach_mcg(&dev->mdev, gid, ibqp->qp_num); | |
853 | if (err) | |
854 | mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", | |
855 | ibqp->qp_num, gid->raw); | |
856 | ||
857 | return err; | |
858 | } | |
859 | ||
860 | static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |
861 | { | |
862 | struct mlx5_ib_dev *dev = to_mdev(ibqp->device); | |
863 | int err; | |
864 | ||
865 | err = mlx5_core_detach_mcg(&dev->mdev, gid, ibqp->qp_num); | |
866 | if (err) | |
867 | mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", | |
868 | ibqp->qp_num, gid->raw); | |
869 | ||
870 | return err; | |
871 | } | |
872 | ||
873 | static int init_node_data(struct mlx5_ib_dev *dev) | |
874 | { | |
875 | struct ib_smp *in_mad = NULL; | |
876 | struct ib_smp *out_mad = NULL; | |
877 | int err = -ENOMEM; | |
878 | ||
879 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
880 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
881 | if (!in_mad || !out_mad) | |
882 | goto out; | |
883 | ||
884 | init_query_mad(in_mad); | |
885 | in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; | |
886 | ||
887 | err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); | |
888 | if (err) | |
889 | goto out; | |
890 | ||
891 | memcpy(dev->ib_dev.node_desc, out_mad->data, 64); | |
892 | ||
893 | in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; | |
894 | ||
895 | err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); | |
896 | if (err) | |
897 | goto out; | |
898 | ||
899 | dev->mdev.rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32)); | |
900 | memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); | |
901 | ||
902 | out: | |
903 | kfree(in_mad); | |
904 | kfree(out_mad); | |
905 | return err; | |
906 | } | |
907 | ||
908 | static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, | |
909 | char *buf) | |
910 | { | |
911 | struct mlx5_ib_dev *dev = | |
912 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
913 | ||
914 | return sprintf(buf, "%d\n", dev->mdev.priv.fw_pages); | |
915 | } | |
916 | ||
917 | static ssize_t show_reg_pages(struct device *device, | |
918 | struct device_attribute *attr, char *buf) | |
919 | { | |
920 | struct mlx5_ib_dev *dev = | |
921 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
922 | ||
923 | return sprintf(buf, "%d\n", dev->mdev.priv.reg_pages); | |
924 | } | |
925 | ||
926 | static ssize_t show_hca(struct device *device, struct device_attribute *attr, | |
927 | char *buf) | |
928 | { | |
929 | struct mlx5_ib_dev *dev = | |
930 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
931 | return sprintf(buf, "MT%d\n", dev->mdev.pdev->device); | |
932 | } | |
933 | ||
934 | static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, | |
935 | char *buf) | |
936 | { | |
937 | struct mlx5_ib_dev *dev = | |
938 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
939 | return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(&dev->mdev), | |
940 | fw_rev_min(&dev->mdev), fw_rev_sub(&dev->mdev)); | |
941 | } | |
942 | ||
943 | static ssize_t show_rev(struct device *device, struct device_attribute *attr, | |
944 | char *buf) | |
945 | { | |
946 | struct mlx5_ib_dev *dev = | |
947 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
948 | return sprintf(buf, "%x\n", dev->mdev.rev_id); | |
949 | } | |
950 | ||
951 | static ssize_t show_board(struct device *device, struct device_attribute *attr, | |
952 | char *buf) | |
953 | { | |
954 | struct mlx5_ib_dev *dev = | |
955 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
956 | return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, | |
957 | dev->mdev.board_id); | |
958 | } | |
959 | ||
960 | static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); | |
961 | static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); | |
962 | static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); | |
963 | static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); | |
964 | static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); | |
965 | static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); | |
966 | ||
967 | static struct device_attribute *mlx5_class_attributes[] = { | |
968 | &dev_attr_hw_rev, | |
969 | &dev_attr_fw_ver, | |
970 | &dev_attr_hca_type, | |
971 | &dev_attr_board_id, | |
972 | &dev_attr_fw_pages, | |
973 | &dev_attr_reg_pages, | |
974 | }; | |
975 | ||
976 | static void mlx5_ib_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, | |
977 | void *data) | |
978 | { | |
979 | struct mlx5_ib_dev *ibdev = container_of(dev, struct mlx5_ib_dev, mdev); | |
980 | struct ib_event ibev; | |
981 | u8 port = 0; | |
982 | ||
983 | switch (event) { | |
984 | case MLX5_DEV_EVENT_SYS_ERROR: | |
985 | ibdev->ib_active = false; | |
986 | ibev.event = IB_EVENT_DEVICE_FATAL; | |
987 | break; | |
988 | ||
989 | case MLX5_DEV_EVENT_PORT_UP: | |
990 | ibev.event = IB_EVENT_PORT_ACTIVE; | |
991 | port = *(u8 *)data; | |
992 | break; | |
993 | ||
994 | case MLX5_DEV_EVENT_PORT_DOWN: | |
995 | ibev.event = IB_EVENT_PORT_ERR; | |
996 | port = *(u8 *)data; | |
997 | break; | |
998 | ||
999 | case MLX5_DEV_EVENT_PORT_INITIALIZED: | |
1000 | /* not used by ULPs */ | |
1001 | return; | |
1002 | ||
1003 | case MLX5_DEV_EVENT_LID_CHANGE: | |
1004 | ibev.event = IB_EVENT_LID_CHANGE; | |
1005 | port = *(u8 *)data; | |
1006 | break; | |
1007 | ||
1008 | case MLX5_DEV_EVENT_PKEY_CHANGE: | |
1009 | ibev.event = IB_EVENT_PKEY_CHANGE; | |
1010 | port = *(u8 *)data; | |
1011 | break; | |
1012 | ||
1013 | case MLX5_DEV_EVENT_GUID_CHANGE: | |
1014 | ibev.event = IB_EVENT_GID_CHANGE; | |
1015 | port = *(u8 *)data; | |
1016 | break; | |
1017 | ||
1018 | case MLX5_DEV_EVENT_CLIENT_REREG: | |
1019 | ibev.event = IB_EVENT_CLIENT_REREGISTER; | |
1020 | port = *(u8 *)data; | |
1021 | break; | |
1022 | } | |
1023 | ||
1024 | ibev.device = &ibdev->ib_dev; | |
1025 | ibev.element.port_num = port; | |
1026 | ||
a0c84c32 EC |
1027 | if (port < 1 || port > ibdev->num_ports) { |
1028 | mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); | |
1029 | return; | |
1030 | } | |
1031 | ||
e126ba97 EC |
1032 | if (ibdev->ib_active) |
1033 | ib_dispatch_event(&ibev); | |
1034 | } | |
1035 | ||
1036 | static void get_ext_port_caps(struct mlx5_ib_dev *dev) | |
1037 | { | |
1038 | int port; | |
1039 | ||
1040 | for (port = 1; port <= dev->mdev.caps.num_ports; port++) | |
1041 | mlx5_query_ext_port_caps(dev, port); | |
1042 | } | |
1043 | ||
1044 | static int get_port_caps(struct mlx5_ib_dev *dev) | |
1045 | { | |
1046 | struct ib_device_attr *dprops = NULL; | |
1047 | struct ib_port_attr *pprops = NULL; | |
1048 | int err = 0; | |
1049 | int port; | |
1050 | ||
1051 | pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); | |
1052 | if (!pprops) | |
1053 | goto out; | |
1054 | ||
1055 | dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); | |
1056 | if (!dprops) | |
1057 | goto out; | |
1058 | ||
1059 | err = mlx5_ib_query_device(&dev->ib_dev, dprops); | |
1060 | if (err) { | |
1061 | mlx5_ib_warn(dev, "query_device failed %d\n", err); | |
1062 | goto out; | |
1063 | } | |
1064 | ||
1065 | for (port = 1; port <= dev->mdev.caps.num_ports; port++) { | |
1066 | err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); | |
1067 | if (err) { | |
1068 | mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err); | |
1069 | break; | |
1070 | } | |
1071 | dev->mdev.caps.port[port - 1].pkey_table_len = dprops->max_pkeys; | |
1072 | dev->mdev.caps.port[port - 1].gid_table_len = pprops->gid_tbl_len; | |
1073 | mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", | |
1074 | dprops->max_pkeys, pprops->gid_tbl_len); | |
1075 | } | |
1076 | ||
1077 | out: | |
1078 | kfree(pprops); | |
1079 | kfree(dprops); | |
1080 | ||
1081 | return err; | |
1082 | } | |
1083 | ||
1084 | static void destroy_umrc_res(struct mlx5_ib_dev *dev) | |
1085 | { | |
1086 | int err; | |
1087 | ||
1088 | err = mlx5_mr_cache_cleanup(dev); | |
1089 | if (err) | |
1090 | mlx5_ib_warn(dev, "mr cache cleanup failed\n"); | |
1091 | ||
1092 | mlx5_ib_destroy_qp(dev->umrc.qp); | |
1093 | ib_destroy_cq(dev->umrc.cq); | |
1094 | ib_dereg_mr(dev->umrc.mr); | |
1095 | ib_dealloc_pd(dev->umrc.pd); | |
1096 | } | |
1097 | ||
1098 | enum { | |
1099 | MAX_UMR_WR = 128, | |
1100 | }; | |
1101 | ||
1102 | static int create_umr_res(struct mlx5_ib_dev *dev) | |
1103 | { | |
1104 | struct ib_qp_init_attr *init_attr = NULL; | |
1105 | struct ib_qp_attr *attr = NULL; | |
1106 | struct ib_pd *pd; | |
1107 | struct ib_cq *cq; | |
1108 | struct ib_qp *qp; | |
1109 | struct ib_mr *mr; | |
1110 | int ret; | |
1111 | ||
1112 | attr = kzalloc(sizeof(*attr), GFP_KERNEL); | |
1113 | init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); | |
1114 | if (!attr || !init_attr) { | |
1115 | ret = -ENOMEM; | |
1116 | goto error_0; | |
1117 | } | |
1118 | ||
1119 | pd = ib_alloc_pd(&dev->ib_dev); | |
1120 | if (IS_ERR(pd)) { | |
1121 | mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); | |
1122 | ret = PTR_ERR(pd); | |
1123 | goto error_0; | |
1124 | } | |
1125 | ||
1126 | mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE); | |
1127 | if (IS_ERR(mr)) { | |
1128 | mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n"); | |
1129 | ret = PTR_ERR(mr); | |
1130 | goto error_1; | |
1131 | } | |
1132 | ||
1133 | cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128, | |
1134 | 0); | |
1135 | if (IS_ERR(cq)) { | |
1136 | mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); | |
1137 | ret = PTR_ERR(cq); | |
1138 | goto error_2; | |
1139 | } | |
1140 | ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); | |
1141 | ||
1142 | init_attr->send_cq = cq; | |
1143 | init_attr->recv_cq = cq; | |
1144 | init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; | |
1145 | init_attr->cap.max_send_wr = MAX_UMR_WR; | |
1146 | init_attr->cap.max_send_sge = 1; | |
1147 | init_attr->qp_type = MLX5_IB_QPT_REG_UMR; | |
1148 | init_attr->port_num = 1; | |
1149 | qp = mlx5_ib_create_qp(pd, init_attr, NULL); | |
1150 | if (IS_ERR(qp)) { | |
1151 | mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); | |
1152 | ret = PTR_ERR(qp); | |
1153 | goto error_3; | |
1154 | } | |
1155 | qp->device = &dev->ib_dev; | |
1156 | qp->real_qp = qp; | |
1157 | qp->uobject = NULL; | |
1158 | qp->qp_type = MLX5_IB_QPT_REG_UMR; | |
1159 | ||
1160 | attr->qp_state = IB_QPS_INIT; | |
1161 | attr->port_num = 1; | |
1162 | ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | | |
1163 | IB_QP_PORT, NULL); | |
1164 | if (ret) { | |
1165 | mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); | |
1166 | goto error_4; | |
1167 | } | |
1168 | ||
1169 | memset(attr, 0, sizeof(*attr)); | |
1170 | attr->qp_state = IB_QPS_RTR; | |
1171 | attr->path_mtu = IB_MTU_256; | |
1172 | ||
1173 | ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); | |
1174 | if (ret) { | |
1175 | mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); | |
1176 | goto error_4; | |
1177 | } | |
1178 | ||
1179 | memset(attr, 0, sizeof(*attr)); | |
1180 | attr->qp_state = IB_QPS_RTS; | |
1181 | ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); | |
1182 | if (ret) { | |
1183 | mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); | |
1184 | goto error_4; | |
1185 | } | |
1186 | ||
1187 | dev->umrc.qp = qp; | |
1188 | dev->umrc.cq = cq; | |
1189 | dev->umrc.mr = mr; | |
1190 | dev->umrc.pd = pd; | |
1191 | ||
1192 | sema_init(&dev->umrc.sem, MAX_UMR_WR); | |
1193 | ret = mlx5_mr_cache_init(dev); | |
1194 | if (ret) { | |
1195 | mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); | |
1196 | goto error_4; | |
1197 | } | |
1198 | ||
1199 | kfree(attr); | |
1200 | kfree(init_attr); | |
1201 | ||
1202 | return 0; | |
1203 | ||
1204 | error_4: | |
1205 | mlx5_ib_destroy_qp(qp); | |
1206 | ||
1207 | error_3: | |
1208 | ib_destroy_cq(cq); | |
1209 | ||
1210 | error_2: | |
1211 | ib_dereg_mr(mr); | |
1212 | ||
1213 | error_1: | |
1214 | ib_dealloc_pd(pd); | |
1215 | ||
1216 | error_0: | |
1217 | kfree(attr); | |
1218 | kfree(init_attr); | |
1219 | return ret; | |
1220 | } | |
1221 | ||
1222 | static int create_dev_resources(struct mlx5_ib_resources *devr) | |
1223 | { | |
1224 | struct ib_srq_init_attr attr; | |
1225 | struct mlx5_ib_dev *dev; | |
1226 | int ret = 0; | |
1227 | ||
1228 | dev = container_of(devr, struct mlx5_ib_dev, devr); | |
1229 | ||
1230 | devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); | |
1231 | if (IS_ERR(devr->p0)) { | |
1232 | ret = PTR_ERR(devr->p0); | |
1233 | goto error0; | |
1234 | } | |
1235 | devr->p0->device = &dev->ib_dev; | |
1236 | devr->p0->uobject = NULL; | |
1237 | atomic_set(&devr->p0->usecnt, 0); | |
1238 | ||
1239 | devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL); | |
1240 | if (IS_ERR(devr->c0)) { | |
1241 | ret = PTR_ERR(devr->c0); | |
1242 | goto error1; | |
1243 | } | |
1244 | devr->c0->device = &dev->ib_dev; | |
1245 | devr->c0->uobject = NULL; | |
1246 | devr->c0->comp_handler = NULL; | |
1247 | devr->c0->event_handler = NULL; | |
1248 | devr->c0->cq_context = NULL; | |
1249 | atomic_set(&devr->c0->usecnt, 0); | |
1250 | ||
1251 | devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); | |
1252 | if (IS_ERR(devr->x0)) { | |
1253 | ret = PTR_ERR(devr->x0); | |
1254 | goto error2; | |
1255 | } | |
1256 | devr->x0->device = &dev->ib_dev; | |
1257 | devr->x0->inode = NULL; | |
1258 | atomic_set(&devr->x0->usecnt, 0); | |
1259 | mutex_init(&devr->x0->tgt_qp_mutex); | |
1260 | INIT_LIST_HEAD(&devr->x0->tgt_qp_list); | |
1261 | ||
1262 | devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); | |
1263 | if (IS_ERR(devr->x1)) { | |
1264 | ret = PTR_ERR(devr->x1); | |
1265 | goto error3; | |
1266 | } | |
1267 | devr->x1->device = &dev->ib_dev; | |
1268 | devr->x1->inode = NULL; | |
1269 | atomic_set(&devr->x1->usecnt, 0); | |
1270 | mutex_init(&devr->x1->tgt_qp_mutex); | |
1271 | INIT_LIST_HEAD(&devr->x1->tgt_qp_list); | |
1272 | ||
1273 | memset(&attr, 0, sizeof(attr)); | |
1274 | attr.attr.max_sge = 1; | |
1275 | attr.attr.max_wr = 1; | |
1276 | attr.srq_type = IB_SRQT_XRC; | |
1277 | attr.ext.xrc.cq = devr->c0; | |
1278 | attr.ext.xrc.xrcd = devr->x0; | |
1279 | ||
1280 | devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); | |
1281 | if (IS_ERR(devr->s0)) { | |
1282 | ret = PTR_ERR(devr->s0); | |
1283 | goto error4; | |
1284 | } | |
1285 | devr->s0->device = &dev->ib_dev; | |
1286 | devr->s0->pd = devr->p0; | |
1287 | devr->s0->uobject = NULL; | |
1288 | devr->s0->event_handler = NULL; | |
1289 | devr->s0->srq_context = NULL; | |
1290 | devr->s0->srq_type = IB_SRQT_XRC; | |
1291 | devr->s0->ext.xrc.xrcd = devr->x0; | |
1292 | devr->s0->ext.xrc.cq = devr->c0; | |
1293 | atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); | |
1294 | atomic_inc(&devr->s0->ext.xrc.cq->usecnt); | |
1295 | atomic_inc(&devr->p0->usecnt); | |
1296 | atomic_set(&devr->s0->usecnt, 0); | |
1297 | ||
1298 | return 0; | |
1299 | ||
1300 | error4: | |
1301 | mlx5_ib_dealloc_xrcd(devr->x1); | |
1302 | error3: | |
1303 | mlx5_ib_dealloc_xrcd(devr->x0); | |
1304 | error2: | |
1305 | mlx5_ib_destroy_cq(devr->c0); | |
1306 | error1: | |
1307 | mlx5_ib_dealloc_pd(devr->p0); | |
1308 | error0: | |
1309 | return ret; | |
1310 | } | |
1311 | ||
1312 | static void destroy_dev_resources(struct mlx5_ib_resources *devr) | |
1313 | { | |
1314 | mlx5_ib_destroy_srq(devr->s0); | |
1315 | mlx5_ib_dealloc_xrcd(devr->x0); | |
1316 | mlx5_ib_dealloc_xrcd(devr->x1); | |
1317 | mlx5_ib_destroy_cq(devr->c0); | |
1318 | mlx5_ib_dealloc_pd(devr->p0); | |
1319 | } | |
1320 | ||
1321 | static int init_one(struct pci_dev *pdev, | |
1322 | const struct pci_device_id *id) | |
1323 | { | |
1324 | struct mlx5_core_dev *mdev; | |
1325 | struct mlx5_ib_dev *dev; | |
1326 | int err; | |
1327 | int i; | |
1328 | ||
1329 | printk_once(KERN_INFO "%s", mlx5_version); | |
1330 | ||
1331 | dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); | |
1332 | if (!dev) | |
1333 | return -ENOMEM; | |
1334 | ||
1335 | mdev = &dev->mdev; | |
1336 | mdev->event = mlx5_ib_event; | |
1337 | if (prof_sel >= ARRAY_SIZE(profile)) { | |
1338 | pr_warn("selected pofile out of range, selceting default\n"); | |
1339 | prof_sel = 0; | |
1340 | } | |
1341 | mdev->profile = &profile[prof_sel]; | |
1342 | err = mlx5_dev_init(mdev, pdev); | |
1343 | if (err) | |
1344 | goto err_free; | |
1345 | ||
1346 | err = get_port_caps(dev); | |
1347 | if (err) | |
1348 | goto err_cleanup; | |
1349 | ||
1350 | get_ext_port_caps(dev); | |
1351 | ||
1352 | err = alloc_comp_eqs(dev); | |
1353 | if (err) | |
1354 | goto err_cleanup; | |
1355 | ||
1356 | MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); | |
1357 | ||
1358 | strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); | |
1359 | dev->ib_dev.owner = THIS_MODULE; | |
1360 | dev->ib_dev.node_type = RDMA_NODE_IB_CA; | |
1361 | dev->ib_dev.local_dma_lkey = mdev->caps.reserved_lkey; | |
1362 | dev->num_ports = mdev->caps.num_ports; | |
1363 | dev->ib_dev.phys_port_cnt = dev->num_ports; | |
1364 | dev->ib_dev.num_comp_vectors = dev->num_comp_vectors; | |
1365 | dev->ib_dev.dma_device = &mdev->pdev->dev; | |
1366 | ||
1367 | dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; | |
1368 | dev->ib_dev.uverbs_cmd_mask = | |
1369 | (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | | |
1370 | (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | | |
1371 | (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | | |
1372 | (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | | |
1373 | (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | | |
1374 | (1ull << IB_USER_VERBS_CMD_REG_MR) | | |
1375 | (1ull << IB_USER_VERBS_CMD_DEREG_MR) | | |
1376 | (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | | |
1377 | (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | | |
1378 | (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | | |
1379 | (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | | |
1380 | (1ull << IB_USER_VERBS_CMD_CREATE_QP) | | |
1381 | (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | | |
1382 | (1ull << IB_USER_VERBS_CMD_QUERY_QP) | | |
1383 | (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | | |
1384 | (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | | |
1385 | (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | | |
1386 | (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | | |
1387 | (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | | |
1388 | (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | | |
1389 | (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | | |
1390 | (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | | |
1391 | (1ull << IB_USER_VERBS_CMD_OPEN_QP); | |
1392 | ||
1393 | dev->ib_dev.query_device = mlx5_ib_query_device; | |
1394 | dev->ib_dev.query_port = mlx5_ib_query_port; | |
1395 | dev->ib_dev.query_gid = mlx5_ib_query_gid; | |
1396 | dev->ib_dev.query_pkey = mlx5_ib_query_pkey; | |
1397 | dev->ib_dev.modify_device = mlx5_ib_modify_device; | |
1398 | dev->ib_dev.modify_port = mlx5_ib_modify_port; | |
1399 | dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; | |
1400 | dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; | |
1401 | dev->ib_dev.mmap = mlx5_ib_mmap; | |
1402 | dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; | |
1403 | dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; | |
1404 | dev->ib_dev.create_ah = mlx5_ib_create_ah; | |
1405 | dev->ib_dev.query_ah = mlx5_ib_query_ah; | |
1406 | dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; | |
1407 | dev->ib_dev.create_srq = mlx5_ib_create_srq; | |
1408 | dev->ib_dev.modify_srq = mlx5_ib_modify_srq; | |
1409 | dev->ib_dev.query_srq = mlx5_ib_query_srq; | |
1410 | dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; | |
1411 | dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; | |
1412 | dev->ib_dev.create_qp = mlx5_ib_create_qp; | |
1413 | dev->ib_dev.modify_qp = mlx5_ib_modify_qp; | |
1414 | dev->ib_dev.query_qp = mlx5_ib_query_qp; | |
1415 | dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; | |
1416 | dev->ib_dev.post_send = mlx5_ib_post_send; | |
1417 | dev->ib_dev.post_recv = mlx5_ib_post_recv; | |
1418 | dev->ib_dev.create_cq = mlx5_ib_create_cq; | |
1419 | dev->ib_dev.modify_cq = mlx5_ib_modify_cq; | |
1420 | dev->ib_dev.resize_cq = mlx5_ib_resize_cq; | |
1421 | dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; | |
1422 | dev->ib_dev.poll_cq = mlx5_ib_poll_cq; | |
1423 | dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; | |
1424 | dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; | |
1425 | dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; | |
1426 | dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; | |
1427 | dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; | |
1428 | dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; | |
1429 | dev->ib_dev.process_mad = mlx5_ib_process_mad; | |
1430 | dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; | |
1431 | dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; | |
1432 | dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; | |
1433 | ||
1434 | if (mdev->caps.flags & MLX5_DEV_CAP_FLAG_XRC) { | |
1435 | dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; | |
1436 | dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; | |
1437 | dev->ib_dev.uverbs_cmd_mask |= | |
1438 | (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | | |
1439 | (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); | |
1440 | } | |
1441 | ||
1442 | err = init_node_data(dev); | |
1443 | if (err) | |
1444 | goto err_eqs; | |
1445 | ||
1446 | mutex_init(&dev->cap_mask_mutex); | |
1447 | spin_lock_init(&dev->mr_lock); | |
1448 | ||
1449 | err = create_dev_resources(&dev->devr); | |
1450 | if (err) | |
1451 | goto err_eqs; | |
1452 | ||
281d1a92 WY |
1453 | err = ib_register_device(&dev->ib_dev, NULL); |
1454 | if (err) | |
e126ba97 EC |
1455 | goto err_rsrc; |
1456 | ||
1457 | err = create_umr_res(dev); | |
1458 | if (err) | |
1459 | goto err_dev; | |
1460 | ||
1461 | for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { | |
281d1a92 WY |
1462 | err = device_create_file(&dev->ib_dev.dev, |
1463 | mlx5_class_attributes[i]); | |
1464 | if (err) | |
e126ba97 EC |
1465 | goto err_umrc; |
1466 | } | |
1467 | ||
1468 | dev->ib_active = true; | |
1469 | ||
1470 | return 0; | |
1471 | ||
1472 | err_umrc: | |
1473 | destroy_umrc_res(dev); | |
1474 | ||
1475 | err_dev: | |
1476 | ib_unregister_device(&dev->ib_dev); | |
1477 | ||
1478 | err_rsrc: | |
1479 | destroy_dev_resources(&dev->devr); | |
1480 | ||
1481 | err_eqs: | |
1482 | free_comp_eqs(dev); | |
1483 | ||
1484 | err_cleanup: | |
1485 | mlx5_dev_cleanup(mdev); | |
1486 | ||
1487 | err_free: | |
1488 | ib_dealloc_device((struct ib_device *)dev); | |
1489 | ||
1490 | return err; | |
1491 | } | |
1492 | ||
1493 | static void remove_one(struct pci_dev *pdev) | |
1494 | { | |
1495 | struct mlx5_ib_dev *dev = mlx5_pci2ibdev(pdev); | |
1496 | ||
1497 | destroy_umrc_res(dev); | |
1498 | ib_unregister_device(&dev->ib_dev); | |
1499 | destroy_dev_resources(&dev->devr); | |
1500 | free_comp_eqs(dev); | |
1501 | mlx5_dev_cleanup(&dev->mdev); | |
1502 | ib_dealloc_device(&dev->ib_dev); | |
1503 | } | |
1504 | ||
1505 | static DEFINE_PCI_DEVICE_TABLE(mlx5_ib_pci_table) = { | |
1506 | { PCI_VDEVICE(MELLANOX, 4113) }, /* MT4113 Connect-IB */ | |
1507 | { 0, } | |
1508 | }; | |
1509 | ||
1510 | MODULE_DEVICE_TABLE(pci, mlx5_ib_pci_table); | |
1511 | ||
1512 | static struct pci_driver mlx5_ib_driver = { | |
1513 | .name = DRIVER_NAME, | |
1514 | .id_table = mlx5_ib_pci_table, | |
1515 | .probe = init_one, | |
1516 | .remove = remove_one | |
1517 | }; | |
1518 | ||
1519 | static int __init mlx5_ib_init(void) | |
1520 | { | |
1521 | return pci_register_driver(&mlx5_ib_driver); | |
1522 | } | |
1523 | ||
1524 | static void __exit mlx5_ib_cleanup(void) | |
1525 | { | |
1526 | pci_unregister_driver(&mlx5_ib_driver); | |
1527 | } | |
1528 | ||
1529 | module_init(mlx5_ib_init); | |
1530 | module_exit(mlx5_ib_cleanup); |