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IB/mlx5: Decrease memory consumption of mr caches
[linux-2.6-block.git] / drivers / infiniband / hw / mlx5 / main.c
CommitLineData
e126ba97
EC		 1/*
2 * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <asm-generic/kmap_types.h>
34#include <linux/module.h>
35#include <linux/init.h>
36#include <linux/errno.h>
37#include <linux/pci.h>
38#include <linux/dma-mapping.h>
39#include <linux/slab.h>
40#include <linux/io-mapping.h>
41#include <linux/sched.h>
42#include <rdma/ib_user_verbs.h>
43#include <rdma/ib_smi.h>
44#include <rdma/ib_umem.h>
45#include "user.h"
46#include "mlx5_ib.h"
47
48#define DRIVER_NAME "mlx5_ib"
49#define DRIVER_VERSION "1.0"
50#define DRIVER_RELDATE "June 2013"
51
52MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
53MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
54MODULE_LICENSE("Dual BSD/GPL");
55MODULE_VERSION(DRIVER_VERSION);
56
57static int prof_sel = 2;
58module_param_named(prof_sel, prof_sel, int, 0444);
59MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2");
60
61static char mlx5_version[] =
62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
64
ad32b95f 65static struct mlx5_profile profile[] = {
e126ba97
EC		 66 [0] = {
67 .mask = 0,
68 },
69 [1] = {
70 .mask = MLX5_PROF_MASK_QP_SIZE,
71 .log_max_qp = 12,
72 },
73 [2] = {
74 .mask = MLX5_PROF_MASK_QP_SIZE |
75 MLX5_PROF_MASK_MR_CACHE,
76 .log_max_qp = 17,
77 .mr_cache[0] = {
78 .size = 500,
79 .limit = 250
80 },
81 .mr_cache[1] = {
82 .size = 500,
83 .limit = 250
84 },
85 .mr_cache[2] = {
86 .size = 500,
87 .limit = 250
88 },
89 .mr_cache[3] = {
90 .size = 500,
91 .limit = 250
92 },
93 .mr_cache[4] = {
94 .size = 500,
95 .limit = 250
96 },
97 .mr_cache[5] = {
98 .size = 500,
99 .limit = 250
100 },
101 .mr_cache[6] = {
102 .size = 500,
103 .limit = 250
104 },
105 .mr_cache[7] = {
106 .size = 500,
107 .limit = 250
108 },
109 .mr_cache[8] = {
110 .size = 500,
111 .limit = 250
112 },
113 .mr_cache[9] = {
114 .size = 500,
115 .limit = 250
116 },
117 .mr_cache[10] = {
118 .size = 500,
119 .limit = 250
120 },
121 .mr_cache[11] = {
122 .size = 500,
123 .limit = 250
124 },
125 .mr_cache[12] = {
126 .size = 64,
127 .limit = 32
128 },
129 .mr_cache[13] = {
130 .size = 32,
131 .limit = 16
132 },
133 .mr_cache[14] = {
134 .size = 16,
135 .limit = 8
136 },
137 .mr_cache[15] = {
138 .size = 8,
139 .limit = 4
140 },
141 },
142};
143
144int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn)
145{
146 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table;
147 struct mlx5_eq *eq, *n;
148 int err = -ENOENT;
149
150 spin_lock(&table->lock);
151 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
152 if (eq->index == vector) {
153 *eqn = eq->eqn;
154 *irqn = eq->irqn;
155 err = 0;
156 break;
157 }
158 }
159 spin_unlock(&table->lock);
160
161 return err;
162}
163
164static int alloc_comp_eqs(struct mlx5_ib_dev *dev)
165{
166 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table;
167 struct mlx5_eq *eq, *n;
168 int ncomp_vec;
169 int nent;
170 int err;
171 int i;
172
173 INIT_LIST_HEAD(&dev->eqs_list);
174 ncomp_vec = table->num_comp_vectors;
175 nent = MLX5_COMP_EQ_SIZE;
176 for (i = 0; i < ncomp_vec; i++) {
177 eq = kzalloc(sizeof(*eq), GFP_KERNEL);
178 if (!eq) {
179 err = -ENOMEM;
180 goto clean;
181 }
182
183 snprintf(eq->name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i);
184 err = mlx5_create_map_eq(&dev->mdev, eq,
185 i + MLX5_EQ_VEC_COMP_BASE, nent, 0,
186 eq->name,
187 &dev->mdev.priv.uuari.uars[0]);
188 if (err) {
189 kfree(eq);
190 goto clean;
191 }
192 mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn);
193 eq->index = i;
194 spin_lock(&table->lock);
195 list_add_tail(&eq->list, &dev->eqs_list);
196 spin_unlock(&table->lock);
197 }
198
199 dev->num_comp_vectors = ncomp_vec;
200 return 0;
201
202clean:
203 spin_lock(&table->lock);
204 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
205 list_del(&eq->list);
206 spin_unlock(&table->lock);
207 if (mlx5_destroy_unmap_eq(&dev->mdev, eq))
208 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn);
209 kfree(eq);
210 spin_lock(&table->lock);
211 }
212 spin_unlock(&table->lock);
213 return err;
214}
215
216static void free_comp_eqs(struct mlx5_ib_dev *dev)
217{
218 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table;
219 struct mlx5_eq *eq, *n;
220
221 spin_lock(&table->lock);
222 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
223 list_del(&eq->list);
224 spin_unlock(&table->lock);
225 if (mlx5_destroy_unmap_eq(&dev->mdev, eq))
226 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn);
227 kfree(eq);
228 spin_lock(&table->lock);
229 }
230 spin_unlock(&table->lock);
231}
232
233static int mlx5_ib_query_device(struct ib_device *ibdev,
234 struct ib_device_attr *props)
235{
236 struct mlx5_ib_dev *dev = to_mdev(ibdev);
237 struct ib_smp *in_mad = NULL;
238 struct ib_smp *out_mad = NULL;
239 int err = -ENOMEM;
240 int max_rq_sg;
241 int max_sq_sg;
242 u64 flags;
243
244 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
245 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
246 if (!in_mad || !out_mad)
247 goto out;
248
249 init_query_mad(in_mad);
250 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
251
252 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad);
253 if (err)
254 goto out;
255
256 memset(props, 0, sizeof(*props));
257
258 props->fw_ver = ((u64)fw_rev_maj(&dev->mdev) << 32) |
259 (fw_rev_min(&dev->mdev) << 16) |
260 fw_rev_sub(&dev->mdev);
261 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
262 IB_DEVICE_PORT_ACTIVE_EVENT |
263 IB_DEVICE_SYS_IMAGE_GUID |
264 IB_DEVICE_RC_RNR_NAK_GEN |
265 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
266 flags = dev->mdev.caps.flags;
267 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR)
268 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
269 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR)
270 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
271 if (flags & MLX5_DEV_CAP_FLAG_APM)
272 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
273 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
274 if (flags & MLX5_DEV_CAP_FLAG_XRC)
275 props->device_cap_flags |= IB_DEVICE_XRC;
276 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
277
278 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
279 0xffffff;
280 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30));
281 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32));
282 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
283
284 props->max_mr_size = ~0ull;
285 props->page_size_cap = dev->mdev.caps.min_page_sz;
286 props->max_qp = 1 << dev->mdev.caps.log_max_qp;
287 props->max_qp_wr = dev->mdev.caps.max_wqes;
288 max_rq_sg = dev->mdev.caps.max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg);
289 max_sq_sg = (dev->mdev.caps.max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) /
290 sizeof(struct mlx5_wqe_data_seg);
291 props->max_sge = min(max_rq_sg, max_sq_sg);
292 props->max_cq = 1 << dev->mdev.caps.log_max_cq;
293 props->max_cqe = dev->mdev.caps.max_cqes - 1;
294 props->max_mr = 1 << dev->mdev.caps.log_max_mkey;
295 props->max_pd = 1 << dev->mdev.caps.log_max_pd;
296 props->max_qp_rd_atom = dev->mdev.caps.max_ra_req_qp;
297 props->max_qp_init_rd_atom = dev->mdev.caps.max_ra_res_qp;
298 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
299 props->max_srq = 1 << dev->mdev.caps.log_max_srq;
300 props->max_srq_wr = dev->mdev.caps.max_srq_wqes - 1;
301 props->max_srq_sge = max_rq_sg - 1;
302 props->max_fast_reg_page_list_len = (unsigned int)-1;
303 props->local_ca_ack_delay = dev->mdev.caps.local_ca_ack_delay;
304 props->atomic_cap = dev->mdev.caps.flags & MLX5_DEV_CAP_FLAG_ATOMIC ?
305 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
306 props->masked_atomic_cap = IB_ATOMIC_HCA;
307 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
308 props->max_mcast_grp = 1 << dev->mdev.caps.log_max_mcg;
309 props->max_mcast_qp_attach = dev->mdev.caps.max_qp_mcg;
310 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
311 props->max_mcast_grp;
312 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */
313
314out:
315 kfree(in_mad);
316 kfree(out_mad);
317
318 return err;
319}
320
321int mlx5_ib_query_port(struct ib_device *ibdev, u8 port,
322 struct ib_port_attr *props)
323{
324 struct mlx5_ib_dev *dev = to_mdev(ibdev);
325 struct ib_smp *in_mad = NULL;
326 struct ib_smp *out_mad = NULL;
327 int ext_active_speed;
328 int err = -ENOMEM;
329
330 if (port < 1 || port > dev->mdev.caps.num_ports) {
331 mlx5_ib_warn(dev, "invalid port number %d\n", port);
332 return -EINVAL;
333 }
334
335 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
336 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
337 if (!in_mad || !out_mad)
338 goto out;
339
340 memset(props, 0, sizeof(*props));
341
342 init_query_mad(in_mad);
343 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
344 in_mad->attr_mod = cpu_to_be32(port);
345
346 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
347 if (err) {
348 mlx5_ib_warn(dev, "err %d\n", err);
349 goto out;
350 }
351
352
353 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
354 props->lmc = out_mad->data[34] & 0x7;
355 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
356 props->sm_sl = out_mad->data[36] & 0xf;
357 props->state = out_mad->data[32] & 0xf;
358 props->phys_state = out_mad->data[33] >> 4;
359 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
360 props->gid_tbl_len = out_mad->data[50];
361 props->max_msg_sz = 1 << to_mdev(ibdev)->mdev.caps.log_max_msg;
362 props->pkey_tbl_len = to_mdev(ibdev)->mdev.caps.port[port - 1].pkey_table_len;
363 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
364 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
365 props->active_width = out_mad->data[31] & 0xf;
366 props->active_speed = out_mad->data[35] >> 4;
367 props->max_mtu = out_mad->data[41] & 0xf;
368 props->active_mtu = out_mad->data[36] >> 4;
369 props->subnet_timeout = out_mad->data[51] & 0x1f;
370 props->max_vl_num = out_mad->data[37] >> 4;
371 props->init_type_reply = out_mad->data[41] >> 4;
372
373 /* Check if extended speeds (EDR/FDR/...) are supported */
374 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
375 ext_active_speed = out_mad->data[62] >> 4;
376
377 switch (ext_active_speed) {
378 case 1:
379 props->active_speed = 16; /* FDR */
380 break;
381 case 2:
382 props->active_speed = 32; /* EDR */
383 break;
384 }
385 }
386
387 /* If reported active speed is QDR, check if is FDR-10 */
388 if (props->active_speed == 4) {
389 if (dev->mdev.caps.ext_port_cap[port - 1] &
390 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
391 init_query_mad(in_mad);
392 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
393 in_mad->attr_mod = cpu_to_be32(port);
394
395 err = mlx5_MAD_IFC(dev, 1, 1, port,
396 NULL, NULL, in_mad, out_mad);
397 if (err)
398 goto out;
399
400 /* Checking LinkSpeedActive for FDR-10 */
401 if (out_mad->data[15] & 0x1)
402 props->active_speed = 8;
403 }
404 }
405
406out:
407 kfree(in_mad);
408 kfree(out_mad);
409
410 return err;
411}
412
413static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
414 union ib_gid *gid)
415{
416 struct ib_smp *in_mad = NULL;
417 struct ib_smp *out_mad = NULL;
418 int err = -ENOMEM;
419
420 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
421 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
422 if (!in_mad || !out_mad)
423 goto out;
424
425 init_query_mad(in_mad);
426 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
427 in_mad->attr_mod = cpu_to_be32(port);
428
429 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
430 if (err)
431 goto out;
432
433 memcpy(gid->raw, out_mad->data + 8, 8);
434
435 init_query_mad(in_mad);
436 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
437 in_mad->attr_mod = cpu_to_be32(index / 8);
438
439 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
440 if (err)
441 goto out;
442
443 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
444
445out:
446 kfree(in_mad);
447 kfree(out_mad);
448 return err;
449}
450
451static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
452 u16 *pkey)
453{
454 struct ib_smp *in_mad = NULL;
455 struct ib_smp *out_mad = NULL;
456 int err = -ENOMEM;
457
458 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
459 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
460 if (!in_mad || !out_mad)
461 goto out;
462
463 init_query_mad(in_mad);
464 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
465 in_mad->attr_mod = cpu_to_be32(index / 32);
466
467 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
468 if (err)
469 goto out;
470
471 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
472
473out:
474 kfree(in_mad);
475 kfree(out_mad);
476 return err;
477}
478
479struct mlx5_reg_node_desc {
480 u8 desc[64];
481};
482
483static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask,
484 struct ib_device_modify *props)
485{
486 struct mlx5_ib_dev *dev = to_mdev(ibdev);
487 struct mlx5_reg_node_desc in;
488 struct mlx5_reg_node_desc out;
489 int err;
490
491 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
492 return -EOPNOTSUPP;
493
494 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
495 return 0;
496
497 /*
498 * If possible, pass node desc to FW, so it can generate
499 * a 144 trap. If cmd fails, just ignore.
500 */
501 memcpy(&in, props->node_desc, 64);
502 err = mlx5_core_access_reg(&dev->mdev, &in, sizeof(in), &out,
503 sizeof(out), MLX5_REG_NODE_DESC, 0, 1);
504 if (err)
505 return err;
506
507 memcpy(ibdev->node_desc, props->node_desc, 64);
508
509 return err;
510}
511
512static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
513 struct ib_port_modify *props)
514{
515 struct mlx5_ib_dev *dev = to_mdev(ibdev);
516 struct ib_port_attr attr;
517 u32 tmp;
518 int err;
519
520 mutex_lock(&dev->cap_mask_mutex);
521
522 err = mlx5_ib_query_port(ibdev, port, &attr);
523 if (err)
524 goto out;
525
526 tmp = (attr.port_cap_flags | props->set_port_cap_mask) &
527 ~props->clr_port_cap_mask;
528
529 err = mlx5_set_port_caps(&dev->mdev, port, tmp);
530
531out:
532 mutex_unlock(&dev->cap_mask_mutex);
533 return err;
534}
535
536static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
537 struct ib_udata *udata)
538{
539 struct mlx5_ib_dev *dev = to_mdev(ibdev);
540 struct mlx5_ib_alloc_ucontext_req req;
541 struct mlx5_ib_alloc_ucontext_resp resp;
542 struct mlx5_ib_ucontext *context;
543 struct mlx5_uuar_info *uuari;
544 struct mlx5_uar *uars;
545 int num_uars;
546 int uuarn;
547 int err;
548 int i;
549
550 if (!dev->ib_active)
551 return ERR_PTR(-EAGAIN);
552
553 err = ib_copy_from_udata(&req, udata, sizeof(req));
554 if (err)
555 return ERR_PTR(err);
556
557 if (req.total_num_uuars > MLX5_MAX_UUARS)
558 return ERR_PTR(-ENOMEM);
559
560 if (req.total_num_uuars == 0)
561 return ERR_PTR(-EINVAL);
562
563 req.total_num_uuars = ALIGN(req.total_num_uuars, MLX5_BF_REGS_PER_PAGE);
564 if (req.num_low_latency_uuars > req.total_num_uuars - 1)
565 return ERR_PTR(-EINVAL);
566
567 num_uars = req.total_num_uuars / MLX5_BF_REGS_PER_PAGE;
568 resp.qp_tab_size = 1 << dev->mdev.caps.log_max_qp;
569 resp.bf_reg_size = dev->mdev.caps.bf_reg_size;
570 resp.cache_line_size = L1_CACHE_BYTES;
571 resp.max_sq_desc_sz = dev->mdev.caps.max_sq_desc_sz;
572 resp.max_rq_desc_sz = dev->mdev.caps.max_rq_desc_sz;
573 resp.max_send_wqebb = dev->mdev.caps.max_wqes;
574 resp.max_recv_wr = dev->mdev.caps.max_wqes;
575 resp.max_srq_recv_wr = dev->mdev.caps.max_srq_wqes;
576
577 context = kzalloc(sizeof(*context), GFP_KERNEL);
578 if (!context)
579 return ERR_PTR(-ENOMEM);
580
581 uuari = &context->uuari;
582 mutex_init(&uuari->lock);
583 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL);
584 if (!uars) {
585 err = -ENOMEM;
586 goto out_ctx;
587 }
588
589 uuari->bitmap = kcalloc(BITS_TO_LONGS(req.total_num_uuars),
590 sizeof(*uuari->bitmap),
591 GFP_KERNEL);
592 if (!uuari->bitmap) {
593 err = -ENOMEM;
594 goto out_uar_ctx;
595 }
596 /*
597 * clear all fast path uuars
598 */
599 for (i = 0; i < req.total_num_uuars; i++) {
600 uuarn = i & 3;
601 if (uuarn == 2 || uuarn == 3)
602 set_bit(i, uuari->bitmap);
603 }
604
605 uuari->count = kcalloc(req.total_num_uuars, sizeof(*uuari->count), GFP_KERNEL);
606 if (!uuari->count) {
607 err = -ENOMEM;
608 goto out_bitmap;
609 }
610
611 for (i = 0; i < num_uars; i++) {
612 err = mlx5_cmd_alloc_uar(&dev->mdev, &uars[i].index);
613 if (err)
614 goto out_count;
615 }
616
617 INIT_LIST_HEAD(&context->db_page_list);
618 mutex_init(&context->db_page_mutex);
619
620 resp.tot_uuars = req.total_num_uuars;
621 resp.num_ports = dev->mdev.caps.num_ports;
92b0ca7c
DC		 622 err = ib_copy_to_udata(udata, &resp,
623 sizeof(resp) - sizeof(resp.reserved));
e126ba97
EC		 624 if (err)
625 goto out_uars;
626
627 uuari->num_low_latency_uuars = req.num_low_latency_uuars;
628 uuari->uars = uars;
629 uuari->num_uars = num_uars;
630 return &context->ibucontext;
631
632out_uars:
633 for (i--; i >= 0; i--)
634 mlx5_cmd_free_uar(&dev->mdev, uars[i].index);
635out_count:
636 kfree(uuari->count);
637
638out_bitmap:
639 kfree(uuari->bitmap);
640
641out_uar_ctx:
642 kfree(uars);
643
644out_ctx:
645 kfree(context);
646 return ERR_PTR(err);
647}
648
649static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
650{
651 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
652 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
653 struct mlx5_uuar_info *uuari = &context->uuari;
654 int i;
655
656 for (i = 0; i < uuari->num_uars; i++) {
657 if (mlx5_cmd_free_uar(&dev->mdev, uuari->uars[i].index))
658 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index);
659 }
660
661 kfree(uuari->count);
662 kfree(uuari->bitmap);
663 kfree(uuari->uars);
664 kfree(context);
665
666 return 0;
667}
668
669static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index)
670{
671 return (pci_resource_start(dev->mdev.pdev, 0) >> PAGE_SHIFT) + index;
672}
673
674static int get_command(unsigned long offset)
675{
676 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK;
677}
678
679static int get_arg(unsigned long offset)
680{
681 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1);
682}
683
684static int get_index(unsigned long offset)
685{
686 return get_arg(offset);
687}
688
689static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma)
690{
691 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
692 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
693 struct mlx5_uuar_info *uuari = &context->uuari;
694 unsigned long command;
695 unsigned long idx;
696 phys_addr_t pfn;
697
698 command = get_command(vma->vm_pgoff);
699 switch (command) {
700 case MLX5_IB_MMAP_REGULAR_PAGE:
701 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
702 return -EINVAL;
703
704 idx = get_index(vma->vm_pgoff);
705 pfn = uar_index2pfn(dev, uuari->uars[idx].index);
706 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx,
707 (unsigned long long)pfn);
708
709 if (idx >= uuari->num_uars)
710 return -EINVAL;
711
712 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
713 if (io_remap_pfn_range(vma, vma->vm_start, pfn,
714 PAGE_SIZE, vma->vm_page_prot))
715 return -EAGAIN;
716
717 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n",
718 vma->vm_start,
719 (unsigned long long)pfn << PAGE_SHIFT);
720 break;
721
722 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES:
723 return -ENOSYS;
724
725 default:
726 return -EINVAL;
727 }
728
729 return 0;
730}
731
732static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn)
733{
734 struct mlx5_create_mkey_mbox_in *in;
735 struct mlx5_mkey_seg *seg;
736 struct mlx5_core_mr mr;
737 int err;
738
739 in = kzalloc(sizeof(*in), GFP_KERNEL);
740 if (!in)
741 return -ENOMEM;
742
743 seg = &in->seg;
744 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA;
745 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64);
746 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
747 seg->start_addr = 0;
748
749 err = mlx5_core_create_mkey(&dev->mdev, &mr, in, sizeof(*in));
750 if (err) {
751 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err);
752 goto err_in;
753 }
754
755 kfree(in);
756 *key = mr.key;
757
758 return 0;
759
760err_in:
761 kfree(in);
762
763 return err;
764}
765
766static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key)
767{
768 struct mlx5_core_mr mr;
769 int err;
770
771 memset(&mr, 0, sizeof(mr));
772 mr.key = key;
773 err = mlx5_core_destroy_mkey(&dev->mdev, &mr);
774 if (err)
775 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key);
776}
777
778static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
779 struct ib_ucontext *context,
780 struct ib_udata *udata)
781{
782 struct mlx5_ib_alloc_pd_resp resp;
783 struct mlx5_ib_pd *pd;
784 int err;
785
786 pd = kmalloc(sizeof(*pd), GFP_KERNEL);
787 if (!pd)
788 return ERR_PTR(-ENOMEM);
789
790 err = mlx5_core_alloc_pd(&to_mdev(ibdev)->mdev, &pd->pdn);
791 if (err) {
792 kfree(pd);
793 return ERR_PTR(err);
794 }
795
796 if (context) {
797 resp.pdn = pd->pdn;
798 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
799 mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn);
800 kfree(pd);
801 return ERR_PTR(-EFAULT);
802 }
803 } else {
804 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn);
805 if (err) {
806 mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn);
807 kfree(pd);
808 return ERR_PTR(err);
809 }
810 }
811
812 return &pd->ibpd;
813}
814
815static int mlx5_ib_dealloc_pd(struct ib_pd *pd)
816{
817 struct mlx5_ib_dev *mdev = to_mdev(pd->device);
818 struct mlx5_ib_pd *mpd = to_mpd(pd);
819
820 if (!pd->uobject)
821 free_pa_mkey(mdev, mpd->pa_lkey);
822
823 mlx5_core_dealloc_pd(&mdev->mdev, mpd->pdn);
824 kfree(mpd);
825
826 return 0;
827}
828
829static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
830{
831 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
832 int err;
833
834 err = mlx5_core_attach_mcg(&dev->mdev, gid, ibqp->qp_num);
835 if (err)
836 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n",
837 ibqp->qp_num, gid->raw);
838
839 return err;
840}
841
842static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
843{
844 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
845 int err;
846
847 err = mlx5_core_detach_mcg(&dev->mdev, gid, ibqp->qp_num);
848 if (err)
849 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n",
850 ibqp->qp_num, gid->raw);
851
852 return err;
853}
854
855static int init_node_data(struct mlx5_ib_dev *dev)
856{
857 struct ib_smp *in_mad = NULL;
858 struct ib_smp *out_mad = NULL;
859 int err = -ENOMEM;
860
861 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
862 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
863 if (!in_mad || !out_mad)
864 goto out;
865
866 init_query_mad(in_mad);
867 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
868
869 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
870 if (err)
871 goto out;
872
873 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
874
875 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
876
877 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
878 if (err)
879 goto out;
880
881 dev->mdev.rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32));
882 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
883
884out:
885 kfree(in_mad);
886 kfree(out_mad);
887 return err;
888}
889
890static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr,
891 char *buf)
892{
893 struct mlx5_ib_dev *dev =
894 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
895
896 return sprintf(buf, "%d\n", dev->mdev.priv.fw_pages);
897}
898
899static ssize_t show_reg_pages(struct device *device,
900 struct device_attribute *attr, char *buf)
901{
902 struct mlx5_ib_dev *dev =
903 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
904
905 return sprintf(buf, "%d\n", dev->mdev.priv.reg_pages);
906}
907
908static ssize_t show_hca(struct device *device, struct device_attribute *attr,
909 char *buf)
910{
911 struct mlx5_ib_dev *dev =
912 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
913 return sprintf(buf, "MT%d\n", dev->mdev.pdev->device);
914}
915
916static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
917 char *buf)
918{
919 struct mlx5_ib_dev *dev =
920 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
921 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(&dev->mdev),
922 fw_rev_min(&dev->mdev), fw_rev_sub(&dev->mdev));
923}
924
925static ssize_t show_rev(struct device *device, struct device_attribute *attr,
926 char *buf)
927{
928 struct mlx5_ib_dev *dev =
929 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
930 return sprintf(buf, "%x\n", dev->mdev.rev_id);
931}
932
933static ssize_t show_board(struct device *device, struct device_attribute *attr,
934 char *buf)
935{
936 struct mlx5_ib_dev *dev =
937 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
938 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
939 dev->mdev.board_id);
940}
941
942static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
943static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
944static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
945static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
946static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL);
947static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL);
948
949static struct device_attribute *mlx5_class_attributes[] = {
950 &dev_attr_hw_rev,
951 &dev_attr_fw_ver,
952 &dev_attr_hca_type,
953 &dev_attr_board_id,
954 &dev_attr_fw_pages,
955 &dev_attr_reg_pages,
956};
957
958static void mlx5_ib_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
959 void *data)
960{
961 struct mlx5_ib_dev *ibdev = container_of(dev, struct mlx5_ib_dev, mdev);
962 struct ib_event ibev;
963 u8 port = 0;
964
965 switch (event) {
966 case MLX5_DEV_EVENT_SYS_ERROR:
967 ibdev->ib_active = false;
968 ibev.event = IB_EVENT_DEVICE_FATAL;
969 break;
970
971 case MLX5_DEV_EVENT_PORT_UP:
972 ibev.event = IB_EVENT_PORT_ACTIVE;
973 port = *(u8 *)data;
974 break;
975
976 case MLX5_DEV_EVENT_PORT_DOWN:
977 ibev.event = IB_EVENT_PORT_ERR;
978 port = *(u8 *)data;
979 break;
980
981 case MLX5_DEV_EVENT_PORT_INITIALIZED:
982 /* not used by ULPs */
983 return;
984
985 case MLX5_DEV_EVENT_LID_CHANGE:
986 ibev.event = IB_EVENT_LID_CHANGE;
987 port = *(u8 *)data;
988 break;
989
990 case MLX5_DEV_EVENT_PKEY_CHANGE:
991 ibev.event = IB_EVENT_PKEY_CHANGE;
992 port = *(u8 *)data;
993 break;
994
995 case MLX5_DEV_EVENT_GUID_CHANGE:
996 ibev.event = IB_EVENT_GID_CHANGE;
997 port = *(u8 *)data;
998 break;
999
1000 case MLX5_DEV_EVENT_CLIENT_REREG:
1001 ibev.event = IB_EVENT_CLIENT_REREGISTER;
1002 port = *(u8 *)data;
1003 break;
1004 }
1005
1006 ibev.device = &ibdev->ib_dev;
1007 ibev.element.port_num = port;
1008
1009 if (ibdev->ib_active)
1010 ib_dispatch_event(&ibev);
1011}
1012
1013static void get_ext_port_caps(struct mlx5_ib_dev *dev)
1014{
1015 int port;
1016
1017 for (port = 1; port <= dev->mdev.caps.num_ports; port++)
1018 mlx5_query_ext_port_caps(dev, port);
1019}
1020
1021static int get_port_caps(struct mlx5_ib_dev *dev)
1022{
1023 struct ib_device_attr *dprops = NULL;
1024 struct ib_port_attr *pprops = NULL;
1025 int err = 0;
1026 int port;
1027
1028 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL);
1029 if (!pprops)
1030 goto out;
1031
1032 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL);
1033 if (!dprops)
1034 goto out;
1035
1036 err = mlx5_ib_query_device(&dev->ib_dev, dprops);
1037 if (err) {
1038 mlx5_ib_warn(dev, "query_device failed %d\n", err);
1039 goto out;
1040 }
1041
1042 for (port = 1; port <= dev->mdev.caps.num_ports; port++) {
1043 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops);
1044 if (err) {
1045 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err);
1046 break;
1047 }
1048 dev->mdev.caps.port[port - 1].pkey_table_len = dprops->max_pkeys;
1049 dev->mdev.caps.port[port - 1].gid_table_len = pprops->gid_tbl_len;
1050 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n",
1051 dprops->max_pkeys, pprops->gid_tbl_len);
1052 }
1053
1054out:
1055 kfree(pprops);
1056 kfree(dprops);
1057
1058 return err;
1059}
1060
1061static void destroy_umrc_res(struct mlx5_ib_dev *dev)
1062{
1063 int err;
1064
1065 err = mlx5_mr_cache_cleanup(dev);
1066 if (err)
1067 mlx5_ib_warn(dev, "mr cache cleanup failed\n");
1068
1069 mlx5_ib_destroy_qp(dev->umrc.qp);
1070 ib_destroy_cq(dev->umrc.cq);
1071 ib_dereg_mr(dev->umrc.mr);
1072 ib_dealloc_pd(dev->umrc.pd);
1073}
1074
1075enum {
1076 MAX_UMR_WR = 128,
1077};
1078
1079static int create_umr_res(struct mlx5_ib_dev *dev)
1080{
1081 struct ib_qp_init_attr *init_attr = NULL;
1082 struct ib_qp_attr *attr = NULL;
1083 struct ib_pd *pd;
1084 struct ib_cq *cq;
1085 struct ib_qp *qp;
1086 struct ib_mr *mr;
1087 int ret;
1088
1089 attr = kzalloc(sizeof(*attr), GFP_KERNEL);
1090 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL);
1091 if (!attr || !init_attr) {
1092 ret = -ENOMEM;
1093 goto error_0;
1094 }
1095
1096 pd = ib_alloc_pd(&dev->ib_dev);
1097 if (IS_ERR(pd)) {
1098 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n");
1099 ret = PTR_ERR(pd);
1100 goto error_0;
1101 }
1102
1103 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
1104 if (IS_ERR(mr)) {
1105 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n");
1106 ret = PTR_ERR(mr);
1107 goto error_1;
1108 }
1109
1110 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128,
1111 0);
1112 if (IS_ERR(cq)) {
1113 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n");
1114 ret = PTR_ERR(cq);
1115 goto error_2;
1116 }
1117 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
1118
1119 init_attr->send_cq = cq;
1120 init_attr->recv_cq = cq;
1121 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
1122 init_attr->cap.max_send_wr = MAX_UMR_WR;
1123 init_attr->cap.max_send_sge = 1;
1124 init_attr->qp_type = MLX5_IB_QPT_REG_UMR;
1125 init_attr->port_num = 1;
1126 qp = mlx5_ib_create_qp(pd, init_attr, NULL);
1127 if (IS_ERR(qp)) {
1128 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n");
1129 ret = PTR_ERR(qp);
1130 goto error_3;
1131 }
1132 qp->device = &dev->ib_dev;
1133 qp->real_qp = qp;
1134 qp->uobject = NULL;
1135 qp->qp_type = MLX5_IB_QPT_REG_UMR;
1136
1137 attr->qp_state = IB_QPS_INIT;
1138 attr->port_num = 1;
1139 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX |
1140 IB_QP_PORT, NULL);
1141 if (ret) {
1142 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n");
1143 goto error_4;
1144 }
1145
1146 memset(attr, 0, sizeof(*attr));
1147 attr->qp_state = IB_QPS_RTR;
1148 attr->path_mtu = IB_MTU_256;
1149
1150 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1151 if (ret) {
1152 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n");
1153 goto error_4;
1154 }
1155
1156 memset(attr, 0, sizeof(*attr));
1157 attr->qp_state = IB_QPS_RTS;
1158 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1159 if (ret) {
1160 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n");
1161 goto error_4;
1162 }
1163
1164 dev->umrc.qp = qp;
1165 dev->umrc.cq = cq;
1166 dev->umrc.mr = mr;
1167 dev->umrc.pd = pd;
1168
1169 sema_init(&dev->umrc.sem, MAX_UMR_WR);
1170 ret = mlx5_mr_cache_init(dev);
1171 if (ret) {
1172 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret);
1173 goto error_4;
1174 }
1175
1176 kfree(attr);
1177 kfree(init_attr);
1178
1179 return 0;
1180
1181error_4:
1182 mlx5_ib_destroy_qp(qp);
1183
1184error_3:
1185 ib_destroy_cq(cq);
1186
1187error_2:
1188 ib_dereg_mr(mr);
1189
1190error_1:
1191 ib_dealloc_pd(pd);
1192
1193error_0:
1194 kfree(attr);
1195 kfree(init_attr);
1196 return ret;
1197}
1198
1199static int create_dev_resources(struct mlx5_ib_resources *devr)
1200{
1201 struct ib_srq_init_attr attr;
1202 struct mlx5_ib_dev *dev;
1203 int ret = 0;
1204
1205 dev = container_of(devr, struct mlx5_ib_dev, devr);
1206
1207 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL);
1208 if (IS_ERR(devr->p0)) {
1209 ret = PTR_ERR(devr->p0);
1210 goto error0;
1211 }
1212 devr->p0->device = &dev->ib_dev;
1213 devr->p0->uobject = NULL;
1214 atomic_set(&devr->p0->usecnt, 0);
1215
1216 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL);
1217 if (IS_ERR(devr->c0)) {
1218 ret = PTR_ERR(devr->c0);
1219 goto error1;
1220 }
1221 devr->c0->device = &dev->ib_dev;
1222 devr->c0->uobject = NULL;
1223 devr->c0->comp_handler = NULL;
1224 devr->c0->event_handler = NULL;
1225 devr->c0->cq_context = NULL;
1226 atomic_set(&devr->c0->usecnt, 0);
1227
1228 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1229 if (IS_ERR(devr->x0)) {
1230 ret = PTR_ERR(devr->x0);
1231 goto error2;
1232 }
1233 devr->x0->device = &dev->ib_dev;
1234 devr->x0->inode = NULL;
1235 atomic_set(&devr->x0->usecnt, 0);
1236 mutex_init(&devr->x0->tgt_qp_mutex);
1237 INIT_LIST_HEAD(&devr->x0->tgt_qp_list);
1238
1239 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1240 if (IS_ERR(devr->x1)) {
1241 ret = PTR_ERR(devr->x1);
1242 goto error3;
1243 }
1244 devr->x1->device = &dev->ib_dev;
1245 devr->x1->inode = NULL;
1246 atomic_set(&devr->x1->usecnt, 0);
1247 mutex_init(&devr->x1->tgt_qp_mutex);
1248 INIT_LIST_HEAD(&devr->x1->tgt_qp_list);
1249
1250 memset(&attr, 0, sizeof(attr));
1251 attr.attr.max_sge = 1;
1252 attr.attr.max_wr = 1;
1253 attr.srq_type = IB_SRQT_XRC;
1254 attr.ext.xrc.cq = devr->c0;
1255 attr.ext.xrc.xrcd = devr->x0;
1256
1257 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL);
1258 if (IS_ERR(devr->s0)) {
1259 ret = PTR_ERR(devr->s0);
1260 goto error4;
1261 }
1262 devr->s0->device = &dev->ib_dev;
1263 devr->s0->pd = devr->p0;
1264 devr->s0->uobject = NULL;
1265 devr->s0->event_handler = NULL;
1266 devr->s0->srq_context = NULL;
1267 devr->s0->srq_type = IB_SRQT_XRC;
1268 devr->s0->ext.xrc.xrcd = devr->x0;
1269 devr->s0->ext.xrc.cq = devr->c0;
1270 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt);
1271 atomic_inc(&devr->s0->ext.xrc.cq->usecnt);
1272 atomic_inc(&devr->p0->usecnt);
1273 atomic_set(&devr->s0->usecnt, 0);
1274
1275 return 0;
1276
1277error4:
1278 mlx5_ib_dealloc_xrcd(devr->x1);
1279error3:
1280 mlx5_ib_dealloc_xrcd(devr->x0);
1281error2:
1282 mlx5_ib_destroy_cq(devr->c0);
1283error1:
1284 mlx5_ib_dealloc_pd(devr->p0);
1285error0:
1286 return ret;
1287}
1288
1289static void destroy_dev_resources(struct mlx5_ib_resources *devr)
1290{
1291 mlx5_ib_destroy_srq(devr->s0);
1292 mlx5_ib_dealloc_xrcd(devr->x0);
1293 mlx5_ib_dealloc_xrcd(devr->x1);
1294 mlx5_ib_destroy_cq(devr->c0);
1295 mlx5_ib_dealloc_pd(devr->p0);
1296}
1297
1298static int init_one(struct pci_dev *pdev,
1299 const struct pci_device_id *id)
1300{
1301 struct mlx5_core_dev *mdev;
1302 struct mlx5_ib_dev *dev;
1303 int err;
1304 int i;
1305
1306 printk_once(KERN_INFO "%s", mlx5_version);
1307
1308 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev));
1309 if (!dev)
1310 return -ENOMEM;
1311
1312 mdev = &dev->mdev;
1313 mdev->event = mlx5_ib_event;
1314 if (prof_sel >= ARRAY_SIZE(profile)) {
1315 pr_warn("selected pofile out of range, selceting default\n");
1316 prof_sel = 0;
1317 }
1318 mdev->profile = &profile[prof_sel];
1319 err = mlx5_dev_init(mdev, pdev);
1320 if (err)
1321 goto err_free;
1322
1323 err = get_port_caps(dev);
1324 if (err)
1325 goto err_cleanup;
1326
1327 get_ext_port_caps(dev);
1328
1329 err = alloc_comp_eqs(dev);
1330 if (err)
1331 goto err_cleanup;
1332
1333 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock);
1334
1335 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX);
1336 dev->ib_dev.owner = THIS_MODULE;
1337 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
1338 dev->ib_dev.local_dma_lkey = mdev->caps.reserved_lkey;
1339 dev->num_ports = mdev->caps.num_ports;
1340 dev->ib_dev.phys_port_cnt = dev->num_ports;
1341 dev->ib_dev.num_comp_vectors = dev->num_comp_vectors;
1342 dev->ib_dev.dma_device = &mdev->pdev->dev;
1343
1344 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION;
1345 dev->ib_dev.uverbs_cmd_mask =
1346 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1347 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1348 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1349 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1350 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1351 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1352 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1353 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1354 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1355 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1356 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1357 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1358 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1359 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1360 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1361 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1362 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1363 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1364 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1365 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1366 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1367 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
1368 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
1369
1370 dev->ib_dev.query_device = mlx5_ib_query_device;
1371 dev->ib_dev.query_port = mlx5_ib_query_port;
1372 dev->ib_dev.query_gid = mlx5_ib_query_gid;
1373 dev->ib_dev.query_pkey = mlx5_ib_query_pkey;
1374 dev->ib_dev.modify_device = mlx5_ib_modify_device;
1375 dev->ib_dev.modify_port = mlx5_ib_modify_port;
1376 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext;
1377 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext;
1378 dev->ib_dev.mmap = mlx5_ib_mmap;
1379 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd;
1380 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd;
1381 dev->ib_dev.create_ah = mlx5_ib_create_ah;
1382 dev->ib_dev.query_ah = mlx5_ib_query_ah;
1383 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah;
1384 dev->ib_dev.create_srq = mlx5_ib_create_srq;
1385 dev->ib_dev.modify_srq = mlx5_ib_modify_srq;
1386 dev->ib_dev.query_srq = mlx5_ib_query_srq;
1387 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq;
1388 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv;
1389 dev->ib_dev.create_qp = mlx5_ib_create_qp;
1390 dev->ib_dev.modify_qp = mlx5_ib_modify_qp;
1391 dev->ib_dev.query_qp = mlx5_ib_query_qp;
1392 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp;
1393 dev->ib_dev.post_send = mlx5_ib_post_send;
1394 dev->ib_dev.post_recv = mlx5_ib_post_recv;
1395 dev->ib_dev.create_cq = mlx5_ib_create_cq;
1396 dev->ib_dev.modify_cq = mlx5_ib_modify_cq;
1397 dev->ib_dev.resize_cq = mlx5_ib_resize_cq;
1398 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq;
1399 dev->ib_dev.poll_cq = mlx5_ib_poll_cq;
1400 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq;
1401 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr;
1402 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr;
1403 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr;
1404 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach;
1405 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach;
1406 dev->ib_dev.process_mad = mlx5_ib_process_mad;
1407 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr;
1408 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list;
1409 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list;
1410
1411 if (mdev->caps.flags & MLX5_DEV_CAP_FLAG_XRC) {
1412 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd;
1413 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd;
1414 dev->ib_dev.uverbs_cmd_mask |=
1415 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
1416 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
1417 }
1418
1419 err = init_node_data(dev);
1420 if (err)
1421 goto err_eqs;
1422
1423 mutex_init(&dev->cap_mask_mutex);
1424 spin_lock_init(&dev->mr_lock);
1425
1426 err = create_dev_resources(&dev->devr);
1427 if (err)
1428 goto err_eqs;
1429
281d1a92
WY		 1430 err = ib_register_device(&dev->ib_dev, NULL);
1431 if (err)
e126ba97
EC		 1432 goto err_rsrc;
1433
1434 err = create_umr_res(dev);
1435 if (err)
1436 goto err_dev;
1437
1438 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) {
281d1a92
WY		 1439 err = device_create_file(&dev->ib_dev.dev,
1440 mlx5_class_attributes[i]);
1441 if (err)
e126ba97
EC		 1442 goto err_umrc;
1443 }
1444
1445 dev->ib_active = true;
1446
1447 return 0;
1448
1449err_umrc:
1450 destroy_umrc_res(dev);
1451
1452err_dev:
1453 ib_unregister_device(&dev->ib_dev);
1454
1455err_rsrc:
1456 destroy_dev_resources(&dev->devr);
1457
1458err_eqs:
1459 free_comp_eqs(dev);
1460
1461err_cleanup:
1462 mlx5_dev_cleanup(mdev);
1463
1464err_free:
1465 ib_dealloc_device((struct ib_device *)dev);
1466
1467 return err;
1468}
1469
1470static void remove_one(struct pci_dev *pdev)
1471{
1472 struct mlx5_ib_dev *dev = mlx5_pci2ibdev(pdev);
1473
1474 destroy_umrc_res(dev);
1475 ib_unregister_device(&dev->ib_dev);
1476 destroy_dev_resources(&dev->devr);
1477 free_comp_eqs(dev);
1478 mlx5_dev_cleanup(&dev->mdev);
1479 ib_dealloc_device(&dev->ib_dev);
1480}
1481
1482static DEFINE_PCI_DEVICE_TABLE(mlx5_ib_pci_table) = {
1483 { PCI_VDEVICE(MELLANOX, 4113) }, /* MT4113 Connect-IB */
1484 { 0, }
1485};
1486
1487MODULE_DEVICE_TABLE(pci, mlx5_ib_pci_table);
1488
1489static struct pci_driver mlx5_ib_driver = {
1490 .name = DRIVER_NAME,
1491 .id_table = mlx5_ib_pci_table,
1492 .probe = init_one,
1493 .remove = remove_one
1494};
1495
1496static int __init mlx5_ib_init(void)
1497{
1498 return pci_register_driver(&mlx5_ib_driver);
1499}
1500
1501static void __exit mlx5_ib_cleanup(void)
1502{
1503 pci_unregister_driver(&mlx5_ib_driver);
1504}
1505
1506module_init(mlx5_ib_init);
1507module_exit(mlx5_ib_cleanup);
Linux 6.x block layer and io_uring tree(s)