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libceph: move r_reply_op_{len,result} into struct ceph_osd_req_op
[linux-2.6-block.git] / drivers / hwmon / w83793.c
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6800c3d0 1/*
47efe877
GR		 2 * w83793.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2006 Winbond Electronics Corp.
4 * Yuan Mu
5 * Rudolf Marek <r.marek@assembler.cz>
6 * Copyright (C) 2009-2010 Sven Anders <anders@anduras.de>, ANDURAS AG.
7 * Watchdog driver part
8 * (Based partially on fschmd driver,
9 * Copyright 2007-2008 by Hans de Goede)
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation - version 2.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 * 02110-1301 USA.
24 */
6800c3d0
RM		 25
26/*
47efe877
GR		 27 * Supports following chips:
28 *
29 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
30 * w83793 10 12 8 6 0x7b 0x5ca3 yes no
31 */
6800c3d0
RM		 32
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/i2c.h>
37#include <linux/hwmon.h>
38#include <linux/hwmon-vid.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h>
41#include <linux/mutex.h>
5852f960
SA		 42#include <linux/fs.h>
43#include <linux/watchdog.h>
44#include <linux/miscdevice.h>
45#include <linux/uaccess.h>
46#include <linux/kref.h>
47#include <linux/notifier.h>
48#include <linux/reboot.h>
dcd8f392 49#include <linux/jiffies.h>
5852f960
SA		 50
51/* Default values */
52#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
6800c3d0
RM		 53
54/* Addresses to scan */
25e9c86d
MH		 55static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
56 I2C_CLIENT_END };
6800c3d0
RM		 57
58/* Insmod parameters */
3aed198c
JD		 59
60static unsigned short force_subclients[4];
61module_param_array(force_subclients, short, NULL, 0);
b55f3757
GR		 62MODULE_PARM_DESC(force_subclients,
63 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
6800c3d0 64
90ab5ee9 65static bool reset;
6800c3d0
RM		 66module_param(reset, bool, 0);
67MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
68
5852f960
SA		 69static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
70module_param(timeout, int, 0);
71MODULE_PARM_DESC(timeout,
72 "Watchdog timeout in minutes. 2<= timeout <=255 (default="
73 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
74
86a1e189
WVS		 75static bool nowayout = WATCHDOG_NOWAYOUT;
76module_param(nowayout, bool, 0);
5852f960
SA		 77MODULE_PARM_DESC(nowayout,
78 "Watchdog cannot be stopped once started (default="
79 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
80
6800c3d0 81/*
47efe877
GR		 82 * Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
83 * as ID, Bank Select registers
84 */
6800c3d0
RM		 85#define W83793_REG_BANKSEL 0x00
86#define W83793_REG_VENDORID 0x0d
87#define W83793_REG_CHIPID 0x0e
88#define W83793_REG_DEVICEID 0x0f
89
90#define W83793_REG_CONFIG 0x40
91#define W83793_REG_MFC 0x58
92#define W83793_REG_FANIN_CTRL 0x5c
93#define W83793_REG_FANIN_SEL 0x5d
94#define W83793_REG_I2C_ADDR 0x0b
95#define W83793_REG_I2C_SUBADDR 0x0c
96#define W83793_REG_VID_INA 0x05
97#define W83793_REG_VID_INB 0x06
98#define W83793_REG_VID_LATCHA 0x07
99#define W83793_REG_VID_LATCHB 0x08
100#define W83793_REG_VID_CTRL 0x59
101
5852f960
SA		 102#define W83793_REG_WDT_LOCK 0x01
103#define W83793_REG_WDT_ENABLE 0x02
104#define W83793_REG_WDT_STATUS 0x03
105#define W83793_REG_WDT_TIMEOUT 0x04
106
6800c3d0
RM		 107static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
108
109#define TEMP_READ 0
110#define TEMP_CRIT 1
111#define TEMP_CRIT_HYST 2
112#define TEMP_WARN 3
113#define TEMP_WARN_HYST 4
47efe877
GR		 114/*
115 * only crit and crit_hyst affect real-time alarm status
116 * current crit crit_hyst warn warn_hyst
117 */
6800c3d0
RM		 118static u16 W83793_REG_TEMP[][5] = {
119 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
120 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
121 {0x1e, 0x80, 0x81, 0x82, 0x83},
122 {0x1f, 0x84, 0x85, 0x86, 0x87},
123 {0x20, 0x88, 0x89, 0x8a, 0x8b},
124 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
125};
126
127#define W83793_REG_TEMP_LOW_BITS 0x22
128
129#define W83793_REG_BEEP(index) (0x53 + (index))
130#define W83793_REG_ALARM(index) (0x4b + (index))
131
132#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
133#define W83793_REG_IRQ_CTRL 0x50
134#define W83793_REG_OVT_CTRL 0x51
135#define W83793_REG_OVT_BEEP 0x52
136
137#define IN_READ 0
138#define IN_MAX 1
139#define IN_LOW 2
140static const u16 W83793_REG_IN[][3] = {
141 /* Current, High, Low */
142 {0x10, 0x60, 0x61}, /* Vcore A */
143 {0x11, 0x62, 0x63}, /* Vcore B */
144 {0x12, 0x64, 0x65}, /* Vtt */
145 {0x14, 0x6a, 0x6b}, /* VSEN1 */
146 {0x15, 0x6c, 0x6d}, /* VSEN2 */
147 {0x16, 0x6e, 0x6f}, /* +3VSEN */
148 {0x17, 0x70, 0x71}, /* +12VSEN */
149 {0x18, 0x72, 0x73}, /* 5VDD */
150 {0x19, 0x74, 0x75}, /* 5VSB */
151 {0x1a, 0x76, 0x77}, /* VBAT */
152};
153
154/* Low Bits of Vcore A/B Vtt Read/High/Low */
155static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
156static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 157static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 158
159#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
160#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
161
162#define W83793_REG_PWM_DEFAULT 0xb2
163#define W83793_REG_PWM_ENABLE 0x207
164#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
165#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
166#define W83793_REG_TEMP_CRITICAL 0xc5
167
168#define PWM_DUTY 0
169#define PWM_START 1
170#define PWM_NONSTOP 2
5aebefb0 171#define PWM_STOP_TIME 3
6800c3d0
RM		 172#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
173 (nr) == 1 ? 0x220 : 0x218) + (index))
174
175/* bit field, fan1 is bit0, fan2 is bit1 ... */
176#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
177#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
178#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
179#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
180#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
181#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
182
183static inline unsigned long FAN_FROM_REG(u16 val)
184{
185 if ((val >= 0xfff) || (val == 0))
186 return 0;
7fe83ad8 187 return 1350000UL / val;
6800c3d0
RM		 188}
189
190static inline u16 FAN_TO_REG(long rpm)
191{
192 if (rpm <= 0)
193 return 0x0fff;
2a844c14 194 return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
6800c3d0
RM		 195}
196
197static inline unsigned long TIME_FROM_REG(u8 reg)
198{
7fe83ad8 199 return reg * 100;
6800c3d0
RM		 200}
201
202static inline u8 TIME_TO_REG(unsigned long val)
203{
2a844c14 204 return clamp_val((val + 50) / 100, 0, 0xff);
6800c3d0
RM		 205}
206
207static inline long TEMP_FROM_REG(s8 reg)
208{
7fe83ad8 209 return reg * 1000;
6800c3d0
RM		 210}
211
212static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
213{
2a844c14 214 return clamp_val((val + (val < 0 ? -500 : 500)) / 1000, min, max);
6800c3d0
RM		 215}
216
217struct w83793_data {
6800c3d0 218 struct i2c_client *lm75[2];
1beeffe4 219 struct device *hwmon_dev;
6800c3d0
RM		 220 struct mutex update_lock;
221 char valid; /* !=0 if following fields are valid */
222 unsigned long last_updated; /* In jiffies */
223 unsigned long last_nonvolatile; /* In jiffies, last time we update the
47efe877
GR		 224 * nonvolatile registers
225 */
6800c3d0
RM		 226
227 u8 bank;
228 u8 vrm;
229 u8 vid[2];
230 u8 in[10][3]; /* Register value, read/high/low */
231 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
232
233 u16 has_fan; /* Only fan1- fan5 has own pins */
234 u16 fan[12]; /* Register value combine */
235 u16 fan_min[12]; /* Register value combine */
236
237 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
238 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
239 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
47efe877
GR		 240 * byte 1: Temp R1,R2 mode, each has 1 bit
241 */
6800c3d0
RM		 242 u8 temp_critical; /* If reached all fan will be at full speed */
243 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
244
245 u8 has_pwm;
46bed4df 246 u8 has_temp;
c70a8c34 247 u8 has_vid;
6800c3d0
RM		 248 u8 pwm_enable; /* Register value, each Temp has 1 bit */
249 u8 pwm_uptime; /* Register value */
250 u8 pwm_downtime; /* Register value */
251 u8 pwm_default; /* All fan default pwm, next poweron valid */
252 u8 pwm[8][3]; /* Register value */
253 u8 pwm_stop_time[8];
254 u8 temp_cruise[6];
255
256 u8 alarms[5]; /* realtime status registers */
257 u8 beeps[5];
258 u8 beep_enable;
259 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
260 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
261 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
5852f960
SA		 262
263 /* watchdog */
264 struct i2c_client *client;
265 struct mutex watchdog_lock;
266 struct list_head list; /* member of the watchdog_data_list */
267 struct kref kref;
268 struct miscdevice watchdog_miscdev;
269 unsigned long watchdog_is_open;
270 char watchdog_expect_close;
271 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
272 unsigned int watchdog_caused_reboot;
273 int watchdog_timeout; /* watchdog timeout in minutes */
6800c3d0
RM		 274};
275
47efe877
GR		 276/*
277 * Somewhat ugly :( global data pointer list with all devices, so that
278 * we can find our device data as when using misc_register. There is no
279 * other method to get to one's device data from the open file-op and
280 * for usage in the reboot notifier callback.
281 */
5852f960
SA		 282static LIST_HEAD(watchdog_data_list);
283
284/* Note this lock not only protect list access, but also data.kref access */
285static DEFINE_MUTEX(watchdog_data_mutex);
286
47efe877
GR		 287/*
288 * Release our data struct when we're detached from the i2c client *and* all
289 * references to our watchdog device are released
290 */
5852f960
SA		 291static void w83793_release_resources(struct kref *ref)
292{
293 struct w83793_data *data = container_of(ref, struct w83793_data, kref);
294 kfree(data);
295}
296
6800c3d0
RM		 297static u8 w83793_read_value(struct i2c_client *client, u16 reg);
298static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
a7f13a6e
JD		 299static int w83793_probe(struct i2c_client *client,
300 const struct i2c_device_id *id);
310ec792 301static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 302 struct i2c_board_info *info);
303static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 304static void w83793_init_client(struct i2c_client *client);
305static void w83793_update_nonvolatile(struct device *dev);
306static struct w83793_data *w83793_update_device(struct device *dev);
307
a7f13a6e 308static const struct i2c_device_id w83793_id[] = {
1f86df49 309 { "w83793", 0 },
a7f13a6e
JD		 310 { }
311};
312MODULE_DEVICE_TABLE(i2c, w83793_id);
313
6800c3d0 314static struct i2c_driver w83793_driver = {
a7f13a6e 315 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 316 .driver = {
317 .name = "w83793",
318 },
a7f13a6e
JD		 319 .probe = w83793_probe,
320 .remove = w83793_remove,
321 .id_table = w83793_id,
322 .detect = w83793_detect,
c3813d6a 323 .address_list = normal_i2c,
6800c3d0
RM		 324};
325
326static ssize_t
327show_vrm(struct device *dev, struct device_attribute *attr, char *buf)
328{
8f74efe8 329 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 330 return sprintf(buf, "%d\n", data->vrm);
331}
332
333static ssize_t
334show_vid(struct device *dev, struct device_attribute *attr, char *buf)
335{
336 struct w83793_data *data = w83793_update_device(dev);
337 struct sensor_device_attribute_2 *sensor_attr =
338 to_sensor_dev_attr_2(attr);
339 int index = sensor_attr->index;
340
341 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
342}
343
344static ssize_t
345store_vrm(struct device *dev, struct device_attribute *attr,
346 const char *buf, size_t count)
347{
8f74efe8 348 struct w83793_data *data = dev_get_drvdata(dev);
47efe877
GR		 349 unsigned long val;
350 int err;
351
352 err = kstrtoul(buf, 10, &val);
353 if (err)
354 return err;
355
2aeee04d
AL		 356 if (val > 255)
357 return -EINVAL;
358
47efe877 359 data->vrm = val;
6800c3d0
RM		 360 return count;
361}
362
363#define ALARM_STATUS 0
364#define BEEP_ENABLE 1
365static ssize_t
366show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
367{
368 struct w83793_data *data = w83793_update_device(dev);
369 struct sensor_device_attribute_2 *sensor_attr =
370 to_sensor_dev_attr_2(attr);
371 int nr = sensor_attr->nr;
372 int index = sensor_attr->index >> 3;
373 int bit = sensor_attr->index & 0x07;
374 u8 val;
375
47efe877 376 if (nr == ALARM_STATUS) {
6800c3d0
RM		 377 val = (data->alarms[index] >> (bit)) & 1;
378 } else { /* BEEP_ENABLE */
379 val = (data->beeps[index] >> (bit)) & 1;
380 }
381
382 return sprintf(buf, "%u\n", val);
383}
384
385static ssize_t
386store_beep(struct device *dev, struct device_attribute *attr,
387 const char *buf, size_t count)
388{
389 struct i2c_client *client = to_i2c_client(dev);
390 struct w83793_data *data = i2c_get_clientdata(client);
391 struct sensor_device_attribute_2 *sensor_attr =
392 to_sensor_dev_attr_2(attr);
393 int index = sensor_attr->index >> 3;
394 int shift = sensor_attr->index & 0x07;
395 u8 beep_bit = 1 << shift;
47efe877
GR		 396 unsigned long val;
397 int err;
6800c3d0 398
47efe877
GR		 399 err = kstrtoul(buf, 10, &val);
400 if (err)
401 return err;
402
403 if (val > 1)
6800c3d0
RM		 404 return -EINVAL;
405
406 mutex_lock(&data->update_lock);
407 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
408 data->beeps[index] &= ~beep_bit;
409 data->beeps[index] |= val << shift;
410 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
411 mutex_unlock(&data->update_lock);
412
413 return count;
414}
415
416static ssize_t
417show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
418{
419 struct w83793_data *data = w83793_update_device(dev);
420 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
421}
422
423static ssize_t
424store_beep_enable(struct device *dev, struct device_attribute *attr,
425 const char *buf, size_t count)
426{
427 struct i2c_client *client = to_i2c_client(dev);
428 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 429 unsigned long val;
430 int err;
431
432 err = kstrtoul(buf, 10, &val);
433 if (err)
434 return err;
6800c3d0 435
47efe877 436 if (val > 1)
6800c3d0
RM		 437 return -EINVAL;
438
439 mutex_lock(&data->update_lock);
440 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
441 & 0xfd;
442 data->beep_enable |= val << 1;
443 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
444 mutex_unlock(&data->update_lock);
445
446 return count;
447}
448
a516dc3e
JD		 449/* Write 0 to clear chassis alarm */
450static ssize_t
451store_chassis_clear(struct device *dev,
452 struct device_attribute *attr, const char *buf,
453 size_t count)
454{
455 struct i2c_client *client = to_i2c_client(dev);
456 struct w83793_data *data = i2c_get_clientdata(client);
457 unsigned long val;
458 u8 reg;
47efe877 459 int err;
a516dc3e 460
47efe877
GR		 461 err = kstrtoul(buf, 10, &val);
462 if (err)
463 return err;
464 if (val)
a516dc3e
JD		 465 return -EINVAL;
466
467 mutex_lock(&data->update_lock);
468 reg = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
469 w83793_write_value(client, W83793_REG_CLR_CHASSIS, reg | 0x80);
470 data->valid = 0; /* Force cache refresh */
471 mutex_unlock(&data->update_lock);
472 return count;
473}
474
6800c3d0
RM		 475#define FAN_INPUT 0
476#define FAN_MIN 1
477static ssize_t
478show_fan(struct device *dev, struct device_attribute *attr, char *buf)
479{
480 struct sensor_device_attribute_2 *sensor_attr =
481 to_sensor_dev_attr_2(attr);
482 int nr = sensor_attr->nr;
483 int index = sensor_attr->index;
484 struct w83793_data *data = w83793_update_device(dev);
485 u16 val;
486
47efe877 487 if (nr == FAN_INPUT)
6800c3d0 488 val = data->fan[index] & 0x0fff;
47efe877 489 else
6800c3d0 490 val = data->fan_min[index] & 0x0fff;
6800c3d0
RM		 491
492 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
493}
494
495static ssize_t
496store_fan_min(struct device *dev, struct device_attribute *attr,
497 const char *buf, size_t count)
498{
499 struct sensor_device_attribute_2 *sensor_attr =
500 to_sensor_dev_attr_2(attr);
501 int index = sensor_attr->index;
502 struct i2c_client *client = to_i2c_client(dev);
503 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 504 unsigned long val;
505 int err;
506
507 err = kstrtoul(buf, 10, &val);
508 if (err)
509 return err;
510 val = FAN_TO_REG(val);
6800c3d0
RM		 511
512 mutex_lock(&data->update_lock);
513 data->fan_min[index] = val;
514 w83793_write_value(client, W83793_REG_FAN_MIN(index),
515 (val >> 8) & 0xff);
516 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
517 mutex_unlock(&data->update_lock);
518
519 return count;
520}
521
6800c3d0
RM		 522static ssize_t
523show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
524{
525 struct sensor_device_attribute_2 *sensor_attr =
526 to_sensor_dev_attr_2(attr);
527 struct w83793_data *data = w83793_update_device(dev);
528 u16 val;
529 int nr = sensor_attr->nr;
530 int index = sensor_attr->index;
531
47efe877 532 if (nr == PWM_STOP_TIME)
6800c3d0
RM		 533 val = TIME_FROM_REG(data->pwm_stop_time[index]);
534 else
535 val = (data->pwm[index][nr] & 0x3f) << 2;
536
537 return sprintf(buf, "%d\n", val);
538}
539
540static ssize_t
541store_pwm(struct device *dev, struct device_attribute *attr,
542 const char *buf, size_t count)
543{
544 struct i2c_client *client = to_i2c_client(dev);
545 struct w83793_data *data = i2c_get_clientdata(client);
546 struct sensor_device_attribute_2 *sensor_attr =
547 to_sensor_dev_attr_2(attr);
548 int nr = sensor_attr->nr;
549 int index = sensor_attr->index;
47efe877
GR		 550 unsigned long val;
551 int err;
552
553 err = kstrtoul(buf, 10, &val);
554 if (err)
555 return err;
6800c3d0
RM		 556
557 mutex_lock(&data->update_lock);
47efe877
GR		 558 if (nr == PWM_STOP_TIME) {
559 val = TIME_TO_REG(val);
6800c3d0
RM		 560 data->pwm_stop_time[index] = val;
561 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
562 val);
563 } else {
2a844c14 564 val = clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 565 data->pwm[index][nr] =
566 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
567 data->pwm[index][nr] |= val;
568 w83793_write_value(client, W83793_REG_PWM(index, nr),
569 data->pwm[index][nr]);
570 }
571
572 mutex_unlock(&data->update_lock);
573 return count;
574}
575
576static ssize_t
577show_temp(struct device *dev, struct device_attribute *attr, char *buf)
578{
579 struct sensor_device_attribute_2 *sensor_attr =
580 to_sensor_dev_attr_2(attr);
581 int nr = sensor_attr->nr;
582 int index = sensor_attr->index;
583 struct w83793_data *data = w83793_update_device(dev);
584 long temp = TEMP_FROM_REG(data->temp[index][nr]);
585
47efe877 586 if (nr == TEMP_READ && index < 4) { /* Only TD1-TD4 have low bits */
6800c3d0
RM		 587 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
588 temp += temp > 0 ? low : -low;
589 }
590 return sprintf(buf, "%ld\n", temp);
591}
592
593static ssize_t
594store_temp(struct device *dev, struct device_attribute *attr,
595 const char *buf, size_t count)
596{
597 struct sensor_device_attribute_2 *sensor_attr =
598 to_sensor_dev_attr_2(attr);
599 int nr = sensor_attr->nr;
600 int index = sensor_attr->index;
601 struct i2c_client *client = to_i2c_client(dev);
602 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 603 long tmp;
604 int err;
605
606 err = kstrtol(buf, 10, &tmp);
607 if (err)
608 return err;
6800c3d0
RM		 609
610 mutex_lock(&data->update_lock);
611 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
612 w83793_write_value(client, W83793_REG_TEMP[index][nr],
613 data->temp[index][nr]);
614 mutex_unlock(&data->update_lock);
615 return count;
616}
617
618/*
47efe877
GR		 619 * TD1-TD4
620 * each has 4 mode:(2 bits)
621 * 0: Stop monitor
622 * 1: Use internal temp sensor(default)
623 * 2: Reserved
624 * 3: Use sensor in Intel CPU and get result by PECI
625 *
626 * TR1-TR2
627 * each has 2 mode:(1 bit)
628 * 0: Disable temp sensor monitor
629 * 1: To enable temp sensors monitor
630 */
6800c3d0 631
ddca933b
GJ		 632/* 0 disable, 6 PECI */
633static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 634
635static ssize_t
636show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
637{
638 struct w83793_data *data = w83793_update_device(dev);
639 struct sensor_device_attribute_2 *sensor_attr =
640 to_sensor_dev_attr_2(attr);
641 int index = sensor_attr->index;
642 u8 mask = (index < 4) ? 0x03 : 0x01;
643 u8 shift = (index < 4) ? (2 * index) : (index - 4);
644 u8 tmp;
645 index = (index < 4) ? 0 : 1;
646
647 tmp = (data->temp_mode[index] >> shift) & mask;
648
649 /* for the internal sensor, found out if diode or thermistor */
47efe877 650 if (tmp == 1)
6800c3d0 651 tmp = index == 0 ? 3 : 4;
47efe877 652 else
6800c3d0 653 tmp = TO_TEMP_MODE[tmp];
6800c3d0
RM		 654
655 return sprintf(buf, "%d\n", tmp);
656}
657
658static ssize_t
659store_temp_mode(struct device *dev, struct device_attribute *attr,
660 const char *buf, size_t count)
661{
662 struct i2c_client *client = to_i2c_client(dev);
663 struct w83793_data *data = i2c_get_clientdata(client);
664 struct sensor_device_attribute_2 *sensor_attr =
665 to_sensor_dev_attr_2(attr);
666 int index = sensor_attr->index;
667 u8 mask = (index < 4) ? 0x03 : 0x01;
668 u8 shift = (index < 4) ? (2 * index) : (index - 4);
47efe877
GR		 669 unsigned long val;
670 int err;
671
672 err = kstrtoul(buf, 10, &val);
673 if (err)
674 return err;
6800c3d0
RM		 675
676 /* transform the sysfs interface values into table above */
ddca933b 677 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 678 val -= 3;
679 } else if ((val == 3 && index < 4)
46bed4df 680 || (val == 4 && index >= 4)) {
6800c3d0
RM		 681 /* transform diode or thermistor into internal enable */
682 val = !!val;
683 } else {
684 return -EINVAL;
685 }
686
687 index = (index < 4) ? 0 : 1;
688 mutex_lock(&data->update_lock);
689 data->temp_mode[index] =
690 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
691 data->temp_mode[index] &= ~(mask << shift);
692 data->temp_mode[index] |= val << shift;
693 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
694 data->temp_mode[index]);
695 mutex_unlock(&data->update_lock);
696
697 return count;
698}
699
700#define SETUP_PWM_DEFAULT 0
701#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
702#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
703#define SETUP_TEMP_CRITICAL 3
704static ssize_t
705show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
706{
707 struct sensor_device_attribute_2 *sensor_attr =
708 to_sensor_dev_attr_2(attr);
709 int nr = sensor_attr->nr;
710 struct w83793_data *data = w83793_update_device(dev);
711 u32 val = 0;
712
47efe877 713 if (nr == SETUP_PWM_DEFAULT)
6800c3d0 714 val = (data->pwm_default & 0x3f) << 2;
47efe877 715 else if (nr == SETUP_PWM_UPTIME)
6800c3d0 716 val = TIME_FROM_REG(data->pwm_uptime);
47efe877 717 else if (nr == SETUP_PWM_DOWNTIME)
6800c3d0 718 val = TIME_FROM_REG(data->pwm_downtime);
47efe877 719 else if (nr == SETUP_TEMP_CRITICAL)
6800c3d0 720 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
6800c3d0
RM		 721
722 return sprintf(buf, "%d\n", val);
723}
724
725static ssize_t
726store_sf_setup(struct device *dev, struct device_attribute *attr,
727 const char *buf, size_t count)
728{
729 struct sensor_device_attribute_2 *sensor_attr =
730 to_sensor_dev_attr_2(attr);
731 int nr = sensor_attr->nr;
732 struct i2c_client *client = to_i2c_client(dev);
733 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 734 long val;
735 int err;
736
737 err = kstrtol(buf, 10, &val);
738 if (err)
739 return err;
6800c3d0
RM		 740
741 mutex_lock(&data->update_lock);
47efe877 742 if (nr == SETUP_PWM_DEFAULT) {
6800c3d0
RM		 743 data->pwm_default =
744 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
2a844c14 745 data->pwm_default |= clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 746 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
747 data->pwm_default);
47efe877
GR		 748 } else if (nr == SETUP_PWM_UPTIME) {
749 data->pwm_uptime = TIME_TO_REG(val);
6800c3d0
RM		 750 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
751 w83793_write_value(client, W83793_REG_PWM_UPTIME,
752 data->pwm_uptime);
47efe877
GR		 753 } else if (nr == SETUP_PWM_DOWNTIME) {
754 data->pwm_downtime = TIME_TO_REG(val);
6800c3d0
RM		 755 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
756 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
757 data->pwm_downtime);
758 } else { /* SETUP_TEMP_CRITICAL */
759 data->temp_critical =
760 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
47efe877 761 data->temp_critical |= TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 762 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
763 data->temp_critical);
764 }
765
766 mutex_unlock(&data->update_lock);
767 return count;
768}
769
770/*
47efe877
GR		 771 * Temp SmartFan control
772 * TEMP_FAN_MAP
773 * Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
774 * It's possible two or more temp channels control the same fan, w83793
775 * always prefers to pick the most critical request and applies it to
776 * the related Fan.
777 * It's possible one fan is not in any mapping of 6 temp channels, this
778 * means the fan is manual mode
779 *
780 * TEMP_PWM_ENABLE
781 * Each temp channel has its own SmartFan mode, and temp channel
782 * control fans that are set by TEMP_FAN_MAP
783 * 0: SmartFanII mode
784 * 1: Thermal Cruise Mode
785 *
786 * TEMP_CRUISE
787 * Target temperature in thermal cruise mode, w83793 will try to turn
788 * fan speed to keep the temperature of target device around this
789 * temperature.
790 *
791 * TEMP_TOLERANCE
792 * If Temp higher or lower than target with this tolerance, w83793
793 * will take actions to speed up or slow down the fan to keep the
794 * temperature within the tolerance range.
795 */
6800c3d0
RM		 796
797#define TEMP_FAN_MAP 0
798#define TEMP_PWM_ENABLE 1
799#define TEMP_CRUISE 2
800#define TEMP_TOLERANCE 3
801static ssize_t
802show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
803{
804 struct sensor_device_attribute_2 *sensor_attr =
805 to_sensor_dev_attr_2(attr);
806 int nr = sensor_attr->nr;
807 int index = sensor_attr->index;
808 struct w83793_data *data = w83793_update_device(dev);
809 u32 val;
810
47efe877 811 if (nr == TEMP_FAN_MAP) {
6800c3d0 812 val = data->temp_fan_map[index];
47efe877 813 } else if (nr == TEMP_PWM_ENABLE) {
84fb029f 814 /* +2 to transform into 2 and 3 to conform with sysfs intf */
6800c3d0 815 val = ((data->pwm_enable >> index) & 0x01) + 2;
47efe877 816 } else if (nr == TEMP_CRUISE) {
6800c3d0
RM		 817 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
818 } else { /* TEMP_TOLERANCE */
819 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
820 val = TEMP_FROM_REG(val & 0x0f);
821 }
822 return sprintf(buf, "%d\n", val);
823}
824
825static ssize_t
826store_sf_ctrl(struct device *dev, struct device_attribute *attr,
827 const char *buf, size_t count)
828{
829 struct sensor_device_attribute_2 *sensor_attr =
830 to_sensor_dev_attr_2(attr);
831 int nr = sensor_attr->nr;
832 int index = sensor_attr->index;
833 struct i2c_client *client = to_i2c_client(dev);
834 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 835 long val;
836 int err;
837
838 err = kstrtol(buf, 10, &val);
839 if (err)
840 return err;
6800c3d0
RM		 841
842 mutex_lock(&data->update_lock);
47efe877 843 if (nr == TEMP_FAN_MAP) {
2a844c14 844 val = clamp_val(val, 0, 255);
6800c3d0
RM		 845 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
846 data->temp_fan_map[index] = val;
47efe877
GR		 847 } else if (nr == TEMP_PWM_ENABLE) {
848 if (val == 2 || val == 3) {
6800c3d0
RM		 849 data->pwm_enable =
850 w83793_read_value(client, W83793_REG_PWM_ENABLE);
851 if (val - 2)
852 data->pwm_enable |= 1 << index;
853 else
854 data->pwm_enable &= ~(1 << index);
855 w83793_write_value(client, W83793_REG_PWM_ENABLE,
856 data->pwm_enable);
857 } else {
858 mutex_unlock(&data->update_lock);
859 return -EINVAL;
860 }
47efe877 861 } else if (nr == TEMP_CRUISE) {
6800c3d0
RM		 862 data->temp_cruise[index] =
863 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
6800c3d0 864 data->temp_cruise[index] &= 0x80;
47efe877 865 data->temp_cruise[index] |= TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 866
867 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
868 data->temp_cruise[index]);
869 } else { /* TEMP_TOLERANCE */
870 int i = index >> 1;
871 u8 shift = (index & 0x01) ? 4 : 0;
872 data->tolerance[i] =
873 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
874
6800c3d0 875 data->tolerance[i] &= ~(0x0f << shift);
47efe877 876 data->tolerance[i] |= TEMP_TO_REG(val, 0, 0x0f) << shift;
6800c3d0
RM		 877 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
878 data->tolerance[i]);
879 }
880
881 mutex_unlock(&data->update_lock);
882 return count;
883}
884
885static ssize_t
886show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
887{
888 struct sensor_device_attribute_2 *sensor_attr =
889 to_sensor_dev_attr_2(attr);
890 int nr = sensor_attr->nr;
891 int index = sensor_attr->index;
892 struct w83793_data *data = w83793_update_device(dev);
893
894 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
895}
896
897static ssize_t
898store_sf2_pwm(struct device *dev, struct device_attribute *attr,
899 const char *buf, size_t count)
900{
901 struct i2c_client *client = to_i2c_client(dev);
902 struct w83793_data *data = i2c_get_clientdata(client);
903 struct sensor_device_attribute_2 *sensor_attr =
904 to_sensor_dev_attr_2(attr);
905 int nr = sensor_attr->nr;
906 int index = sensor_attr->index;
47efe877
GR		 907 unsigned long val;
908 int err;
909
910 err = kstrtoul(buf, 10, &val);
911 if (err)
912 return err;
2a844c14 913 val = clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 914
915 mutex_lock(&data->update_lock);
916 data->sf2_pwm[index][nr] =
917 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
918 data->sf2_pwm[index][nr] |= val;
919 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
920 data->sf2_pwm[index][nr]);
921 mutex_unlock(&data->update_lock);
922 return count;
923}
924
925static ssize_t
926show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
927{
928 struct sensor_device_attribute_2 *sensor_attr =
929 to_sensor_dev_attr_2(attr);
930 int nr = sensor_attr->nr;
931 int index = sensor_attr->index;
932 struct w83793_data *data = w83793_update_device(dev);
933
934 return sprintf(buf, "%ld\n",
935 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
936}
937
938static ssize_t
939store_sf2_temp(struct device *dev, struct device_attribute *attr,
940 const char *buf, size_t count)
941{
942 struct i2c_client *client = to_i2c_client(dev);
943 struct w83793_data *data = i2c_get_clientdata(client);
944 struct sensor_device_attribute_2 *sensor_attr =
945 to_sensor_dev_attr_2(attr);
946 int nr = sensor_attr->nr;
947 int index = sensor_attr->index;
47efe877
GR		 948 long val;
949 int err;
950
951 err = kstrtol(buf, 10, &val);
952 if (err)
953 return err;
954 val = TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 955
956 mutex_lock(&data->update_lock);
957 data->sf2_temp[index][nr] =
958 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
959 data->sf2_temp[index][nr] |= val;
960 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
961 data->sf2_temp[index][nr]);
962 mutex_unlock(&data->update_lock);
963 return count;
964}
965
966/* only Vcore A/B and Vtt have additional 2 bits precision */
967static ssize_t
968show_in(struct device *dev, struct device_attribute *attr, char *buf)
969{
970 struct sensor_device_attribute_2 *sensor_attr =
971 to_sensor_dev_attr_2(attr);
972 int nr = sensor_attr->nr;
973 int index = sensor_attr->index;
974 struct w83793_data *data = w83793_update_device(dev);
975 u16 val = data->in[index][nr];
976
977 if (index < 3) {
978 val <<= 2;
979 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
980 }
ddca933b
GJ		 981 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
982 val = val * scale_in[index] + scale_in_add[index];
983 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 984}
985
986static ssize_t
987store_in(struct device *dev, struct device_attribute *attr,
988 const char *buf, size_t count)
989{
990 struct sensor_device_attribute_2 *sensor_attr =
991 to_sensor_dev_attr_2(attr);
992 int nr = sensor_attr->nr;
993 int index = sensor_attr->index;
994 struct i2c_client *client = to_i2c_client(dev);
995 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 996 unsigned long val;
997 int err;
998
999 err = kstrtoul(buf, 10, &val);
1000 if (err)
1001 return err;
1002 val = (val + scale_in[index] / 2) / scale_in[index];
6800c3d0 1003
6800c3d0
RM		 1004 mutex_lock(&data->update_lock);
1005 if (index > 2) {
ddca933b 1006 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
47efe877 1007 if (nr == 1 || nr == 2)
ddca933b 1008 val -= scale_in_add[index] / scale_in[index];
2a844c14 1009 val = clamp_val(val, 0, 255);
6800c3d0 1010 } else {
2a844c14 1011 val = clamp_val(val, 0, 0x3FF);
6800c3d0
RM		 1012 data->in_low_bits[nr] =
1013 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
1014 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
1015 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
1016 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
1017 data->in_low_bits[nr]);
1018 val >>= 2;
1019 }
1020 data->in[index][nr] = val;
1021 w83793_write_value(client, W83793_REG_IN[index][nr],
1022 data->in[index][nr]);
1023 mutex_unlock(&data->update_lock);
1024 return count;
1025}
1026
1027#define NOT_USED -1
1028
1029#define SENSOR_ATTR_IN(index) \
1030 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1031 IN_READ, index), \
1032 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1033 store_in, IN_MAX, index), \
1034 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1035 store_in, IN_LOW, index), \
1036 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1037 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
1038 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1039 show_alarm_beep, store_beep, BEEP_ENABLE, \
1040 index + ((index > 2) ? 1 : 0))
1041
1042#define SENSOR_ATTR_FAN(index) \
1043 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1044 NULL, ALARM_STATUS, index + 17), \
1045 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1046 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
1047 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1048 NULL, FAN_INPUT, index - 1), \
1049 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1050 show_fan, store_fan_min, FAN_MIN, index - 1)
1051
1052#define SENSOR_ATTR_PWM(index) \
1053 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1054 store_pwm, PWM_DUTY, index - 1), \
1055 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1056 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1057 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1058 show_pwm, store_pwm, PWM_START, index - 1), \
1059 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1060 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
1061
1062#define SENSOR_ATTR_TEMP(index) \
1063 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1064 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1065 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1066 NULL, TEMP_READ, index - 1), \
1067 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1068 store_temp, TEMP_CRIT, index - 1), \
1069 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1070 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1071 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1072 store_temp, TEMP_WARN, index - 1), \
1073 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1074 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1075 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1076 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
1077 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1078 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
1079 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
1080 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
1081 TEMP_FAN_MAP, index - 1), \
1082 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1083 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
1084 index - 1), \
1085 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
1086 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
1087 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
1088 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
1089 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1090 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
1091 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1092 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
1093 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1094 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
1095 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1096 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
1097 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1098 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
1099 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1100 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
1101 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1102 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
1103 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1104 show_sf2_temp, store_sf2_temp, 0, index - 1), \
1105 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1106 show_sf2_temp, store_sf2_temp, 1, index - 1), \
1107 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1108 show_sf2_temp, store_sf2_temp, 2, index - 1), \
1109 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1110 show_sf2_temp, store_sf2_temp, 3, index - 1), \
1111 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1112 show_sf2_temp, store_sf2_temp, 4, index - 1), \
1113 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1114 show_sf2_temp, store_sf2_temp, 5, index - 1), \
1115 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1116 show_sf2_temp, store_sf2_temp, 6, index - 1)
1117
1118static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
1119 SENSOR_ATTR_IN(0),
1120 SENSOR_ATTR_IN(1),
1121 SENSOR_ATTR_IN(2),
1122 SENSOR_ATTR_IN(3),
1123 SENSOR_ATTR_IN(4),
1124 SENSOR_ATTR_IN(5),
1125 SENSOR_ATTR_IN(6),
1126 SENSOR_ATTR_IN(7),
1127 SENSOR_ATTR_IN(8),
1128 SENSOR_ATTR_IN(9),
6800c3d0
RM		 1129 SENSOR_ATTR_FAN(1),
1130 SENSOR_ATTR_FAN(2),
1131 SENSOR_ATTR_FAN(3),
1132 SENSOR_ATTR_FAN(4),
1133 SENSOR_ATTR_FAN(5),
1134 SENSOR_ATTR_PWM(1),
1135 SENSOR_ATTR_PWM(2),
1136 SENSOR_ATTR_PWM(3),
1137};
1138
46bed4df
GJ		 1139static struct sensor_device_attribute_2 w83793_temp[] = {
1140 SENSOR_ATTR_TEMP(1),
1141 SENSOR_ATTR_TEMP(2),
1142 SENSOR_ATTR_TEMP(3),
1143 SENSOR_ATTR_TEMP(4),
1144 SENSOR_ATTR_TEMP(5),
1145 SENSOR_ATTR_TEMP(6),
1146};
1147
6800c3d0
RM		 1148/* Fan6-Fan12 */
1149static struct sensor_device_attribute_2 w83793_left_fan[] = {
1150 SENSOR_ATTR_FAN(6),
1151 SENSOR_ATTR_FAN(7),
1152 SENSOR_ATTR_FAN(8),
1153 SENSOR_ATTR_FAN(9),
1154 SENSOR_ATTR_FAN(10),
1155 SENSOR_ATTR_FAN(11),
1156 SENSOR_ATTR_FAN(12),
1157};
1158
1159/* Pwm4-Pwm8 */
1160static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1161 SENSOR_ATTR_PWM(4),
1162 SENSOR_ATTR_PWM(5),
1163 SENSOR_ATTR_PWM(6),
1164 SENSOR_ATTR_PWM(7),
1165 SENSOR_ATTR_PWM(8),
1166};
1167
c70a8c34 1168static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1169 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1170 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1171};
93c75a4a 1172static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm);
c70a8c34
GJ		 1173
1174static struct sensor_device_attribute_2 sda_single_files[] = {
a516dc3e 1175 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
6800c3d0
RM		 1176 store_chassis_clear, ALARM_STATUS, 30),
1177 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1178 store_beep_enable, NOT_USED, NOT_USED),
1179 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1180 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1181 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1182 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1183 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1184 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1185 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1186 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1187};
1188
1189static void w83793_init_client(struct i2c_client *client)
1190{
47efe877 1191 if (reset)
6800c3d0 1192 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
6800c3d0
RM		 1193
1194 /* Start monitoring */
1195 w83793_write_value(client, W83793_REG_CONFIG,
1196 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
5852f960
SA		 1197}
1198
1199/*
1200 * Watchdog routines
1201 */
1202
1203static int watchdog_set_timeout(struct w83793_data *data, int timeout)
1204{
26336c8a
DC		 1205 unsigned int mtimeout;
1206 int ret;
5852f960
SA		 1207
1208 mtimeout = DIV_ROUND_UP(timeout, 60);
1209
1210 if (mtimeout > 255)
1211 return -EINVAL;
1212
1213 mutex_lock(&data->watchdog_lock);
1214 if (!data->client) {
1215 ret = -ENODEV;
1216 goto leave;
1217 }
1218
1219 data->watchdog_timeout = mtimeout;
1220
1221 /* Set Timeout value (in Minutes) */
1222 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1223 data->watchdog_timeout);
1224
1225 ret = mtimeout * 60;
1226
1227leave:
1228 mutex_unlock(&data->watchdog_lock);
1229 return ret;
1230}
1231
1232static int watchdog_get_timeout(struct w83793_data *data)
1233{
1234 int timeout;
1235
1236 mutex_lock(&data->watchdog_lock);
1237 timeout = data->watchdog_timeout * 60;
1238 mutex_unlock(&data->watchdog_lock);
1239
1240 return timeout;
1241}
1242
1243static int watchdog_trigger(struct w83793_data *data)
1244{
1245 int ret = 0;
1246
1247 mutex_lock(&data->watchdog_lock);
1248 if (!data->client) {
1249 ret = -ENODEV;
1250 goto leave;
1251 }
1252
1253 /* Set Timeout value (in Minutes) */
1254 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1255 data->watchdog_timeout);
1256
1257leave:
1258 mutex_unlock(&data->watchdog_lock);
1259 return ret;
1260}
1261
1262static int watchdog_enable(struct w83793_data *data)
1263{
1264 int ret = 0;
1265
1266 mutex_lock(&data->watchdog_lock);
1267 if (!data->client) {
1268 ret = -ENODEV;
1269 goto leave;
1270 }
1271
1272 /* Set initial timeout */
1273 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1274 data->watchdog_timeout);
1275
1276 /* Enable Soft Watchdog */
1277 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
1278
1279leave:
1280 mutex_unlock(&data->watchdog_lock);
1281 return ret;
1282}
1283
1284static int watchdog_disable(struct w83793_data *data)
1285{
1286 int ret = 0;
1287
1288 mutex_lock(&data->watchdog_lock);
1289 if (!data->client) {
1290 ret = -ENODEV;
1291 goto leave;
1292 }
1293
1294 /* Disable Soft Watchdog */
1295 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
1296
1297leave:
1298 mutex_unlock(&data->watchdog_lock);
1299 return ret;
1300}
1301
1302static int watchdog_open(struct inode *inode, struct file *filp)
1303{
1304 struct w83793_data *pos, *data = NULL;
1305 int watchdog_is_open;
1306
47efe877
GR		 1307 /*
1308 * We get called from drivers/char/misc.c with misc_mtx hold, and we
1309 * call misc_register() from w83793_probe() with watchdog_data_mutex
1310 * hold, as misc_register() takes the misc_mtx lock, this is a possible
1311 * deadlock, so we use mutex_trylock here.
1312 */
5852f960
SA		 1313 if (!mutex_trylock(&watchdog_data_mutex))
1314 return -ERESTARTSYS;
1315 list_for_each_entry(pos, &watchdog_data_list, list) {
1316 if (pos->watchdog_miscdev.minor == iminor(inode)) {
1317 data = pos;
1318 break;
1319 }
1320 }
1321
1322 /* Check, if device is already open */
1323 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
1324
47efe877
GR		 1325 /*
1326 * Increase data reference counter (if not already done).
1327 * Note we can never not have found data, so we don't check for this
1328 */
5852f960
SA		 1329 if (!watchdog_is_open)
1330 kref_get(&data->kref);
1331
1332 mutex_unlock(&watchdog_data_mutex);
1333
1334 /* Check, if device is already open and possibly issue error */
1335 if (watchdog_is_open)
1336 return -EBUSY;
1337
1338 /* Enable Soft Watchdog */
1339 watchdog_enable(data);
1340
1341 /* Store pointer to data into filp's private data */
1342 filp->private_data = data;
1343
1344 return nonseekable_open(inode, filp);
1345}
1346
1347static int watchdog_close(struct inode *inode, struct file *filp)
1348{
1349 struct w83793_data *data = filp->private_data;
6800c3d0 1350
5852f960
SA		 1351 if (data->watchdog_expect_close) {
1352 watchdog_disable(data);
1353 data->watchdog_expect_close = 0;
1354 } else {
1355 watchdog_trigger(data);
1356 dev_crit(&data->client->dev,
1357 "unexpected close, not stopping watchdog!\n");
1358 }
1359
1360 clear_bit(0, &data->watchdog_is_open);
1361
1362 /* Decrease data reference counter */
1363 mutex_lock(&watchdog_data_mutex);
1364 kref_put(&data->kref, w83793_release_resources);
1365 mutex_unlock(&watchdog_data_mutex);
1366
1367 return 0;
1368}
1369
1370static ssize_t watchdog_write(struct file *filp, const char __user *buf,
1371 size_t count, loff_t *offset)
1372{
3f7cd7ea 1373 ssize_t ret;
5852f960
SA		 1374 struct w83793_data *data = filp->private_data;
1375
1376 if (count) {
1377 if (!nowayout) {
1378 size_t i;
1379
1380 /* Clear it in case it was set with a previous write */
1381 data->watchdog_expect_close = 0;
1382
1383 for (i = 0; i != count; i++) {
1384 char c;
1385 if (get_user(c, buf + i))
1386 return -EFAULT;
1387 if (c == 'V')
1388 data->watchdog_expect_close = 1;
1389 }
1390 }
1391 ret = watchdog_trigger(data);
1392 if (ret < 0)
1393 return ret;
1394 }
1395 return count;
1396}
1397
55929332
AB		 1398static long watchdog_ioctl(struct file *filp, unsigned int cmd,
1399 unsigned long arg)
5852f960 1400{
36c7fe13 1401 struct watchdog_info ident = {
5852f960
SA		 1402 .options = WDIOF_KEEPALIVEPING |
1403 WDIOF_SETTIMEOUT |
1404 WDIOF_CARDRESET,
1405 .identity = "w83793 watchdog"
1406 };
1407
1408 int val, ret = 0;
1409 struct w83793_data *data = filp->private_data;
1410
1411 switch (cmd) {
1412 case WDIOC_GETSUPPORT:
1413 if (!nowayout)
1414 ident.options |= WDIOF_MAGICCLOSE;
1415 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
1416 ret = -EFAULT;
1417 break;
1418
1419 case WDIOC_GETSTATUS:
1420 val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
1421 ret = put_user(val, (int __user *)arg);
1422 break;
1423
1424 case WDIOC_GETBOOTSTATUS:
1425 ret = put_user(0, (int __user *)arg);
1426 break;
1427
1428 case WDIOC_KEEPALIVE:
1429 ret = watchdog_trigger(data);
1430 break;
1431
1432 case WDIOC_GETTIMEOUT:
1433 val = watchdog_get_timeout(data);
1434 ret = put_user(val, (int __user *)arg);
1435 break;
1436
1437 case WDIOC_SETTIMEOUT:
1438 if (get_user(val, (int __user *)arg)) {
1439 ret = -EFAULT;
1440 break;
1441 }
1442 ret = watchdog_set_timeout(data, val);
1443 if (ret > 0)
1444 ret = put_user(ret, (int __user *)arg);
1445 break;
1446
1447 case WDIOC_SETOPTIONS:
1448 if (get_user(val, (int __user *)arg)) {
1449 ret = -EFAULT;
1450 break;
1451 }
1452
1453 if (val & WDIOS_DISABLECARD)
1454 ret = watchdog_disable(data);
1455 else if (val & WDIOS_ENABLECARD)
1456 ret = watchdog_enable(data);
1457 else
1458 ret = -EINVAL;
1459
1460 break;
1461 default:
1462 ret = -ENOTTY;
1463 }
5852f960
SA		 1464 return ret;
1465}
1466
1467static const struct file_operations watchdog_fops = {
1468 .owner = THIS_MODULE,
1469 .llseek = no_llseek,
1470 .open = watchdog_open,
1471 .release = watchdog_close,
1472 .write = watchdog_write,
55929332 1473 .unlocked_ioctl = watchdog_ioctl,
5852f960
SA		 1474};
1475
1476/*
1477 * Notifier for system down
1478 */
1479
1480static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
1481 void *unused)
1482{
1483 struct w83793_data *data = NULL;
1484
1485 if (code == SYS_DOWN || code == SYS_HALT) {
1486
1487 /* Disable each registered watchdog */
1488 mutex_lock(&watchdog_data_mutex);
1489 list_for_each_entry(data, &watchdog_data_list, list) {
1490 if (data->watchdog_miscdev.minor)
1491 watchdog_disable(data);
1492 }
1493 mutex_unlock(&watchdog_data_mutex);
1494 }
1495
1496 return NOTIFY_DONE;
6800c3d0
RM		 1497}
1498
5852f960
SA		 1499/*
1500 * The WDT needs to learn about soft shutdowns in order to
1501 * turn the timebomb registers off.
1502 */
1503
1504static struct notifier_block watchdog_notifier = {
1505 .notifier_call = watchdog_notify_sys,
1506};
1507
1508/*
1509 * Init / remove routines
1510 */
1511
a7f13a6e 1512static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1513{
1514 struct w83793_data *data = i2c_get_clientdata(client);
1515 struct device *dev = &client->dev;
5852f960
SA		 1516 int i, tmp;
1517
1518 /* Unregister the watchdog (if registered) */
1519 if (data->watchdog_miscdev.minor) {
1520 misc_deregister(&data->watchdog_miscdev);
1521
1522 if (data->watchdog_is_open) {
1523 dev_warn(&client->dev,
1524 "i2c client detached with watchdog open! "
1525 "Stopping watchdog.\n");
1526 watchdog_disable(data);
1527 }
1528
1529 mutex_lock(&watchdog_data_mutex);
1530 list_del(&data->list);
1531 mutex_unlock(&watchdog_data_mutex);
1532
1533 /* Tell the watchdog code the client is gone */
1534 mutex_lock(&data->watchdog_lock);
1535 data->client = NULL;
1536 mutex_unlock(&data->watchdog_lock);
1537 }
1538
1539 /* Reset Configuration Register to Disable Watch Dog Registers */
1540 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1541 w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
1542
1543 unregister_reboot_notifier(&watchdog_notifier);
6800c3d0 1544
a7f13a6e 1545 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1546
a7f13a6e
JD		 1547 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1548 device_remove_file(dev,
1549 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1550
a7f13a6e
JD		 1551 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1552 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1553
a7f13a6e
JD		 1554 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1555 device_remove_file(dev, &w83793_vid[i].dev_attr);
1556 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1557
a7f13a6e
JD		 1558 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1559 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1560
a7f13a6e
JD		 1561 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1562 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1563
a7f13a6e
JD		 1564 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1565 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1566
a7f13a6e
JD		 1567 if (data->lm75[0] != NULL)
1568 i2c_unregister_device(data->lm75[0]);
1569 if (data->lm75[1] != NULL)
1570 i2c_unregister_device(data->lm75[1]);
6800c3d0 1571
5852f960
SA		 1572 /* Decrease data reference counter */
1573 mutex_lock(&watchdog_data_mutex);
1574 kref_put(&data->kref, w83793_release_resources);
1575 mutex_unlock(&watchdog_data_mutex);
6800c3d0
RM		 1576
1577 return 0;
1578}
1579
1580static int
a7f13a6e 1581w83793_detect_subclients(struct i2c_client *client)
6800c3d0
RM		 1582{
1583 int i, id, err;
a7f13a6e 1584 int address = client->addr;
6800c3d0 1585 u8 tmp;
a7f13a6e 1586 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1587 struct w83793_data *data = i2c_get_clientdata(client);
1588
1589 id = i2c_adapter_id(adapter);
1590 if (force_subclients[0] == id && force_subclients[1] == address) {
1591 for (i = 2; i <= 3; i++) {
1592 if (force_subclients[i] < 0x48
1593 || force_subclients[i] > 0x4f) {
1594 dev_err(&client->dev,
1595 "invalid subclient "
1596 "address %d; must be 0x48-0x4f\n",
1597 force_subclients[i]);
1598 err = -EINVAL;
1599 goto ERROR_SC_0;
1600 }
1601 }
1602 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1603 (force_subclients[2] & 0x07) |
1604 ((force_subclients[3] & 0x07) << 4));
1605 }
1606
1607 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
47efe877 1608 if (!(tmp & 0x08))
a7f13a6e 1609 data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
6800c3d0
RM		 1610 if (!(tmp & 0x80)) {
1611 if ((data->lm75[0] != NULL)
1612 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1613 dev_err(&client->dev,
1614 "duplicate addresses 0x%x, "
1615 "use force_subclients\n", data->lm75[0]->addr);
1616 err = -ENODEV;
1617 goto ERROR_SC_1;
1618 }
a7f13a6e
JD		 1619 data->lm75[1] = i2c_new_dummy(adapter,
1620 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1621 }
1622
1623 return 0;
1624
1625 /* Undo inits in case of errors */
1626
1627ERROR_SC_1:
a7f13a6e
JD		 1628 if (data->lm75[0] != NULL)
1629 i2c_unregister_device(data->lm75[0]);
6800c3d0
RM		 1630ERROR_SC_0:
1631 return err;
1632}
1633
a7f13a6e 1634/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1635static int w83793_detect(struct i2c_client *client,
a7f13a6e 1636 struct i2c_board_info *info)
6800c3d0 1637{
52df6440 1638 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1639 struct i2c_adapter *adapter = client->adapter;
1640 unsigned short address = client->addr;
6800c3d0 1641
47efe877 1642 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
a7f13a6e 1643 return -ENODEV;
6800c3d0 1644
a7f13a6e 1645 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1646
52df6440
JD		 1647 tmp = bank & 0x80 ? 0x5c : 0xa3;
1648 /* Check Winbond vendor ID */
1649 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1650 pr_debug("w83793: Detection failed at check vendor id\n");
1651 return -ENODEV;
6800c3d0
RM		 1652 }
1653
47efe877
GR		 1654 /*
1655 * If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1656 * should match
1657 */
52df6440
JD		 1658 if ((bank & 0x07) == 0
1659 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1660 (address << 1)) {
1661 pr_debug("w83793: Detection failed at check i2c addr\n");
1662 return -ENODEV;
6800c3d0
RM		 1663 }
1664
52df6440
JD		 1665 /* Determine the chip type now */
1666 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1667 if (chip_id != 0x7b)
1668 return -ENODEV;
1669
a7f13a6e
JD		 1670 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1671
1672 return 0;
1673}
6800c3d0 1674
a7f13a6e
JD		 1675static int w83793_probe(struct i2c_client *client,
1676 const struct i2c_device_id *id)
1677{
1678 struct device *dev = &client->dev;
5852f960 1679 const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };
a7f13a6e
JD		 1680 struct w83793_data *data;
1681 int i, tmp, val, err;
1682 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1683 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1684 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1685
1686 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1687 if (!data) {
1688 err = -ENOMEM;
1689 goto exit;
1690 }
1691
1692 i2c_set_clientdata(client, data);
1693 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1694 mutex_init(&data->update_lock);
5852f960
SA		 1695 mutex_init(&data->watchdog_lock);
1696 INIT_LIST_HEAD(&data->list);
1697 kref_init(&data->kref);
1698
47efe877
GR		 1699 /*
1700 * Store client pointer in our data struct for watchdog usage
1701 * (where the client is found through a data ptr instead of the
1702 * otherway around)
1703 */
5852f960 1704 data->client = client;
6800c3d0 1705
a7f13a6e
JD		 1706 err = w83793_detect_subclients(client);
1707 if (err)
6800c3d0
RM		 1708 goto free_mem;
1709
6800c3d0
RM		 1710 /* Initialize the chip */
1711 w83793_init_client(client);
1712
6800c3d0 1713 /*
47efe877
GR		 1714 * Only fan 1-5 has their own input pins,
1715 * Pwm 1-3 has their own pins
6800c3d0
RM		 1716 */
1717 data->has_fan = 0x1f;
1718 data->has_pwm = 0x07;
1719 tmp = w83793_read_value(client, W83793_REG_MFC);
1720 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1721
1722 /* check the function of pins 49-56 */
93c75a4a
JD		 1723 if (tmp & 0x80) {
1724 data->has_vid |= 0x2; /* has VIDB */
1725 } else {
6800c3d0
RM		 1726 data->has_pwm |= 0x18; /* pwm 4,5 */
1727 if (val & 0x01) { /* fan 6 */
1728 data->has_fan |= 0x20;
1729 data->has_pwm |= 0x20;
1730 }
1731 if (val & 0x02) { /* fan 7 */
1732 data->has_fan |= 0x40;
1733 data->has_pwm |= 0x40;
1734 }
1735 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1736 data->has_fan |= 0x80;
1737 data->has_pwm |= 0x80;
1738 }
1739 }
1740
93c75a4a
JD		 1741 /* check the function of pins 37-40 */
1742 if (!(tmp & 0x29))
1743 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1744 if (0x08 == (tmp & 0x0c)) {
1745 if (val & 0x08) /* fan 9 */
1746 data->has_fan |= 0x100;
1747 if (val & 0x10) /* fan 10 */
1748 data->has_fan |= 0x200;
1749 }
6800c3d0
RM		 1750 if (0x20 == (tmp & 0x30)) {
1751 if (val & 0x20) /* fan 11 */
1752 data->has_fan |= 0x400;
1753 if (val & 0x40) /* fan 12 */
1754 data->has_fan |= 0x800;
1755 }
1756
1757 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1758 data->has_fan |= 0x80;
1759 data->has_pwm |= 0x80;
1760 }
1761
c9294315
RM		 1762 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1763 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1764 data->has_fan |= 0x100;
1765 }
1766 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1767 data->has_fan |= 0x200;
1768 }
1769 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1770 data->has_fan |= 0x400;
1771 }
1772 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1773 data->has_fan |= 0x800;
1774 }
1775
46bed4df 1776 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
47efe877 1777 tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[0]);
46bed4df
GJ		 1778 if (tmp & 0x01)
1779 data->has_temp |= 0x01;
1780 if (tmp & 0x04)
1781 data->has_temp |= 0x02;
1782 if (tmp & 0x10)
1783 data->has_temp |= 0x04;
1784 if (tmp & 0x40)
1785 data->has_temp |= 0x08;
1786
47efe877 1787 tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[1]);
46bed4df
GJ		 1788 if (tmp & 0x01)
1789 data->has_temp |= 0x10;
1790 if (tmp & 0x02)
1791 data->has_temp |= 0x20;
1792
6800c3d0
RM		 1793 /* Register sysfs hooks */
1794 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1795 err = device_create_file(dev,
1796 &w83793_sensor_attr_2[i].dev_attr);
1797 if (err)
1798 goto exit_remove;
1799 }
1800
c70a8c34
GJ		 1801 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1802 if (!(data->has_vid & (1 << i)))
1803 continue;
1804 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1805 if (err)
1806 goto exit_remove;
1807 }
93c75a4a
JD		 1808 if (data->has_vid) {
1809 data->vrm = vid_which_vrm();
1810 err = device_create_file(dev, &dev_attr_vrm);
1811 if (err)
1812 goto exit_remove;
1813 }
c70a8c34 1814
6800c3d0
RM		 1815 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1816 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1817 if (err)
1818 goto exit_remove;
1819
1820 }
1821
46bed4df
GJ		 1822 for (i = 0; i < 6; i++) {
1823 int j;
1824 if (!(data->has_temp & (1 << i)))
1825 continue;
1826 for (j = 0; j < files_temp; j++) {
1827 err = device_create_file(dev,
1828 &w83793_temp[(i) * files_temp
1829 + j].dev_attr);
1830 if (err)
1831 goto exit_remove;
1832 }
1833 }
1834
6800c3d0
RM		 1835 for (i = 5; i < 12; i++) {
1836 int j;
1837 if (!(data->has_fan & (1 << i)))
1838 continue;
1839 for (j = 0; j < files_fan; j++) {
1840 err = device_create_file(dev,
1841 &w83793_left_fan[(i - 5) * files_fan
1842 + j].dev_attr);
1843 if (err)
1844 goto exit_remove;
1845 }
1846 }
1847
1848 for (i = 3; i < 8; i++) {
1849 int j;
1850 if (!(data->has_pwm & (1 << i)))
1851 continue;
1852 for (j = 0; j < files_pwm; j++) {
1853 err = device_create_file(dev,
1854 &w83793_left_pwm[(i - 3) * files_pwm
1855 + j].dev_attr);
1856 if (err)
1857 goto exit_remove;
1858 }
1859 }
1860
1beeffe4
TJ		 1861 data->hwmon_dev = hwmon_device_register(dev);
1862 if (IS_ERR(data->hwmon_dev)) {
1863 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1864 goto exit_remove;
1865 }
1866
5852f960
SA		 1867 /* Watchdog initialization */
1868
1869 /* Register boot notifier */
1870 err = register_reboot_notifier(&watchdog_notifier);
1871 if (err != 0) {
1872 dev_err(&client->dev,
1873 "cannot register reboot notifier (err=%d)\n", err);
1874 goto exit_devunreg;
1875 }
1876
47efe877
GR		 1877 /*
1878 * Enable Watchdog registers.
1879 * Set Configuration Register to Enable Watch Dog Registers
1880 * (Bit 2) = XXXX, X1XX.
1881 */
5852f960
SA		 1882 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1883 w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
1884
1885 /* Set the default watchdog timeout */
1886 data->watchdog_timeout = timeout;
1887
1888 /* Check, if last reboot was caused by watchdog */
1889 data->watchdog_caused_reboot =
1890 w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
1891
1892 /* Disable Soft Watchdog during initialiation */
1893 watchdog_disable(data);
1894
47efe877
GR		 1895 /*
1896 * We take the data_mutex lock early so that watchdog_open() cannot
1897 * run when misc_register() has completed, but we've not yet added
1898 * our data to the watchdog_data_list (and set the default timeout)
1899 */
5852f960
SA		 1900 mutex_lock(&watchdog_data_mutex);
1901 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1902 /* Register our watchdog part */
1903 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1904 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1905 data->watchdog_miscdev.name = data->watchdog_name;
1906 data->watchdog_miscdev.fops = &watchdog_fops;
1907 data->watchdog_miscdev.minor = watchdog_minors[i];
1908
1909 err = misc_register(&data->watchdog_miscdev);
1910 if (err == -EBUSY)
1911 continue;
1912 if (err) {
1913 data->watchdog_miscdev.minor = 0;
1914 dev_err(&client->dev,
1915 "Registering watchdog chardev: %d\n", err);
1916 break;
1917 }
1918
1919 list_add(&data->list, &watchdog_data_list);
1920
1921 dev_info(&client->dev,
1922 "Registered watchdog chardev major 10, minor: %d\n",
1923 watchdog_minors[i]);
1924 break;
1925 }
1926 if (i == ARRAY_SIZE(watchdog_minors)) {
1927 data->watchdog_miscdev.minor = 0;
b55f3757
GR		 1928 dev_warn(&client->dev,
1929 "Couldn't register watchdog chardev (due to no free minor)\n");
5852f960
SA		 1930 }
1931
1932 mutex_unlock(&watchdog_data_mutex);
1933
6800c3d0
RM		 1934 return 0;
1935
5852f960
SA		 1936 /* Unregister hwmon device */
1937
1938exit_devunreg:
1939
1940 hwmon_device_unregister(data->hwmon_dev);
1941
6800c3d0
RM		 1942 /* Unregister sysfs hooks */
1943
1944exit_remove:
1945 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1946 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1947
1948 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1949 device_remove_file(dev, &sda_single_files[i].dev_attr);
1950
c70a8c34
GJ		 1951 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1952 device_remove_file(dev, &w83793_vid[i].dev_attr);
1953
6800c3d0
RM		 1954 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1955 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1956
1957 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1958 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1959
46bed4df
GJ		 1960 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1961 device_remove_file(dev, &w83793_temp[i].dev_attr);
1962
a7f13a6e
JD		 1963 if (data->lm75[0] != NULL)
1964 i2c_unregister_device(data->lm75[0]);
1965 if (data->lm75[1] != NULL)
1966 i2c_unregister_device(data->lm75[1]);
6800c3d0
RM		 1967free_mem:
1968 kfree(data);
1969exit:
1970 return err;
1971}
1972
1973static void w83793_update_nonvolatile(struct device *dev)
1974{
1975 struct i2c_client *client = to_i2c_client(dev);
1976 struct w83793_data *data = i2c_get_clientdata(client);
1977 int i, j;
1978 /*
47efe877
GR		 1979 * They are somewhat "stable" registers, and to update them every time
1980 * takes so much time, it's just not worthy. Update them in a long
1981 * interval to avoid exception.
6800c3d0
RM		 1982 */
1983 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
1984 || !data->valid))
1985 return;
1986 /* update voltage limits */
1987 for (i = 1; i < 3; i++) {
1988 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
1989 data->in[j][i] =
1990 w83793_read_value(client, W83793_REG_IN[j][i]);
1991 }
1992 data->in_low_bits[i] =
1993 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
1994 }
1995
1996 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1997 /* Update the Fan measured value and limits */
47efe877 1998 if (!(data->has_fan & (1 << i)))
6800c3d0 1999 continue;
6800c3d0
RM		 2000 data->fan_min[i] =
2001 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
2002 data->fan_min[i] |=
2003 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
2004 }
2005
2006 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 2007 if (!(data->has_temp & (1 << i)))
2008 continue;
6800c3d0
RM		 2009 data->temp_fan_map[i] =
2010 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
2011 for (j = 1; j < 5; j++) {
2012 data->temp[i][j] =
2013 w83793_read_value(client, W83793_REG_TEMP[i][j]);
2014 }
2015 data->temp_cruise[i] =
2016 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
2017 for (j = 0; j < 7; j++) {
2018 data->sf2_pwm[i][j] =
2019 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
2020 data->sf2_temp[i][j] =
2021 w83793_read_value(client,
2022 W83793_REG_SF2_TEMP(i, j));
2023 }
2024 }
2025
2026 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
2027 data->temp_mode[i] =
2028 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
2029
2030 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
2031 data->tolerance[i] =
2032 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
2033 }
2034
2035 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2036 if (!(data->has_pwm & (1 << i)))
2037 continue;
2038 data->pwm[i][PWM_NONSTOP] =
2039 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
2040 data->pwm[i][PWM_START] =
2041 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
2042 data->pwm_stop_time[i] =
2043 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
2044 }
2045
2046 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
2047 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
2048 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
2049 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
2050 data->temp_critical =
2051 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
2052 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
2053
47efe877 2054 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
6800c3d0 2055 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
6800c3d0
RM		 2056
2057 data->last_nonvolatile = jiffies;
2058}
2059
2060static struct w83793_data *w83793_update_device(struct device *dev)
2061{
2062 struct i2c_client *client = to_i2c_client(dev);
2063 struct w83793_data *data = i2c_get_clientdata(client);
2064 int i;
2065
2066 mutex_lock(&data->update_lock);
2067
2068 if (!(time_after(jiffies, data->last_updated + HZ * 2)
2069 || !data->valid))
2070 goto END;
2071
2072 /* Update the voltages measured value and limits */
2073 for (i = 0; i < ARRAY_SIZE(data->in); i++)
2074 data->in[i][IN_READ] =
2075 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
2076
2077 data->in_low_bits[IN_READ] =
2078 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
2079
2080 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
47efe877 2081 if (!(data->has_fan & (1 << i)))
6800c3d0 2082 continue;
6800c3d0
RM		 2083 data->fan[i] =
2084 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
2085 data->fan[i] |=
2086 w83793_read_value(client, W83793_REG_FAN(i) + 1);
2087 }
2088
46bed4df
GJ		 2089 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2090 if (!(data->has_temp & (1 << i)))
2091 continue;
6800c3d0
RM		 2092 data->temp[i][TEMP_READ] =
2093 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 2094 }
6800c3d0
RM		 2095
2096 data->temp_low_bits =
2097 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
2098
2099 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2100 if (data->has_pwm & (1 << i))
2101 data->pwm[i][PWM_DUTY] =
2102 w83793_read_value(client,
2103 W83793_REG_PWM(i, PWM_DUTY));
2104 }
2105
2106 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
2107 data->alarms[i] =
2108 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 2109 if (data->has_vid & 0x01)
2110 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
2111 if (data->has_vid & 0x02)
2112 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 2113 w83793_update_nonvolatile(dev);
2114 data->last_updated = jiffies;
2115 data->valid = 1;
2116
2117END:
2118 mutex_unlock(&data->update_lock);
2119 return data;
2120}
2121
47efe877
GR		 2122/*
2123 * Ignore the possibility that somebody change bank outside the driver
2124 * Must be called with data->update_lock held, except during initialization
2125 */
6800c3d0
RM		 2126static u8 w83793_read_value(struct i2c_client *client, u16 reg)
2127{
2128 struct w83793_data *data = i2c_get_clientdata(client);
2129 u8 res = 0xff;
2130 u8 new_bank = reg >> 8;
2131
2132 new_bank |= data->bank & 0xfc;
2133 if (data->bank != new_bank) {
2134 if (i2c_smbus_write_byte_data
2135 (client, W83793_REG_BANKSEL, new_bank) >= 0)
2136 data->bank = new_bank;
2137 else {
2138 dev_err(&client->dev,
2139 "set bank to %d failed, fall back "
2140 "to bank %d, read reg 0x%x error\n",
2141 new_bank, data->bank, reg);
2142 res = 0x0; /* read 0x0 from the chip */
2143 goto END;
2144 }
2145 }
2146 res = i2c_smbus_read_byte_data(client, reg & 0xff);
2147END:
2148 return res;
2149}
2150
2151/* Must be called with data->update_lock held, except during initialization */
2152static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
2153{
2154 struct w83793_data *data = i2c_get_clientdata(client);
2155 int res;
2156 u8 new_bank = reg >> 8;
2157
2158 new_bank |= data->bank & 0xfc;
2159 if (data->bank != new_bank) {
47efe877
GR		 2160 res = i2c_smbus_write_byte_data(client, W83793_REG_BANKSEL,
2161 new_bank);
2162 if (res < 0) {
6800c3d0
RM		 2163 dev_err(&client->dev,
2164 "set bank to %d failed, fall back "
2165 "to bank %d, write reg 0x%x error\n",
2166 new_bank, data->bank, reg);
2167 goto END;
2168 }
47efe877 2169 data->bank = new_bank;
6800c3d0
RM		 2170 }
2171
2172 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
2173END:
2174 return res;
2175}
2176
f0967eea 2177module_i2c_driver(w83793_driver);
6800c3d0 2178
5852f960 2179MODULE_AUTHOR("Yuan Mu, Sven Anders");
6800c3d0
RM		 2180MODULE_DESCRIPTION("w83793 driver");
2181MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)