[linux-2.6-block.git] / drivers / hwmon / pmbus / pmbus.h

/*
 * pmbus.h - Common defines and structures for PMBus devices
 *
 * Copyright (c) 2010, 2011 Ericsson AB.
 * Copyright (c) 2012 Guenter Roeck
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef PMBUS_H
#define PMBUS_H

#include <linux/bitops.h>
#include <linux/regulator/driver.h>

/*
 * Registers
 */
enum pmbus_regs {
	PMBUS_PAGE			= 0x00,
	PMBUS_OPERATION			= 0x01,
	PMBUS_ON_OFF_CONFIG		= 0x02,
	PMBUS_CLEAR_FAULTS		= 0x03,
	PMBUS_PHASE			= 0x04,

	PMBUS_CAPABILITY		= 0x19,
	PMBUS_QUERY			= 0x1A,

	PMBUS_VOUT_MODE			= 0x20,
	PMBUS_VOUT_COMMAND		= 0x21,
	PMBUS_VOUT_TRIM			= 0x22,
	PMBUS_VOUT_CAL_OFFSET		= 0x23,
	PMBUS_VOUT_MAX			= 0x24,
	PMBUS_VOUT_MARGIN_HIGH		= 0x25,
	PMBUS_VOUT_MARGIN_LOW		= 0x26,
	PMBUS_VOUT_TRANSITION_RATE	= 0x27,
	PMBUS_VOUT_DROOP		= 0x28,
	PMBUS_VOUT_SCALE_LOOP		= 0x29,
	PMBUS_VOUT_SCALE_MONITOR	= 0x2A,

	PMBUS_COEFFICIENTS		= 0x30,
	PMBUS_POUT_MAX			= 0x31,

	PMBUS_FAN_CONFIG_12		= 0x3A,
	PMBUS_FAN_COMMAND_1		= 0x3B,
	PMBUS_FAN_COMMAND_2		= 0x3C,
	PMBUS_FAN_CONFIG_34		= 0x3D,
	PMBUS_FAN_COMMAND_3		= 0x3E,
	PMBUS_FAN_COMMAND_4		= 0x3F,

	PMBUS_VOUT_OV_FAULT_LIMIT	= 0x40,
	PMBUS_VOUT_OV_FAULT_RESPONSE	= 0x41,
	PMBUS_VOUT_OV_WARN_LIMIT	= 0x42,
	PMBUS_VOUT_UV_WARN_LIMIT	= 0x43,
	PMBUS_VOUT_UV_FAULT_LIMIT	= 0x44,
	PMBUS_VOUT_UV_FAULT_RESPONSE	= 0x45,
	PMBUS_IOUT_OC_FAULT_LIMIT	= 0x46,
	PMBUS_IOUT_OC_FAULT_RESPONSE	= 0x47,
	PMBUS_IOUT_OC_LV_FAULT_LIMIT	= 0x48,
	PMBUS_IOUT_OC_LV_FAULT_RESPONSE	= 0x49,
	PMBUS_IOUT_OC_WARN_LIMIT	= 0x4A,
	PMBUS_IOUT_UC_FAULT_LIMIT	= 0x4B,
	PMBUS_IOUT_UC_FAULT_RESPONSE	= 0x4C,

	PMBUS_OT_FAULT_LIMIT		= 0x4F,
	PMBUS_OT_FAULT_RESPONSE		= 0x50,
	PMBUS_OT_WARN_LIMIT		= 0x51,
	PMBUS_UT_WARN_LIMIT		= 0x52,
	PMBUS_UT_FAULT_LIMIT		= 0x53,
	PMBUS_UT_FAULT_RESPONSE		= 0x54,
	PMBUS_VIN_OV_FAULT_LIMIT	= 0x55,
	PMBUS_VIN_OV_FAULT_RESPONSE	= 0x56,
	PMBUS_VIN_OV_WARN_LIMIT		= 0x57,
	PMBUS_VIN_UV_WARN_LIMIT		= 0x58,
	PMBUS_VIN_UV_FAULT_LIMIT	= 0x59,

	PMBUS_IIN_OC_FAULT_LIMIT	= 0x5B,
	PMBUS_IIN_OC_WARN_LIMIT		= 0x5D,

	PMBUS_POUT_OP_FAULT_LIMIT	= 0x68,
	PMBUS_POUT_OP_WARN_LIMIT	= 0x6A,
	PMBUS_PIN_OP_WARN_LIMIT		= 0x6B,

	PMBUS_STATUS_BYTE		= 0x78,
	PMBUS_STATUS_WORD		= 0x79,
	PMBUS_STATUS_VOUT		= 0x7A,
	PMBUS_STATUS_IOUT		= 0x7B,
	PMBUS_STATUS_INPUT		= 0x7C,
	PMBUS_STATUS_TEMPERATURE	= 0x7D,
	PMBUS_STATUS_CML		= 0x7E,
	PMBUS_STATUS_OTHER		= 0x7F,
	PMBUS_STATUS_MFR_SPECIFIC	= 0x80,
	PMBUS_STATUS_FAN_12		= 0x81,
	PMBUS_STATUS_FAN_34		= 0x82,

	PMBUS_READ_VIN			= 0x88,
	PMBUS_READ_IIN			= 0x89,
	PMBUS_READ_VCAP			= 0x8A,
	PMBUS_READ_VOUT			= 0x8B,
	PMBUS_READ_IOUT			= 0x8C,
	PMBUS_READ_TEMPERATURE_1	= 0x8D,
	PMBUS_READ_TEMPERATURE_2	= 0x8E,
	PMBUS_READ_TEMPERATURE_3	= 0x8F,
	PMBUS_READ_FAN_SPEED_1		= 0x90,
	PMBUS_READ_FAN_SPEED_2		= 0x91,
	PMBUS_READ_FAN_SPEED_3		= 0x92,
	PMBUS_READ_FAN_SPEED_4		= 0x93,
	PMBUS_READ_DUTY_CYCLE		= 0x94,
	PMBUS_READ_FREQUENCY		= 0x95,
	PMBUS_READ_POUT			= 0x96,
	PMBUS_READ_PIN			= 0x97,

	PMBUS_REVISION			= 0x98,
	PMBUS_MFR_ID			= 0x99,
	PMBUS_MFR_MODEL			= 0x9A,
	PMBUS_MFR_REVISION		= 0x9B,
	PMBUS_MFR_LOCATION		= 0x9C,
	PMBUS_MFR_DATE			= 0x9D,
	PMBUS_MFR_SERIAL		= 0x9E,

/*
 * Virtual registers.
 * Useful to support attributes which are not supported by standard PMBus
 * registers but exist as manufacturer specific registers on individual chips.
 * Must be mapped to real registers in device specific code.
 *
 * Semantics:
 * Virtual registers are all word size.
 * READ registers are read-only; writes are either ignored or return an error.
 * RESET registers are read/write. Reading reset registers returns zero
 * (used for detection), writing any value causes the associated history to be
 * reset.
 * Virtual registers have to be handled in device specific driver code. Chip
 * driver code returns non-negative register values if a virtual register is
 * supported, or a negative error code if not. The chip driver may return
 * -ENODATA or any other error code in this case, though an error code other
 * than -ENODATA is handled more efficiently and thus preferred. Either case,
 * the calling PMBus core code will abort if the chip driver returns an error
 * code when reading or writing virtual registers.
 */
	PMBUS_VIRT_BASE			= 0x100,
	PMBUS_VIRT_READ_TEMP_AVG,
	PMBUS_VIRT_READ_TEMP_MIN,
	PMBUS_VIRT_READ_TEMP_MAX,
	PMBUS_VIRT_RESET_TEMP_HISTORY,
	PMBUS_VIRT_READ_VIN_AVG,
	PMBUS_VIRT_READ_VIN_MIN,
	PMBUS_VIRT_READ_VIN_MAX,
	PMBUS_VIRT_RESET_VIN_HISTORY,
	PMBUS_VIRT_READ_IIN_AVG,
	PMBUS_VIRT_READ_IIN_MIN,
	PMBUS_VIRT_READ_IIN_MAX,
	PMBUS_VIRT_RESET_IIN_HISTORY,
	PMBUS_VIRT_READ_PIN_AVG,
	PMBUS_VIRT_READ_PIN_MIN,
	PMBUS_VIRT_READ_PIN_MAX,
	PMBUS_VIRT_RESET_PIN_HISTORY,
	PMBUS_VIRT_READ_POUT_AVG,
	PMBUS_VIRT_READ_POUT_MIN,
	PMBUS_VIRT_READ_POUT_MAX,
	PMBUS_VIRT_RESET_POUT_HISTORY,
	PMBUS_VIRT_READ_VOUT_AVG,
	PMBUS_VIRT_READ_VOUT_MIN,
	PMBUS_VIRT_READ_VOUT_MAX,
	PMBUS_VIRT_RESET_VOUT_HISTORY,
	PMBUS_VIRT_READ_IOUT_AVG,
	PMBUS_VIRT_READ_IOUT_MIN,
	PMBUS_VIRT_READ_IOUT_MAX,
	PMBUS_VIRT_RESET_IOUT_HISTORY,
	PMBUS_VIRT_READ_TEMP2_AVG,
	PMBUS_VIRT_READ_TEMP2_MIN,
	PMBUS_VIRT_READ_TEMP2_MAX,
	PMBUS_VIRT_RESET_TEMP2_HISTORY,

	PMBUS_VIRT_READ_VMON,
	PMBUS_VIRT_VMON_UV_WARN_LIMIT,
	PMBUS_VIRT_VMON_OV_WARN_LIMIT,
	PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
	PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
	PMBUS_VIRT_STATUS_VMON,
};

/*
 * OPERATION
 */
#define PB_OPERATION_CONTROL_ON		BIT(7)

/*
 * CAPABILITY
 */
#define PB_CAPABILITY_SMBALERT		BIT(4)
#define PB_CAPABILITY_ERROR_CHECK	BIT(7)

/*
 * VOUT_MODE
 */
#define PB_VOUT_MODE_MODE_MASK		0xe0
#define PB_VOUT_MODE_PARAM_MASK		0x1f

#define PB_VOUT_MODE_LINEAR		0x00
#define PB_VOUT_MODE_VID		0x20
#define PB_VOUT_MODE_DIRECT		0x40

/*
 * Fan configuration
 */
#define PB_FAN_2_PULSE_MASK		(BIT(0) | BIT(1))
#define PB_FAN_2_RPM			BIT(2)
#define PB_FAN_2_INSTALLED		BIT(3)
#define PB_FAN_1_PULSE_MASK		(BIT(4) | BIT(5))
#define PB_FAN_1_RPM			BIT(6)
#define PB_FAN_1_INSTALLED		BIT(7)

/*
 * STATUS_BYTE, STATUS_WORD (lower)
 */
#define PB_STATUS_NONE_ABOVE		BIT(0)
#define PB_STATUS_CML			BIT(1)
#define PB_STATUS_TEMPERATURE		BIT(2)
#define PB_STATUS_VIN_UV		BIT(3)
#define PB_STATUS_IOUT_OC		BIT(4)
#define PB_STATUS_VOUT_OV		BIT(5)
#define PB_STATUS_OFF			BIT(6)
#define PB_STATUS_BUSY			BIT(7)

/*
 * STATUS_WORD (upper)
 */
#define PB_STATUS_UNKNOWN		BIT(8)
#define PB_STATUS_OTHER			BIT(9)
#define PB_STATUS_FANS			BIT(10)
#define PB_STATUS_POWER_GOOD_N		BIT(11)
#define PB_STATUS_WORD_MFR		BIT(12)
#define PB_STATUS_INPUT			BIT(13)
#define PB_STATUS_IOUT_POUT		BIT(14)
#define PB_STATUS_VOUT			BIT(15)

/*
 * STATUS_IOUT
 */
#define PB_POUT_OP_WARNING		BIT(0)
#define PB_POUT_OP_FAULT		BIT(1)
#define PB_POWER_LIMITING		BIT(2)
#define PB_CURRENT_SHARE_FAULT		BIT(3)
#define PB_IOUT_UC_FAULT		BIT(4)
#define PB_IOUT_OC_WARNING		BIT(5)
#define PB_IOUT_OC_LV_FAULT		BIT(6)
#define PB_IOUT_OC_FAULT		BIT(7)

/*
 * STATUS_VOUT, STATUS_INPUT
 */
#define PB_VOLTAGE_UV_FAULT		BIT(4)
#define PB_VOLTAGE_UV_WARNING		BIT(5)
#define PB_VOLTAGE_OV_WARNING		BIT(6)
#define PB_VOLTAGE_OV_FAULT		BIT(7)

/*
 * STATUS_INPUT
 */
#define PB_PIN_OP_WARNING		BIT(0)
#define PB_IIN_OC_WARNING		BIT(1)
#define PB_IIN_OC_FAULT			BIT(2)

/*
 * STATUS_TEMPERATURE
 */
#define PB_TEMP_UT_FAULT		BIT(4)
#define PB_TEMP_UT_WARNING		BIT(5)
#define PB_TEMP_OT_WARNING		BIT(6)
#define PB_TEMP_OT_FAULT		BIT(7)

/*
 * STATUS_FAN
 */
#define PB_FAN_AIRFLOW_WARNING		BIT(0)
#define PB_FAN_AIRFLOW_FAULT		BIT(1)
#define PB_FAN_FAN2_SPEED_OVERRIDE	BIT(2)
#define PB_FAN_FAN1_SPEED_OVERRIDE	BIT(3)
#define PB_FAN_FAN2_WARNING		BIT(4)
#define PB_FAN_FAN1_WARNING		BIT(5)
#define PB_FAN_FAN2_FAULT		BIT(6)
#define PB_FAN_FAN1_FAULT		BIT(7)

/*
 * CML_FAULT_STATUS
 */
#define PB_CML_FAULT_OTHER_MEM_LOGIC	BIT(0)
#define PB_CML_FAULT_OTHER_COMM		BIT(1)
#define PB_CML_FAULT_PROCESSOR		BIT(3)
#define PB_CML_FAULT_MEMORY		BIT(4)
#define PB_CML_FAULT_PACKET_ERROR	BIT(5)
#define PB_CML_FAULT_INVALID_DATA	BIT(6)
#define PB_CML_FAULT_INVALID_COMMAND	BIT(7)

enum pmbus_sensor_classes {
	PSC_VOLTAGE_IN = 0,
	PSC_VOLTAGE_OUT,
	PSC_CURRENT_IN,
	PSC_CURRENT_OUT,
	PSC_POWER,
	PSC_TEMPERATURE,
	PSC_FAN,
	PSC_NUM_CLASSES		/* Number of power sensor classes */
};

#define PMBUS_PAGES	32	/* Per PMBus specification */

/* Functionality bit mask */
#define PMBUS_HAVE_VIN		BIT(0)
#define PMBUS_HAVE_VCAP		BIT(1)
#define PMBUS_HAVE_VOUT		BIT(2)
#define PMBUS_HAVE_IIN		BIT(3)
#define PMBUS_HAVE_IOUT		BIT(4)
#define PMBUS_HAVE_PIN		BIT(5)
#define PMBUS_HAVE_POUT		BIT(6)
#define PMBUS_HAVE_FAN12	BIT(7)
#define PMBUS_HAVE_FAN34	BIT(8)
#define PMBUS_HAVE_TEMP		BIT(9)
#define PMBUS_HAVE_TEMP2	BIT(10)
#define PMBUS_HAVE_TEMP3	BIT(11)
#define PMBUS_HAVE_STATUS_VOUT	BIT(12)
#define PMBUS_HAVE_STATUS_IOUT	BIT(13)
#define PMBUS_HAVE_STATUS_INPUT	BIT(14)
#define PMBUS_HAVE_STATUS_TEMP	BIT(15)
#define PMBUS_HAVE_STATUS_FAN12	BIT(16)
#define PMBUS_HAVE_STATUS_FAN34	BIT(17)
#define PMBUS_HAVE_VMON		BIT(18)
#define PMBUS_HAVE_STATUS_VMON	BIT(19)

enum pmbus_data_format { linear = 0, direct, vid };
enum vrm_version { vr11 = 0, vr12 };

struct pmbus_driver_info {
	int pages;		/* Total number of pages */
	enum pmbus_data_format format[PSC_NUM_CLASSES];
	enum vrm_version vrm_version;
	/*
	 * Support one set of coefficients for each sensor type
	 * Used for chips providing data in direct mode.
	 */
	int m[PSC_NUM_CLASSES];	/* mantissa for direct data format */
	int b[PSC_NUM_CLASSES];	/* offset */
	int R[PSC_NUM_CLASSES];	/* exponent */

	u32 func[PMBUS_PAGES];	/* Functionality, per page */
	/*
	 * The following functions map manufacturing specific register values
	 * to PMBus standard register values. Specify only if mapping is
	 * necessary.
	 * Functions return the register value (read) or zero (write) if
	 * successful. A return value of -ENODATA indicates that there is no
	 * manufacturer specific register, but that a standard PMBus register
	 * may exist. Any other negative return value indicates that the
	 * register does not exist, and that no attempt should be made to read
	 * the standard register.
	 */
	int (*read_byte_data)(struct i2c_client *client, int page, int reg);
	int (*read_word_data)(struct i2c_client *client, int page, int reg);
	int (*write_word_data)(struct i2c_client *client, int page, int reg,
			       u16 word);
	int (*write_byte)(struct i2c_client *client, int page, u8 value);
	/*
	 * The identify function determines supported PMBus functionality.
	 * This function is only necessary if a chip driver supports multiple
	 * chips, and the chip functionality is not pre-determined.
	 */
	int (*identify)(struct i2c_client *client,
			struct pmbus_driver_info *info);

	/* Regulator functionality, if supported by this chip driver. */
	int num_regulators;
	const struct regulator_desc *reg_desc;
};

/* Regulator ops */

extern const struct regulator_ops pmbus_regulator_ops;

/* Macro for filling in array of struct regulator_desc */
#define PMBUS_REGULATOR(_name, _id)				\
	[_id] = {						\
		.name = (_name # _id),				\
		.id = (_id),					\
		.of_match = of_match_ptr(_name # _id),		\
		.regulators_node = of_match_ptr("regulators"),	\
		.ops = &pmbus_regulator_ops,			\
		.type = REGULATOR_VOLTAGE,			\
		.owner = THIS_MODULE,				\
	}

/* Function declarations */

void pmbus_clear_cache(struct i2c_client *client);
int pmbus_set_page(struct i2c_client *client, u8 page);
int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg);
int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word);
int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
			  u8 value);
int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
			   u8 mask, u8 value);
void pmbus_clear_faults(struct i2c_client *client);
bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id,
		   struct pmbus_driver_info *info);
int pmbus_do_remove(struct i2c_client *client);
const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
						      *client);

#endif /* PMBUS_H */
Commit	Line	Data
442aba78 GR	1	/*
	2	* pmbus.h - Common defines and structures for PMBus devices
	3	*
	4	* Copyright (c) 2010, 2011 Ericsson AB.
aebcbbfc	5	* Copyright (c) 2012 Guenter Roeck
442aba78 GR	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*/
	21
	22	#ifndef PMBUS_H
	23	#define PMBUS_H
	24
2c052d42 GR	25	#include <linux/bitops.h>
	26	#include <linux/regulator/driver.h>
	27
442aba78 GR	28	/*
	29	* Registers
	30	*/
2238835c GR	31	enum pmbus_regs {
	32	PMBUS_PAGE = 0x00,
	33	PMBUS_OPERATION = 0x01,
	34	PMBUS_ON_OFF_CONFIG = 0x02,
	35	PMBUS_CLEAR_FAULTS = 0x03,
	36	PMBUS_PHASE = 0x04,
	37
	38	PMBUS_CAPABILITY = 0x19,
	39	PMBUS_QUERY = 0x1A,
	40
	41	PMBUS_VOUT_MODE = 0x20,
	42	PMBUS_VOUT_COMMAND = 0x21,
	43	PMBUS_VOUT_TRIM = 0x22,
	44	PMBUS_VOUT_CAL_OFFSET = 0x23,
	45	PMBUS_VOUT_MAX = 0x24,
	46	PMBUS_VOUT_MARGIN_HIGH = 0x25,
	47	PMBUS_VOUT_MARGIN_LOW = 0x26,
	48	PMBUS_VOUT_TRANSITION_RATE = 0x27,
	49	PMBUS_VOUT_DROOP = 0x28,
	50	PMBUS_VOUT_SCALE_LOOP = 0x29,
	51	PMBUS_VOUT_SCALE_MONITOR = 0x2A,
	52
	53	PMBUS_COEFFICIENTS = 0x30,
	54	PMBUS_POUT_MAX = 0x31,
	55
	56	PMBUS_FAN_CONFIG_12 = 0x3A,
	57	PMBUS_FAN_COMMAND_1 = 0x3B,
	58	PMBUS_FAN_COMMAND_2 = 0x3C,
	59	PMBUS_FAN_CONFIG_34 = 0x3D,
	60	PMBUS_FAN_COMMAND_3 = 0x3E,
	61	PMBUS_FAN_COMMAND_4 = 0x3F,
	62
	63	PMBUS_VOUT_OV_FAULT_LIMIT = 0x40,
	64	PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41,
	65	PMBUS_VOUT_OV_WARN_LIMIT = 0x42,
	66	PMBUS_VOUT_UV_WARN_LIMIT = 0x43,
	67	PMBUS_VOUT_UV_FAULT_LIMIT = 0x44,
	68	PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45,
	69	PMBUS_IOUT_OC_FAULT_LIMIT = 0x46,
	70	PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47,
	71	PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48,
	72	PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49,
	73	PMBUS_IOUT_OC_WARN_LIMIT = 0x4A,
	74	PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B,
	75	PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C,
	76
	77	PMBUS_OT_FAULT_LIMIT = 0x4F,
	78	PMBUS_OT_FAULT_RESPONSE = 0x50,
	79	PMBUS_OT_WARN_LIMIT = 0x51,
	80	PMBUS_UT_WARN_LIMIT = 0x52,
	81	PMBUS_UT_FAULT_LIMIT = 0x53,
	82	PMBUS_UT_FAULT_RESPONSE = 0x54,
	83	PMBUS_VIN_OV_FAULT_LIMIT = 0x55,
	84	PMBUS_VIN_OV_FAULT_RESPONSE = 0x56,
	85	PMBUS_VIN_OV_WARN_LIMIT = 0x57,
	86	PMBUS_VIN_UV_WARN_LIMIT = 0x58,
	87	PMBUS_VIN_UV_FAULT_LIMIT = 0x59,
	88
	89	PMBUS_IIN_OC_FAULT_LIMIT = 0x5B,
	90	PMBUS_IIN_OC_WARN_LIMIT = 0x5D,
	91
	92	PMBUS_POUT_OP_FAULT_LIMIT = 0x68,
	93	PMBUS_POUT_OP_WARN_LIMIT = 0x6A,
	94	PMBUS_PIN_OP_WARN_LIMIT = 0x6B,
95
96	PMBUS_STATUS_BYTE = 0x78,
97	PMBUS_STATUS_WORD = 0x79,
98	PMBUS_STATUS_VOUT = 0x7A,
99	PMBUS_STATUS_IOUT = 0x7B,
100	PMBUS_STATUS_INPUT = 0x7C,
101	PMBUS_STATUS_TEMPERATURE = 0x7D,
102	PMBUS_STATUS_CML = 0x7E,
103	PMBUS_STATUS_OTHER = 0x7F,
104	PMBUS_STATUS_MFR_SPECIFIC = 0x80,
105	PMBUS_STATUS_FAN_12 = 0x81,
106	PMBUS_STATUS_FAN_34 = 0x82,
107
108	PMBUS_READ_VIN = 0x88,
109	PMBUS_READ_IIN = 0x89,
110	PMBUS_READ_VCAP = 0x8A,
111	PMBUS_READ_VOUT = 0x8B,
112	PMBUS_READ_IOUT = 0x8C,
113	PMBUS_READ_TEMPERATURE_1 = 0x8D,
114	PMBUS_READ_TEMPERATURE_2 = 0x8E,
115	PMBUS_READ_TEMPERATURE_3 = 0x8F,
116	PMBUS_READ_FAN_SPEED_1 = 0x90,
117	PMBUS_READ_FAN_SPEED_2 = 0x91,
118	PMBUS_READ_FAN_SPEED_3 = 0x92,
119	PMBUS_READ_FAN_SPEED_4 = 0x93,
120	PMBUS_READ_DUTY_CYCLE = 0x94,
121	PMBUS_READ_FREQUENCY = 0x95,
122	PMBUS_READ_POUT = 0x96,
123	PMBUS_READ_PIN = 0x97,
124
125	PMBUS_REVISION = 0x98,
126	PMBUS_MFR_ID = 0x99,
127	PMBUS_MFR_MODEL = 0x9A,
128	PMBUS_MFR_REVISION = 0x9B,
129	PMBUS_MFR_LOCATION = 0x9C,
130	PMBUS_MFR_DATE = 0x9D,
131	PMBUS_MFR_SERIAL = 0x9E,
442aba78	132
6f183d33 GR	133	/*
	134	* Virtual registers.
	135	* Useful to support attributes which are not supported by standard PMBus
	136	* registers but exist as manufacturer specific registers on individual chips.
	137	* Must be mapped to real registers in device specific code.
	138	*
	139	* Semantics:
	140	* Virtual registers are all word size.
	141	* READ registers are read-only; writes are either ignored or return an error.
20fcfe17 GR	142	* RESET registers are read/write. Reading reset registers returns zero
	143	* (used for detection), writing any value causes the associated history to be
	144	* reset.
	145	* Virtual registers have to be handled in device specific driver code. Chip
	146	* driver code returns non-negative register values if a virtual register is
	147	* supported, or a negative error code if not. The chip driver may return
	148	* -ENODATA or any other error code in this case, though an error code other
	149	* than -ENODATA is handled more efficiently and thus preferred. Either case,
	150	* the calling PMBus core code will abort if the chip driver returns an error
	151	* code when reading or writing virtual registers.
6f183d33	152	*/
2238835c GR	153	PMBUS_VIRT_BASE = 0x100,
	154	PMBUS_VIRT_READ_TEMP_AVG,
	155	PMBUS_VIRT_READ_TEMP_MIN,
	156	PMBUS_VIRT_READ_TEMP_MAX,
	157	PMBUS_VIRT_RESET_TEMP_HISTORY,
	158	PMBUS_VIRT_READ_VIN_AVG,
	159	PMBUS_VIRT_READ_VIN_MIN,
	160	PMBUS_VIRT_READ_VIN_MAX,
	161	PMBUS_VIRT_RESET_VIN_HISTORY,
	162	PMBUS_VIRT_READ_IIN_AVG,
	163	PMBUS_VIRT_READ_IIN_MIN,
	164	PMBUS_VIRT_READ_IIN_MAX,
	165	PMBUS_VIRT_RESET_IIN_HISTORY,
	166	PMBUS_VIRT_READ_PIN_AVG,
	167	PMBUS_VIRT_READ_PIN_MIN,
	168	PMBUS_VIRT_READ_PIN_MAX,
	169	PMBUS_VIRT_RESET_PIN_HISTORY,
	170	PMBUS_VIRT_READ_POUT_AVG,
	171	PMBUS_VIRT_READ_POUT_MIN,
	172	PMBUS_VIRT_READ_POUT_MAX,
	173	PMBUS_VIRT_RESET_POUT_HISTORY,
	174	PMBUS_VIRT_READ_VOUT_AVG,
	175	PMBUS_VIRT_READ_VOUT_MIN,
	176	PMBUS_VIRT_READ_VOUT_MAX,
	177	PMBUS_VIRT_RESET_VOUT_HISTORY,
	178	PMBUS_VIRT_READ_IOUT_AVG,
	179	PMBUS_VIRT_READ_IOUT_MIN,
	180	PMBUS_VIRT_READ_IOUT_MAX,
	181	PMBUS_VIRT_RESET_IOUT_HISTORY,
	182	PMBUS_VIRT_READ_TEMP2_AVG,
	183	PMBUS_VIRT_READ_TEMP2_MIN,
	184	PMBUS_VIRT_READ_TEMP2_MAX,
	185	PMBUS_VIRT_RESET_TEMP2_HISTORY,
	186
	187	PMBUS_VIRT_READ_VMON,
	188	PMBUS_VIRT_VMON_UV_WARN_LIMIT,
	189	PMBUS_VIRT_VMON_OV_WARN_LIMIT,
	190	PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
	191	PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
	192	PMBUS_VIRT_STATUS_VMON,
	193	};
aebcbbfc	194
ddbb4db4 AT	195	/*
	196	* OPERATION
	197	*/
2c052d42	198	#define PB_OPERATION_CONTROL_ON BIT(7)
ddbb4db4	199
442aba78 GR	200	/*
	201	* CAPABILITY
	202	*/
2c052d42 GR	203	#define PB_CAPABILITY_SMBALERT BIT(4)
2c052d42 GR	204	#define PB_CAPABILITY_ERROR_CHECK BIT(7)
442aba78 GR	205
	206	/*
	207	* VOUT_MODE
	208	*/
	209	#define PB_VOUT_MODE_MODE_MASK 0xe0
	210	#define PB_VOUT_MODE_PARAM_MASK 0x1f
	211
	212	#define PB_VOUT_MODE_LINEAR 0x00
	213	#define PB_VOUT_MODE_VID 0x20
	214	#define PB_VOUT_MODE_DIRECT 0x40
	215
	216	/*
	217	* Fan configuration
	218	*/
2c052d42 GR	219	#define PB_FAN_2_PULSE_MASK (BIT(0) \| BIT(1))
	220	#define PB_FAN_2_RPM BIT(2)
	221	#define PB_FAN_2_INSTALLED BIT(3)
	222	#define PB_FAN_1_PULSE_MASK (BIT(4) \| BIT(5))
	223	#define PB_FAN_1_RPM BIT(6)
	224	#define PB_FAN_1_INSTALLED BIT(7)
442aba78 GR	225
	226	/*
	227	* STATUS_BYTE, STATUS_WORD (lower)
	228	*/
2c052d42 GR	229	#define PB_STATUS_NONE_ABOVE BIT(0)
	230	#define PB_STATUS_CML BIT(1)
	231	#define PB_STATUS_TEMPERATURE BIT(2)
	232	#define PB_STATUS_VIN_UV BIT(3)
	233	#define PB_STATUS_IOUT_OC BIT(4)
	234	#define PB_STATUS_VOUT_OV BIT(5)
	235	#define PB_STATUS_OFF BIT(6)
	236	#define PB_STATUS_BUSY BIT(7)
442aba78 GR	237
	238	/*
	239	* STATUS_WORD (upper)
	240	*/
2c052d42 GR	241	#define PB_STATUS_UNKNOWN BIT(8)
	242	#define PB_STATUS_OTHER BIT(9)
	243	#define PB_STATUS_FANS BIT(10)
	244	#define PB_STATUS_POWER_GOOD_N BIT(11)
	245	#define PB_STATUS_WORD_MFR BIT(12)
	246	#define PB_STATUS_INPUT BIT(13)
	247	#define PB_STATUS_IOUT_POUT BIT(14)
	248	#define PB_STATUS_VOUT BIT(15)
442aba78 GR	249
	250	/*
	251	* STATUS_IOUT
	252	*/
2c052d42 GR	253	#define PB_POUT_OP_WARNING BIT(0)
	254	#define PB_POUT_OP_FAULT BIT(1)
	255	#define PB_POWER_LIMITING BIT(2)
	256	#define PB_CURRENT_SHARE_FAULT BIT(3)
	257	#define PB_IOUT_UC_FAULT BIT(4)
	258	#define PB_IOUT_OC_WARNING BIT(5)
	259	#define PB_IOUT_OC_LV_FAULT BIT(6)
	260	#define PB_IOUT_OC_FAULT BIT(7)
442aba78 GR	261
	262	/*
	263	* STATUS_VOUT, STATUS_INPUT
	264	*/
2c052d42 GR	265	#define PB_VOLTAGE_UV_FAULT BIT(4)
	266	#define PB_VOLTAGE_UV_WARNING BIT(5)
	267	#define PB_VOLTAGE_OV_WARNING BIT(6)
	268	#define PB_VOLTAGE_OV_FAULT BIT(7)
442aba78 GR	269
	270	/*
	271	* STATUS_INPUT
	272	*/
2c052d42 GR	273	#define PB_PIN_OP_WARNING BIT(0)
	274	#define PB_IIN_OC_WARNING BIT(1)
	275	#define PB_IIN_OC_FAULT BIT(2)
442aba78 GR	276
	277	/*
	278	* STATUS_TEMPERATURE
	279	*/
2c052d42 GR	280	#define PB_TEMP_UT_FAULT BIT(4)
	281	#define PB_TEMP_UT_WARNING BIT(5)
	282	#define PB_TEMP_OT_WARNING BIT(6)
	283	#define PB_TEMP_OT_FAULT BIT(7)
442aba78 GR	284
	285	/*
	286	* STATUS_FAN
	287	*/
2c052d42 GR	288	#define PB_FAN_AIRFLOW_WARNING BIT(0)
	289	#define PB_FAN_AIRFLOW_FAULT BIT(1)
	290	#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2)
	291	#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3)
	292	#define PB_FAN_FAN2_WARNING BIT(4)
	293	#define PB_FAN_FAN1_WARNING BIT(5)
	294	#define PB_FAN_FAN2_FAULT BIT(6)
	295	#define PB_FAN_FAN1_FAULT BIT(7)
442aba78 GR	296
	297	/*
	298	* CML_FAULT_STATUS
	299	*/
2c052d42 GR	300	#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0)
	301	#define PB_CML_FAULT_OTHER_COMM BIT(1)
	302	#define PB_CML_FAULT_PROCESSOR BIT(3)
	303	#define PB_CML_FAULT_MEMORY BIT(4)
	304	#define PB_CML_FAULT_PACKET_ERROR BIT(5)
	305	#define PB_CML_FAULT_INVALID_DATA BIT(6)
	306	#define PB_CML_FAULT_INVALID_COMMAND BIT(7)
442aba78 GR	307
	308	enum pmbus_sensor_classes {
	309	PSC_VOLTAGE_IN = 0,
	310	PSC_VOLTAGE_OUT,
	311	PSC_CURRENT_IN,
	312	PSC_CURRENT_OUT,
	313	PSC_POWER,
	314	PSC_TEMPERATURE,
	315	PSC_FAN,
	316	PSC_NUM_CLASSES /* Number of power sensor classes */
	317	};
	318
	319	#define PMBUS_PAGES 32 /* Per PMBus specification */
	320
	321	/* Functionality bit mask */
2c052d42 GR	322	#define PMBUS_HAVE_VIN BIT(0)
	323	#define PMBUS_HAVE_VCAP BIT(1)
	324	#define PMBUS_HAVE_VOUT BIT(2)
	325	#define PMBUS_HAVE_IIN BIT(3)
	326	#define PMBUS_HAVE_IOUT BIT(4)
	327	#define PMBUS_HAVE_PIN BIT(5)
	328	#define PMBUS_HAVE_POUT BIT(6)
	329	#define PMBUS_HAVE_FAN12 BIT(7)
	330	#define PMBUS_HAVE_FAN34 BIT(8)
	331	#define PMBUS_HAVE_TEMP BIT(9)
	332	#define PMBUS_HAVE_TEMP2 BIT(10)
	333	#define PMBUS_HAVE_TEMP3 BIT(11)
	334	#define PMBUS_HAVE_STATUS_VOUT BIT(12)
	335	#define PMBUS_HAVE_STATUS_IOUT BIT(13)
	336	#define PMBUS_HAVE_STATUS_INPUT BIT(14)
	337	#define PMBUS_HAVE_STATUS_TEMP BIT(15)
	338	#define PMBUS_HAVE_STATUS_FAN12 BIT(16)
	339	#define PMBUS_HAVE_STATUS_FAN34 BIT(17)
	340	#define PMBUS_HAVE_VMON BIT(18)
	341	#define PMBUS_HAVE_STATUS_VMON BIT(19)
442aba78	342
1061d851	343	enum pmbus_data_format { linear = 0, direct, vid };
068c2270	344	enum vrm_version { vr11 = 0, vr12 };
1061d851	345
442aba78 GR	346	struct pmbus_driver_info {
442aba78 GR	347	int pages; /* Total number of pages */
1061d851	348	enum pmbus_data_format format[PSC_NUM_CLASSES];
068c2270	349	enum vrm_version vrm_version;
442aba78 GR	350	/*
	351	* Support one set of coefficients for each sensor type
	352	* Used for chips providing data in direct mode.
	353	*/
	354	int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */
	355	int b[PSC_NUM_CLASSES]; /* offset */
	356	int R[PSC_NUM_CLASSES]; /* exponent */
	357
	358	u32 func[PMBUS_PAGES]; /* Functionality, per page */
	359	/*
2cfa6aed GR	360	* The following functions map manufacturing specific register values
	361	* to PMBus standard register values. Specify only if mapping is
	362	* necessary.
20fcfe17 GR	363	* Functions return the register value (read) or zero (write) if
	364	* successful. A return value of -ENODATA indicates that there is no
	365	* manufacturer specific register, but that a standard PMBus register
	366	* may exist. Any other negative return value indicates that the
	367	* register does not exist, and that no attempt should be made to read
	368	* the standard register.
442aba78	369	*/
2cfa6aed	370	int (read_byte_data)(struct i2c_client client, int page, int reg);
46243f3a GR	371	int (read_word_data)(struct i2c_client client, int page, int reg);
	372	int (write_word_data)(struct i2c_client client, int page, int reg,
	373	u16 word);
044cd3a5	374	int (write_byte)(struct i2c_client client, int page, u8 value);
442aba78 GR	375	/*
	376	* The identify function determines supported PMBus functionality.
	377	* This function is only necessary if a chip driver supports multiple
	378	* chips, and the chip functionality is not pre-determined.
	379	*/
	380	int (identify)(struct i2c_client client,
	381	struct pmbus_driver_info *info);
ddbb4db4 AT	382
	383	/* Regulator functionality, if supported by this chip driver. */
	384	int num_regulators;
	385	const struct regulator_desc *reg_desc;
442aba78 GR	386	};
442aba78 GR	387
ddbb4db4 AT	388	/* Regulator ops */
ddbb4db4 AT	389
a07d7311	390	extern const struct regulator_ops pmbus_regulator_ops;
ddbb4db4 AT	391
	392	/* Macro for filling in array of struct regulator_desc */
	393	#define PMBUS_REGULATOR(_name, _id) \
	394	[_id] = { \
	395	.name = (_name # _id), \
	396	.id = (_id), \
	397	.of_match = of_match_ptr(_name # _id), \
	398	.regulators_node = of_match_ptr("regulators"), \
	399	.ops = &pmbus_regulator_ops, \
7b7a8b42	400	.type = REGULATOR_VOLTAGE, \
ddbb4db4 AT	401	.owner = THIS_MODULE, \
	402	}
	403
442aba78 GR	404	/* Function declarations */
442aba78 GR	405
ce603b18	406	void pmbus_clear_cache(struct i2c_client *client);
442aba78 GR	407	int pmbus_set_page(struct i2c_client *client, u8 page);
442aba78 GR	408	int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg);
46243f3a	409	int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word);
9c1ed894	410	int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
03e9bd8d	411	int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
11c11998 AT	412	int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
	413	u8 value);
	414	int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
	415	u8 mask, u8 value);
442aba78 GR	416	void pmbus_clear_faults(struct i2c_client *client);
	417	bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
	418	bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
	419	int pmbus_do_probe(struct i2c_client client, const struct i2c_device_id id,
	420	struct pmbus_driver_info *info);
dd285ad7	421	int pmbus_do_remove(struct i2c_client *client);
442aba78 GR	422	const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
	423	*client);
	424
	425	#endif /* PMBUS_H */