hwmon: (it87) Add support for beep on alarm
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4
LT
1/*
2 it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring.
4
87b4b663
BH
5 The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 addition to an Environment Controller (Enhanced Hardware Monitor and
8 Fan Controller)
9
10 This driver supports only the Environment Controller in the IT8705F and
11 similar parts. The other devices are supported by different drivers.
12
91749996 13 Supports: IT8705F Super I/O chip w/LPC interface
8e9afcbb 14 IT8712F Super I/O chip w/LPC interface
17d648bf 15 IT8716F Super I/O chip w/LPC interface
87673dd7 16 IT8718F Super I/O chip w/LPC interface
b4da93e4 17 IT8720F Super I/O chip w/LPC interface
08a8f6e9 18 IT8726F Super I/O chip w/LPC interface
1da177e4
LT
19 Sis950 A clone of the IT8705F
20
f1d8e332 21 Copyright (C) 2001 Chris Gauthron
0124dd78 22 Copyright (C) 2005-2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT
23
24 This program is free software; you can redistribute it and/or modify
25 it under the terms of the GNU General Public License as published by
26 the Free Software Foundation; either version 2 of the License, or
27 (at your option) any later version.
28
29 This program is distributed in the hope that it will be useful,
30 but WITHOUT ANY WARRANTY; without even the implied warranty of
31 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 GNU General Public License for more details.
33
34 You should have received a copy of the GNU General Public License
35 along with this program; if not, write to the Free Software
36 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
37*/
38
1da177e4
LT
39#include <linux/module.h>
40#include <linux/init.h>
41#include <linux/slab.h>
42#include <linux/jiffies.h>
b74f3fdd 43#include <linux/platform_device.h>
943b0830 44#include <linux/hwmon.h>
303760b4
JD
45#include <linux/hwmon-sysfs.h>
46#include <linux/hwmon-vid.h>
943b0830 47#include <linux/err.h>
9a61bf63 48#include <linux/mutex.h>
87808be4 49#include <linux/sysfs.h>
98dd22c3
JD
50#include <linux/string.h>
51#include <linux/dmi.h>
b9acb64a 52#include <linux/acpi.h>
6055fae8 53#include <linux/io.h>
1da177e4 54
b74f3fdd 55#define DRVNAME "it87"
1da177e4 56
b4da93e4 57enum chips { it87, it8712, it8716, it8718, it8720 };
1da177e4 58
67b671bc
JD
59static unsigned short force_id;
60module_param(force_id, ushort, 0);
61MODULE_PARM_DESC(force_id, "Override the detected device ID");
62
b74f3fdd 63static struct platform_device *pdev;
64
1da177e4
LT
65#define REG 0x2e /* The register to read/write */
66#define DEV 0x07 /* Register: Logical device select */
67#define VAL 0x2f /* The value to read/write */
68#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS
69
70/* The device with the IT8718F/IT8720F VID value in it */
71#define GPIO 0x07
72
1da177e4
LT
73#define DEVID 0x20 /* Register: Device ID */
74#define DEVREV 0x22 /* Register: Device Revision */
75
76static inline int
77superio_inb(int reg)
78{
79 outb(reg, REG);
80 return inb(VAL);
81}
82
83static int superio_inw(int reg)
84{
85 int val;
86 outb(reg++, REG);
87 val = inb(VAL) << 8;
88 outb(reg, REG);
89 val |= inb(VAL);
90 return val;
91}
92
93static inline void
87673dd7 94superio_select(int ldn)
1da177e4
LT
95{
96 outb(DEV, REG);
87673dd7 97 outb(ldn, VAL);
1da177e4
LT
98}
99
100static inline void
101superio_enter(void)
102{
103 outb(0x87, REG);
104 outb(0x01, REG);
105 outb(0x55, REG);
106 outb(0x55, REG);
107}
108
109static inline void
110superio_exit(void)
111{
112 outb(0x02, REG);
113 outb(0x02, VAL);
114}
115
87673dd7 116/* Logical device 4 registers */
1da177e4
LT
117#define IT8712F_DEVID 0x8712
118#define IT8705F_DEVID 0x8705
17d648bf 119#define IT8716F_DEVID 0x8716
87673dd7 120#define IT8718F_DEVID 0x8718
b4da93e4 121#define IT8720F_DEVID 0x8720
08a8f6e9 122#define IT8726F_DEVID 0x8726
1da177e4
LT
123#define IT87_ACT_REG 0x30
124#define IT87_BASE_REG 0x60
125
87673dd7 126/* Logical device 7 registers (IT8712F and later) */
895ff267 127#define IT87_SIO_GPIO3_REG 0x27
591ec650 128#define IT87_SIO_GPIO5_REG 0x29
87673dd7
JD
129#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
130#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 131#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 132
1da177e4
LT
133/* Update battery voltage after every reading if true */
134static int update_vbat;
135
136/* Not all BIOSes properly configure the PWM registers */
137static int fix_pwm_polarity;
138
1da177e4
LT
139/* Many IT87 constants specified below */
140
141/* Length of ISA address segment */
142#define IT87_EXTENT 8
143
87b4b663
BH
144/* Length of ISA address segment for Environmental Controller */
145#define IT87_EC_EXTENT 2
146
147/* Offset of EC registers from ISA base address */
148#define IT87_EC_OFFSET 5
149
150/* Where are the ISA address/data registers relative to the EC base address */
151#define IT87_ADDR_REG_OFFSET 0
152#define IT87_DATA_REG_OFFSET 1
1da177e4
LT
153
154/*----- The IT87 registers -----*/
155
156#define IT87_REG_CONFIG 0x00
157
158#define IT87_REG_ALARM1 0x01
159#define IT87_REG_ALARM2 0x02
160#define IT87_REG_ALARM3 0x03
161
b4da93e4
JMS
162/* The IT8718F and IT8720F have the VID value in a different register, in
163 Super-I/O configuration space. */
1da177e4 164#define IT87_REG_VID 0x0a
0475169c
AP
165/* The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
166 for fan divisors. Later IT8712F revisions must use 16-bit tachometer
167 mode. */
1da177e4 168#define IT87_REG_FAN_DIV 0x0b
17d648bf 169#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT
170
171/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
172
c7f1f716
JD
173static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
174static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
175static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
176static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT
177#define IT87_REG_FAN_MAIN_CTRL 0x13
178#define IT87_REG_FAN_CTL 0x14
179#define IT87_REG_PWM(nr) (0x15 + (nr))
180
181#define IT87_REG_VIN(nr) (0x20 + (nr))
182#define IT87_REG_TEMP(nr) (0x29 + (nr))
183
184#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
185#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
186#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
187#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
188
1da177e4
LT
189#define IT87_REG_VIN_ENABLE 0x50
190#define IT87_REG_TEMP_ENABLE 0x51
d9b327c3 191#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT
192
193#define IT87_REG_CHIPID 0x58
194
195#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
196#define IN_FROM_REG(val) ((val) * 16)
197
198static inline u8 FAN_TO_REG(long rpm, int div)
199{
200 if (rpm == 0)
201 return 255;
202 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
203 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
204 254);
205}
206
17d648bf
JD
207static inline u16 FAN16_TO_REG(long rpm)
208{
209 if (rpm == 0)
210 return 0xffff;
211 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
212}
213
1da177e4 214#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
17d648bf
JD
215/* The divider is fixed to 2 in 16-bit mode */
216#define FAN16_FROM_REG(val) ((val)==0?-1:(val)==0xffff?0:1350000/((val)*2))
1da177e4
LT
217
218#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-500)/1000):\
219 ((val)+500)/1000),-128,127))
e267d250 220#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 221
1da177e4
LT
222#define PWM_TO_REG(val) ((val) >> 1)
223#define PWM_FROM_REG(val) (((val)&0x7f) << 1)
224
225static int DIV_TO_REG(int val)
226{
227 int answer = 0;
b9e349f7 228 while (answer < 7 && (val >>= 1))
1da177e4
LT
229 answer++;
230 return answer;
231}
232#define DIV_FROM_REG(val) (1 << (val))
233
f8d0c19a
JD
234static const unsigned int pwm_freq[8] = {
235 48000000 / 128,
236 24000000 / 128,
237 12000000 / 128,
238 8000000 / 128,
239 6000000 / 128,
240 3000000 / 128,
241 1500000 / 128,
242 750000 / 128,
243};
244
1da177e4 245
b74f3fdd 246struct it87_sio_data {
247 enum chips type;
248 /* Values read from Super-I/O config space */
0475169c 249 u8 revision;
b74f3fdd 250 u8 vid_value;
d9b327c3 251 u8 beep_pin;
591ec650 252 /* Features skipped based on config or DMI */
895ff267 253 u8 skip_vid;
591ec650 254 u8 skip_fan;
98dd22c3 255 u8 skip_pwm;
b74f3fdd 256};
257
ed6bafbf
JD
258/* For each registered chip, we need to keep some data in memory.
259 The structure is dynamically allocated. */
1da177e4 260struct it87_data {
1beeffe4 261 struct device *hwmon_dev;
1da177e4 262 enum chips type;
0475169c 263 u8 revision;
1da177e4 264
b74f3fdd 265 unsigned short addr;
266 const char *name;
9a61bf63 267 struct mutex update_lock;
1da177e4
LT
268 char valid; /* !=0 if following fields are valid */
269 unsigned long last_updated; /* In jiffies */
270
271 u8 in[9]; /* Register value */
3543a53f
JD
272 u8 in_max[8]; /* Register value */
273 u8 in_min[8]; /* Register value */
9060f8bd 274 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD
275 u16 fan[5]; /* Register values, possibly combined */
276 u16 fan_min[5]; /* Register values, possibly combined */
e267d250
JD
277 s8 temp[3]; /* Register value */
278 s8 temp_high[3]; /* Register value */
279 s8 temp_low[3]; /* Register value */
1da177e4
LT
280 u8 sensor; /* Register value */
281 u8 fan_div[3]; /* Register encoding, shifted right */
282 u8 vid; /* Register encoding, combined */
a7be58a1 283 u8 vrm;
1da177e4 284 u32 alarms; /* Register encoding, combined */
d9b327c3 285 u8 beeps; /* Register encoding */
1da177e4 286 u8 fan_main_ctrl; /* Register value */
f8d0c19a 287 u8 fan_ctl; /* Register value */
b99883dc
JD
288
289 /* The following 3 arrays correspond to the same registers. The
290 * meaning of bits 6-0 depends on the value of bit 7, and we want
291 * to preserve settings on mode changes, so we have to track all
292 * values separately. */
293 u8 pwm_ctrl[3]; /* Register value */
294 u8 pwm_duty[3]; /* Manual PWM value set by user (bit 6-0) */
295 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
1da177e4
LT
296};
297
0475169c
AP
298static inline int has_16bit_fans(const struct it87_data *data)
299{
816d8c6a 300 /* IT8705F Datasheet 0.4.1, 3h == Version G.
859b9ef3 301 IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
816d8c6a
AP
302 These are the first revisions with 16bit tachometer support. */
303 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 304 || (data->type == it8712 && data->revision >= 0x08)
0475169c 305 || data->type == it8716
b4da93e4
JMS
306 || data->type == it8718
307 || data->type == it8720;
0475169c 308}
1da177e4 309
b74f3fdd 310static int it87_probe(struct platform_device *pdev);
d0546128 311static int __devexit it87_remove(struct platform_device *pdev);
1da177e4 312
b74f3fdd 313static int it87_read_value(struct it87_data *data, u8 reg);
314static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 315static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 316static int it87_check_pwm(struct device *dev);
317static void it87_init_device(struct platform_device *pdev);
1da177e4
LT
318
319
b74f3fdd 320static struct platform_driver it87_driver = {
cdaf7934 321 .driver = {
87218842 322 .owner = THIS_MODULE,
b74f3fdd 323 .name = DRVNAME,
cdaf7934 324 },
b74f3fdd 325 .probe = it87_probe,
326 .remove = __devexit_p(it87_remove),
fde09509
JD
327};
328
20ad93d4
JD
329static ssize_t show_in(struct device *dev, struct device_attribute *attr,
330 char *buf)
1da177e4 331{
20ad93d4
JD
332 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
333 int nr = sensor_attr->index;
334
1da177e4
LT
335 struct it87_data *data = it87_update_device(dev);
336 return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr]));
337}
338
20ad93d4
JD
339static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
340 char *buf)
1da177e4 341{
20ad93d4
JD
342 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
343 int nr = sensor_attr->index;
344
1da177e4
LT
345 struct it87_data *data = it87_update_device(dev);
346 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr]));
347}
348
20ad93d4
JD
349static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
350 char *buf)
1da177e4 351{
20ad93d4
JD
352 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
353 int nr = sensor_attr->index;
354
1da177e4
LT
355 struct it87_data *data = it87_update_device(dev);
356 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr]));
357}
358
20ad93d4
JD
359static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
360 const char *buf, size_t count)
1da177e4 361{
20ad93d4
JD
362 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
363 int nr = sensor_attr->index;
364
b74f3fdd 365 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
366 unsigned long val = simple_strtoul(buf, NULL, 10);
367
9a61bf63 368 mutex_lock(&data->update_lock);
1da177e4 369 data->in_min[nr] = IN_TO_REG(val);
b74f3fdd 370 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 371 data->in_min[nr]);
9a61bf63 372 mutex_unlock(&data->update_lock);
1da177e4
LT
373 return count;
374}
20ad93d4
JD
375static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
376 const char *buf, size_t count)
1da177e4 377{
20ad93d4
JD
378 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
379 int nr = sensor_attr->index;
380
b74f3fdd 381 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
382 unsigned long val = simple_strtoul(buf, NULL, 10);
383
9a61bf63 384 mutex_lock(&data->update_lock);
1da177e4 385 data->in_max[nr] = IN_TO_REG(val);
b74f3fdd 386 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 387 data->in_max[nr]);
9a61bf63 388 mutex_unlock(&data->update_lock);
1da177e4
LT
389 return count;
390}
391
392#define show_in_offset(offset) \
20ad93d4
JD
393static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
394 show_in, NULL, offset);
1da177e4
LT
395
396#define limit_in_offset(offset) \
20ad93d4
JD
397static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
398 show_in_min, set_in_min, offset); \
399static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
400 show_in_max, set_in_max, offset);
1da177e4
LT
401
402show_in_offset(0);
403limit_in_offset(0);
404show_in_offset(1);
405limit_in_offset(1);
406show_in_offset(2);
407limit_in_offset(2);
408show_in_offset(3);
409limit_in_offset(3);
410show_in_offset(4);
411limit_in_offset(4);
412show_in_offset(5);
413limit_in_offset(5);
414show_in_offset(6);
415limit_in_offset(6);
416show_in_offset(7);
417limit_in_offset(7);
418show_in_offset(8);
419
420/* 3 temperatures */
20ad93d4
JD
421static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
422 char *buf)
1da177e4 423{
20ad93d4
JD
424 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
425 int nr = sensor_attr->index;
426
1da177e4
LT
427 struct it87_data *data = it87_update_device(dev);
428 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
429}
20ad93d4
JD
430static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
431 char *buf)
1da177e4 432{
20ad93d4
JD
433 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
434 int nr = sensor_attr->index;
435
1da177e4
LT
436 struct it87_data *data = it87_update_device(dev);
437 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
438}
20ad93d4
JD
439static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
440 char *buf)
1da177e4 441{
20ad93d4
JD
442 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
443 int nr = sensor_attr->index;
444
1da177e4
LT
445 struct it87_data *data = it87_update_device(dev);
446 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
447}
20ad93d4
JD
448static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
449 const char *buf, size_t count)
1da177e4 450{
20ad93d4
JD
451 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
452 int nr = sensor_attr->index;
453
b74f3fdd 454 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
455 int val = simple_strtol(buf, NULL, 10);
456
9a61bf63 457 mutex_lock(&data->update_lock);
1da177e4 458 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 459 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 460 mutex_unlock(&data->update_lock);
1da177e4
LT
461 return count;
462}
20ad93d4
JD
463static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
464 const char *buf, size_t count)
1da177e4 465{
20ad93d4
JD
466 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
467 int nr = sensor_attr->index;
468
b74f3fdd 469 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
470 int val = simple_strtol(buf, NULL, 10);
471
9a61bf63 472 mutex_lock(&data->update_lock);
1da177e4 473 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 474 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 475 mutex_unlock(&data->update_lock);
1da177e4
LT
476 return count;
477}
478#define show_temp_offset(offset) \
20ad93d4
JD
479static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
480 show_temp, NULL, offset - 1); \
481static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
482 show_temp_max, set_temp_max, offset - 1); \
483static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
484 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT
485
486show_temp_offset(1);
487show_temp_offset(2);
488show_temp_offset(3);
489
20ad93d4
JD
490static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
491 char *buf)
1da177e4 492{
20ad93d4
JD
493 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
494 int nr = sensor_attr->index;
495
1da177e4
LT
496 struct it87_data *data = it87_update_device(dev);
497 u8 reg = data->sensor; /* In case the value is updated while we use it */
498
499 if (reg & (1 << nr))
500 return sprintf(buf, "3\n"); /* thermal diode */
501 if (reg & (8 << nr))
4ed10779 502 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT
503 return sprintf(buf, "0\n"); /* disabled */
504}
20ad93d4
JD
505static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
506 const char *buf, size_t count)
1da177e4 507{
20ad93d4
JD
508 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
509 int nr = sensor_attr->index;
510
b74f3fdd 511 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
512 int val = simple_strtol(buf, NULL, 10);
513
9a61bf63 514 mutex_lock(&data->update_lock);
1da177e4
LT
515
516 data->sensor &= ~(1 << nr);
517 data->sensor &= ~(8 << nr);
4ed10779
JD
518 if (val == 2) { /* backwards compatibility */
519 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
520 "instead\n");
521 val = 4;
522 }
523 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4
LT
524 if (val == 3)
525 data->sensor |= 1 << nr;
4ed10779 526 else if (val == 4)
1da177e4
LT
527 data->sensor |= 8 << nr;
528 else if (val != 0) {
9a61bf63 529 mutex_unlock(&data->update_lock);
1da177e4
LT
530 return -EINVAL;
531 }
b74f3fdd 532 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
9a61bf63 533 mutex_unlock(&data->update_lock);
1da177e4
LT
534 return count;
535}
536#define show_sensor_offset(offset) \
20ad93d4
JD
537static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
538 show_sensor, set_sensor, offset - 1);
1da177e4
LT
539
540show_sensor_offset(1);
541show_sensor_offset(2);
542show_sensor_offset(3);
543
544/* 3 Fans */
b99883dc
JD
545
546static int pwm_mode(const struct it87_data *data, int nr)
547{
548 int ctrl = data->fan_main_ctrl & (1 << nr);
549
550 if (ctrl == 0) /* Full speed */
551 return 0;
552 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
553 return 2;
554 else /* Manual mode */
555 return 1;
556}
557
20ad93d4
JD
558static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
559 char *buf)
1da177e4 560{
20ad93d4
JD
561 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
562 int nr = sensor_attr->index;
563
1da177e4
LT
564 struct it87_data *data = it87_update_device(dev);
565 return sprintf(buf,"%d\n", FAN_FROM_REG(data->fan[nr],
566 DIV_FROM_REG(data->fan_div[nr])));
567}
20ad93d4
JD
568static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
569 char *buf)
1da177e4 570{
20ad93d4
JD
571 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
572 int nr = sensor_attr->index;
573
1da177e4
LT
574 struct it87_data *data = it87_update_device(dev);
575 return sprintf(buf,"%d\n",
576 FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])));
577}
20ad93d4
JD
578static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
579 char *buf)
1da177e4 580{
20ad93d4
JD
581 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
582 int nr = sensor_attr->index;
583
1da177e4
LT
584 struct it87_data *data = it87_update_device(dev);
585 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
586}
20ad93d4
JD
587static ssize_t show_pwm_enable(struct device *dev, struct device_attribute *attr,
588 char *buf)
1da177e4 589{
20ad93d4
JD
590 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
591 int nr = sensor_attr->index;
592
1da177e4 593 struct it87_data *data = it87_update_device(dev);
b99883dc 594 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 595}
20ad93d4
JD
596static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
597 char *buf)
1da177e4 598{
20ad93d4
JD
599 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
600 int nr = sensor_attr->index;
601
1da177e4 602 struct it87_data *data = it87_update_device(dev);
b99883dc 603 return sprintf(buf, "%d\n", PWM_FROM_REG(data->pwm_duty[nr]));
1da177e4 604}
f8d0c19a
JD
605static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
606 char *buf)
607{
608 struct it87_data *data = it87_update_device(dev);
609 int index = (data->fan_ctl >> 4) & 0x07;
610
611 return sprintf(buf, "%u\n", pwm_freq[index]);
612}
20ad93d4
JD
613static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
614 const char *buf, size_t count)
1da177e4 615{
20ad93d4
JD
616 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
617 int nr = sensor_attr->index;
618
b74f3fdd 619 struct it87_data *data = dev_get_drvdata(dev);
1da177e4 620 int val = simple_strtol(buf, NULL, 10);
7f999aa7 621 u8 reg;
1da177e4 622
9a61bf63 623 mutex_lock(&data->update_lock);
b74f3fdd 624 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d
JD
625 switch (nr) {
626 case 0: data->fan_div[nr] = reg & 0x07; break;
627 case 1: data->fan_div[nr] = (reg >> 3) & 0x07; break;
628 case 2: data->fan_div[nr] = (reg & 0x40) ? 3 : 1; break;
629 }
630
1da177e4 631 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 632 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 633 mutex_unlock(&data->update_lock);
1da177e4
LT
634 return count;
635}
20ad93d4
JD
636static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
637 const char *buf, size_t count)
1da177e4 638{
20ad93d4
JD
639 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
640 int nr = sensor_attr->index;
641
b74f3fdd 642 struct it87_data *data = dev_get_drvdata(dev);
b9e349f7 643 unsigned long val = simple_strtoul(buf, NULL, 10);
8ab4ec3e 644 int min;
1da177e4
LT
645 u8 old;
646
9a61bf63 647 mutex_lock(&data->update_lock);
b74f3fdd 648 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 649
8ab4ec3e
JD
650 /* Save fan min limit */
651 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT
652
653 switch (nr) {
654 case 0:
655 case 1:
656 data->fan_div[nr] = DIV_TO_REG(val);
657 break;
658 case 2:
659 if (val < 8)
660 data->fan_div[nr] = 1;
661 else
662 data->fan_div[nr] = 3;
663 }
664 val = old & 0x80;
665 val |= (data->fan_div[0] & 0x07);
666 val |= (data->fan_div[1] & 0x07) << 3;
667 if (data->fan_div[2] == 3)
668 val |= 0x1 << 6;
b74f3fdd 669 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 670
8ab4ec3e
JD
671 /* Restore fan min limit */
672 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 673 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 674
9a61bf63 675 mutex_unlock(&data->update_lock);
1da177e4
LT
676 return count;
677}
20ad93d4
JD
678static ssize_t set_pwm_enable(struct device *dev,
679 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 680{
20ad93d4
JD
681 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
682 int nr = sensor_attr->index;
683
b74f3fdd 684 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
685 int val = simple_strtol(buf, NULL, 10);
686
b99883dc
JD
687 if (val < 0 || val > 2)
688 return -EINVAL;
689
9a61bf63 690 mutex_lock(&data->update_lock);
1da177e4
LT
691
692 if (val == 0) {
693 int tmp;
694 /* make sure the fan is on when in on/off mode */
b74f3fdd 695 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
696 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT
697 /* set on/off mode */
698 data->fan_main_ctrl &= ~(1 << nr);
b74f3fdd 699 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
b99883dc
JD
700 } else {
701 if (val == 1) /* Manual mode */
702 data->pwm_ctrl[nr] = data->pwm_duty[nr];
703 else /* Automatic mode */
704 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
705 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT
706 /* set SmartGuardian mode */
707 data->fan_main_ctrl |= (1 << nr);
b74f3fdd 708 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1da177e4
LT
709 }
710
9a61bf63 711 mutex_unlock(&data->update_lock);
1da177e4
LT
712 return count;
713}
20ad93d4
JD
714static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
715 const char *buf, size_t count)
1da177e4 716{
20ad93d4
JD
717 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
718 int nr = sensor_attr->index;
719
b74f3fdd 720 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
721 int val = simple_strtol(buf, NULL, 10);
722
723 if (val < 0 || val > 255)
724 return -EINVAL;
725
9a61bf63 726 mutex_lock(&data->update_lock);
b99883dc
JD
727 data->pwm_duty[nr] = PWM_TO_REG(val);
728 /* If we are in manual mode, write the duty cycle immediately;
729 * otherwise, just store it for later use. */
730 if (!(data->pwm_ctrl[nr] & 0x80)) {
731 data->pwm_ctrl[nr] = data->pwm_duty[nr];
732 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
733 }
9a61bf63 734 mutex_unlock(&data->update_lock);
1da177e4
LT
735 return count;
736}
f8d0c19a
JD
737static ssize_t set_pwm_freq(struct device *dev,
738 struct device_attribute *attr, const char *buf, size_t count)
739{
b74f3fdd 740 struct it87_data *data = dev_get_drvdata(dev);
f8d0c19a
JD
741 unsigned long val = simple_strtoul(buf, NULL, 10);
742 int i;
743
744 /* Search for the nearest available frequency */
745 for (i = 0; i < 7; i++) {
746 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
747 break;
748 }
749
750 mutex_lock(&data->update_lock);
b74f3fdd 751 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 752 data->fan_ctl |= i << 4;
b74f3fdd 753 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD
754 mutex_unlock(&data->update_lock);
755
756 return count;
757}
94ac7ee6
JD
758static ssize_t show_pwm_temp_map(struct device *dev,
759 struct device_attribute *attr, char *buf)
760{
761 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
762 int nr = sensor_attr->index;
763
764 struct it87_data *data = it87_update_device(dev);
765 int map;
766
767 if (data->pwm_temp_map[nr] < 3)
768 map = 1 << data->pwm_temp_map[nr];
769 else
770 map = 0; /* Should never happen */
771 return sprintf(buf, "%d\n", map);
772}
773static ssize_t set_pwm_temp_map(struct device *dev,
774 struct device_attribute *attr, const char *buf, size_t count)
775{
776 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
777 int nr = sensor_attr->index;
778
779 struct it87_data *data = dev_get_drvdata(dev);
780 long val;
781 u8 reg;
782
783 if (strict_strtol(buf, 10, &val) < 0)
784 return -EINVAL;
785
786 switch (val) {
787 case (1 << 0):
788 reg = 0x00;
789 break;
790 case (1 << 1):
791 reg = 0x01;
792 break;
793 case (1 << 2):
794 reg = 0x02;
795 break;
796 default:
797 return -EINVAL;
798 }
799
800 mutex_lock(&data->update_lock);
801 data->pwm_temp_map[nr] = reg;
802 /* If we are in automatic mode, write the temp mapping immediately;
803 * otherwise, just store it for later use. */
804 if (data->pwm_ctrl[nr] & 0x80) {
805 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
806 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
807 }
808 mutex_unlock(&data->update_lock);
809 return count;
810}
1da177e4 811
20ad93d4
JD
812#define show_fan_offset(offset) \
813static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
814 show_fan, NULL, offset - 1); \
815static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
816 show_fan_min, set_fan_min, offset - 1); \
817static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
818 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT
819
820show_fan_offset(1);
821show_fan_offset(2);
822show_fan_offset(3);
823
824#define show_pwm_offset(offset) \
20ad93d4
JD
825static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
826 show_pwm_enable, set_pwm_enable, offset - 1); \
827static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD
828 show_pwm, set_pwm, offset - 1); \
829static DEVICE_ATTR(pwm##offset##_freq, \
830 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD
831 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
832static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
833 S_IRUGO, show_pwm_temp_map, set_pwm_temp_map, \
834 offset - 1);
1da177e4
LT
835
836show_pwm_offset(1);
837show_pwm_offset(2);
838show_pwm_offset(3);
839
17d648bf
JD
840/* A different set of callbacks for 16-bit fans */
841static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
842 char *buf)
843{
844 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
845 int nr = sensor_attr->index;
846 struct it87_data *data = it87_update_device(dev);
847 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
848}
849
850static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
851 char *buf)
852{
853 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
854 int nr = sensor_attr->index;
855 struct it87_data *data = it87_update_device(dev);
856 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
857}
858
859static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
860 const char *buf, size_t count)
861{
862 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
863 int nr = sensor_attr->index;
b74f3fdd 864 struct it87_data *data = dev_get_drvdata(dev);
17d648bf
JD
865 int val = simple_strtol(buf, NULL, 10);
866
867 mutex_lock(&data->update_lock);
868 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 869 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 870 data->fan_min[nr] & 0xff);
c7f1f716 871 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD
872 data->fan_min[nr] >> 8);
873 mutex_unlock(&data->update_lock);
874 return count;
875}
876
877/* We want to use the same sysfs file names as 8-bit fans, but we need
878 different variable names, so we have to use SENSOR_ATTR instead of
879 SENSOR_DEVICE_ATTR. */
880#define show_fan16_offset(offset) \
881static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
882 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
883 show_fan16, NULL, offset - 1); \
884static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
885 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
886 show_fan16_min, set_fan16_min, offset - 1)
887
888show_fan16_offset(1);
889show_fan16_offset(2);
890show_fan16_offset(3);
c7f1f716
JD
891show_fan16_offset(4);
892show_fan16_offset(5);
17d648bf 893
1da177e4 894/* Alarms */
30f74292 895static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
896{
897 struct it87_data *data = it87_update_device(dev);
68188ba7 898 return sprintf(buf, "%u\n", data->alarms);
1da177e4 899}
1d66c64c 900static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 901
0124dd78
JD
902static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
903 char *buf)
904{
905 int bitnr = to_sensor_dev_attr(attr)->index;
906 struct it87_data *data = it87_update_device(dev);
907 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
908}
909static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
910static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
911static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
912static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
913static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
914static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
915static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
916static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
917static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
918static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
919static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
920static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
921static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
922static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
923static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
924static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
925
d9b327c3
JD
926static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
927 char *buf)
928{
929 int bitnr = to_sensor_dev_attr(attr)->index;
930 struct it87_data *data = it87_update_device(dev);
931 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
932}
933static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
934 const char *buf, size_t count)
935{
936 int bitnr = to_sensor_dev_attr(attr)->index;
937 struct it87_data *data = dev_get_drvdata(dev);
938 long val;
939
940 if (strict_strtol(buf, 10, &val) < 0
941 || (val != 0 && val != 1))
942 return -EINVAL;
943
944 mutex_lock(&data->update_lock);
945 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
946 if (val)
947 data->beeps |= (1 << bitnr);
948 else
949 data->beeps &= ~(1 << bitnr);
950 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
951 mutex_unlock(&data->update_lock);
952 return count;
953}
954
955static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
956 show_beep, set_beep, 1);
957static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
958static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
959static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
960static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
961static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
962static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
963static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
964/* fanX_beep writability is set later */
965static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
966static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
967static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
968static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
969static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
970static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
971 show_beep, set_beep, 2);
972static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
973static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
974
1da177e4 975static ssize_t
30f74292 976show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 977{
90d6619a 978 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 979 return sprintf(buf, "%u\n", data->vrm);
1da177e4
LT
980}
981static ssize_t
30f74292 982store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 983{
b74f3fdd 984 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
985 u32 val;
986
987 val = simple_strtoul(buf, NULL, 10);
988 data->vrm = val;
989
990 return count;
991}
992static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4
LT
993
994static ssize_t
30f74292 995show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
996{
997 struct it87_data *data = it87_update_device(dev);
998 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
999}
1000static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1001
b74f3fdd 1002static ssize_t show_name(struct device *dev, struct device_attribute
1003 *devattr, char *buf)
1004{
1005 struct it87_data *data = dev_get_drvdata(dev);
1006 return sprintf(buf, "%s\n", data->name);
1007}
1008static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1009
87808be4
JD
1010static struct attribute *it87_attributes[] = {
1011 &sensor_dev_attr_in0_input.dev_attr.attr,
1012 &sensor_dev_attr_in1_input.dev_attr.attr,
1013 &sensor_dev_attr_in2_input.dev_attr.attr,
1014 &sensor_dev_attr_in3_input.dev_attr.attr,
1015 &sensor_dev_attr_in4_input.dev_attr.attr,
1016 &sensor_dev_attr_in5_input.dev_attr.attr,
1017 &sensor_dev_attr_in6_input.dev_attr.attr,
1018 &sensor_dev_attr_in7_input.dev_attr.attr,
1019 &sensor_dev_attr_in8_input.dev_attr.attr,
1020 &sensor_dev_attr_in0_min.dev_attr.attr,
1021 &sensor_dev_attr_in1_min.dev_attr.attr,
1022 &sensor_dev_attr_in2_min.dev_attr.attr,
1023 &sensor_dev_attr_in3_min.dev_attr.attr,
1024 &sensor_dev_attr_in4_min.dev_attr.attr,
1025 &sensor_dev_attr_in5_min.dev_attr.attr,
1026 &sensor_dev_attr_in6_min.dev_attr.attr,
1027 &sensor_dev_attr_in7_min.dev_attr.attr,
1028 &sensor_dev_attr_in0_max.dev_attr.attr,
1029 &sensor_dev_attr_in1_max.dev_attr.attr,
1030 &sensor_dev_attr_in2_max.dev_attr.attr,
1031 &sensor_dev_attr_in3_max.dev_attr.attr,
1032 &sensor_dev_attr_in4_max.dev_attr.attr,
1033 &sensor_dev_attr_in5_max.dev_attr.attr,
1034 &sensor_dev_attr_in6_max.dev_attr.attr,
1035 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78
JD
1036 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1037 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1038 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1039 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1040 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1041 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1042 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1043 &sensor_dev_attr_in7_alarm.dev_attr.attr,
87808be4
JD
1044
1045 &sensor_dev_attr_temp1_input.dev_attr.attr,
1046 &sensor_dev_attr_temp2_input.dev_attr.attr,
1047 &sensor_dev_attr_temp3_input.dev_attr.attr,
1048 &sensor_dev_attr_temp1_max.dev_attr.attr,
1049 &sensor_dev_attr_temp2_max.dev_attr.attr,
1050 &sensor_dev_attr_temp3_max.dev_attr.attr,
1051 &sensor_dev_attr_temp1_min.dev_attr.attr,
1052 &sensor_dev_attr_temp2_min.dev_attr.attr,
1053 &sensor_dev_attr_temp3_min.dev_attr.attr,
1054 &sensor_dev_attr_temp1_type.dev_attr.attr,
1055 &sensor_dev_attr_temp2_type.dev_attr.attr,
1056 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78
JD
1057 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1058 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1059 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
87808be4
JD
1060
1061 &dev_attr_alarms.attr,
b74f3fdd 1062 &dev_attr_name.attr,
87808be4
JD
1063 NULL
1064};
1065
1066static const struct attribute_group it87_group = {
1067 .attrs = it87_attributes,
1068};
1069
d9b327c3
JD
1070static struct attribute *it87_attributes_beep[] = {
1071 &sensor_dev_attr_in0_beep.dev_attr.attr,
1072 &sensor_dev_attr_in1_beep.dev_attr.attr,
1073 &sensor_dev_attr_in2_beep.dev_attr.attr,
1074 &sensor_dev_attr_in3_beep.dev_attr.attr,
1075 &sensor_dev_attr_in4_beep.dev_attr.attr,
1076 &sensor_dev_attr_in5_beep.dev_attr.attr,
1077 &sensor_dev_attr_in6_beep.dev_attr.attr,
1078 &sensor_dev_attr_in7_beep.dev_attr.attr,
1079
1080 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1081 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1082 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1083 NULL
1084};
1085
1086static const struct attribute_group it87_group_beep = {
1087 .attrs = it87_attributes_beep,
1088};
1089
723a0aa0 1090static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD
1091 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1092 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD
1093 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1094 NULL
1095}, {
87808be4
JD
1096 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1097 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD
1098 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1099 NULL
1100}, {
87808be4
JD
1101 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1102 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD
1103 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1104 NULL
1105}, {
c7f1f716
JD
1106 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1107 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD
1108 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1109 NULL
1110}, {
c7f1f716
JD
1111 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1112 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD
1113 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1114 NULL
1115} };
1116
1117static const struct attribute_group it87_group_fan16[5] = {
1118 { .attrs = it87_attributes_fan16[0] },
1119 { .attrs = it87_attributes_fan16[1] },
1120 { .attrs = it87_attributes_fan16[2] },
1121 { .attrs = it87_attributes_fan16[3] },
1122 { .attrs = it87_attributes_fan16[4] },
1123};
87808be4 1124
723a0aa0 1125static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD
1126 &sensor_dev_attr_fan1_input.dev_attr.attr,
1127 &sensor_dev_attr_fan1_min.dev_attr.attr,
1128 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD
1129 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1130 NULL
1131}, {
87808be4
JD
1132 &sensor_dev_attr_fan2_input.dev_attr.attr,
1133 &sensor_dev_attr_fan2_min.dev_attr.attr,
1134 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD
1135 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1136 NULL
1137}, {
87808be4
JD
1138 &sensor_dev_attr_fan3_input.dev_attr.attr,
1139 &sensor_dev_attr_fan3_min.dev_attr.attr,
1140 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1141 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD
1142 NULL
1143} };
1144
1145static const struct attribute_group it87_group_fan[3] = {
1146 { .attrs = it87_attributes_fan[0] },
1147 { .attrs = it87_attributes_fan[1] },
1148 { .attrs = it87_attributes_fan[2] },
1149};
1150
1151static const struct attribute_group *
1152it87_get_fan_group(const struct it87_data *data)
1153{
1154 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1155}
0124dd78 1156
723a0aa0 1157static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1158 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1159 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1160 &dev_attr_pwm1_freq.attr,
94ac7ee6 1161 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1162 NULL
1163}, {
1164 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1165 &sensor_dev_attr_pwm2.dev_attr.attr,
1166 &dev_attr_pwm2_freq.attr,
94ac7ee6 1167 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1168 NULL
1169}, {
1170 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1171 &sensor_dev_attr_pwm3.dev_attr.attr,
1172 &dev_attr_pwm3_freq.attr,
94ac7ee6 1173 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1174 NULL
1175} };
87808be4 1176
723a0aa0
JD
1177static const struct attribute_group it87_group_pwm[3] = {
1178 { .attrs = it87_attributes_pwm[0] },
1179 { .attrs = it87_attributes_pwm[1] },
1180 { .attrs = it87_attributes_pwm[2] },
1181};
1182
d9b327c3
JD
1183static struct attribute *it87_attributes_fan_beep[] = {
1184 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1185 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1186 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1187 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1188 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1189};
1190
6a8d7acf 1191static struct attribute *it87_attributes_vid[] = {
87808be4
JD
1192 &dev_attr_vrm.attr,
1193 &dev_attr_cpu0_vid.attr,
1194 NULL
1195};
1196
6a8d7acf
JD
1197static const struct attribute_group it87_group_vid = {
1198 .attrs = it87_attributes_vid,
87808be4 1199};
1da177e4 1200
2d8672c5 1201/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1202static int __init it87_find(unsigned short *address,
1203 struct it87_sio_data *sio_data)
1da177e4
LT
1204{
1205 int err = -ENODEV;
b74f3fdd 1206 u16 chip_type;
98dd22c3 1207 const char *board_vendor, *board_name;
1da177e4
LT
1208
1209 superio_enter();
67b671bc 1210 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1211
1212 switch (chip_type) {
1213 case IT8705F_DEVID:
1214 sio_data->type = it87;
1215 break;
1216 case IT8712F_DEVID:
1217 sio_data->type = it8712;
1218 break;
1219 case IT8716F_DEVID:
1220 case IT8726F_DEVID:
1221 sio_data->type = it8716;
1222 break;
1223 case IT8718F_DEVID:
1224 sio_data->type = it8718;
1225 break;
b4da93e4
JMS
1226 case IT8720F_DEVID:
1227 sio_data->type = it8720;
1228 break;
b74f3fdd 1229 case 0xffff: /* No device at all */
1230 goto exit;
1231 default:
1232 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%x)\n",
1233 chip_type);
1234 goto exit;
1235 }
1da177e4 1236
87673dd7 1237 superio_select(PME);
1da177e4
LT
1238 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
1239 pr_info("it87: Device not activated, skipping\n");
1240 goto exit;
1241 }
1242
1243 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1244 if (*address == 0) {
1245 pr_info("it87: Base address not set, skipping\n");
1246 goto exit;
1247 }
1248
1249 err = 0;
0475169c 1250 sio_data->revision = superio_inb(DEVREV) & 0x0f;
1da177e4 1251 pr_info("it87: Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1252 chip_type, *address, sio_data->revision);
1da177e4 1253
87673dd7 1254 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD
1255 if (sio_data->type == it87) {
1256 /* The IT8705F doesn't have VID pins at all */
1257 sio_data->skip_vid = 1;
d9b327c3
JD
1258
1259 /* The IT8705F has a different LD number for GPIO */
1260 superio_select(5);
1261 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
895ff267 1262 } else {
87673dd7
JD
1263 int reg;
1264
1265 superio_select(GPIO);
895ff267
JD
1266 /* We need at least 4 VID pins */
1267 reg = superio_inb(IT87_SIO_GPIO3_REG);
1268 if (reg & 0x0f) {
1269 pr_info("it87: VID is disabled (pins used for GPIO)\n");
1270 sio_data->skip_vid = 1;
1271 }
1272
591ec650
JD
1273 /* Check if fan3 is there or not */
1274 if (reg & (1 << 6))
1275 sio_data->skip_pwm |= (1 << 2);
1276 if (reg & (1 << 7))
1277 sio_data->skip_fan |= (1 << 2);
1278
1279 /* Check if fan2 is there or not */
1280 reg = superio_inb(IT87_SIO_GPIO5_REG);
1281 if (reg & (1 << 1))
1282 sio_data->skip_pwm |= (1 << 1);
1283 if (reg & (1 << 2))
1284 sio_data->skip_fan |= (1 << 1);
1285
895ff267
JD
1286 if ((sio_data->type == it8718 || sio_data->type == it8720)
1287 && !(sio_data->skip_vid))
b74f3fdd 1288 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD
1289
1290 reg = superio_inb(IT87_SIO_PINX2_REG);
1291 if (reg & (1 << 0))
1292 pr_info("it87: in3 is VCC (+5V)\n");
1293 if (reg & (1 << 1))
1294 pr_info("it87: in7 is VCCH (+5V Stand-By)\n");
d9b327c3
JD
1295
1296 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1297 }
d9b327c3
JD
1298 if (sio_data->beep_pin)
1299 pr_info("it87: Beeping is supported\n");
87673dd7 1300
98dd22c3
JD
1301 /* Disable specific features based on DMI strings */
1302 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1303 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1304 if (board_vendor && board_name) {
1305 if (strcmp(board_vendor, "nVIDIA") == 0
1306 && strcmp(board_name, "FN68PT") == 0) {
1307 /* On the Shuttle SN68PT, FAN_CTL2 is apparently not
1308 connected to a fan, but to something else. One user
1309 has reported instant system power-off when changing
1310 the PWM2 duty cycle, so we disable it.
1311 I use the board name string as the trigger in case
1312 the same board is ever used in other systems. */
1313 pr_info("it87: Disabling pwm2 due to "
1314 "hardware constraints\n");
1315 sio_data->skip_pwm = (1 << 1);
1316 }
1317 }
1318
1da177e4
LT
1319exit:
1320 superio_exit();
1321 return err;
1322}
1323
723a0aa0
JD
1324static void it87_remove_files(struct device *dev)
1325{
1326 struct it87_data *data = platform_get_drvdata(pdev);
1327 struct it87_sio_data *sio_data = dev->platform_data;
1328 const struct attribute_group *fan_group = it87_get_fan_group(data);
1329 int i;
1330
1331 sysfs_remove_group(&dev->kobj, &it87_group);
d9b327c3
JD
1332 if (sio_data->beep_pin)
1333 sysfs_remove_group(&dev->kobj, &it87_group_beep);
723a0aa0
JD
1334 for (i = 0; i < 5; i++) {
1335 if (!(data->has_fan & (1 << i)))
1336 continue;
1337 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD
1338 if (sio_data->beep_pin)
1339 sysfs_remove_file(&dev->kobj,
1340 it87_attributes_fan_beep[i]);
723a0aa0
JD
1341 }
1342 for (i = 0; i < 3; i++) {
1343 if (sio_data->skip_pwm & (1 << 0))
1344 continue;
1345 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
1346 }
6a8d7acf
JD
1347 if (!sio_data->skip_vid)
1348 sysfs_remove_group(&dev->kobj, &it87_group_vid);
723a0aa0
JD
1349}
1350
b74f3fdd 1351static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 1352{
1da177e4 1353 struct it87_data *data;
b74f3fdd 1354 struct resource *res;
1355 struct device *dev = &pdev->dev;
1356 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD
1357 const struct attribute_group *fan_group;
1358 int err = 0, i;
1da177e4 1359 int enable_pwm_interface;
d9b327c3 1360 int fan_beep_need_rw;
b74f3fdd 1361 static const char *names[] = {
1362 "it87",
1363 "it8712",
1364 "it8716",
1365 "it8718",
b4da93e4 1366 "it8720",
b74f3fdd 1367 };
1368
1369 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
87b4b663 1370 if (!request_region(res->start, IT87_EC_EXTENT, DRVNAME)) {
b74f3fdd 1371 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1372 (unsigned long)res->start,
87b4b663 1373 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
8e9afcbb
JD
1374 err = -EBUSY;
1375 goto ERROR0;
1376 }
1da177e4 1377
ba9c2e8d 1378 if (!(data = kzalloc(sizeof(struct it87_data), GFP_KERNEL))) {
1da177e4
LT
1379 err = -ENOMEM;
1380 goto ERROR1;
1381 }
1da177e4 1382
b74f3fdd 1383 data->addr = res->start;
1384 data->type = sio_data->type;
0475169c 1385 data->revision = sio_data->revision;
b74f3fdd 1386 data->name = names[sio_data->type];
1da177e4
LT
1387
1388 /* Now, we do the remaining detection. */
b74f3fdd 1389 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
1390 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
8e9afcbb
JD
1391 err = -ENODEV;
1392 goto ERROR2;
1da177e4
LT
1393 }
1394
b74f3fdd 1395 platform_set_drvdata(pdev, data);
1da177e4 1396
9a61bf63 1397 mutex_init(&data->update_lock);
1da177e4 1398
1da177e4 1399 /* Check PWM configuration */
b74f3fdd 1400 enable_pwm_interface = it87_check_pwm(dev);
1da177e4
LT
1401
1402 /* Initialize the IT87 chip */
b74f3fdd 1403 it87_init_device(pdev);
1da177e4
LT
1404
1405 /* Register sysfs hooks */
b74f3fdd 1406 if ((err = sysfs_create_group(&dev->kobj, &it87_group)))
1407 goto ERROR2;
17d648bf 1408
d9b327c3
JD
1409 if (sio_data->beep_pin) {
1410 err = sysfs_create_group(&dev->kobj, &it87_group_beep);
1411 if (err)
1412 goto ERROR4;
1413 }
1414
9060f8bd 1415 /* Do not create fan files for disabled fans */
723a0aa0 1416 fan_group = it87_get_fan_group(data);
d9b327c3 1417 fan_beep_need_rw = 1;
723a0aa0
JD
1418 for (i = 0; i < 5; i++) {
1419 if (!(data->has_fan & (1 << i)))
1420 continue;
1421 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
1422 if (err)
1423 goto ERROR4;
d9b327c3
JD
1424
1425 if (sio_data->beep_pin) {
1426 err = sysfs_create_file(&dev->kobj,
1427 it87_attributes_fan_beep[i]);
1428 if (err)
1429 goto ERROR4;
1430 if (!fan_beep_need_rw)
1431 continue;
1432
1433 /* As we have a single beep enable bit for all fans,
1434 * only the first enabled fan has a writable attribute
1435 * for it. */
1436 if (sysfs_chmod_file(&dev->kobj,
1437 it87_attributes_fan_beep[i],
1438 S_IRUGO | S_IWUSR))
1439 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
1440 i + 1);
1441 fan_beep_need_rw = 0;
1442 }
17d648bf
JD
1443 }
1444
1da177e4 1445 if (enable_pwm_interface) {
723a0aa0
JD
1446 for (i = 0; i < 3; i++) {
1447 if (sio_data->skip_pwm & (1 << i))
1448 continue;
1449 err = sysfs_create_group(&dev->kobj,
1450 &it87_group_pwm[i]);
1451 if (err)
98dd22c3
JD
1452 goto ERROR4;
1453 }
1da177e4
LT
1454 }
1455
895ff267 1456 if (!sio_data->skip_vid) {
303760b4 1457 data->vrm = vid_which_vrm();
87673dd7 1458 /* VID reading from Super-I/O config space if available */
b74f3fdd 1459 data->vid = sio_data->vid_value;
6a8d7acf
JD
1460 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
1461 if (err)
87808be4
JD
1462 goto ERROR4;
1463 }
1464
1beeffe4
TJ
1465 data->hwmon_dev = hwmon_device_register(dev);
1466 if (IS_ERR(data->hwmon_dev)) {
1467 err = PTR_ERR(data->hwmon_dev);
87808be4 1468 goto ERROR4;
1da177e4
LT
1469 }
1470
1471 return 0;
1472
87808be4 1473ERROR4:
723a0aa0 1474 it87_remove_files(dev);
1da177e4 1475ERROR2:
b74f3fdd 1476 platform_set_drvdata(pdev, NULL);
1da177e4
LT
1477 kfree(data);
1478ERROR1:
87b4b663 1479 release_region(res->start, IT87_EC_EXTENT);
1da177e4
LT
1480ERROR0:
1481 return err;
1482}
1483
b74f3fdd 1484static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 1485{
b74f3fdd 1486 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1487
1beeffe4 1488 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 1489 it87_remove_files(&pdev->dev);
943b0830 1490
87b4b663 1491 release_region(data->addr, IT87_EC_EXTENT);
b74f3fdd 1492 platform_set_drvdata(pdev, NULL);
943b0830 1493 kfree(data);
1da177e4
LT
1494
1495 return 0;
1496}
1497
7f999aa7 1498/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT
1499 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1500 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1501static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 1502{
b74f3fdd 1503 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1504 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
1505}
1506
7f999aa7 1507/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT
1508 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1509 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1510static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 1511{
b74f3fdd 1512 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1513 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
1514}
1515
1516/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 1517static int __devinit it87_check_pwm(struct device *dev)
1da177e4 1518{
b74f3fdd 1519 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
1520 /* Some BIOSes fail to correctly configure the IT87 fans. All fans off
1521 * and polarity set to active low is sign that this is the case so we
1522 * disable pwm control to protect the user. */
b74f3fdd 1523 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT
1524 if ((tmp & 0x87) == 0) {
1525 if (fix_pwm_polarity) {
1526 /* The user asks us to attempt a chip reconfiguration.
1527 * This means switching to active high polarity and
1528 * inverting all fan speed values. */
1529 int i;
1530 u8 pwm[3];
1531
1532 for (i = 0; i < 3; i++)
b74f3fdd 1533 pwm[i] = it87_read_value(data,
1da177e4
LT
1534 IT87_REG_PWM(i));
1535
1536 /* If any fan is in automatic pwm mode, the polarity
1537 * might be correct, as suspicious as it seems, so we
1538 * better don't change anything (but still disable the
1539 * PWM interface). */
1540 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 1541 dev_info(dev, "Reconfiguring PWM to "
1da177e4 1542 "active high polarity\n");
b74f3fdd 1543 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT
1544 tmp | 0x87);
1545 for (i = 0; i < 3; i++)
b74f3fdd 1546 it87_write_value(data,
1da177e4
LT
1547 IT87_REG_PWM(i),
1548 0x7f & ~pwm[i]);
1549 return 1;
1550 }
1551
b74f3fdd 1552 dev_info(dev, "PWM configuration is "
1da177e4
LT
1553 "too broken to be fixed\n");
1554 }
1555
b74f3fdd 1556 dev_info(dev, "Detected broken BIOS "
1da177e4
LT
1557 "defaults, disabling PWM interface\n");
1558 return 0;
1559 } else if (fix_pwm_polarity) {
b74f3fdd 1560 dev_info(dev, "PWM configuration looks "
1da177e4
LT
1561 "sane, won't touch\n");
1562 }
1563
1564 return 1;
1565}
1566
1567/* Called when we have found a new IT87. */
b74f3fdd 1568static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 1569{
591ec650 1570 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 1571 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1572 int tmp, i;
591ec650 1573 u8 mask;
1da177e4 1574
b99883dc
JD
1575 /* For each PWM channel:
1576 * - If it is in automatic mode, setting to manual mode should set
1577 * the fan to full speed by default.
1578 * - If it is in manual mode, we need a mapping to temperature
1579 * channels to use when later setting to automatic mode later.
1580 * Use a 1:1 mapping by default (we are clueless.)
1581 * In both cases, the value can (and should) be changed by the user
1582 * prior to switching to a different mode. */
1da177e4 1583 for (i = 0; i < 3; i++) {
b99883dc
JD
1584 data->pwm_temp_map[i] = i;
1585 data->pwm_duty[i] = 0x7f; /* Full speed */
1da177e4
LT
1586 }
1587
c5df9b7a
JD
1588 /* Some chips seem to have default value 0xff for all limit
1589 * registers. For low voltage limits it makes no sense and triggers
1590 * alarms, so change to 0 instead. For high temperature limits, it
1591 * means -1 degree C, which surprisingly doesn't trigger an alarm,
1592 * but is still confusing, so change to 127 degrees C. */
1593 for (i = 0; i < 8; i++) {
b74f3fdd 1594 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 1595 if (tmp == 0xff)
b74f3fdd 1596 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD
1597 }
1598 for (i = 0; i < 3; i++) {
b74f3fdd 1599 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 1600 if (tmp == 0xff)
b74f3fdd 1601 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD
1602 }
1603
77fa49d9 1604 /* Check if temperature channels are reset manually or by some reason */
b74f3fdd 1605 tmp = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1da177e4
LT
1606 if ((tmp & 0x3f) == 0) {
1607 /* Temp1,Temp3=thermistor; Temp2=thermal diode */
1608 tmp = (tmp & 0xc0) | 0x2a;
b74f3fdd 1609 it87_write_value(data, IT87_REG_TEMP_ENABLE, tmp);
1da177e4
LT
1610 }
1611 data->sensor = tmp;
1612
1613 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 1614 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT
1615 if ((tmp & 0xff) == 0) {
1616 /* Enable all voltage monitors */
b74f3fdd 1617 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT
1618 }
1619
1620 /* Check if tachometers are reset manually or by some reason */
591ec650 1621 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 1622 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 1623 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 1624 /* Enable all fan tachometers */
591ec650 1625 data->fan_main_ctrl |= mask;
b74f3fdd 1626 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1da177e4 1627 }
9060f8bd 1628 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 1629
17d648bf 1630 /* Set tachometers to 16-bit mode if needed */
0475169c 1631 if (has_16bit_fans(data)) {
b74f3fdd 1632 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 1633 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 1634 dev_dbg(&pdev->dev,
17d648bf 1635 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 1636 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD
1637 tmp | 0x07);
1638 }
816d8c6a
AP
1639 /* IT8705F only supports three fans. */
1640 if (data->type != it87) {
1641 if (tmp & (1 << 4))
1642 data->has_fan |= (1 << 3); /* fan4 enabled */
1643 if (tmp & (1 << 5))
1644 data->has_fan |= (1 << 4); /* fan5 enabled */
1645 }
17d648bf
JD
1646 }
1647
591ec650
JD
1648 /* Fan input pins may be used for alternative functions */
1649 data->has_fan &= ~sio_data->skip_fan;
1650
1da177e4 1651 /* Start monitoring */
b74f3fdd 1652 it87_write_value(data, IT87_REG_CONFIG,
1653 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1da177e4
LT
1654 | (update_vbat ? 0x41 : 0x01));
1655}
1656
b99883dc
JD
1657static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
1658{
1659 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
1660 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
1661 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
1662 else /* Manual mode */
1663 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
1664}
1665
1da177e4
LT
1666static struct it87_data *it87_update_device(struct device *dev)
1667{
b74f3fdd 1668 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
1669 int i;
1670
9a61bf63 1671 mutex_lock(&data->update_lock);
1da177e4
LT
1672
1673 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1674 || !data->valid) {
1675
1676 if (update_vbat) {
1677 /* Cleared after each update, so reenable. Value
1678 returned by this read will be previous value */
b74f3fdd 1679 it87_write_value(data, IT87_REG_CONFIG,
1680 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT
1681 }
1682 for (i = 0; i <= 7; i++) {
1683 data->in[i] =
b74f3fdd 1684 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 1685 data->in_min[i] =
b74f3fdd 1686 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 1687 data->in_max[i] =
b74f3fdd 1688 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 1689 }
3543a53f 1690 /* in8 (battery) has no limit registers */
1da177e4 1691 data->in[8] =
b74f3fdd 1692 it87_read_value(data, IT87_REG_VIN(8));
1da177e4 1693
c7f1f716 1694 for (i = 0; i < 5; i++) {
9060f8bd
JD
1695 /* Skip disabled fans */
1696 if (!(data->has_fan & (1 << i)))
1697 continue;
1698
1da177e4 1699 data->fan_min[i] =
c7f1f716 1700 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 1701 data->fan[i] = it87_read_value(data,
c7f1f716 1702 IT87_REG_FAN[i]);
17d648bf 1703 /* Add high byte if in 16-bit mode */
0475169c 1704 if (has_16bit_fans(data)) {
b74f3fdd 1705 data->fan[i] |= it87_read_value(data,
c7f1f716 1706 IT87_REG_FANX[i]) << 8;
b74f3fdd 1707 data->fan_min[i] |= it87_read_value(data,
c7f1f716 1708 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 1709 }
1da177e4
LT
1710 }
1711 for (i = 0; i < 3; i++) {
1712 data->temp[i] =
b74f3fdd 1713 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 1714 data->temp_high[i] =
b74f3fdd 1715 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 1716 data->temp_low[i] =
b74f3fdd 1717 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT
1718 }
1719
17d648bf 1720 /* Newer chips don't have clock dividers */
0475169c 1721 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 1722 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD
1723 data->fan_div[0] = i & 0x07;
1724 data->fan_div[1] = (i >> 3) & 0x07;
1725 data->fan_div[2] = (i & 0x40) ? 3 : 1;
1726 }
1da177e4
LT
1727
1728 data->alarms =
b74f3fdd 1729 it87_read_value(data, IT87_REG_ALARM1) |
1730 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1731 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 1732 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 1733
b74f3fdd 1734 data->fan_main_ctrl = it87_read_value(data,
1735 IT87_REG_FAN_MAIN_CTRL);
1736 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD
1737 for (i = 0; i < 3; i++)
1738 it87_update_pwm_ctrl(data, i);
b74f3fdd 1739
1740 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
0475169c 1741 /* The 8705 does not have VID capability.
b4da93e4
JMS
1742 The 8718 and the 8720 don't use IT87_REG_VID for the
1743 same purpose. */
17d648bf 1744 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 1745 data->vid = it87_read_value(data, IT87_REG_VID);
17d648bf
JD
1746 /* The older IT8712F revisions had only 5 VID pins,
1747 but we assume it is always safe to read 6 bits. */
1748 data->vid &= 0x3f;
1da177e4
LT
1749 }
1750 data->last_updated = jiffies;
1751 data->valid = 1;
1752 }
1753
9a61bf63 1754 mutex_unlock(&data->update_lock);
1da177e4
LT
1755
1756 return data;
1757}
1758
b74f3fdd 1759static int __init it87_device_add(unsigned short address,
1760 const struct it87_sio_data *sio_data)
1761{
1762 struct resource res = {
87b4b663
BH
1763 .start = address + IT87_EC_OFFSET,
1764 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 1765 .name = DRVNAME,
1766 .flags = IORESOURCE_IO,
1767 };
1768 int err;
1769
b9acb64a
JD
1770 err = acpi_check_resource_conflict(&res);
1771 if (err)
1772 goto exit;
1773
b74f3fdd 1774 pdev = platform_device_alloc(DRVNAME, address);
1775 if (!pdev) {
1776 err = -ENOMEM;
1777 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1778 goto exit;
1779 }
1780
1781 err = platform_device_add_resources(pdev, &res, 1);
1782 if (err) {
1783 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1784 "(%d)\n", err);
1785 goto exit_device_put;
1786 }
1787
1788 err = platform_device_add_data(pdev, sio_data,
1789 sizeof(struct it87_sio_data));
1790 if (err) {
1791 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1792 goto exit_device_put;
1793 }
1794
1795 err = platform_device_add(pdev);
1796 if (err) {
1797 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1798 err);
1799 goto exit_device_put;
1800 }
1801
1802 return 0;
1803
1804exit_device_put:
1805 platform_device_put(pdev);
1806exit:
1807 return err;
1808}
1809
1da177e4
LT
1810static int __init sm_it87_init(void)
1811{
b74f3fdd 1812 int err;
1813 unsigned short isa_address=0;
1814 struct it87_sio_data sio_data;
1815
98dd22c3 1816 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 1817 err = it87_find(&isa_address, &sio_data);
1818 if (err)
1819 return err;
1820 err = platform_driver_register(&it87_driver);
1821 if (err)
1822 return err;
fde09509 1823
b74f3fdd 1824 err = it87_device_add(isa_address, &sio_data);
1825 if (err){
1826 platform_driver_unregister(&it87_driver);
1827 return err;
1828 }
1829
1830 return 0;
1da177e4
LT
1831}
1832
1833static void __exit sm_it87_exit(void)
1834{
b74f3fdd 1835 platform_device_unregister(pdev);
1836 platform_driver_unregister(&it87_driver);
1da177e4
LT
1837}
1838
1839
f1d8e332 1840MODULE_AUTHOR("Chris Gauthron, "
b19367c6 1841 "Jean Delvare <khali@linux-fr.org>");
b4da93e4 1842MODULE_DESCRIPTION("IT8705F/8712F/8716F/8718F/8720F/8726F, SiS950 driver");
1da177e4
LT
1843module_param(update_vbat, bool, 0);
1844MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
1845module_param(fix_pwm_polarity, bool, 0);
1846MODULE_PARM_DESC(fix_pwm_polarity, "Force PWM polarity to active high (DANGEROUS)");
1847MODULE_LICENSE("GPL");
1848
1849module_init(sm_it87_init);
1850module_exit(sm_it87_exit);