hwmon: clean up duplicate includes
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4
LT
1/*
2 it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring.
4
91749996 5 Supports: IT8705F Super I/O chip w/LPC interface
8e9afcbb 6 IT8712F Super I/O chip w/LPC interface
17d648bf 7 IT8716F Super I/O chip w/LPC interface
87673dd7 8 IT8718F Super I/O chip w/LPC interface
08a8f6e9 9 IT8726F Super I/O chip w/LPC interface
1da177e4
LT
10 Sis950 A clone of the IT8705F
11
12 Copyright (C) 2001 Chris Gauthron <chrisg@0-in.com>
b19367c6 13 Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org>
1da177e4
LT
14
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
19
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
24
25 You should have received a copy of the GNU General Public License
26 along with this program; if not, write to the Free Software
27 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28*/
29
1da177e4
LT
30#include <linux/module.h>
31#include <linux/init.h>
32#include <linux/slab.h>
33#include <linux/jiffies.h>
b74f3fdd 34#include <linux/platform_device.h>
943b0830 35#include <linux/hwmon.h>
303760b4
JD
36#include <linux/hwmon-sysfs.h>
37#include <linux/hwmon-vid.h>
943b0830 38#include <linux/err.h>
9a61bf63 39#include <linux/mutex.h>
87808be4 40#include <linux/sysfs.h>
1da177e4
LT
41#include <asm/io.h>
42
b74f3fdd 43#define DRVNAME "it87"
1da177e4 44
8e9afcbb 45enum chips { it87, it8712, it8716, it8718 };
1da177e4 46
b74f3fdd 47static struct platform_device *pdev;
48
1da177e4
LT
49#define REG 0x2e /* The register to read/write */
50#define DEV 0x07 /* Register: Logical device select */
51#define VAL 0x2f /* The value to read/write */
52#define PME 0x04 /* The device with the fan registers in it */
87673dd7 53#define GPIO 0x07 /* The device with the IT8718F VID value in it */
1da177e4
LT
54#define DEVID 0x20 /* Register: Device ID */
55#define DEVREV 0x22 /* Register: Device Revision */
56
57static inline int
58superio_inb(int reg)
59{
60 outb(reg, REG);
61 return inb(VAL);
62}
63
64static int superio_inw(int reg)
65{
66 int val;
67 outb(reg++, REG);
68 val = inb(VAL) << 8;
69 outb(reg, REG);
70 val |= inb(VAL);
71 return val;
72}
73
74static inline void
87673dd7 75superio_select(int ldn)
1da177e4
LT
76{
77 outb(DEV, REG);
87673dd7 78 outb(ldn, VAL);
1da177e4
LT
79}
80
81static inline void
82superio_enter(void)
83{
84 outb(0x87, REG);
85 outb(0x01, REG);
86 outb(0x55, REG);
87 outb(0x55, REG);
88}
89
90static inline void
91superio_exit(void)
92{
93 outb(0x02, REG);
94 outb(0x02, VAL);
95}
96
87673dd7 97/* Logical device 4 registers */
1da177e4
LT
98#define IT8712F_DEVID 0x8712
99#define IT8705F_DEVID 0x8705
17d648bf 100#define IT8716F_DEVID 0x8716
87673dd7 101#define IT8718F_DEVID 0x8718
08a8f6e9 102#define IT8726F_DEVID 0x8726
1da177e4
LT
103#define IT87_ACT_REG 0x30
104#define IT87_BASE_REG 0x60
105
87673dd7
JD
106/* Logical device 7 registers (IT8712F and later) */
107#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
108#define IT87_SIO_VID_REG 0xfc /* VID value */
109
1da177e4
LT
110/* Update battery voltage after every reading if true */
111static int update_vbat;
112
113/* Not all BIOSes properly configure the PWM registers */
114static int fix_pwm_polarity;
115
1da177e4
LT
116/* Many IT87 constants specified below */
117
118/* Length of ISA address segment */
119#define IT87_EXTENT 8
120
121/* Where are the ISA address/data registers relative to the base address */
122#define IT87_ADDR_REG_OFFSET 5
123#define IT87_DATA_REG_OFFSET 6
124
125/*----- The IT87 registers -----*/
126
127#define IT87_REG_CONFIG 0x00
128
129#define IT87_REG_ALARM1 0x01
130#define IT87_REG_ALARM2 0x02
131#define IT87_REG_ALARM3 0x03
132
87673dd7
JD
133/* The IT8718F has the VID value in a different register, in Super-I/O
134 configuration space. */
1da177e4 135#define IT87_REG_VID 0x0a
17d648bf
JD
136/* Warning: register 0x0b is used for something completely different in
137 new chips/revisions. I suspect only 16-bit tachometer mode will work
138 for these. */
1da177e4 139#define IT87_REG_FAN_DIV 0x0b
17d648bf 140#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT
141
142/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
143
144#define IT87_REG_FAN(nr) (0x0d + (nr))
145#define IT87_REG_FAN_MIN(nr) (0x10 + (nr))
17d648bf
JD
146#define IT87_REG_FANX(nr) (0x18 + (nr))
147#define IT87_REG_FANX_MIN(nr) (0x1b + (nr))
1da177e4
LT
148#define IT87_REG_FAN_MAIN_CTRL 0x13
149#define IT87_REG_FAN_CTL 0x14
150#define IT87_REG_PWM(nr) (0x15 + (nr))
151
152#define IT87_REG_VIN(nr) (0x20 + (nr))
153#define IT87_REG_TEMP(nr) (0x29 + (nr))
154
155#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
156#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
157#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
158#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
159
1da177e4
LT
160#define IT87_REG_VIN_ENABLE 0x50
161#define IT87_REG_TEMP_ENABLE 0x51
162
163#define IT87_REG_CHIPID 0x58
164
165#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
166#define IN_FROM_REG(val) ((val) * 16)
167
168static inline u8 FAN_TO_REG(long rpm, int div)
169{
170 if (rpm == 0)
171 return 255;
172 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
173 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
174 254);
175}
176
17d648bf
JD
177static inline u16 FAN16_TO_REG(long rpm)
178{
179 if (rpm == 0)
180 return 0xffff;
181 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
182}
183
1da177e4 184#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
17d648bf
JD
185/* The divider is fixed to 2 in 16-bit mode */
186#define FAN16_FROM_REG(val) ((val)==0?-1:(val)==0xffff?0:1350000/((val)*2))
1da177e4
LT
187
188#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-500)/1000):\
189 ((val)+500)/1000),-128,127))
190#define TEMP_FROM_REG(val) (((val)>0x80?(val)-0x100:(val))*1000)
191
1da177e4
LT
192#define PWM_TO_REG(val) ((val) >> 1)
193#define PWM_FROM_REG(val) (((val)&0x7f) << 1)
194
195static int DIV_TO_REG(int val)
196{
197 int answer = 0;
b9e349f7 198 while (answer < 7 && (val >>= 1))
1da177e4
LT
199 answer++;
200 return answer;
201}
202#define DIV_FROM_REG(val) (1 << (val))
203
f8d0c19a
JD
204static const unsigned int pwm_freq[8] = {
205 48000000 / 128,
206 24000000 / 128,
207 12000000 / 128,
208 8000000 / 128,
209 6000000 / 128,
210 3000000 / 128,
211 1500000 / 128,
212 750000 / 128,
213};
214
1da177e4 215
b74f3fdd 216struct it87_sio_data {
217 enum chips type;
218 /* Values read from Super-I/O config space */
219 u8 vid_value;
220};
221
ed6bafbf
JD
222/* For each registered chip, we need to keep some data in memory.
223 The structure is dynamically allocated. */
1da177e4 224struct it87_data {
943b0830 225 struct class_device *class_dev;
1da177e4
LT
226 enum chips type;
227
b74f3fdd 228 unsigned short addr;
229 const char *name;
9a61bf63 230 struct mutex update_lock;
1da177e4
LT
231 char valid; /* !=0 if following fields are valid */
232 unsigned long last_updated; /* In jiffies */
233
234 u8 in[9]; /* Register value */
3543a53f
JD
235 u8 in_max[8]; /* Register value */
236 u8 in_min[8]; /* Register value */
9060f8bd 237 u8 has_fan; /* Bitfield, fans enabled */
17d648bf
JD
238 u16 fan[3]; /* Register values, possibly combined */
239 u16 fan_min[3]; /* Register values, possibly combined */
1da177e4
LT
240 u8 temp[3]; /* Register value */
241 u8 temp_high[3]; /* Register value */
242 u8 temp_low[3]; /* Register value */
243 u8 sensor; /* Register value */
244 u8 fan_div[3]; /* Register encoding, shifted right */
245 u8 vid; /* Register encoding, combined */
a7be58a1 246 u8 vrm;
1da177e4
LT
247 u32 alarms; /* Register encoding, combined */
248 u8 fan_main_ctrl; /* Register value */
f8d0c19a 249 u8 fan_ctl; /* Register value */
1da177e4
LT
250 u8 manual_pwm_ctl[3]; /* manual PWM value set by user */
251};
252
253
b74f3fdd 254static int it87_probe(struct platform_device *pdev);
255static int it87_remove(struct platform_device *pdev);
1da177e4 256
b74f3fdd 257static int it87_read_value(struct it87_data *data, u8 reg);
258static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 259static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 260static int it87_check_pwm(struct device *dev);
261static void it87_init_device(struct platform_device *pdev);
1da177e4
LT
262
263
b74f3fdd 264static struct platform_driver it87_driver = {
cdaf7934 265 .driver = {
87218842 266 .owner = THIS_MODULE,
b74f3fdd 267 .name = DRVNAME,
cdaf7934 268 },
b74f3fdd 269 .probe = it87_probe,
270 .remove = __devexit_p(it87_remove),
fde09509
JD
271};
272
20ad93d4
JD
273static ssize_t show_in(struct device *dev, struct device_attribute *attr,
274 char *buf)
1da177e4 275{
20ad93d4
JD
276 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
277 int nr = sensor_attr->index;
278
1da177e4
LT
279 struct it87_data *data = it87_update_device(dev);
280 return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr]));
281}
282
20ad93d4
JD
283static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
284 char *buf)
1da177e4 285{
20ad93d4
JD
286 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
287 int nr = sensor_attr->index;
288
1da177e4
LT
289 struct it87_data *data = it87_update_device(dev);
290 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr]));
291}
292
20ad93d4
JD
293static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
294 char *buf)
1da177e4 295{
20ad93d4
JD
296 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
297 int nr = sensor_attr->index;
298
1da177e4
LT
299 struct it87_data *data = it87_update_device(dev);
300 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr]));
301}
302
20ad93d4
JD
303static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
304 const char *buf, size_t count)
1da177e4 305{
20ad93d4
JD
306 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
307 int nr = sensor_attr->index;
308
b74f3fdd 309 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
310 unsigned long val = simple_strtoul(buf, NULL, 10);
311
9a61bf63 312 mutex_lock(&data->update_lock);
1da177e4 313 data->in_min[nr] = IN_TO_REG(val);
b74f3fdd 314 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 315 data->in_min[nr]);
9a61bf63 316 mutex_unlock(&data->update_lock);
1da177e4
LT
317 return count;
318}
20ad93d4
JD
319static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
320 const char *buf, size_t count)
1da177e4 321{
20ad93d4
JD
322 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
323 int nr = sensor_attr->index;
324
b74f3fdd 325 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
326 unsigned long val = simple_strtoul(buf, NULL, 10);
327
9a61bf63 328 mutex_lock(&data->update_lock);
1da177e4 329 data->in_max[nr] = IN_TO_REG(val);
b74f3fdd 330 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 331 data->in_max[nr]);
9a61bf63 332 mutex_unlock(&data->update_lock);
1da177e4
LT
333 return count;
334}
335
336#define show_in_offset(offset) \
20ad93d4
JD
337static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
338 show_in, NULL, offset);
1da177e4
LT
339
340#define limit_in_offset(offset) \
20ad93d4
JD
341static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
342 show_in_min, set_in_min, offset); \
343static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
344 show_in_max, set_in_max, offset);
1da177e4
LT
345
346show_in_offset(0);
347limit_in_offset(0);
348show_in_offset(1);
349limit_in_offset(1);
350show_in_offset(2);
351limit_in_offset(2);
352show_in_offset(3);
353limit_in_offset(3);
354show_in_offset(4);
355limit_in_offset(4);
356show_in_offset(5);
357limit_in_offset(5);
358show_in_offset(6);
359limit_in_offset(6);
360show_in_offset(7);
361limit_in_offset(7);
362show_in_offset(8);
363
364/* 3 temperatures */
20ad93d4
JD
365static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
366 char *buf)
1da177e4 367{
20ad93d4
JD
368 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
369 int nr = sensor_attr->index;
370
1da177e4
LT
371 struct it87_data *data = it87_update_device(dev);
372 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
373}
20ad93d4
JD
374static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
375 char *buf)
1da177e4 376{
20ad93d4
JD
377 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
378 int nr = sensor_attr->index;
379
1da177e4
LT
380 struct it87_data *data = it87_update_device(dev);
381 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
382}
20ad93d4
JD
383static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
384 char *buf)
1da177e4 385{
20ad93d4
JD
386 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
387 int nr = sensor_attr->index;
388
1da177e4
LT
389 struct it87_data *data = it87_update_device(dev);
390 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
391}
20ad93d4
JD
392static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
393 const char *buf, size_t count)
1da177e4 394{
20ad93d4
JD
395 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
396 int nr = sensor_attr->index;
397
b74f3fdd 398 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
399 int val = simple_strtol(buf, NULL, 10);
400
9a61bf63 401 mutex_lock(&data->update_lock);
1da177e4 402 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 403 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 404 mutex_unlock(&data->update_lock);
1da177e4
LT
405 return count;
406}
20ad93d4
JD
407static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
408 const char *buf, size_t count)
1da177e4 409{
20ad93d4
JD
410 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
411 int nr = sensor_attr->index;
412
b74f3fdd 413 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
414 int val = simple_strtol(buf, NULL, 10);
415
9a61bf63 416 mutex_lock(&data->update_lock);
1da177e4 417 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 418 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 419 mutex_unlock(&data->update_lock);
1da177e4
LT
420 return count;
421}
422#define show_temp_offset(offset) \
20ad93d4
JD
423static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
424 show_temp, NULL, offset - 1); \
425static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
426 show_temp_max, set_temp_max, offset - 1); \
427static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
428 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT
429
430show_temp_offset(1);
431show_temp_offset(2);
432show_temp_offset(3);
433
20ad93d4
JD
434static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
435 char *buf)
1da177e4 436{
20ad93d4
JD
437 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
438 int nr = sensor_attr->index;
439
1da177e4
LT
440 struct it87_data *data = it87_update_device(dev);
441 u8 reg = data->sensor; /* In case the value is updated while we use it */
442
443 if (reg & (1 << nr))
444 return sprintf(buf, "3\n"); /* thermal diode */
445 if (reg & (8 << nr))
446 return sprintf(buf, "2\n"); /* thermistor */
447 return sprintf(buf, "0\n"); /* disabled */
448}
20ad93d4
JD
449static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
450 const char *buf, size_t count)
1da177e4 451{
20ad93d4
JD
452 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
453 int nr = sensor_attr->index;
454
b74f3fdd 455 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
456 int val = simple_strtol(buf, NULL, 10);
457
9a61bf63 458 mutex_lock(&data->update_lock);
1da177e4
LT
459
460 data->sensor &= ~(1 << nr);
461 data->sensor &= ~(8 << nr);
462 /* 3 = thermal diode; 2 = thermistor; 0 = disabled */
463 if (val == 3)
464 data->sensor |= 1 << nr;
465 else if (val == 2)
466 data->sensor |= 8 << nr;
467 else if (val != 0) {
9a61bf63 468 mutex_unlock(&data->update_lock);
1da177e4
LT
469 return -EINVAL;
470 }
b74f3fdd 471 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
9a61bf63 472 mutex_unlock(&data->update_lock);
1da177e4
LT
473 return count;
474}
475#define show_sensor_offset(offset) \
20ad93d4
JD
476static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
477 show_sensor, set_sensor, offset - 1);
1da177e4
LT
478
479show_sensor_offset(1);
480show_sensor_offset(2);
481show_sensor_offset(3);
482
483/* 3 Fans */
20ad93d4
JD
484static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
485 char *buf)
1da177e4 486{
20ad93d4
JD
487 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
488 int nr = sensor_attr->index;
489
1da177e4
LT
490 struct it87_data *data = it87_update_device(dev);
491 return sprintf(buf,"%d\n", FAN_FROM_REG(data->fan[nr],
492 DIV_FROM_REG(data->fan_div[nr])));
493}
20ad93d4
JD
494static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
495 char *buf)
1da177e4 496{
20ad93d4
JD
497 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
498 int nr = sensor_attr->index;
499
1da177e4
LT
500 struct it87_data *data = it87_update_device(dev);
501 return sprintf(buf,"%d\n",
502 FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])));
503}
20ad93d4
JD
504static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
505 char *buf)
1da177e4 506{
20ad93d4
JD
507 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
508 int nr = sensor_attr->index;
509
1da177e4
LT
510 struct it87_data *data = it87_update_device(dev);
511 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
512}
20ad93d4
JD
513static ssize_t show_pwm_enable(struct device *dev, struct device_attribute *attr,
514 char *buf)
1da177e4 515{
20ad93d4
JD
516 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
517 int nr = sensor_attr->index;
518
1da177e4
LT
519 struct it87_data *data = it87_update_device(dev);
520 return sprintf(buf,"%d\n", (data->fan_main_ctrl & (1 << nr)) ? 1 : 0);
521}
20ad93d4
JD
522static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
523 char *buf)
1da177e4 524{
20ad93d4
JD
525 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
526 int nr = sensor_attr->index;
527
1da177e4
LT
528 struct it87_data *data = it87_update_device(dev);
529 return sprintf(buf,"%d\n", data->manual_pwm_ctl[nr]);
530}
f8d0c19a
JD
531static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
532 char *buf)
533{
534 struct it87_data *data = it87_update_device(dev);
535 int index = (data->fan_ctl >> 4) & 0x07;
536
537 return sprintf(buf, "%u\n", pwm_freq[index]);
538}
20ad93d4
JD
539static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
540 const char *buf, size_t count)
1da177e4 541{
20ad93d4
JD
542 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
543 int nr = sensor_attr->index;
544
b74f3fdd 545 struct it87_data *data = dev_get_drvdata(dev);
1da177e4 546 int val = simple_strtol(buf, NULL, 10);
7f999aa7 547 u8 reg;
1da177e4 548
9a61bf63 549 mutex_lock(&data->update_lock);
b74f3fdd 550 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d
JD
551 switch (nr) {
552 case 0: data->fan_div[nr] = reg & 0x07; break;
553 case 1: data->fan_div[nr] = (reg >> 3) & 0x07; break;
554 case 2: data->fan_div[nr] = (reg & 0x40) ? 3 : 1; break;
555 }
556
1da177e4 557 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
b74f3fdd 558 it87_write_value(data, IT87_REG_FAN_MIN(nr), data->fan_min[nr]);
9a61bf63 559 mutex_unlock(&data->update_lock);
1da177e4
LT
560 return count;
561}
20ad93d4
JD
562static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
563 const char *buf, size_t count)
1da177e4 564{
20ad93d4
JD
565 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
566 int nr = sensor_attr->index;
567
b74f3fdd 568 struct it87_data *data = dev_get_drvdata(dev);
b9e349f7 569 unsigned long val = simple_strtoul(buf, NULL, 10);
8ab4ec3e 570 int min;
1da177e4
LT
571 u8 old;
572
9a61bf63 573 mutex_lock(&data->update_lock);
b74f3fdd 574 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 575
8ab4ec3e
JD
576 /* Save fan min limit */
577 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT
578
579 switch (nr) {
580 case 0:
581 case 1:
582 data->fan_div[nr] = DIV_TO_REG(val);
583 break;
584 case 2:
585 if (val < 8)
586 data->fan_div[nr] = 1;
587 else
588 data->fan_div[nr] = 3;
589 }
590 val = old & 0x80;
591 val |= (data->fan_div[0] & 0x07);
592 val |= (data->fan_div[1] & 0x07) << 3;
593 if (data->fan_div[2] == 3)
594 val |= 0x1 << 6;
b74f3fdd 595 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 596
8ab4ec3e
JD
597 /* Restore fan min limit */
598 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
b74f3fdd 599 it87_write_value(data, IT87_REG_FAN_MIN(nr), data->fan_min[nr]);
8ab4ec3e 600
9a61bf63 601 mutex_unlock(&data->update_lock);
1da177e4
LT
602 return count;
603}
20ad93d4
JD
604static ssize_t set_pwm_enable(struct device *dev,
605 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 606{
20ad93d4
JD
607 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
608 int nr = sensor_attr->index;
609
b74f3fdd 610 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
611 int val = simple_strtol(buf, NULL, 10);
612
9a61bf63 613 mutex_lock(&data->update_lock);
1da177e4
LT
614
615 if (val == 0) {
616 int tmp;
617 /* make sure the fan is on when in on/off mode */
b74f3fdd 618 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
619 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT
620 /* set on/off mode */
621 data->fan_main_ctrl &= ~(1 << nr);
b74f3fdd 622 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1da177e4
LT
623 } else if (val == 1) {
624 /* set SmartGuardian mode */
625 data->fan_main_ctrl |= (1 << nr);
b74f3fdd 626 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1da177e4 627 /* set saved pwm value, clear FAN_CTLX PWM mode bit */
b74f3fdd 628 it87_write_value(data, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr]));
1da177e4 629 } else {
9a61bf63 630 mutex_unlock(&data->update_lock);
1da177e4
LT
631 return -EINVAL;
632 }
633
9a61bf63 634 mutex_unlock(&data->update_lock);
1da177e4
LT
635 return count;
636}
20ad93d4
JD
637static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
638 const char *buf, size_t count)
1da177e4 639{
20ad93d4
JD
640 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
641 int nr = sensor_attr->index;
642
b74f3fdd 643 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
644 int val = simple_strtol(buf, NULL, 10);
645
646 if (val < 0 || val > 255)
647 return -EINVAL;
648
9a61bf63 649 mutex_lock(&data->update_lock);
1da177e4
LT
650 data->manual_pwm_ctl[nr] = val;
651 if (data->fan_main_ctrl & (1 << nr))
b74f3fdd 652 it87_write_value(data, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr]));
9a61bf63 653 mutex_unlock(&data->update_lock);
1da177e4
LT
654 return count;
655}
f8d0c19a
JD
656static ssize_t set_pwm_freq(struct device *dev,
657 struct device_attribute *attr, const char *buf, size_t count)
658{
b74f3fdd 659 struct it87_data *data = dev_get_drvdata(dev);
f8d0c19a
JD
660 unsigned long val = simple_strtoul(buf, NULL, 10);
661 int i;
662
663 /* Search for the nearest available frequency */
664 for (i = 0; i < 7; i++) {
665 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
666 break;
667 }
668
669 mutex_lock(&data->update_lock);
b74f3fdd 670 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 671 data->fan_ctl |= i << 4;
b74f3fdd 672 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD
673 mutex_unlock(&data->update_lock);
674
675 return count;
676}
1da177e4 677
20ad93d4
JD
678#define show_fan_offset(offset) \
679static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
680 show_fan, NULL, offset - 1); \
681static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
682 show_fan_min, set_fan_min, offset - 1); \
683static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
684 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT
685
686show_fan_offset(1);
687show_fan_offset(2);
688show_fan_offset(3);
689
690#define show_pwm_offset(offset) \
20ad93d4
JD
691static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
692 show_pwm_enable, set_pwm_enable, offset - 1); \
693static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD
694 show_pwm, set_pwm, offset - 1); \
695static DEVICE_ATTR(pwm##offset##_freq, \
696 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
697 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL));
1da177e4
LT
698
699show_pwm_offset(1);
700show_pwm_offset(2);
701show_pwm_offset(3);
702
17d648bf
JD
703/* A different set of callbacks for 16-bit fans */
704static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
705 char *buf)
706{
707 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
708 int nr = sensor_attr->index;
709 struct it87_data *data = it87_update_device(dev);
710 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
711}
712
713static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
714 char *buf)
715{
716 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
717 int nr = sensor_attr->index;
718 struct it87_data *data = it87_update_device(dev);
719 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
720}
721
722static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
723 const char *buf, size_t count)
724{
725 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
726 int nr = sensor_attr->index;
b74f3fdd 727 struct it87_data *data = dev_get_drvdata(dev);
17d648bf
JD
728 int val = simple_strtol(buf, NULL, 10);
729
730 mutex_lock(&data->update_lock);
731 data->fan_min[nr] = FAN16_TO_REG(val);
b74f3fdd 732 it87_write_value(data, IT87_REG_FAN_MIN(nr),
17d648bf 733 data->fan_min[nr] & 0xff);
b74f3fdd 734 it87_write_value(data, IT87_REG_FANX_MIN(nr),
17d648bf
JD
735 data->fan_min[nr] >> 8);
736 mutex_unlock(&data->update_lock);
737 return count;
738}
739
740/* We want to use the same sysfs file names as 8-bit fans, but we need
741 different variable names, so we have to use SENSOR_ATTR instead of
742 SENSOR_DEVICE_ATTR. */
743#define show_fan16_offset(offset) \
744static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
745 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
746 show_fan16, NULL, offset - 1); \
747static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
748 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
749 show_fan16_min, set_fan16_min, offset - 1)
750
751show_fan16_offset(1);
752show_fan16_offset(2);
753show_fan16_offset(3);
754
1da177e4 755/* Alarms */
30f74292 756static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
757{
758 struct it87_data *data = it87_update_device(dev);
68188ba7 759 return sprintf(buf, "%u\n", data->alarms);
1da177e4 760}
1d66c64c 761static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4
LT
762
763static ssize_t
30f74292 764show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
765{
766 struct it87_data *data = it87_update_device(dev);
a7be58a1 767 return sprintf(buf, "%u\n", data->vrm);
1da177e4
LT
768}
769static ssize_t
30f74292 770store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 771{
b74f3fdd 772 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
773 u32 val;
774
775 val = simple_strtoul(buf, NULL, 10);
776 data->vrm = val;
777
778 return count;
779}
780static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4
LT
781
782static ssize_t
30f74292 783show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
784{
785 struct it87_data *data = it87_update_device(dev);
786 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
787}
788static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 789
b74f3fdd 790static ssize_t show_name(struct device *dev, struct device_attribute
791 *devattr, char *buf)
792{
793 struct it87_data *data = dev_get_drvdata(dev);
794 return sprintf(buf, "%s\n", data->name);
795}
796static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
797
87808be4
JD
798static struct attribute *it87_attributes[] = {
799 &sensor_dev_attr_in0_input.dev_attr.attr,
800 &sensor_dev_attr_in1_input.dev_attr.attr,
801 &sensor_dev_attr_in2_input.dev_attr.attr,
802 &sensor_dev_attr_in3_input.dev_attr.attr,
803 &sensor_dev_attr_in4_input.dev_attr.attr,
804 &sensor_dev_attr_in5_input.dev_attr.attr,
805 &sensor_dev_attr_in6_input.dev_attr.attr,
806 &sensor_dev_attr_in7_input.dev_attr.attr,
807 &sensor_dev_attr_in8_input.dev_attr.attr,
808 &sensor_dev_attr_in0_min.dev_attr.attr,
809 &sensor_dev_attr_in1_min.dev_attr.attr,
810 &sensor_dev_attr_in2_min.dev_attr.attr,
811 &sensor_dev_attr_in3_min.dev_attr.attr,
812 &sensor_dev_attr_in4_min.dev_attr.attr,
813 &sensor_dev_attr_in5_min.dev_attr.attr,
814 &sensor_dev_attr_in6_min.dev_attr.attr,
815 &sensor_dev_attr_in7_min.dev_attr.attr,
816 &sensor_dev_attr_in0_max.dev_attr.attr,
817 &sensor_dev_attr_in1_max.dev_attr.attr,
818 &sensor_dev_attr_in2_max.dev_attr.attr,
819 &sensor_dev_attr_in3_max.dev_attr.attr,
820 &sensor_dev_attr_in4_max.dev_attr.attr,
821 &sensor_dev_attr_in5_max.dev_attr.attr,
822 &sensor_dev_attr_in6_max.dev_attr.attr,
823 &sensor_dev_attr_in7_max.dev_attr.attr,
824
825 &sensor_dev_attr_temp1_input.dev_attr.attr,
826 &sensor_dev_attr_temp2_input.dev_attr.attr,
827 &sensor_dev_attr_temp3_input.dev_attr.attr,
828 &sensor_dev_attr_temp1_max.dev_attr.attr,
829 &sensor_dev_attr_temp2_max.dev_attr.attr,
830 &sensor_dev_attr_temp3_max.dev_attr.attr,
831 &sensor_dev_attr_temp1_min.dev_attr.attr,
832 &sensor_dev_attr_temp2_min.dev_attr.attr,
833 &sensor_dev_attr_temp3_min.dev_attr.attr,
834 &sensor_dev_attr_temp1_type.dev_attr.attr,
835 &sensor_dev_attr_temp2_type.dev_attr.attr,
836 &sensor_dev_attr_temp3_type.dev_attr.attr,
837
838 &dev_attr_alarms.attr,
b74f3fdd 839 &dev_attr_name.attr,
87808be4
JD
840 NULL
841};
842
843static const struct attribute_group it87_group = {
844 .attrs = it87_attributes,
845};
846
847static struct attribute *it87_attributes_opt[] = {
848 &sensor_dev_attr_fan1_input16.dev_attr.attr,
849 &sensor_dev_attr_fan1_min16.dev_attr.attr,
850 &sensor_dev_attr_fan2_input16.dev_attr.attr,
851 &sensor_dev_attr_fan2_min16.dev_attr.attr,
852 &sensor_dev_attr_fan3_input16.dev_attr.attr,
853 &sensor_dev_attr_fan3_min16.dev_attr.attr,
854
855 &sensor_dev_attr_fan1_input.dev_attr.attr,
856 &sensor_dev_attr_fan1_min.dev_attr.attr,
857 &sensor_dev_attr_fan1_div.dev_attr.attr,
858 &sensor_dev_attr_fan2_input.dev_attr.attr,
859 &sensor_dev_attr_fan2_min.dev_attr.attr,
860 &sensor_dev_attr_fan2_div.dev_attr.attr,
861 &sensor_dev_attr_fan3_input.dev_attr.attr,
862 &sensor_dev_attr_fan3_min.dev_attr.attr,
863 &sensor_dev_attr_fan3_div.dev_attr.attr,
864
865 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
866 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
867 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
868 &sensor_dev_attr_pwm1.dev_attr.attr,
869 &sensor_dev_attr_pwm2.dev_attr.attr,
870 &sensor_dev_attr_pwm3.dev_attr.attr,
871
872 &dev_attr_vrm.attr,
873 &dev_attr_cpu0_vid.attr,
874 NULL
875};
876
877static const struct attribute_group it87_group_opt = {
878 .attrs = it87_attributes_opt,
879};
1da177e4 880
2d8672c5 881/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 882static int __init it87_find(unsigned short *address,
883 struct it87_sio_data *sio_data)
1da177e4
LT
884{
885 int err = -ENODEV;
b74f3fdd 886 u16 chip_type;
1da177e4
LT
887
888 superio_enter();
889 chip_type = superio_inw(DEVID);
b74f3fdd 890
891 switch (chip_type) {
892 case IT8705F_DEVID:
893 sio_data->type = it87;
894 break;
895 case IT8712F_DEVID:
896 sio_data->type = it8712;
897 break;
898 case IT8716F_DEVID:
899 case IT8726F_DEVID:
900 sio_data->type = it8716;
901 break;
902 case IT8718F_DEVID:
903 sio_data->type = it8718;
904 break;
905 case 0xffff: /* No device at all */
906 goto exit;
907 default:
908 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%x)\n",
909 chip_type);
910 goto exit;
911 }
1da177e4 912
87673dd7 913 superio_select(PME);
1da177e4
LT
914 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
915 pr_info("it87: Device not activated, skipping\n");
916 goto exit;
917 }
918
919 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
920 if (*address == 0) {
921 pr_info("it87: Base address not set, skipping\n");
922 goto exit;
923 }
924
925 err = 0;
926 pr_info("it87: Found IT%04xF chip at 0x%x, revision %d\n",
927 chip_type, *address, superio_inb(DEVREV) & 0x0f);
928
87673dd7
JD
929 /* Read GPIO config and VID value from LDN 7 (GPIO) */
930 if (chip_type != IT8705F_DEVID) {
931 int reg;
932
933 superio_select(GPIO);
934 if (chip_type == it8718)
b74f3fdd 935 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD
936
937 reg = superio_inb(IT87_SIO_PINX2_REG);
938 if (reg & (1 << 0))
939 pr_info("it87: in3 is VCC (+5V)\n");
940 if (reg & (1 << 1))
941 pr_info("it87: in7 is VCCH (+5V Stand-By)\n");
942 }
943
1da177e4
LT
944exit:
945 superio_exit();
946 return err;
947}
948
b74f3fdd 949static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 950{
1da177e4 951 struct it87_data *data;
b74f3fdd 952 struct resource *res;
953 struct device *dev = &pdev->dev;
954 struct it87_sio_data *sio_data = dev->platform_data;
1da177e4 955 int err = 0;
1da177e4 956 int enable_pwm_interface;
b74f3fdd 957 static const char *names[] = {
958 "it87",
959 "it8712",
960 "it8716",
961 "it8718",
962 };
963
964 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
965 if (!request_region(res->start, IT87_EXTENT, DRVNAME)) {
966 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
967 (unsigned long)res->start,
968 (unsigned long)(res->start + IT87_EXTENT - 1));
8e9afcbb
JD
969 err = -EBUSY;
970 goto ERROR0;
971 }
1da177e4 972
ba9c2e8d 973 if (!(data = kzalloc(sizeof(struct it87_data), GFP_KERNEL))) {
1da177e4
LT
974 err = -ENOMEM;
975 goto ERROR1;
976 }
1da177e4 977
b74f3fdd 978 data->addr = res->start;
979 data->type = sio_data->type;
980 data->name = names[sio_data->type];
1da177e4
LT
981
982 /* Now, we do the remaining detection. */
b74f3fdd 983 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
984 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
8e9afcbb
JD
985 err = -ENODEV;
986 goto ERROR2;
1da177e4
LT
987 }
988
b74f3fdd 989 platform_set_drvdata(pdev, data);
1da177e4 990
9a61bf63 991 mutex_init(&data->update_lock);
1da177e4 992
1da177e4 993 /* Check PWM configuration */
b74f3fdd 994 enable_pwm_interface = it87_check_pwm(dev);
1da177e4
LT
995
996 /* Initialize the IT87 chip */
b74f3fdd 997 it87_init_device(pdev);
1da177e4
LT
998
999 /* Register sysfs hooks */
b74f3fdd 1000 if ((err = sysfs_create_group(&dev->kobj, &it87_group)))
1001 goto ERROR2;
17d648bf 1002
9060f8bd 1003 /* Do not create fan files for disabled fans */
87673dd7
JD
1004 if (data->type == it8716 || data->type == it8718) {
1005 /* 16-bit tachometers */
9060f8bd 1006 if (data->has_fan & (1 << 0)) {
b74f3fdd 1007 if ((err = device_create_file(dev,
87808be4 1008 &sensor_dev_attr_fan1_input16.dev_attr))
b74f3fdd 1009 || (err = device_create_file(dev,
87808be4
JD
1010 &sensor_dev_attr_fan1_min16.dev_attr)))
1011 goto ERROR4;
9060f8bd
JD
1012 }
1013 if (data->has_fan & (1 << 1)) {
b74f3fdd 1014 if ((err = device_create_file(dev,
87808be4 1015 &sensor_dev_attr_fan2_input16.dev_attr))
b74f3fdd 1016 || (err = device_create_file(dev,
87808be4
JD
1017 &sensor_dev_attr_fan2_min16.dev_attr)))
1018 goto ERROR4;
9060f8bd
JD
1019 }
1020 if (data->has_fan & (1 << 2)) {
b74f3fdd 1021 if ((err = device_create_file(dev,
87808be4 1022 &sensor_dev_attr_fan3_input16.dev_attr))
b74f3fdd 1023 || (err = device_create_file(dev,
87808be4
JD
1024 &sensor_dev_attr_fan3_min16.dev_attr)))
1025 goto ERROR4;
9060f8bd 1026 }
17d648bf 1027 } else {
87673dd7 1028 /* 8-bit tachometers with clock divider */
9060f8bd 1029 if (data->has_fan & (1 << 0)) {
b74f3fdd 1030 if ((err = device_create_file(dev,
87808be4 1031 &sensor_dev_attr_fan1_input.dev_attr))
b74f3fdd 1032 || (err = device_create_file(dev,
87808be4 1033 &sensor_dev_attr_fan1_min.dev_attr))
b74f3fdd 1034 || (err = device_create_file(dev,
87808be4
JD
1035 &sensor_dev_attr_fan1_div.dev_attr)))
1036 goto ERROR4;
9060f8bd
JD
1037 }
1038 if (data->has_fan & (1 << 1)) {
b74f3fdd 1039 if ((err = device_create_file(dev,
87808be4 1040 &sensor_dev_attr_fan2_input.dev_attr))
b74f3fdd 1041 || (err = device_create_file(dev,
87808be4 1042 &sensor_dev_attr_fan2_min.dev_attr))
b74f3fdd 1043 || (err = device_create_file(dev,
87808be4
JD
1044 &sensor_dev_attr_fan2_div.dev_attr)))
1045 goto ERROR4;
9060f8bd
JD
1046 }
1047 if (data->has_fan & (1 << 2)) {
b74f3fdd 1048 if ((err = device_create_file(dev,
87808be4 1049 &sensor_dev_attr_fan3_input.dev_attr))
b74f3fdd 1050 || (err = device_create_file(dev,
87808be4 1051 &sensor_dev_attr_fan3_min.dev_attr))
b74f3fdd 1052 || (err = device_create_file(dev,
87808be4
JD
1053 &sensor_dev_attr_fan3_div.dev_attr)))
1054 goto ERROR4;
9060f8bd 1055 }
17d648bf
JD
1056 }
1057
1da177e4 1058 if (enable_pwm_interface) {
b74f3fdd 1059 if ((err = device_create_file(dev,
87808be4 1060 &sensor_dev_attr_pwm1_enable.dev_attr))
b74f3fdd 1061 || (err = device_create_file(dev,
87808be4 1062 &sensor_dev_attr_pwm2_enable.dev_attr))
b74f3fdd 1063 || (err = device_create_file(dev,
87808be4 1064 &sensor_dev_attr_pwm3_enable.dev_attr))
b74f3fdd 1065 || (err = device_create_file(dev,
87808be4 1066 &sensor_dev_attr_pwm1.dev_attr))
b74f3fdd 1067 || (err = device_create_file(dev,
87808be4 1068 &sensor_dev_attr_pwm2.dev_attr))
b74f3fdd 1069 || (err = device_create_file(dev,
f8d0c19a 1070 &sensor_dev_attr_pwm3.dev_attr))
b74f3fdd 1071 || (err = device_create_file(dev,
f8d0c19a 1072 &dev_attr_pwm1_freq))
b74f3fdd 1073 || (err = device_create_file(dev,
f8d0c19a 1074 &dev_attr_pwm2_freq))
b74f3fdd 1075 || (err = device_create_file(dev,
f8d0c19a 1076 &dev_attr_pwm3_freq)))
87808be4 1077 goto ERROR4;
1da177e4
LT
1078 }
1079
87673dd7
JD
1080 if (data->type == it8712 || data->type == it8716
1081 || data->type == it8718) {
303760b4 1082 data->vrm = vid_which_vrm();
87673dd7 1083 /* VID reading from Super-I/O config space if available */
b74f3fdd 1084 data->vid = sio_data->vid_value;
1085 if ((err = device_create_file(dev,
87808be4 1086 &dev_attr_vrm))
b74f3fdd 1087 || (err = device_create_file(dev,
87808be4
JD
1088 &dev_attr_cpu0_vid)))
1089 goto ERROR4;
1090 }
1091
b74f3fdd 1092 data->class_dev = hwmon_device_register(dev);
87808be4
JD
1093 if (IS_ERR(data->class_dev)) {
1094 err = PTR_ERR(data->class_dev);
1095 goto ERROR4;
1da177e4
LT
1096 }
1097
1098 return 0;
1099
87808be4 1100ERROR4:
b74f3fdd 1101 sysfs_remove_group(&dev->kobj, &it87_group);
1102 sysfs_remove_group(&dev->kobj, &it87_group_opt);
1da177e4 1103ERROR2:
b74f3fdd 1104 platform_set_drvdata(pdev, NULL);
1da177e4
LT
1105 kfree(data);
1106ERROR1:
b74f3fdd 1107 release_region(res->start, IT87_EXTENT);
1da177e4
LT
1108ERROR0:
1109 return err;
1110}
1111
b74f3fdd 1112static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 1113{
b74f3fdd 1114 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1115
943b0830 1116 hwmon_device_unregister(data->class_dev);
b74f3fdd 1117 sysfs_remove_group(&pdev->dev.kobj, &it87_group);
1118 sysfs_remove_group(&pdev->dev.kobj, &it87_group_opt);
943b0830 1119
b74f3fdd 1120 release_region(data->addr, IT87_EXTENT);
1121 platform_set_drvdata(pdev, NULL);
943b0830 1122 kfree(data);
1da177e4
LT
1123
1124 return 0;
1125}
1126
7f999aa7 1127/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT
1128 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1129 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1130static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 1131{
b74f3fdd 1132 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1133 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
1134}
1135
7f999aa7 1136/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT
1137 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1138 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1139static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 1140{
b74f3fdd 1141 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1142 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
1143}
1144
1145/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 1146static int __devinit it87_check_pwm(struct device *dev)
1da177e4 1147{
b74f3fdd 1148 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
1149 /* Some BIOSes fail to correctly configure the IT87 fans. All fans off
1150 * and polarity set to active low is sign that this is the case so we
1151 * disable pwm control to protect the user. */
b74f3fdd 1152 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT
1153 if ((tmp & 0x87) == 0) {
1154 if (fix_pwm_polarity) {
1155 /* The user asks us to attempt a chip reconfiguration.
1156 * This means switching to active high polarity and
1157 * inverting all fan speed values. */
1158 int i;
1159 u8 pwm[3];
1160
1161 for (i = 0; i < 3; i++)
b74f3fdd 1162 pwm[i] = it87_read_value(data,
1da177e4
LT
1163 IT87_REG_PWM(i));
1164
1165 /* If any fan is in automatic pwm mode, the polarity
1166 * might be correct, as suspicious as it seems, so we
1167 * better don't change anything (but still disable the
1168 * PWM interface). */
1169 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 1170 dev_info(dev, "Reconfiguring PWM to "
1da177e4 1171 "active high polarity\n");
b74f3fdd 1172 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT
1173 tmp | 0x87);
1174 for (i = 0; i < 3; i++)
b74f3fdd 1175 it87_write_value(data,
1da177e4
LT
1176 IT87_REG_PWM(i),
1177 0x7f & ~pwm[i]);
1178 return 1;
1179 }
1180
b74f3fdd 1181 dev_info(dev, "PWM configuration is "
1da177e4
LT
1182 "too broken to be fixed\n");
1183 }
1184
b74f3fdd 1185 dev_info(dev, "Detected broken BIOS "
1da177e4
LT
1186 "defaults, disabling PWM interface\n");
1187 return 0;
1188 } else if (fix_pwm_polarity) {
b74f3fdd 1189 dev_info(dev, "PWM configuration looks "
1da177e4
LT
1190 "sane, won't touch\n");
1191 }
1192
1193 return 1;
1194}
1195
1196/* Called when we have found a new IT87. */
b74f3fdd 1197static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 1198{
b74f3fdd 1199 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4
LT
1200 int tmp, i;
1201
1202 /* initialize to sane defaults:
1203 * - if the chip is in manual pwm mode, this will be overwritten with
1204 * the actual settings on the chip (so in this case, initialization
1205 * is not needed)
1206 * - if in automatic or on/off mode, we could switch to manual mode,
1207 * read the registers and set manual_pwm_ctl accordingly, but currently
1208 * this is not implemented, so we initialize to something sane */
1209 for (i = 0; i < 3; i++) {
1210 data->manual_pwm_ctl[i] = 0xff;
1211 }
1212
c5df9b7a
JD
1213 /* Some chips seem to have default value 0xff for all limit
1214 * registers. For low voltage limits it makes no sense and triggers
1215 * alarms, so change to 0 instead. For high temperature limits, it
1216 * means -1 degree C, which surprisingly doesn't trigger an alarm,
1217 * but is still confusing, so change to 127 degrees C. */
1218 for (i = 0; i < 8; i++) {
b74f3fdd 1219 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 1220 if (tmp == 0xff)
b74f3fdd 1221 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD
1222 }
1223 for (i = 0; i < 3; i++) {
b74f3fdd 1224 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 1225 if (tmp == 0xff)
b74f3fdd 1226 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD
1227 }
1228
1da177e4 1229 /* Check if temperature channnels are reset manually or by some reason */
b74f3fdd 1230 tmp = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1da177e4
LT
1231 if ((tmp & 0x3f) == 0) {
1232 /* Temp1,Temp3=thermistor; Temp2=thermal diode */
1233 tmp = (tmp & 0xc0) | 0x2a;
b74f3fdd 1234 it87_write_value(data, IT87_REG_TEMP_ENABLE, tmp);
1da177e4
LT
1235 }
1236 data->sensor = tmp;
1237
1238 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 1239 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT
1240 if ((tmp & 0xff) == 0) {
1241 /* Enable all voltage monitors */
b74f3fdd 1242 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT
1243 }
1244
1245 /* Check if tachometers are reset manually or by some reason */
b74f3fdd 1246 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
1da177e4
LT
1247 if ((data->fan_main_ctrl & 0x70) == 0) {
1248 /* Enable all fan tachometers */
1249 data->fan_main_ctrl |= 0x70;
b74f3fdd 1250 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1da177e4 1251 }
9060f8bd 1252 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 1253
17d648bf 1254 /* Set tachometers to 16-bit mode if needed */
87673dd7 1255 if (data->type == it8716 || data->type == it8718) {
b74f3fdd 1256 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 1257 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 1258 dev_dbg(&pdev->dev,
17d648bf 1259 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 1260 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD
1261 tmp | 0x07);
1262 }
1263 }
1264
1da177e4
LT
1265 /* Set current fan mode registers and the default settings for the
1266 * other mode registers */
1267 for (i = 0; i < 3; i++) {
1268 if (data->fan_main_ctrl & (1 << i)) {
1269 /* pwm mode */
b74f3fdd 1270 tmp = it87_read_value(data, IT87_REG_PWM(i));
1da177e4
LT
1271 if (tmp & 0x80) {
1272 /* automatic pwm - not yet implemented, but
1273 * leave the settings made by the BIOS alone
1274 * until a change is requested via the sysfs
1275 * interface */
1276 } else {
1277 /* manual pwm */
1278 data->manual_pwm_ctl[i] = PWM_FROM_REG(tmp);
1279 }
1280 }
1281 }
1282
1283 /* Start monitoring */
b74f3fdd 1284 it87_write_value(data, IT87_REG_CONFIG,
1285 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1da177e4
LT
1286 | (update_vbat ? 0x41 : 0x01));
1287}
1288
1289static struct it87_data *it87_update_device(struct device *dev)
1290{
b74f3fdd 1291 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
1292 int i;
1293
9a61bf63 1294 mutex_lock(&data->update_lock);
1da177e4
LT
1295
1296 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1297 || !data->valid) {
1298
1299 if (update_vbat) {
1300 /* Cleared after each update, so reenable. Value
1301 returned by this read will be previous value */
b74f3fdd 1302 it87_write_value(data, IT87_REG_CONFIG,
1303 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT
1304 }
1305 for (i = 0; i <= 7; i++) {
1306 data->in[i] =
b74f3fdd 1307 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 1308 data->in_min[i] =
b74f3fdd 1309 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 1310 data->in_max[i] =
b74f3fdd 1311 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 1312 }
3543a53f 1313 /* in8 (battery) has no limit registers */
1da177e4 1314 data->in[8] =
b74f3fdd 1315 it87_read_value(data, IT87_REG_VIN(8));
1da177e4
LT
1316
1317 for (i = 0; i < 3; i++) {
9060f8bd
JD
1318 /* Skip disabled fans */
1319 if (!(data->has_fan & (1 << i)))
1320 continue;
1321
1da177e4 1322 data->fan_min[i] =
b74f3fdd 1323 it87_read_value(data, IT87_REG_FAN_MIN(i));
1324 data->fan[i] = it87_read_value(data,
17d648bf
JD
1325 IT87_REG_FAN(i));
1326 /* Add high byte if in 16-bit mode */
87673dd7 1327 if (data->type == it8716 || data->type == it8718) {
b74f3fdd 1328 data->fan[i] |= it87_read_value(data,
17d648bf 1329 IT87_REG_FANX(i)) << 8;
b74f3fdd 1330 data->fan_min[i] |= it87_read_value(data,
17d648bf
JD
1331 IT87_REG_FANX_MIN(i)) << 8;
1332 }
1da177e4
LT
1333 }
1334 for (i = 0; i < 3; i++) {
1335 data->temp[i] =
b74f3fdd 1336 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 1337 data->temp_high[i] =
b74f3fdd 1338 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 1339 data->temp_low[i] =
b74f3fdd 1340 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT
1341 }
1342
17d648bf 1343 /* Newer chips don't have clock dividers */
87673dd7
JD
1344 if ((data->has_fan & 0x07) && data->type != it8716
1345 && data->type != it8718) {
b74f3fdd 1346 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD
1347 data->fan_div[0] = i & 0x07;
1348 data->fan_div[1] = (i >> 3) & 0x07;
1349 data->fan_div[2] = (i & 0x40) ? 3 : 1;
1350 }
1da177e4
LT
1351
1352 data->alarms =
b74f3fdd 1353 it87_read_value(data, IT87_REG_ALARM1) |
1354 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1355 (it87_read_value(data, IT87_REG_ALARM3) << 16);
1356 data->fan_main_ctrl = it87_read_value(data,
1357 IT87_REG_FAN_MAIN_CTRL);
1358 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1359
1360 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1da177e4 1361 /* The 8705 does not have VID capability */
17d648bf 1362 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 1363 data->vid = it87_read_value(data, IT87_REG_VID);
17d648bf
JD
1364 /* The older IT8712F revisions had only 5 VID pins,
1365 but we assume it is always safe to read 6 bits. */
1366 data->vid &= 0x3f;
1da177e4
LT
1367 }
1368 data->last_updated = jiffies;
1369 data->valid = 1;
1370 }
1371
9a61bf63 1372 mutex_unlock(&data->update_lock);
1da177e4
LT
1373
1374 return data;
1375}
1376
b74f3fdd 1377static int __init it87_device_add(unsigned short address,
1378 const struct it87_sio_data *sio_data)
1379{
1380 struct resource res = {
1381 .start = address ,
1382 .end = address + IT87_EXTENT - 1,
1383 .name = DRVNAME,
1384 .flags = IORESOURCE_IO,
1385 };
1386 int err;
1387
1388 pdev = platform_device_alloc(DRVNAME, address);
1389 if (!pdev) {
1390 err = -ENOMEM;
1391 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1392 goto exit;
1393 }
1394
1395 err = platform_device_add_resources(pdev, &res, 1);
1396 if (err) {
1397 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1398 "(%d)\n", err);
1399 goto exit_device_put;
1400 }
1401
1402 err = platform_device_add_data(pdev, sio_data,
1403 sizeof(struct it87_sio_data));
1404 if (err) {
1405 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1406 goto exit_device_put;
1407 }
1408
1409 err = platform_device_add(pdev);
1410 if (err) {
1411 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1412 err);
1413 goto exit_device_put;
1414 }
1415
1416 return 0;
1417
1418exit_device_put:
1419 platform_device_put(pdev);
1420exit:
1421 return err;
1422}
1423
1da177e4
LT
1424static int __init sm_it87_init(void)
1425{
b74f3fdd 1426 int err;
1427 unsigned short isa_address=0;
1428 struct it87_sio_data sio_data;
1429
1430 err = it87_find(&isa_address, &sio_data);
1431 if (err)
1432 return err;
1433 err = platform_driver_register(&it87_driver);
1434 if (err)
1435 return err;
fde09509 1436
b74f3fdd 1437 err = it87_device_add(isa_address, &sio_data);
1438 if (err){
1439 platform_driver_unregister(&it87_driver);
1440 return err;
1441 }
1442
1443 return 0;
1da177e4
LT
1444}
1445
1446static void __exit sm_it87_exit(void)
1447{
b74f3fdd 1448 platform_device_unregister(pdev);
1449 platform_driver_unregister(&it87_driver);
1da177e4
LT
1450}
1451
1452
b19367c6
JD
1453MODULE_AUTHOR("Chris Gauthron <chrisg@0-in.com>, "
1454 "Jean Delvare <khali@linux-fr.org>");
08a8f6e9 1455MODULE_DESCRIPTION("IT8705F/8712F/8716F/8718F/8726F, SiS950 driver");
1da177e4
LT
1456module_param(update_vbat, bool, 0);
1457MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
1458module_param(fix_pwm_polarity, bool, 0);
1459MODULE_PARM_DESC(fix_pwm_polarity, "Force PWM polarity to active high (DANGEROUS)");
1460MODULE_LICENSE("GPL");
1461
1462module_init(sm_it87_init);
1463module_exit(sm_it87_exit);