eeepc-laptop: Fix hwmon interface
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4
LT
1/*
2 it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring.
4
87b4b663
BH
5 The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 addition to an Environment Controller (Enhanced Hardware Monitor and
8 Fan Controller)
9
10 This driver supports only the Environment Controller in the IT8705F and
11 similar parts. The other devices are supported by different drivers.
12
91749996 13 Supports: IT8705F Super I/O chip w/LPC interface
8e9afcbb 14 IT8712F Super I/O chip w/LPC interface
17d648bf 15 IT8716F Super I/O chip w/LPC interface
87673dd7 16 IT8718F Super I/O chip w/LPC interface
08a8f6e9 17 IT8726F Super I/O chip w/LPC interface
1da177e4
LT
18 Sis950 A clone of the IT8705F
19
f1d8e332 20 Copyright (C) 2001 Chris Gauthron
0124dd78 21 Copyright (C) 2005-2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT
22
23 This program is free software; you can redistribute it and/or modify
24 it under the terms of the GNU General Public License as published by
25 the Free Software Foundation; either version 2 of the License, or
26 (at your option) any later version.
27
28 This program is distributed in the hope that it will be useful,
29 but WITHOUT ANY WARRANTY; without even the implied warranty of
30 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 GNU General Public License for more details.
32
33 You should have received a copy of the GNU General Public License
34 along with this program; if not, write to the Free Software
35 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
36*/
37
1da177e4
LT
38#include <linux/module.h>
39#include <linux/init.h>
40#include <linux/slab.h>
41#include <linux/jiffies.h>
b74f3fdd 42#include <linux/platform_device.h>
943b0830 43#include <linux/hwmon.h>
303760b4
JD
44#include <linux/hwmon-sysfs.h>
45#include <linux/hwmon-vid.h>
943b0830 46#include <linux/err.h>
9a61bf63 47#include <linux/mutex.h>
87808be4 48#include <linux/sysfs.h>
1da177e4
LT
49#include <asm/io.h>
50
b74f3fdd 51#define DRVNAME "it87"
1da177e4 52
8e9afcbb 53enum chips { it87, it8712, it8716, it8718 };
1da177e4 54
67b671bc
JD
55static unsigned short force_id;
56module_param(force_id, ushort, 0);
57MODULE_PARM_DESC(force_id, "Override the detected device ID");
58
b74f3fdd 59static struct platform_device *pdev;
60
1da177e4
LT
61#define REG 0x2e /* The register to read/write */
62#define DEV 0x07 /* Register: Logical device select */
63#define VAL 0x2f /* The value to read/write */
64#define PME 0x04 /* The device with the fan registers in it */
87673dd7 65#define GPIO 0x07 /* The device with the IT8718F VID value in it */
1da177e4
LT
66#define DEVID 0x20 /* Register: Device ID */
67#define DEVREV 0x22 /* Register: Device Revision */
68
69static inline int
70superio_inb(int reg)
71{
72 outb(reg, REG);
73 return inb(VAL);
74}
75
76static int superio_inw(int reg)
77{
78 int val;
79 outb(reg++, REG);
80 val = inb(VAL) << 8;
81 outb(reg, REG);
82 val |= inb(VAL);
83 return val;
84}
85
86static inline void
87673dd7 87superio_select(int ldn)
1da177e4
LT
88{
89 outb(DEV, REG);
87673dd7 90 outb(ldn, VAL);
1da177e4
LT
91}
92
93static inline void
94superio_enter(void)
95{
96 outb(0x87, REG);
97 outb(0x01, REG);
98 outb(0x55, REG);
99 outb(0x55, REG);
100}
101
102static inline void
103superio_exit(void)
104{
105 outb(0x02, REG);
106 outb(0x02, VAL);
107}
108
87673dd7 109/* Logical device 4 registers */
1da177e4
LT
110#define IT8712F_DEVID 0x8712
111#define IT8705F_DEVID 0x8705
17d648bf 112#define IT8716F_DEVID 0x8716
87673dd7 113#define IT8718F_DEVID 0x8718
08a8f6e9 114#define IT8726F_DEVID 0x8726
1da177e4
LT
115#define IT87_ACT_REG 0x30
116#define IT87_BASE_REG 0x60
117
87673dd7
JD
118/* Logical device 7 registers (IT8712F and later) */
119#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
120#define IT87_SIO_VID_REG 0xfc /* VID value */
121
1da177e4
LT
122/* Update battery voltage after every reading if true */
123static int update_vbat;
124
125/* Not all BIOSes properly configure the PWM registers */
126static int fix_pwm_polarity;
127
1da177e4
LT
128/* Many IT87 constants specified below */
129
130/* Length of ISA address segment */
131#define IT87_EXTENT 8
132
87b4b663
BH
133/* Length of ISA address segment for Environmental Controller */
134#define IT87_EC_EXTENT 2
135
136/* Offset of EC registers from ISA base address */
137#define IT87_EC_OFFSET 5
138
139/* Where are the ISA address/data registers relative to the EC base address */
140#define IT87_ADDR_REG_OFFSET 0
141#define IT87_DATA_REG_OFFSET 1
1da177e4
LT
142
143/*----- The IT87 registers -----*/
144
145#define IT87_REG_CONFIG 0x00
146
147#define IT87_REG_ALARM1 0x01
148#define IT87_REG_ALARM2 0x02
149#define IT87_REG_ALARM3 0x03
150
87673dd7
JD
151/* The IT8718F has the VID value in a different register, in Super-I/O
152 configuration space. */
1da177e4 153#define IT87_REG_VID 0x0a
0475169c
AP
154/* The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
155 for fan divisors. Later IT8712F revisions must use 16-bit tachometer
156 mode. */
1da177e4 157#define IT87_REG_FAN_DIV 0x0b
17d648bf 158#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT
159
160/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
161
c7f1f716
JD
162static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
163static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
164static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
165static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT
166#define IT87_REG_FAN_MAIN_CTRL 0x13
167#define IT87_REG_FAN_CTL 0x14
168#define IT87_REG_PWM(nr) (0x15 + (nr))
169
170#define IT87_REG_VIN(nr) (0x20 + (nr))
171#define IT87_REG_TEMP(nr) (0x29 + (nr))
172
173#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
174#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
175#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
176#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
177
1da177e4
LT
178#define IT87_REG_VIN_ENABLE 0x50
179#define IT87_REG_TEMP_ENABLE 0x51
180
181#define IT87_REG_CHIPID 0x58
182
183#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
184#define IN_FROM_REG(val) ((val) * 16)
185
186static inline u8 FAN_TO_REG(long rpm, int div)
187{
188 if (rpm == 0)
189 return 255;
190 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
191 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
192 254);
193}
194
17d648bf
JD
195static inline u16 FAN16_TO_REG(long rpm)
196{
197 if (rpm == 0)
198 return 0xffff;
199 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
200}
201
1da177e4 202#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
17d648bf
JD
203/* The divider is fixed to 2 in 16-bit mode */
204#define FAN16_FROM_REG(val) ((val)==0?-1:(val)==0xffff?0:1350000/((val)*2))
1da177e4
LT
205
206#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-500)/1000):\
207 ((val)+500)/1000),-128,127))
208#define TEMP_FROM_REG(val) (((val)>0x80?(val)-0x100:(val))*1000)
209
1da177e4
LT
210#define PWM_TO_REG(val) ((val) >> 1)
211#define PWM_FROM_REG(val) (((val)&0x7f) << 1)
212
213static int DIV_TO_REG(int val)
214{
215 int answer = 0;
b9e349f7 216 while (answer < 7 && (val >>= 1))
1da177e4
LT
217 answer++;
218 return answer;
219}
220#define DIV_FROM_REG(val) (1 << (val))
221
f8d0c19a
JD
222static const unsigned int pwm_freq[8] = {
223 48000000 / 128,
224 24000000 / 128,
225 12000000 / 128,
226 8000000 / 128,
227 6000000 / 128,
228 3000000 / 128,
229 1500000 / 128,
230 750000 / 128,
231};
232
1da177e4 233
b74f3fdd 234struct it87_sio_data {
235 enum chips type;
236 /* Values read from Super-I/O config space */
0475169c 237 u8 revision;
b74f3fdd 238 u8 vid_value;
239};
240
ed6bafbf
JD
241/* For each registered chip, we need to keep some data in memory.
242 The structure is dynamically allocated. */
1da177e4 243struct it87_data {
1beeffe4 244 struct device *hwmon_dev;
1da177e4 245 enum chips type;
0475169c 246 u8 revision;
1da177e4 247
b74f3fdd 248 unsigned short addr;
249 const char *name;
9a61bf63 250 struct mutex update_lock;
1da177e4
LT
251 char valid; /* !=0 if following fields are valid */
252 unsigned long last_updated; /* In jiffies */
253
254 u8 in[9]; /* Register value */
3543a53f
JD
255 u8 in_max[8]; /* Register value */
256 u8 in_min[8]; /* Register value */
9060f8bd 257 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD
258 u16 fan[5]; /* Register values, possibly combined */
259 u16 fan_min[5]; /* Register values, possibly combined */
1da177e4
LT
260 u8 temp[3]; /* Register value */
261 u8 temp_high[3]; /* Register value */
262 u8 temp_low[3]; /* Register value */
263 u8 sensor; /* Register value */
264 u8 fan_div[3]; /* Register encoding, shifted right */
265 u8 vid; /* Register encoding, combined */
a7be58a1 266 u8 vrm;
1da177e4
LT
267 u32 alarms; /* Register encoding, combined */
268 u8 fan_main_ctrl; /* Register value */
f8d0c19a 269 u8 fan_ctl; /* Register value */
1da177e4
LT
270 u8 manual_pwm_ctl[3]; /* manual PWM value set by user */
271};
272
0475169c
AP
273static inline int has_16bit_fans(const struct it87_data *data)
274{
816d8c6a 275 /* IT8705F Datasheet 0.4.1, 3h == Version G.
859b9ef3 276 IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
816d8c6a
AP
277 These are the first revisions with 16bit tachometer support. */
278 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 279 || (data->type == it8712 && data->revision >= 0x08)
0475169c
AP
280 || data->type == it8716
281 || data->type == it8718;
282}
1da177e4 283
b74f3fdd 284static int it87_probe(struct platform_device *pdev);
d0546128 285static int __devexit it87_remove(struct platform_device *pdev);
1da177e4 286
b74f3fdd 287static int it87_read_value(struct it87_data *data, u8 reg);
288static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 289static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 290static int it87_check_pwm(struct device *dev);
291static void it87_init_device(struct platform_device *pdev);
1da177e4
LT
292
293
b74f3fdd 294static struct platform_driver it87_driver = {
cdaf7934 295 .driver = {
87218842 296 .owner = THIS_MODULE,
b74f3fdd 297 .name = DRVNAME,
cdaf7934 298 },
b74f3fdd 299 .probe = it87_probe,
300 .remove = __devexit_p(it87_remove),
fde09509
JD
301};
302
20ad93d4
JD
303static ssize_t show_in(struct device *dev, struct device_attribute *attr,
304 char *buf)
1da177e4 305{
20ad93d4
JD
306 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
307 int nr = sensor_attr->index;
308
1da177e4
LT
309 struct it87_data *data = it87_update_device(dev);
310 return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr]));
311}
312
20ad93d4
JD
313static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
314 char *buf)
1da177e4 315{
20ad93d4
JD
316 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
317 int nr = sensor_attr->index;
318
1da177e4
LT
319 struct it87_data *data = it87_update_device(dev);
320 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr]));
321}
322
20ad93d4
JD
323static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
324 char *buf)
1da177e4 325{
20ad93d4
JD
326 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
327 int nr = sensor_attr->index;
328
1da177e4
LT
329 struct it87_data *data = it87_update_device(dev);
330 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr]));
331}
332
20ad93d4
JD
333static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
334 const char *buf, size_t count)
1da177e4 335{
20ad93d4
JD
336 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
337 int nr = sensor_attr->index;
338
b74f3fdd 339 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
340 unsigned long val = simple_strtoul(buf, NULL, 10);
341
9a61bf63 342 mutex_lock(&data->update_lock);
1da177e4 343 data->in_min[nr] = IN_TO_REG(val);
b74f3fdd 344 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 345 data->in_min[nr]);
9a61bf63 346 mutex_unlock(&data->update_lock);
1da177e4
LT
347 return count;
348}
20ad93d4
JD
349static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
350 const char *buf, size_t count)
1da177e4 351{
20ad93d4
JD
352 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
353 int nr = sensor_attr->index;
354
b74f3fdd 355 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
356 unsigned long val = simple_strtoul(buf, NULL, 10);
357
9a61bf63 358 mutex_lock(&data->update_lock);
1da177e4 359 data->in_max[nr] = IN_TO_REG(val);
b74f3fdd 360 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 361 data->in_max[nr]);
9a61bf63 362 mutex_unlock(&data->update_lock);
1da177e4
LT
363 return count;
364}
365
366#define show_in_offset(offset) \
20ad93d4
JD
367static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
368 show_in, NULL, offset);
1da177e4
LT
369
370#define limit_in_offset(offset) \
20ad93d4
JD
371static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
372 show_in_min, set_in_min, offset); \
373static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
374 show_in_max, set_in_max, offset);
1da177e4
LT
375
376show_in_offset(0);
377limit_in_offset(0);
378show_in_offset(1);
379limit_in_offset(1);
380show_in_offset(2);
381limit_in_offset(2);
382show_in_offset(3);
383limit_in_offset(3);
384show_in_offset(4);
385limit_in_offset(4);
386show_in_offset(5);
387limit_in_offset(5);
388show_in_offset(6);
389limit_in_offset(6);
390show_in_offset(7);
391limit_in_offset(7);
392show_in_offset(8);
393
394/* 3 temperatures */
20ad93d4
JD
395static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
396 char *buf)
1da177e4 397{
20ad93d4
JD
398 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
399 int nr = sensor_attr->index;
400
1da177e4
LT
401 struct it87_data *data = it87_update_device(dev);
402 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
403}
20ad93d4
JD
404static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
405 char *buf)
1da177e4 406{
20ad93d4
JD
407 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
408 int nr = sensor_attr->index;
409
1da177e4
LT
410 struct it87_data *data = it87_update_device(dev);
411 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
412}
20ad93d4
JD
413static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
414 char *buf)
1da177e4 415{
20ad93d4
JD
416 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
417 int nr = sensor_attr->index;
418
1da177e4
LT
419 struct it87_data *data = it87_update_device(dev);
420 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
421}
20ad93d4
JD
422static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
423 const char *buf, size_t count)
1da177e4 424{
20ad93d4
JD
425 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
426 int nr = sensor_attr->index;
427
b74f3fdd 428 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
429 int val = simple_strtol(buf, NULL, 10);
430
9a61bf63 431 mutex_lock(&data->update_lock);
1da177e4 432 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 433 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 434 mutex_unlock(&data->update_lock);
1da177e4
LT
435 return count;
436}
20ad93d4
JD
437static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
438 const char *buf, size_t count)
1da177e4 439{
20ad93d4
JD
440 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
441 int nr = sensor_attr->index;
442
b74f3fdd 443 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
444 int val = simple_strtol(buf, NULL, 10);
445
9a61bf63 446 mutex_lock(&data->update_lock);
1da177e4 447 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 448 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 449 mutex_unlock(&data->update_lock);
1da177e4
LT
450 return count;
451}
452#define show_temp_offset(offset) \
20ad93d4
JD
453static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
454 show_temp, NULL, offset - 1); \
455static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
456 show_temp_max, set_temp_max, offset - 1); \
457static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
458 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT
459
460show_temp_offset(1);
461show_temp_offset(2);
462show_temp_offset(3);
463
20ad93d4
JD
464static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
465 char *buf)
1da177e4 466{
20ad93d4
JD
467 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
468 int nr = sensor_attr->index;
469
1da177e4
LT
470 struct it87_data *data = it87_update_device(dev);
471 u8 reg = data->sensor; /* In case the value is updated while we use it */
472
473 if (reg & (1 << nr))
474 return sprintf(buf, "3\n"); /* thermal diode */
475 if (reg & (8 << nr))
476 return sprintf(buf, "2\n"); /* thermistor */
477 return sprintf(buf, "0\n"); /* disabled */
478}
20ad93d4
JD
479static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
480 const char *buf, size_t count)
1da177e4 481{
20ad93d4
JD
482 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
483 int nr = sensor_attr->index;
484
b74f3fdd 485 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
486 int val = simple_strtol(buf, NULL, 10);
487
9a61bf63 488 mutex_lock(&data->update_lock);
1da177e4
LT
489
490 data->sensor &= ~(1 << nr);
491 data->sensor &= ~(8 << nr);
492 /* 3 = thermal diode; 2 = thermistor; 0 = disabled */
493 if (val == 3)
494 data->sensor |= 1 << nr;
495 else if (val == 2)
496 data->sensor |= 8 << nr;
497 else if (val != 0) {
9a61bf63 498 mutex_unlock(&data->update_lock);
1da177e4
LT
499 return -EINVAL;
500 }
b74f3fdd 501 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
9a61bf63 502 mutex_unlock(&data->update_lock);
1da177e4
LT
503 return count;
504}
505#define show_sensor_offset(offset) \
20ad93d4
JD
506static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
507 show_sensor, set_sensor, offset - 1);
1da177e4
LT
508
509show_sensor_offset(1);
510show_sensor_offset(2);
511show_sensor_offset(3);
512
513/* 3 Fans */
20ad93d4
JD
514static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
515 char *buf)
1da177e4 516{
20ad93d4
JD
517 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
518 int nr = sensor_attr->index;
519
1da177e4
LT
520 struct it87_data *data = it87_update_device(dev);
521 return sprintf(buf,"%d\n", FAN_FROM_REG(data->fan[nr],
522 DIV_FROM_REG(data->fan_div[nr])));
523}
20ad93d4
JD
524static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
525 char *buf)
1da177e4 526{
20ad93d4
JD
527 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
528 int nr = sensor_attr->index;
529
1da177e4
LT
530 struct it87_data *data = it87_update_device(dev);
531 return sprintf(buf,"%d\n",
532 FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])));
533}
20ad93d4
JD
534static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
535 char *buf)
1da177e4 536{
20ad93d4
JD
537 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
538 int nr = sensor_attr->index;
539
1da177e4
LT
540 struct it87_data *data = it87_update_device(dev);
541 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
542}
20ad93d4
JD
543static ssize_t show_pwm_enable(struct device *dev, struct device_attribute *attr,
544 char *buf)
1da177e4 545{
20ad93d4
JD
546 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
547 int nr = sensor_attr->index;
548
1da177e4
LT
549 struct it87_data *data = it87_update_device(dev);
550 return sprintf(buf,"%d\n", (data->fan_main_ctrl & (1 << nr)) ? 1 : 0);
551}
20ad93d4
JD
552static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
553 char *buf)
1da177e4 554{
20ad93d4
JD
555 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
556 int nr = sensor_attr->index;
557
1da177e4
LT
558 struct it87_data *data = it87_update_device(dev);
559 return sprintf(buf,"%d\n", data->manual_pwm_ctl[nr]);
560}
f8d0c19a
JD
561static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
562 char *buf)
563{
564 struct it87_data *data = it87_update_device(dev);
565 int index = (data->fan_ctl >> 4) & 0x07;
566
567 return sprintf(buf, "%u\n", pwm_freq[index]);
568}
20ad93d4
JD
569static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
570 const char *buf, size_t count)
1da177e4 571{
20ad93d4
JD
572 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
573 int nr = sensor_attr->index;
574
b74f3fdd 575 struct it87_data *data = dev_get_drvdata(dev);
1da177e4 576 int val = simple_strtol(buf, NULL, 10);
7f999aa7 577 u8 reg;
1da177e4 578
9a61bf63 579 mutex_lock(&data->update_lock);
b74f3fdd 580 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d
JD
581 switch (nr) {
582 case 0: data->fan_div[nr] = reg & 0x07; break;
583 case 1: data->fan_div[nr] = (reg >> 3) & 0x07; break;
584 case 2: data->fan_div[nr] = (reg & 0x40) ? 3 : 1; break;
585 }
586
1da177e4 587 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 588 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 589 mutex_unlock(&data->update_lock);
1da177e4
LT
590 return count;
591}
20ad93d4
JD
592static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
593 const char *buf, size_t count)
1da177e4 594{
20ad93d4
JD
595 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
596 int nr = sensor_attr->index;
597
b74f3fdd 598 struct it87_data *data = dev_get_drvdata(dev);
b9e349f7 599 unsigned long val = simple_strtoul(buf, NULL, 10);
8ab4ec3e 600 int min;
1da177e4
LT
601 u8 old;
602
9a61bf63 603 mutex_lock(&data->update_lock);
b74f3fdd 604 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 605
8ab4ec3e
JD
606 /* Save fan min limit */
607 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT
608
609 switch (nr) {
610 case 0:
611 case 1:
612 data->fan_div[nr] = DIV_TO_REG(val);
613 break;
614 case 2:
615 if (val < 8)
616 data->fan_div[nr] = 1;
617 else
618 data->fan_div[nr] = 3;
619 }
620 val = old & 0x80;
621 val |= (data->fan_div[0] & 0x07);
622 val |= (data->fan_div[1] & 0x07) << 3;
623 if (data->fan_div[2] == 3)
624 val |= 0x1 << 6;
b74f3fdd 625 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 626
8ab4ec3e
JD
627 /* Restore fan min limit */
628 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 629 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 630
9a61bf63 631 mutex_unlock(&data->update_lock);
1da177e4
LT
632 return count;
633}
20ad93d4
JD
634static ssize_t set_pwm_enable(struct device *dev,
635 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 636{
20ad93d4
JD
637 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
638 int nr = sensor_attr->index;
639
b74f3fdd 640 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
641 int val = simple_strtol(buf, NULL, 10);
642
9a61bf63 643 mutex_lock(&data->update_lock);
1da177e4
LT
644
645 if (val == 0) {
646 int tmp;
647 /* make sure the fan is on when in on/off mode */
b74f3fdd 648 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
649 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT
650 /* set on/off mode */
651 data->fan_main_ctrl &= ~(1 << nr);
b74f3fdd 652 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1da177e4
LT
653 } else if (val == 1) {
654 /* set SmartGuardian mode */
655 data->fan_main_ctrl |= (1 << nr);
b74f3fdd 656 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1da177e4 657 /* set saved pwm value, clear FAN_CTLX PWM mode bit */
b74f3fdd 658 it87_write_value(data, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr]));
1da177e4 659 } else {
9a61bf63 660 mutex_unlock(&data->update_lock);
1da177e4
LT
661 return -EINVAL;
662 }
663
9a61bf63 664 mutex_unlock(&data->update_lock);
1da177e4
LT
665 return count;
666}
20ad93d4
JD
667static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
668 const char *buf, size_t count)
1da177e4 669{
20ad93d4
JD
670 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
671 int nr = sensor_attr->index;
672
b74f3fdd 673 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
674 int val = simple_strtol(buf, NULL, 10);
675
676 if (val < 0 || val > 255)
677 return -EINVAL;
678
9a61bf63 679 mutex_lock(&data->update_lock);
1da177e4
LT
680 data->manual_pwm_ctl[nr] = val;
681 if (data->fan_main_ctrl & (1 << nr))
b74f3fdd 682 it87_write_value(data, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr]));
9a61bf63 683 mutex_unlock(&data->update_lock);
1da177e4
LT
684 return count;
685}
f8d0c19a
JD
686static ssize_t set_pwm_freq(struct device *dev,
687 struct device_attribute *attr, const char *buf, size_t count)
688{
b74f3fdd 689 struct it87_data *data = dev_get_drvdata(dev);
f8d0c19a
JD
690 unsigned long val = simple_strtoul(buf, NULL, 10);
691 int i;
692
693 /* Search for the nearest available frequency */
694 for (i = 0; i < 7; i++) {
695 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
696 break;
697 }
698
699 mutex_lock(&data->update_lock);
b74f3fdd 700 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 701 data->fan_ctl |= i << 4;
b74f3fdd 702 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD
703 mutex_unlock(&data->update_lock);
704
705 return count;
706}
1da177e4 707
20ad93d4
JD
708#define show_fan_offset(offset) \
709static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
710 show_fan, NULL, offset - 1); \
711static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
712 show_fan_min, set_fan_min, offset - 1); \
713static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
714 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT
715
716show_fan_offset(1);
717show_fan_offset(2);
718show_fan_offset(3);
719
720#define show_pwm_offset(offset) \
20ad93d4
JD
721static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
722 show_pwm_enable, set_pwm_enable, offset - 1); \
723static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD
724 show_pwm, set_pwm, offset - 1); \
725static DEVICE_ATTR(pwm##offset##_freq, \
726 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
727 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL));
1da177e4
LT
728
729show_pwm_offset(1);
730show_pwm_offset(2);
731show_pwm_offset(3);
732
17d648bf
JD
733/* A different set of callbacks for 16-bit fans */
734static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
735 char *buf)
736{
737 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
738 int nr = sensor_attr->index;
739 struct it87_data *data = it87_update_device(dev);
740 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
741}
742
743static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
744 char *buf)
745{
746 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
747 int nr = sensor_attr->index;
748 struct it87_data *data = it87_update_device(dev);
749 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
750}
751
752static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
753 const char *buf, size_t count)
754{
755 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
756 int nr = sensor_attr->index;
b74f3fdd 757 struct it87_data *data = dev_get_drvdata(dev);
17d648bf
JD
758 int val = simple_strtol(buf, NULL, 10);
759
760 mutex_lock(&data->update_lock);
761 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 762 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 763 data->fan_min[nr] & 0xff);
c7f1f716 764 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD
765 data->fan_min[nr] >> 8);
766 mutex_unlock(&data->update_lock);
767 return count;
768}
769
770/* We want to use the same sysfs file names as 8-bit fans, but we need
771 different variable names, so we have to use SENSOR_ATTR instead of
772 SENSOR_DEVICE_ATTR. */
773#define show_fan16_offset(offset) \
774static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
775 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
776 show_fan16, NULL, offset - 1); \
777static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
778 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
779 show_fan16_min, set_fan16_min, offset - 1)
780
781show_fan16_offset(1);
782show_fan16_offset(2);
783show_fan16_offset(3);
c7f1f716
JD
784show_fan16_offset(4);
785show_fan16_offset(5);
17d648bf 786
1da177e4 787/* Alarms */
30f74292 788static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
789{
790 struct it87_data *data = it87_update_device(dev);
68188ba7 791 return sprintf(buf, "%u\n", data->alarms);
1da177e4 792}
1d66c64c 793static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 794
0124dd78
JD
795static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
796 char *buf)
797{
798 int bitnr = to_sensor_dev_attr(attr)->index;
799 struct it87_data *data = it87_update_device(dev);
800 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
801}
802static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
803static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
804static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
805static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
806static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
807static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
808static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
809static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
810static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
811static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
812static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
813static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
814static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
815static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
816static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
817static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
818
1da177e4 819static ssize_t
30f74292 820show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 821{
90d6619a 822 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 823 return sprintf(buf, "%u\n", data->vrm);
1da177e4
LT
824}
825static ssize_t
30f74292 826store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 827{
b74f3fdd 828 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
829 u32 val;
830
831 val = simple_strtoul(buf, NULL, 10);
832 data->vrm = val;
833
834 return count;
835}
836static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4
LT
837
838static ssize_t
30f74292 839show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
840{
841 struct it87_data *data = it87_update_device(dev);
842 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
843}
844static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 845
b74f3fdd 846static ssize_t show_name(struct device *dev, struct device_attribute
847 *devattr, char *buf)
848{
849 struct it87_data *data = dev_get_drvdata(dev);
850 return sprintf(buf, "%s\n", data->name);
851}
852static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
853
87808be4
JD
854static struct attribute *it87_attributes[] = {
855 &sensor_dev_attr_in0_input.dev_attr.attr,
856 &sensor_dev_attr_in1_input.dev_attr.attr,
857 &sensor_dev_attr_in2_input.dev_attr.attr,
858 &sensor_dev_attr_in3_input.dev_attr.attr,
859 &sensor_dev_attr_in4_input.dev_attr.attr,
860 &sensor_dev_attr_in5_input.dev_attr.attr,
861 &sensor_dev_attr_in6_input.dev_attr.attr,
862 &sensor_dev_attr_in7_input.dev_attr.attr,
863 &sensor_dev_attr_in8_input.dev_attr.attr,
864 &sensor_dev_attr_in0_min.dev_attr.attr,
865 &sensor_dev_attr_in1_min.dev_attr.attr,
866 &sensor_dev_attr_in2_min.dev_attr.attr,
867 &sensor_dev_attr_in3_min.dev_attr.attr,
868 &sensor_dev_attr_in4_min.dev_attr.attr,
869 &sensor_dev_attr_in5_min.dev_attr.attr,
870 &sensor_dev_attr_in6_min.dev_attr.attr,
871 &sensor_dev_attr_in7_min.dev_attr.attr,
872 &sensor_dev_attr_in0_max.dev_attr.attr,
873 &sensor_dev_attr_in1_max.dev_attr.attr,
874 &sensor_dev_attr_in2_max.dev_attr.attr,
875 &sensor_dev_attr_in3_max.dev_attr.attr,
876 &sensor_dev_attr_in4_max.dev_attr.attr,
877 &sensor_dev_attr_in5_max.dev_attr.attr,
878 &sensor_dev_attr_in6_max.dev_attr.attr,
879 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78
JD
880 &sensor_dev_attr_in0_alarm.dev_attr.attr,
881 &sensor_dev_attr_in1_alarm.dev_attr.attr,
882 &sensor_dev_attr_in2_alarm.dev_attr.attr,
883 &sensor_dev_attr_in3_alarm.dev_attr.attr,
884 &sensor_dev_attr_in4_alarm.dev_attr.attr,
885 &sensor_dev_attr_in5_alarm.dev_attr.attr,
886 &sensor_dev_attr_in6_alarm.dev_attr.attr,
887 &sensor_dev_attr_in7_alarm.dev_attr.attr,
87808be4
JD
888
889 &sensor_dev_attr_temp1_input.dev_attr.attr,
890 &sensor_dev_attr_temp2_input.dev_attr.attr,
891 &sensor_dev_attr_temp3_input.dev_attr.attr,
892 &sensor_dev_attr_temp1_max.dev_attr.attr,
893 &sensor_dev_attr_temp2_max.dev_attr.attr,
894 &sensor_dev_attr_temp3_max.dev_attr.attr,
895 &sensor_dev_attr_temp1_min.dev_attr.attr,
896 &sensor_dev_attr_temp2_min.dev_attr.attr,
897 &sensor_dev_attr_temp3_min.dev_attr.attr,
898 &sensor_dev_attr_temp1_type.dev_attr.attr,
899 &sensor_dev_attr_temp2_type.dev_attr.attr,
900 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78
JD
901 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
902 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
903 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
87808be4
JD
904
905 &dev_attr_alarms.attr,
b74f3fdd 906 &dev_attr_name.attr,
87808be4
JD
907 NULL
908};
909
910static const struct attribute_group it87_group = {
911 .attrs = it87_attributes,
912};
913
914static struct attribute *it87_attributes_opt[] = {
915 &sensor_dev_attr_fan1_input16.dev_attr.attr,
916 &sensor_dev_attr_fan1_min16.dev_attr.attr,
917 &sensor_dev_attr_fan2_input16.dev_attr.attr,
918 &sensor_dev_attr_fan2_min16.dev_attr.attr,
919 &sensor_dev_attr_fan3_input16.dev_attr.attr,
920 &sensor_dev_attr_fan3_min16.dev_attr.attr,
c7f1f716
JD
921 &sensor_dev_attr_fan4_input16.dev_attr.attr,
922 &sensor_dev_attr_fan4_min16.dev_attr.attr,
923 &sensor_dev_attr_fan5_input16.dev_attr.attr,
924 &sensor_dev_attr_fan5_min16.dev_attr.attr,
87808be4
JD
925
926 &sensor_dev_attr_fan1_input.dev_attr.attr,
927 &sensor_dev_attr_fan1_min.dev_attr.attr,
928 &sensor_dev_attr_fan1_div.dev_attr.attr,
929 &sensor_dev_attr_fan2_input.dev_attr.attr,
930 &sensor_dev_attr_fan2_min.dev_attr.attr,
931 &sensor_dev_attr_fan2_div.dev_attr.attr,
932 &sensor_dev_attr_fan3_input.dev_attr.attr,
933 &sensor_dev_attr_fan3_min.dev_attr.attr,
934 &sensor_dev_attr_fan3_div.dev_attr.attr,
935
0124dd78
JD
936 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
937 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
938 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
939 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
940 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
941
87808be4
JD
942 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
943 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
944 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
945 &sensor_dev_attr_pwm1.dev_attr.attr,
946 &sensor_dev_attr_pwm2.dev_attr.attr,
947 &sensor_dev_attr_pwm3.dev_attr.attr,
d5b0b5d6
JD
948 &dev_attr_pwm1_freq.attr,
949 &dev_attr_pwm2_freq.attr,
950 &dev_attr_pwm3_freq.attr,
87808be4
JD
951
952 &dev_attr_vrm.attr,
953 &dev_attr_cpu0_vid.attr,
954 NULL
955};
956
957static const struct attribute_group it87_group_opt = {
958 .attrs = it87_attributes_opt,
959};
1da177e4 960
2d8672c5 961/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 962static int __init it87_find(unsigned short *address,
963 struct it87_sio_data *sio_data)
1da177e4
LT
964{
965 int err = -ENODEV;
b74f3fdd 966 u16 chip_type;
1da177e4
LT
967
968 superio_enter();
67b671bc 969 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 970
971 switch (chip_type) {
972 case IT8705F_DEVID:
973 sio_data->type = it87;
974 break;
975 case IT8712F_DEVID:
976 sio_data->type = it8712;
977 break;
978 case IT8716F_DEVID:
979 case IT8726F_DEVID:
980 sio_data->type = it8716;
981 break;
982 case IT8718F_DEVID:
983 sio_data->type = it8718;
984 break;
985 case 0xffff: /* No device at all */
986 goto exit;
987 default:
988 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%x)\n",
989 chip_type);
990 goto exit;
991 }
1da177e4 992
87673dd7 993 superio_select(PME);
1da177e4
LT
994 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
995 pr_info("it87: Device not activated, skipping\n");
996 goto exit;
997 }
998
999 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1000 if (*address == 0) {
1001 pr_info("it87: Base address not set, skipping\n");
1002 goto exit;
1003 }
1004
1005 err = 0;
0475169c 1006 sio_data->revision = superio_inb(DEVREV) & 0x0f;
1da177e4 1007 pr_info("it87: Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1008 chip_type, *address, sio_data->revision);
1da177e4 1009
87673dd7
JD
1010 /* Read GPIO config and VID value from LDN 7 (GPIO) */
1011 if (chip_type != IT8705F_DEVID) {
1012 int reg;
1013
1014 superio_select(GPIO);
1015 if (chip_type == it8718)
b74f3fdd 1016 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD
1017
1018 reg = superio_inb(IT87_SIO_PINX2_REG);
1019 if (reg & (1 << 0))
1020 pr_info("it87: in3 is VCC (+5V)\n");
1021 if (reg & (1 << 1))
1022 pr_info("it87: in7 is VCCH (+5V Stand-By)\n");
1023 }
1024
1da177e4
LT
1025exit:
1026 superio_exit();
1027 return err;
1028}
1029
b74f3fdd 1030static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 1031{
1da177e4 1032 struct it87_data *data;
b74f3fdd 1033 struct resource *res;
1034 struct device *dev = &pdev->dev;
1035 struct it87_sio_data *sio_data = dev->platform_data;
1da177e4 1036 int err = 0;
1da177e4 1037 int enable_pwm_interface;
b74f3fdd 1038 static const char *names[] = {
1039 "it87",
1040 "it8712",
1041 "it8716",
1042 "it8718",
1043 };
1044
1045 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
87b4b663 1046 if (!request_region(res->start, IT87_EC_EXTENT, DRVNAME)) {
b74f3fdd 1047 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1048 (unsigned long)res->start,
87b4b663 1049 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
8e9afcbb
JD
1050 err = -EBUSY;
1051 goto ERROR0;
1052 }
1da177e4 1053
ba9c2e8d 1054 if (!(data = kzalloc(sizeof(struct it87_data), GFP_KERNEL))) {
1da177e4
LT
1055 err = -ENOMEM;
1056 goto ERROR1;
1057 }
1da177e4 1058
b74f3fdd 1059 data->addr = res->start;
1060 data->type = sio_data->type;
0475169c 1061 data->revision = sio_data->revision;
b74f3fdd 1062 data->name = names[sio_data->type];
1da177e4
LT
1063
1064 /* Now, we do the remaining detection. */
b74f3fdd 1065 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
1066 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
8e9afcbb
JD
1067 err = -ENODEV;
1068 goto ERROR2;
1da177e4
LT
1069 }
1070
b74f3fdd 1071 platform_set_drvdata(pdev, data);
1da177e4 1072
9a61bf63 1073 mutex_init(&data->update_lock);
1da177e4 1074
1da177e4 1075 /* Check PWM configuration */
b74f3fdd 1076 enable_pwm_interface = it87_check_pwm(dev);
1da177e4
LT
1077
1078 /* Initialize the IT87 chip */
b74f3fdd 1079 it87_init_device(pdev);
1da177e4
LT
1080
1081 /* Register sysfs hooks */
b74f3fdd 1082 if ((err = sysfs_create_group(&dev->kobj, &it87_group)))
1083 goto ERROR2;
17d648bf 1084
9060f8bd 1085 /* Do not create fan files for disabled fans */
0475169c 1086 if (has_16bit_fans(data)) {
87673dd7 1087 /* 16-bit tachometers */
9060f8bd 1088 if (data->has_fan & (1 << 0)) {
b74f3fdd 1089 if ((err = device_create_file(dev,
87808be4 1090 &sensor_dev_attr_fan1_input16.dev_attr))
b74f3fdd 1091 || (err = device_create_file(dev,
0124dd78
JD
1092 &sensor_dev_attr_fan1_min16.dev_attr))
1093 || (err = device_create_file(dev,
1094 &sensor_dev_attr_fan1_alarm.dev_attr)))
87808be4 1095 goto ERROR4;
9060f8bd
JD
1096 }
1097 if (data->has_fan & (1 << 1)) {
b74f3fdd 1098 if ((err = device_create_file(dev,
87808be4 1099 &sensor_dev_attr_fan2_input16.dev_attr))
b74f3fdd 1100 || (err = device_create_file(dev,
0124dd78
JD
1101 &sensor_dev_attr_fan2_min16.dev_attr))
1102 || (err = device_create_file(dev,
1103 &sensor_dev_attr_fan2_alarm.dev_attr)))
87808be4 1104 goto ERROR4;
9060f8bd
JD
1105 }
1106 if (data->has_fan & (1 << 2)) {
b74f3fdd 1107 if ((err = device_create_file(dev,
87808be4 1108 &sensor_dev_attr_fan3_input16.dev_attr))
b74f3fdd 1109 || (err = device_create_file(dev,
0124dd78
JD
1110 &sensor_dev_attr_fan3_min16.dev_attr))
1111 || (err = device_create_file(dev,
1112 &sensor_dev_attr_fan3_alarm.dev_attr)))
87808be4 1113 goto ERROR4;
9060f8bd 1114 }
c7f1f716
JD
1115 if (data->has_fan & (1 << 3)) {
1116 if ((err = device_create_file(dev,
1117 &sensor_dev_attr_fan4_input16.dev_attr))
1118 || (err = device_create_file(dev,
0124dd78
JD
1119 &sensor_dev_attr_fan4_min16.dev_attr))
1120 || (err = device_create_file(dev,
1121 &sensor_dev_attr_fan4_alarm.dev_attr)))
c7f1f716
JD
1122 goto ERROR4;
1123 }
1124 if (data->has_fan & (1 << 4)) {
1125 if ((err = device_create_file(dev,
1126 &sensor_dev_attr_fan5_input16.dev_attr))
1127 || (err = device_create_file(dev,
0124dd78
JD
1128 &sensor_dev_attr_fan5_min16.dev_attr))
1129 || (err = device_create_file(dev,
1130 &sensor_dev_attr_fan5_alarm.dev_attr)))
c7f1f716
JD
1131 goto ERROR4;
1132 }
17d648bf 1133 } else {
87673dd7 1134 /* 8-bit tachometers with clock divider */
9060f8bd 1135 if (data->has_fan & (1 << 0)) {
b74f3fdd 1136 if ((err = device_create_file(dev,
87808be4 1137 &sensor_dev_attr_fan1_input.dev_attr))
b74f3fdd 1138 || (err = device_create_file(dev,
87808be4 1139 &sensor_dev_attr_fan1_min.dev_attr))
b74f3fdd 1140 || (err = device_create_file(dev,
0124dd78
JD
1141 &sensor_dev_attr_fan1_div.dev_attr))
1142 || (err = device_create_file(dev,
1143 &sensor_dev_attr_fan1_alarm.dev_attr)))
87808be4 1144 goto ERROR4;
9060f8bd
JD
1145 }
1146 if (data->has_fan & (1 << 1)) {
b74f3fdd 1147 if ((err = device_create_file(dev,
87808be4 1148 &sensor_dev_attr_fan2_input.dev_attr))
b74f3fdd 1149 || (err = device_create_file(dev,
87808be4 1150 &sensor_dev_attr_fan2_min.dev_attr))
b74f3fdd 1151 || (err = device_create_file(dev,
0124dd78
JD
1152 &sensor_dev_attr_fan2_div.dev_attr))
1153 || (err = device_create_file(dev,
1154 &sensor_dev_attr_fan2_alarm.dev_attr)))
87808be4 1155 goto ERROR4;
9060f8bd
JD
1156 }
1157 if (data->has_fan & (1 << 2)) {
b74f3fdd 1158 if ((err = device_create_file(dev,
87808be4 1159 &sensor_dev_attr_fan3_input.dev_attr))
b74f3fdd 1160 || (err = device_create_file(dev,
87808be4 1161 &sensor_dev_attr_fan3_min.dev_attr))
b74f3fdd 1162 || (err = device_create_file(dev,
0124dd78
JD
1163 &sensor_dev_attr_fan3_div.dev_attr))
1164 || (err = device_create_file(dev,
1165 &sensor_dev_attr_fan3_alarm.dev_attr)))
87808be4 1166 goto ERROR4;
9060f8bd 1167 }
17d648bf
JD
1168 }
1169
1da177e4 1170 if (enable_pwm_interface) {
b74f3fdd 1171 if ((err = device_create_file(dev,
87808be4 1172 &sensor_dev_attr_pwm1_enable.dev_attr))
b74f3fdd 1173 || (err = device_create_file(dev,
87808be4 1174 &sensor_dev_attr_pwm2_enable.dev_attr))
b74f3fdd 1175 || (err = device_create_file(dev,
87808be4 1176 &sensor_dev_attr_pwm3_enable.dev_attr))
b74f3fdd 1177 || (err = device_create_file(dev,
87808be4 1178 &sensor_dev_attr_pwm1.dev_attr))
b74f3fdd 1179 || (err = device_create_file(dev,
87808be4 1180 &sensor_dev_attr_pwm2.dev_attr))
b74f3fdd 1181 || (err = device_create_file(dev,
f8d0c19a 1182 &sensor_dev_attr_pwm3.dev_attr))
b74f3fdd 1183 || (err = device_create_file(dev,
f8d0c19a 1184 &dev_attr_pwm1_freq))
b74f3fdd 1185 || (err = device_create_file(dev,
f8d0c19a 1186 &dev_attr_pwm2_freq))
b74f3fdd 1187 || (err = device_create_file(dev,
f8d0c19a 1188 &dev_attr_pwm3_freq)))
87808be4 1189 goto ERROR4;
1da177e4
LT
1190 }
1191
87673dd7
JD
1192 if (data->type == it8712 || data->type == it8716
1193 || data->type == it8718) {
303760b4 1194 data->vrm = vid_which_vrm();
87673dd7 1195 /* VID reading from Super-I/O config space if available */
b74f3fdd 1196 data->vid = sio_data->vid_value;
1197 if ((err = device_create_file(dev,
87808be4 1198 &dev_attr_vrm))
b74f3fdd 1199 || (err = device_create_file(dev,
87808be4
JD
1200 &dev_attr_cpu0_vid)))
1201 goto ERROR4;
1202 }
1203
1beeffe4
TJ
1204 data->hwmon_dev = hwmon_device_register(dev);
1205 if (IS_ERR(data->hwmon_dev)) {
1206 err = PTR_ERR(data->hwmon_dev);
87808be4 1207 goto ERROR4;
1da177e4
LT
1208 }
1209
1210 return 0;
1211
87808be4 1212ERROR4:
b74f3fdd 1213 sysfs_remove_group(&dev->kobj, &it87_group);
1214 sysfs_remove_group(&dev->kobj, &it87_group_opt);
1da177e4 1215ERROR2:
b74f3fdd 1216 platform_set_drvdata(pdev, NULL);
1da177e4
LT
1217 kfree(data);
1218ERROR1:
87b4b663 1219 release_region(res->start, IT87_EC_EXTENT);
1da177e4
LT
1220ERROR0:
1221 return err;
1222}
1223
b74f3fdd 1224static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 1225{
b74f3fdd 1226 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1227
1beeffe4 1228 hwmon_device_unregister(data->hwmon_dev);
b74f3fdd 1229 sysfs_remove_group(&pdev->dev.kobj, &it87_group);
1230 sysfs_remove_group(&pdev->dev.kobj, &it87_group_opt);
943b0830 1231
87b4b663 1232 release_region(data->addr, IT87_EC_EXTENT);
b74f3fdd 1233 platform_set_drvdata(pdev, NULL);
943b0830 1234 kfree(data);
1da177e4
LT
1235
1236 return 0;
1237}
1238
7f999aa7 1239/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT
1240 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1241 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1242static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 1243{
b74f3fdd 1244 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1245 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
1246}
1247
7f999aa7 1248/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT
1249 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1250 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1251static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 1252{
b74f3fdd 1253 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1254 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
1255}
1256
1257/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 1258static int __devinit it87_check_pwm(struct device *dev)
1da177e4 1259{
b74f3fdd 1260 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
1261 /* Some BIOSes fail to correctly configure the IT87 fans. All fans off
1262 * and polarity set to active low is sign that this is the case so we
1263 * disable pwm control to protect the user. */
b74f3fdd 1264 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT
1265 if ((tmp & 0x87) == 0) {
1266 if (fix_pwm_polarity) {
1267 /* The user asks us to attempt a chip reconfiguration.
1268 * This means switching to active high polarity and
1269 * inverting all fan speed values. */
1270 int i;
1271 u8 pwm[3];
1272
1273 for (i = 0; i < 3; i++)
b74f3fdd 1274 pwm[i] = it87_read_value(data,
1da177e4
LT
1275 IT87_REG_PWM(i));
1276
1277 /* If any fan is in automatic pwm mode, the polarity
1278 * might be correct, as suspicious as it seems, so we
1279 * better don't change anything (but still disable the
1280 * PWM interface). */
1281 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 1282 dev_info(dev, "Reconfiguring PWM to "
1da177e4 1283 "active high polarity\n");
b74f3fdd 1284 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT
1285 tmp | 0x87);
1286 for (i = 0; i < 3; i++)
b74f3fdd 1287 it87_write_value(data,
1da177e4
LT
1288 IT87_REG_PWM(i),
1289 0x7f & ~pwm[i]);
1290 return 1;
1291 }
1292
b74f3fdd 1293 dev_info(dev, "PWM configuration is "
1da177e4
LT
1294 "too broken to be fixed\n");
1295 }
1296
b74f3fdd 1297 dev_info(dev, "Detected broken BIOS "
1da177e4
LT
1298 "defaults, disabling PWM interface\n");
1299 return 0;
1300 } else if (fix_pwm_polarity) {
b74f3fdd 1301 dev_info(dev, "PWM configuration looks "
1da177e4
LT
1302 "sane, won't touch\n");
1303 }
1304
1305 return 1;
1306}
1307
1308/* Called when we have found a new IT87. */
b74f3fdd 1309static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 1310{
b74f3fdd 1311 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4
LT
1312 int tmp, i;
1313
1314 /* initialize to sane defaults:
1315 * - if the chip is in manual pwm mode, this will be overwritten with
1316 * the actual settings on the chip (so in this case, initialization
1317 * is not needed)
1318 * - if in automatic or on/off mode, we could switch to manual mode,
1319 * read the registers and set manual_pwm_ctl accordingly, but currently
1320 * this is not implemented, so we initialize to something sane */
1321 for (i = 0; i < 3; i++) {
1322 data->manual_pwm_ctl[i] = 0xff;
1323 }
1324
c5df9b7a
JD
1325 /* Some chips seem to have default value 0xff for all limit
1326 * registers. For low voltage limits it makes no sense and triggers
1327 * alarms, so change to 0 instead. For high temperature limits, it
1328 * means -1 degree C, which surprisingly doesn't trigger an alarm,
1329 * but is still confusing, so change to 127 degrees C. */
1330 for (i = 0; i < 8; i++) {
b74f3fdd 1331 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 1332 if (tmp == 0xff)
b74f3fdd 1333 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD
1334 }
1335 for (i = 0; i < 3; i++) {
b74f3fdd 1336 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 1337 if (tmp == 0xff)
b74f3fdd 1338 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD
1339 }
1340
1da177e4 1341 /* Check if temperature channnels are reset manually or by some reason */
b74f3fdd 1342 tmp = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1da177e4
LT
1343 if ((tmp & 0x3f) == 0) {
1344 /* Temp1,Temp3=thermistor; Temp2=thermal diode */
1345 tmp = (tmp & 0xc0) | 0x2a;
b74f3fdd 1346 it87_write_value(data, IT87_REG_TEMP_ENABLE, tmp);
1da177e4
LT
1347 }
1348 data->sensor = tmp;
1349
1350 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 1351 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT
1352 if ((tmp & 0xff) == 0) {
1353 /* Enable all voltage monitors */
b74f3fdd 1354 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT
1355 }
1356
1357 /* Check if tachometers are reset manually or by some reason */
b74f3fdd 1358 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
1da177e4
LT
1359 if ((data->fan_main_ctrl & 0x70) == 0) {
1360 /* Enable all fan tachometers */
1361 data->fan_main_ctrl |= 0x70;
b74f3fdd 1362 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1da177e4 1363 }
9060f8bd 1364 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 1365
17d648bf 1366 /* Set tachometers to 16-bit mode if needed */
0475169c 1367 if (has_16bit_fans(data)) {
b74f3fdd 1368 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 1369 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 1370 dev_dbg(&pdev->dev,
17d648bf 1371 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 1372 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD
1373 tmp | 0x07);
1374 }
816d8c6a
AP
1375 /* IT8705F only supports three fans. */
1376 if (data->type != it87) {
1377 if (tmp & (1 << 4))
1378 data->has_fan |= (1 << 3); /* fan4 enabled */
1379 if (tmp & (1 << 5))
1380 data->has_fan |= (1 << 4); /* fan5 enabled */
1381 }
17d648bf
JD
1382 }
1383
1da177e4
LT
1384 /* Set current fan mode registers and the default settings for the
1385 * other mode registers */
1386 for (i = 0; i < 3; i++) {
1387 if (data->fan_main_ctrl & (1 << i)) {
1388 /* pwm mode */
b74f3fdd 1389 tmp = it87_read_value(data, IT87_REG_PWM(i));
1da177e4
LT
1390 if (tmp & 0x80) {
1391 /* automatic pwm - not yet implemented, but
1392 * leave the settings made by the BIOS alone
1393 * until a change is requested via the sysfs
1394 * interface */
1395 } else {
1396 /* manual pwm */
1397 data->manual_pwm_ctl[i] = PWM_FROM_REG(tmp);
1398 }
1399 }
1400 }
1401
1402 /* Start monitoring */
b74f3fdd 1403 it87_write_value(data, IT87_REG_CONFIG,
1404 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1da177e4
LT
1405 | (update_vbat ? 0x41 : 0x01));
1406}
1407
1408static struct it87_data *it87_update_device(struct device *dev)
1409{
b74f3fdd 1410 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
1411 int i;
1412
9a61bf63 1413 mutex_lock(&data->update_lock);
1da177e4
LT
1414
1415 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1416 || !data->valid) {
1417
1418 if (update_vbat) {
1419 /* Cleared after each update, so reenable. Value
1420 returned by this read will be previous value */
b74f3fdd 1421 it87_write_value(data, IT87_REG_CONFIG,
1422 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT
1423 }
1424 for (i = 0; i <= 7; i++) {
1425 data->in[i] =
b74f3fdd 1426 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 1427 data->in_min[i] =
b74f3fdd 1428 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 1429 data->in_max[i] =
b74f3fdd 1430 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 1431 }
3543a53f 1432 /* in8 (battery) has no limit registers */
1da177e4 1433 data->in[8] =
b74f3fdd 1434 it87_read_value(data, IT87_REG_VIN(8));
1da177e4 1435
c7f1f716 1436 for (i = 0; i < 5; i++) {
9060f8bd
JD
1437 /* Skip disabled fans */
1438 if (!(data->has_fan & (1 << i)))
1439 continue;
1440
1da177e4 1441 data->fan_min[i] =
c7f1f716 1442 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 1443 data->fan[i] = it87_read_value(data,
c7f1f716 1444 IT87_REG_FAN[i]);
17d648bf 1445 /* Add high byte if in 16-bit mode */
0475169c 1446 if (has_16bit_fans(data)) {
b74f3fdd 1447 data->fan[i] |= it87_read_value(data,
c7f1f716 1448 IT87_REG_FANX[i]) << 8;
b74f3fdd 1449 data->fan_min[i] |= it87_read_value(data,
c7f1f716 1450 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 1451 }
1da177e4
LT
1452 }
1453 for (i = 0; i < 3; i++) {
1454 data->temp[i] =
b74f3fdd 1455 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 1456 data->temp_high[i] =
b74f3fdd 1457 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 1458 data->temp_low[i] =
b74f3fdd 1459 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT
1460 }
1461
17d648bf 1462 /* Newer chips don't have clock dividers */
0475169c 1463 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 1464 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD
1465 data->fan_div[0] = i & 0x07;
1466 data->fan_div[1] = (i >> 3) & 0x07;
1467 data->fan_div[2] = (i & 0x40) ? 3 : 1;
1468 }
1da177e4
LT
1469
1470 data->alarms =
b74f3fdd 1471 it87_read_value(data, IT87_REG_ALARM1) |
1472 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1473 (it87_read_value(data, IT87_REG_ALARM3) << 16);
1474 data->fan_main_ctrl = it87_read_value(data,
1475 IT87_REG_FAN_MAIN_CTRL);
1476 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1477
1478 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
0475169c
AP
1479 /* The 8705 does not have VID capability.
1480 The 8718 does not use IT87_REG_VID for the same purpose. */
17d648bf 1481 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 1482 data->vid = it87_read_value(data, IT87_REG_VID);
17d648bf
JD
1483 /* The older IT8712F revisions had only 5 VID pins,
1484 but we assume it is always safe to read 6 bits. */
1485 data->vid &= 0x3f;
1da177e4
LT
1486 }
1487 data->last_updated = jiffies;
1488 data->valid = 1;
1489 }
1490
9a61bf63 1491 mutex_unlock(&data->update_lock);
1da177e4
LT
1492
1493 return data;
1494}
1495
b74f3fdd 1496static int __init it87_device_add(unsigned short address,
1497 const struct it87_sio_data *sio_data)
1498{
1499 struct resource res = {
87b4b663
BH
1500 .start = address + IT87_EC_OFFSET,
1501 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 1502 .name = DRVNAME,
1503 .flags = IORESOURCE_IO,
1504 };
1505 int err;
1506
1507 pdev = platform_device_alloc(DRVNAME, address);
1508 if (!pdev) {
1509 err = -ENOMEM;
1510 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1511 goto exit;
1512 }
1513
1514 err = platform_device_add_resources(pdev, &res, 1);
1515 if (err) {
1516 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1517 "(%d)\n", err);
1518 goto exit_device_put;
1519 }
1520
1521 err = platform_device_add_data(pdev, sio_data,
1522 sizeof(struct it87_sio_data));
1523 if (err) {
1524 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1525 goto exit_device_put;
1526 }
1527
1528 err = platform_device_add(pdev);
1529 if (err) {
1530 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1531 err);
1532 goto exit_device_put;
1533 }
1534
1535 return 0;
1536
1537exit_device_put:
1538 platform_device_put(pdev);
1539exit:
1540 return err;
1541}
1542
1da177e4
LT
1543static int __init sm_it87_init(void)
1544{
b74f3fdd 1545 int err;
1546 unsigned short isa_address=0;
1547 struct it87_sio_data sio_data;
1548
1549 err = it87_find(&isa_address, &sio_data);
1550 if (err)
1551 return err;
1552 err = platform_driver_register(&it87_driver);
1553 if (err)
1554 return err;
fde09509 1555
b74f3fdd 1556 err = it87_device_add(isa_address, &sio_data);
1557 if (err){
1558 platform_driver_unregister(&it87_driver);
1559 return err;
1560 }
1561
1562 return 0;
1da177e4
LT
1563}
1564
1565static void __exit sm_it87_exit(void)
1566{
b74f3fdd 1567 platform_device_unregister(pdev);
1568 platform_driver_unregister(&it87_driver);
1da177e4
LT
1569}
1570
1571
f1d8e332 1572MODULE_AUTHOR("Chris Gauthron, "
b19367c6 1573 "Jean Delvare <khali@linux-fr.org>");
08a8f6e9 1574MODULE_DESCRIPTION("IT8705F/8712F/8716F/8718F/8726F, SiS950 driver");
1da177e4
LT
1575module_param(update_vbat, bool, 0);
1576MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
1577module_param(fix_pwm_polarity, bool, 0);
1578MODULE_PARM_DESC(fix_pwm_polarity, "Force PWM polarity to active high (DANGEROUS)");
1579MODULE_LICENSE("GPL");
1580
1581module_init(sm_it87_init);
1582module_exit(sm_it87_exit);