drm/vmwgfx: Add the possibility to validate a buffer as a MOB
[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_execbuf.c
CommitLineData
fb1d9738
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1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "vmwgfx_reg.h"
760285e7
DH
30#include <drm/ttm/ttm_bo_api.h>
31#include <drm/ttm/ttm_placement.h>
fb1d9738 32
c0951b79
TH
33#define VMW_RES_HT_ORDER 12
34
35/**
36 * struct vmw_resource_relocation - Relocation info for resources
37 *
38 * @head: List head for the software context's relocation list.
39 * @res: Non-ref-counted pointer to the resource.
40 * @offset: Offset of 4 byte entries into the command buffer where the
41 * id that needs fixup is located.
42 */
43struct vmw_resource_relocation {
44 struct list_head head;
45 const struct vmw_resource *res;
46 unsigned long offset;
47};
48
49/**
50 * struct vmw_resource_val_node - Validation info for resources
51 *
52 * @head: List head for the software context's resource list.
53 * @hash: Hash entry for quick resouce to val_node lookup.
54 * @res: Ref-counted pointer to the resource.
55 * @switch_backup: Boolean whether to switch backup buffer on unreserve.
56 * @new_backup: Refcounted pointer to the new backup buffer.
57 * @new_backup_offset: New backup buffer offset if @new_backup is non-NUll.
58 * @first_usage: Set to true the first time the resource is referenced in
59 * the command stream.
60 * @no_buffer_needed: Resources do not need to allocate buffer backup on
61 * reservation. The command stream will provide one.
62 */
63struct vmw_resource_val_node {
64 struct list_head head;
65 struct drm_hash_item hash;
66 struct vmw_resource *res;
67 struct vmw_dma_buffer *new_backup;
68 unsigned long new_backup_offset;
69 bool first_usage;
70 bool no_buffer_needed;
71};
72
73/**
74 * vmw_resource_unreserve - unreserve resources previously reserved for
75 * command submission.
76 *
77 * @list_head: list of resources to unreserve.
78 * @backoff: Whether command submission failed.
79 */
80static void vmw_resource_list_unreserve(struct list_head *list,
81 bool backoff)
82{
83 struct vmw_resource_val_node *val;
84
85 list_for_each_entry(val, list, head) {
86 struct vmw_resource *res = val->res;
87 struct vmw_dma_buffer *new_backup =
88 backoff ? NULL : val->new_backup;
89
90 vmw_resource_unreserve(res, new_backup,
91 val->new_backup_offset);
92 vmw_dmabuf_unreference(&val->new_backup);
93 }
94}
95
96
97/**
98 * vmw_resource_val_add - Add a resource to the software context's
99 * resource list if it's not already on it.
100 *
101 * @sw_context: Pointer to the software context.
102 * @res: Pointer to the resource.
103 * @p_node On successful return points to a valid pointer to a
104 * struct vmw_resource_val_node, if non-NULL on entry.
105 */
106static int vmw_resource_val_add(struct vmw_sw_context *sw_context,
107 struct vmw_resource *res,
108 struct vmw_resource_val_node **p_node)
109{
110 struct vmw_resource_val_node *node;
111 struct drm_hash_item *hash;
112 int ret;
113
114 if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) res,
115 &hash) == 0)) {
116 node = container_of(hash, struct vmw_resource_val_node, hash);
117 node->first_usage = false;
118 if (unlikely(p_node != NULL))
119 *p_node = node;
120 return 0;
121 }
122
123 node = kzalloc(sizeof(*node), GFP_KERNEL);
124 if (unlikely(node == NULL)) {
125 DRM_ERROR("Failed to allocate a resource validation "
126 "entry.\n");
127 return -ENOMEM;
128 }
129
130 node->hash.key = (unsigned long) res;
131 ret = drm_ht_insert_item(&sw_context->res_ht, &node->hash);
132 if (unlikely(ret != 0)) {
133 DRM_ERROR("Failed to initialize a resource validation "
134 "entry.\n");
135 kfree(node);
136 return ret;
137 }
138 list_add_tail(&node->head, &sw_context->resource_list);
139 node->res = vmw_resource_reference(res);
140 node->first_usage = true;
141
142 if (unlikely(p_node != NULL))
143 *p_node = node;
144
145 return 0;
146}
147
148/**
149 * vmw_resource_relocation_add - Add a relocation to the relocation list
150 *
151 * @list: Pointer to head of relocation list.
152 * @res: The resource.
153 * @offset: Offset into the command buffer currently being parsed where the
154 * id that needs fixup is located. Granularity is 4 bytes.
155 */
156static int vmw_resource_relocation_add(struct list_head *list,
157 const struct vmw_resource *res,
158 unsigned long offset)
159{
160 struct vmw_resource_relocation *rel;
161
162 rel = kmalloc(sizeof(*rel), GFP_KERNEL);
163 if (unlikely(rel == NULL)) {
164 DRM_ERROR("Failed to allocate a resource relocation.\n");
165 return -ENOMEM;
166 }
167
168 rel->res = res;
169 rel->offset = offset;
170 list_add_tail(&rel->head, list);
171
172 return 0;
173}
174
175/**
176 * vmw_resource_relocations_free - Free all relocations on a list
177 *
178 * @list: Pointer to the head of the relocation list.
179 */
180static void vmw_resource_relocations_free(struct list_head *list)
181{
182 struct vmw_resource_relocation *rel, *n;
183
184 list_for_each_entry_safe(rel, n, list, head) {
185 list_del(&rel->head);
186 kfree(rel);
187 }
188}
189
190/**
191 * vmw_resource_relocations_apply - Apply all relocations on a list
192 *
193 * @cb: Pointer to the start of the command buffer bein patch. This need
194 * not be the same buffer as the one being parsed when the relocation
195 * list was built, but the contents must be the same modulo the
196 * resource ids.
197 * @list: Pointer to the head of the relocation list.
198 */
199static void vmw_resource_relocations_apply(uint32_t *cb,
200 struct list_head *list)
201{
202 struct vmw_resource_relocation *rel;
203
204 list_for_each_entry(rel, list, head)
205 cb[rel->offset] = rel->res->id;
206}
207
fb1d9738
JB
208static int vmw_cmd_invalid(struct vmw_private *dev_priv,
209 struct vmw_sw_context *sw_context,
210 SVGA3dCmdHeader *header)
211{
212 return capable(CAP_SYS_ADMIN) ? : -EINVAL;
213}
214
215static int vmw_cmd_ok(struct vmw_private *dev_priv,
216 struct vmw_sw_context *sw_context,
217 SVGA3dCmdHeader *header)
218{
219 return 0;
220}
221
e2fa3a76
TH
222/**
223 * vmw_bo_to_validate_list - add a bo to a validate list
224 *
225 * @sw_context: The software context used for this command submission batch.
226 * @bo: The buffer object to add.
96c5f0df 227 * @validate_as_mob: Validate this buffer as a MOB.
e2fa3a76
TH
228 * @p_val_node: If non-NULL Will be updated with the validate node number
229 * on return.
230 *
231 * Returns -EINVAL if the limit of number of buffer objects per command
232 * submission is reached.
233 */
234static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context,
235 struct ttm_buffer_object *bo,
96c5f0df 236 bool validate_as_mob,
e2fa3a76
TH
237 uint32_t *p_val_node)
238{
239 uint32_t val_node;
c0951b79 240 struct vmw_validate_buffer *vval_buf;
e2fa3a76 241 struct ttm_validate_buffer *val_buf;
c0951b79
TH
242 struct drm_hash_item *hash;
243 int ret;
e2fa3a76 244
c0951b79
TH
245 if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) bo,
246 &hash) == 0)) {
247 vval_buf = container_of(hash, struct vmw_validate_buffer,
248 hash);
96c5f0df
TH
249 if (unlikely(vval_buf->validate_as_mob != validate_as_mob)) {
250 DRM_ERROR("Inconsistent buffer usage.\n");
251 return -EINVAL;
252 }
c0951b79
TH
253 val_buf = &vval_buf->base;
254 val_node = vval_buf - sw_context->val_bufs;
255 } else {
256 val_node = sw_context->cur_val_buf;
257 if (unlikely(val_node >= VMWGFX_MAX_VALIDATIONS)) {
258 DRM_ERROR("Max number of DMA buffers per submission "
259 "exceeded.\n");
260 return -EINVAL;
261 }
262 vval_buf = &sw_context->val_bufs[val_node];
263 vval_buf->hash.key = (unsigned long) bo;
264 ret = drm_ht_insert_item(&sw_context->res_ht, &vval_buf->hash);
265 if (unlikely(ret != 0)) {
266 DRM_ERROR("Failed to initialize a buffer validation "
267 "entry.\n");
268 return ret;
269 }
270 ++sw_context->cur_val_buf;
271 val_buf = &vval_buf->base;
e2fa3a76 272 val_buf->bo = ttm_bo_reference(bo);
c0951b79 273 val_buf->reserved = false;
e2fa3a76 274 list_add_tail(&val_buf->head, &sw_context->validate_nodes);
96c5f0df 275 vval_buf->validate_as_mob = validate_as_mob;
e2fa3a76
TH
276 }
277
be013367 278 sw_context->fence_flags |= DRM_VMW_FENCE_FLAG_EXEC;
e2fa3a76
TH
279
280 if (p_val_node)
281 *p_val_node = val_node;
282
283 return 0;
284}
285
c0951b79
TH
286/**
287 * vmw_resources_reserve - Reserve all resources on the sw_context's
288 * resource list.
289 *
290 * @sw_context: Pointer to the software context.
291 *
292 * Note that since vmware's command submission currently is protected by
293 * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
294 * since only a single thread at once will attempt this.
295 */
296static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
fb1d9738 297{
c0951b79 298 struct vmw_resource_val_node *val;
fb1d9738
JB
299 int ret;
300
c0951b79
TH
301 list_for_each_entry(val, &sw_context->resource_list, head) {
302 struct vmw_resource *res = val->res;
fb1d9738 303
c0951b79
TH
304 ret = vmw_resource_reserve(res, val->no_buffer_needed);
305 if (unlikely(ret != 0))
306 return ret;
307
308 if (res->backup) {
309 struct ttm_buffer_object *bo = &res->backup->base;
310
311 ret = vmw_bo_to_validate_list
96c5f0df
TH
312 (sw_context, bo,
313 vmw_resource_needs_backup(res), NULL);
c0951b79
TH
314
315 if (unlikely(ret != 0))
316 return ret;
317 }
fb1d9738 318 }
c0951b79
TH
319 return 0;
320}
fb1d9738 321
c0951b79
TH
322/**
323 * vmw_resources_validate - Validate all resources on the sw_context's
324 * resource list.
325 *
326 * @sw_context: Pointer to the software context.
327 *
328 * Before this function is called, all resource backup buffers must have
329 * been validated.
330 */
331static int vmw_resources_validate(struct vmw_sw_context *sw_context)
332{
333 struct vmw_resource_val_node *val;
334 int ret;
335
336 list_for_each_entry(val, &sw_context->resource_list, head) {
337 struct vmw_resource *res = val->res;
f18c8840 338
c0951b79
TH
339 ret = vmw_resource_validate(res);
340 if (unlikely(ret != 0)) {
341 if (ret != -ERESTARTSYS)
342 DRM_ERROR("Failed to validate resource.\n");
343 return ret;
344 }
345 }
f18c8840 346 return 0;
fb1d9738
JB
347}
348
c0951b79
TH
349/**
350 * vmw_cmd_res_check - Check that a resource is present and if so, put it
351 * on the resource validate list unless it's already there.
352 *
353 * @dev_priv: Pointer to a device private structure.
354 * @sw_context: Pointer to the software context.
355 * @res_type: Resource type.
356 * @converter: User-space visisble type specific information.
357 * @id: Pointer to the location in the command buffer currently being
358 * parsed from where the user-space resource id handle is located.
359 */
360static int vmw_cmd_res_check(struct vmw_private *dev_priv,
fb1d9738 361 struct vmw_sw_context *sw_context,
c0951b79
TH
362 enum vmw_res_type res_type,
363 const struct vmw_user_resource_conv *converter,
364 uint32_t *id,
365 struct vmw_resource_val_node **p_val)
fb1d9738 366{
c0951b79
TH
367 struct vmw_res_cache_entry *rcache =
368 &sw_context->res_cache[res_type];
be38ab6e 369 struct vmw_resource *res;
c0951b79
TH
370 struct vmw_resource_val_node *node;
371 int ret;
be38ab6e 372
c0951b79 373 if (*id == SVGA3D_INVALID_ID)
7a73ba74
TH
374 return 0;
375
c0951b79
TH
376 /*
377 * Fastpath in case of repeated commands referencing the same
378 * resource
379 */
7a73ba74 380
c0951b79
TH
381 if (likely(rcache->valid && *id == rcache->handle)) {
382 const struct vmw_resource *res = rcache->res;
383
384 rcache->node->first_usage = false;
385 if (p_val)
386 *p_val = rcache->node;
387
388 return vmw_resource_relocation_add
389 (&sw_context->res_relocations, res,
390 id - sw_context->buf_start);
be38ab6e
TH
391 }
392
c0951b79
TH
393 ret = vmw_user_resource_lookup_handle(dev_priv,
394 sw_context->tfile,
395 *id,
396 converter,
397 &res);
5bb39e81 398 if (unlikely(ret != 0)) {
c0951b79
TH
399 DRM_ERROR("Could not find or use resource 0x%08x.\n",
400 (unsigned) *id);
401 dump_stack();
5bb39e81
TH
402 return ret;
403 }
404
c0951b79
TH
405 rcache->valid = true;
406 rcache->res = res;
407 rcache->handle = *id;
be38ab6e 408
c0951b79
TH
409 ret = vmw_resource_relocation_add(&sw_context->res_relocations,
410 res,
411 id - sw_context->buf_start);
412 if (unlikely(ret != 0))
413 goto out_no_reloc;
414
415 ret = vmw_resource_val_add(sw_context, res, &node);
416 if (unlikely(ret != 0))
417 goto out_no_reloc;
f18c8840 418
c0951b79
TH
419 rcache->node = node;
420 if (p_val)
421 *p_val = node;
422 vmw_resource_unreference(&res);
f18c8840 423 return 0;
c0951b79
TH
424
425out_no_reloc:
426 BUG_ON(sw_context->error_resource != NULL);
427 sw_context->error_resource = res;
428
429 return ret;
fb1d9738
JB
430}
431
c0951b79
TH
432/**
433 * vmw_cmd_cid_check - Check a command header for valid context information.
434 *
435 * @dev_priv: Pointer to a device private structure.
436 * @sw_context: Pointer to the software context.
437 * @header: A command header with an embedded user-space context handle.
438 *
439 * Convenience function: Call vmw_cmd_res_check with the user-space context
440 * handle embedded in @header.
441 */
442static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
443 struct vmw_sw_context *sw_context,
444 SVGA3dCmdHeader *header)
445{
446 struct vmw_cid_cmd {
447 SVGA3dCmdHeader header;
448 __le32 cid;
449 } *cmd;
450
451 cmd = container_of(header, struct vmw_cid_cmd, header);
452 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
453 user_context_converter, &cmd->cid, NULL);
454}
fb1d9738
JB
455
456static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
457 struct vmw_sw_context *sw_context,
458 SVGA3dCmdHeader *header)
459{
460 struct vmw_sid_cmd {
461 SVGA3dCmdHeader header;
462 SVGA3dCmdSetRenderTarget body;
463 } *cmd;
464 int ret;
465
466 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
467 if (unlikely(ret != 0))
468 return ret;
469
470 cmd = container_of(header, struct vmw_sid_cmd, header);
c0951b79
TH
471 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
472 user_surface_converter,
473 &cmd->body.target.sid, NULL);
7a73ba74 474 return ret;
fb1d9738
JB
475}
476
477static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
478 struct vmw_sw_context *sw_context,
479 SVGA3dCmdHeader *header)
480{
481 struct vmw_sid_cmd {
482 SVGA3dCmdHeader header;
483 SVGA3dCmdSurfaceCopy body;
484 } *cmd;
485 int ret;
486
487 cmd = container_of(header, struct vmw_sid_cmd, header);
c0951b79
TH
488 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
489 user_surface_converter,
490 &cmd->body.src.sid, NULL);
fb1d9738
JB
491 if (unlikely(ret != 0))
492 return ret;
c0951b79
TH
493 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
494 user_surface_converter,
495 &cmd->body.dest.sid, NULL);
fb1d9738
JB
496}
497
498static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
499 struct vmw_sw_context *sw_context,
500 SVGA3dCmdHeader *header)
501{
502 struct vmw_sid_cmd {
503 SVGA3dCmdHeader header;
504 SVGA3dCmdSurfaceStretchBlt body;
505 } *cmd;
506 int ret;
507
508 cmd = container_of(header, struct vmw_sid_cmd, header);
c0951b79
TH
509 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
510 user_surface_converter,
511 &cmd->body.src.sid, NULL);
fb1d9738
JB
512 if (unlikely(ret != 0))
513 return ret;
c0951b79
TH
514 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
515 user_surface_converter,
516 &cmd->body.dest.sid, NULL);
fb1d9738
JB
517}
518
519static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
520 struct vmw_sw_context *sw_context,
521 SVGA3dCmdHeader *header)
522{
523 struct vmw_sid_cmd {
524 SVGA3dCmdHeader header;
525 SVGA3dCmdBlitSurfaceToScreen body;
526 } *cmd;
527
528 cmd = container_of(header, struct vmw_sid_cmd, header);
0cff60c6
JB
529
530 if (unlikely(!sw_context->kernel)) {
531 DRM_ERROR("Kernel only SVGA3d command: %u.\n", cmd->header.id);
532 return -EPERM;
533 }
534
c0951b79
TH
535 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
536 user_surface_converter,
537 &cmd->body.srcImage.sid, NULL);
fb1d9738
JB
538}
539
540static int vmw_cmd_present_check(struct vmw_private *dev_priv,
541 struct vmw_sw_context *sw_context,
542 SVGA3dCmdHeader *header)
543{
544 struct vmw_sid_cmd {
545 SVGA3dCmdHeader header;
546 SVGA3dCmdPresent body;
547 } *cmd;
548
5bb39e81 549
fb1d9738 550 cmd = container_of(header, struct vmw_sid_cmd, header);
0cff60c6
JB
551
552 if (unlikely(!sw_context->kernel)) {
553 DRM_ERROR("Kernel only SVGA3d command: %u.\n", cmd->header.id);
554 return -EPERM;
555 }
556
c0951b79
TH
557 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
558 user_surface_converter, &cmd->body.sid,
559 NULL);
fb1d9738
JB
560}
561
e2fa3a76
TH
562/**
563 * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
564 *
565 * @dev_priv: The device private structure.
e2fa3a76
TH
566 * @new_query_bo: The new buffer holding query results.
567 * @sw_context: The software context used for this command submission.
568 *
569 * This function checks whether @new_query_bo is suitable for holding
570 * query results, and if another buffer currently is pinned for query
571 * results. If so, the function prepares the state of @sw_context for
572 * switching pinned buffers after successful submission of the current
c0951b79 573 * command batch.
e2fa3a76
TH
574 */
575static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
e2fa3a76
TH
576 struct ttm_buffer_object *new_query_bo,
577 struct vmw_sw_context *sw_context)
578{
c0951b79
TH
579 struct vmw_res_cache_entry *ctx_entry =
580 &sw_context->res_cache[vmw_res_context];
e2fa3a76 581 int ret;
c0951b79
TH
582
583 BUG_ON(!ctx_entry->valid);
584 sw_context->last_query_ctx = ctx_entry->res;
e2fa3a76
TH
585
586 if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
587
588 if (unlikely(new_query_bo->num_pages > 4)) {
589 DRM_ERROR("Query buffer too large.\n");
590 return -EINVAL;
591 }
592
593 if (unlikely(sw_context->cur_query_bo != NULL)) {
c0951b79 594 sw_context->needs_post_query_barrier = true;
e2fa3a76
TH
595 ret = vmw_bo_to_validate_list(sw_context,
596 sw_context->cur_query_bo,
96c5f0df 597 dev_priv->has_mob, NULL);
e2fa3a76
TH
598 if (unlikely(ret != 0))
599 return ret;
600 }
601 sw_context->cur_query_bo = new_query_bo;
602
603 ret = vmw_bo_to_validate_list(sw_context,
604 dev_priv->dummy_query_bo,
96c5f0df 605 dev_priv->has_mob, NULL);
e2fa3a76
TH
606 if (unlikely(ret != 0))
607 return ret;
608
609 }
610
e2fa3a76
TH
611 return 0;
612}
613
614
615/**
616 * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
617 *
618 * @dev_priv: The device private structure.
619 * @sw_context: The software context used for this command submission batch.
620 *
621 * This function will check if we're switching query buffers, and will then,
e2fa3a76
TH
622 * issue a dummy occlusion query wait used as a query barrier. When the fence
623 * object following that query wait has signaled, we are sure that all
c0951b79 624 * preceding queries have finished, and the old query buffer can be unpinned.
e2fa3a76
TH
625 * However, since both the new query buffer and the old one are fenced with
626 * that fence, we can do an asynchronus unpin now, and be sure that the
627 * old query buffer won't be moved until the fence has signaled.
628 *
629 * As mentioned above, both the new - and old query buffers need to be fenced
630 * using a sequence emitted *after* calling this function.
631 */
632static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
633 struct vmw_sw_context *sw_context)
634{
e2fa3a76
TH
635 /*
636 * The validate list should still hold references to all
637 * contexts here.
638 */
639
c0951b79
TH
640 if (sw_context->needs_post_query_barrier) {
641 struct vmw_res_cache_entry *ctx_entry =
642 &sw_context->res_cache[vmw_res_context];
643 struct vmw_resource *ctx;
644 int ret;
e2fa3a76 645
c0951b79
TH
646 BUG_ON(!ctx_entry->valid);
647 ctx = ctx_entry->res;
e2fa3a76
TH
648
649 ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
650
651 if (unlikely(ret != 0))
652 DRM_ERROR("Out of fifo space for dummy query.\n");
653 }
654
655 if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
656 if (dev_priv->pinned_bo) {
657 vmw_bo_pin(dev_priv->pinned_bo, false);
658 ttm_bo_unref(&dev_priv->pinned_bo);
659 }
660
c0951b79
TH
661 if (!sw_context->needs_post_query_barrier) {
662 vmw_bo_pin(sw_context->cur_query_bo, true);
e2fa3a76 663
c0951b79
TH
664 /*
665 * We pin also the dummy_query_bo buffer so that we
666 * don't need to validate it when emitting
667 * dummy queries in context destroy paths.
668 */
e2fa3a76 669
c0951b79
TH
670 vmw_bo_pin(dev_priv->dummy_query_bo, true);
671 dev_priv->dummy_query_bo_pinned = true;
e2fa3a76 672
c0951b79
TH
673 BUG_ON(sw_context->last_query_ctx == NULL);
674 dev_priv->query_cid = sw_context->last_query_ctx->id;
675 dev_priv->query_cid_valid = true;
676 dev_priv->pinned_bo =
677 ttm_bo_reference(sw_context->cur_query_bo);
678 }
e2fa3a76
TH
679 }
680}
681
682/**
c0951b79
TH
683 * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
684 * handle to a valid SVGAGuestPtr
e2fa3a76 685 *
c0951b79
TH
686 * @dev_priv: Pointer to a device private structure.
687 * @sw_context: The software context used for this command batch validation.
688 * @ptr: Pointer to the user-space handle to be translated.
689 * @vmw_bo_p: Points to a location that, on successful return will carry
690 * a reference-counted pointer to the DMA buffer identified by the
691 * user-space handle in @id.
e2fa3a76 692 *
c0951b79
TH
693 * This function saves information needed to translate a user-space buffer
694 * handle to a valid SVGAGuestPtr. The translation does not take place
695 * immediately, but during a call to vmw_apply_relocations().
696 * This function builds a relocation list and a list of buffers to validate.
697 * The former needs to be freed using either vmw_apply_relocations() or
698 * vmw_free_relocations(). The latter needs to be freed using
699 * vmw_clear_validations.
e2fa3a76 700 */
4e4ddd47
TH
701static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
702 struct vmw_sw_context *sw_context,
703 SVGAGuestPtr *ptr,
704 struct vmw_dma_buffer **vmw_bo_p)
fb1d9738 705{
fb1d9738
JB
706 struct vmw_dma_buffer *vmw_bo = NULL;
707 struct ttm_buffer_object *bo;
4e4ddd47 708 uint32_t handle = ptr->gmrId;
fb1d9738 709 struct vmw_relocation *reloc;
4e4ddd47 710 int ret;
fb1d9738 711
fb1d9738
JB
712 ret = vmw_user_dmabuf_lookup(sw_context->tfile, handle, &vmw_bo);
713 if (unlikely(ret != 0)) {
714 DRM_ERROR("Could not find or use GMR region.\n");
715 return -EINVAL;
716 }
717 bo = &vmw_bo->base;
718
719 if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
4e4ddd47 720 DRM_ERROR("Max number relocations per submission"
fb1d9738
JB
721 " exceeded\n");
722 ret = -EINVAL;
723 goto out_no_reloc;
724 }
725
726 reloc = &sw_context->relocs[sw_context->cur_reloc++];
4e4ddd47 727 reloc->location = ptr;
fb1d9738 728
96c5f0df 729 ret = vmw_bo_to_validate_list(sw_context, bo, false, &reloc->index);
e2fa3a76 730 if (unlikely(ret != 0))
fb1d9738 731 goto out_no_reloc;
fb1d9738 732
4e4ddd47
TH
733 *vmw_bo_p = vmw_bo;
734 return 0;
735
736out_no_reloc:
737 vmw_dmabuf_unreference(&vmw_bo);
738 vmw_bo_p = NULL;
739 return ret;
740}
741
c0951b79
TH
742/**
743 * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
744 *
745 * @dev_priv: Pointer to a device private struct.
746 * @sw_context: The software context used for this command submission.
747 * @header: Pointer to the command header in the command stream.
748 */
749static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
750 struct vmw_sw_context *sw_context,
751 SVGA3dCmdHeader *header)
752{
753 struct vmw_begin_query_cmd {
754 SVGA3dCmdHeader header;
755 SVGA3dCmdBeginQuery q;
756 } *cmd;
757
758 cmd = container_of(header, struct vmw_begin_query_cmd,
759 header);
760
761 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
762 user_context_converter, &cmd->q.cid,
763 NULL);
764}
765
766/**
767 * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
768 *
769 * @dev_priv: Pointer to a device private struct.
770 * @sw_context: The software context used for this command submission.
771 * @header: Pointer to the command header in the command stream.
772 */
4e4ddd47
TH
773static int vmw_cmd_end_query(struct vmw_private *dev_priv,
774 struct vmw_sw_context *sw_context,
775 SVGA3dCmdHeader *header)
776{
777 struct vmw_dma_buffer *vmw_bo;
778 struct vmw_query_cmd {
779 SVGA3dCmdHeader header;
780 SVGA3dCmdEndQuery q;
781 } *cmd;
782 int ret;
783
784 cmd = container_of(header, struct vmw_query_cmd, header);
785 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
786 if (unlikely(ret != 0))
787 return ret;
788
789 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
790 &cmd->q.guestResult,
791 &vmw_bo);
792 if (unlikely(ret != 0))
793 return ret;
794
c0951b79 795 ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
e2fa3a76 796
4e4ddd47 797 vmw_dmabuf_unreference(&vmw_bo);
e2fa3a76 798 return ret;
4e4ddd47 799}
fb1d9738 800
c0951b79
TH
801/*
802 * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
803 *
804 * @dev_priv: Pointer to a device private struct.
805 * @sw_context: The software context used for this command submission.
806 * @header: Pointer to the command header in the command stream.
807 */
4e4ddd47
TH
808static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
809 struct vmw_sw_context *sw_context,
810 SVGA3dCmdHeader *header)
811{
812 struct vmw_dma_buffer *vmw_bo;
813 struct vmw_query_cmd {
814 SVGA3dCmdHeader header;
815 SVGA3dCmdWaitForQuery q;
816 } *cmd;
817 int ret;
818
819 cmd = container_of(header, struct vmw_query_cmd, header);
820 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
821 if (unlikely(ret != 0))
822 return ret;
823
824 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
825 &cmd->q.guestResult,
826 &vmw_bo);
827 if (unlikely(ret != 0))
828 return ret;
829
830 vmw_dmabuf_unreference(&vmw_bo);
831 return 0;
832}
833
4e4ddd47
TH
834static int vmw_cmd_dma(struct vmw_private *dev_priv,
835 struct vmw_sw_context *sw_context,
836 SVGA3dCmdHeader *header)
837{
838 struct vmw_dma_buffer *vmw_bo = NULL;
4e4ddd47
TH
839 struct vmw_surface *srf = NULL;
840 struct vmw_dma_cmd {
841 SVGA3dCmdHeader header;
842 SVGA3dCmdSurfaceDMA dma;
843 } *cmd;
844 int ret;
845
846 cmd = container_of(header, struct vmw_dma_cmd, header);
847 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
848 &cmd->dma.guest.ptr,
849 &vmw_bo);
850 if (unlikely(ret != 0))
851 return ret;
852
c0951b79
TH
853 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
854 user_surface_converter, &cmd->dma.host.sid,
855 NULL);
5bb39e81 856 if (unlikely(ret != 0)) {
c0951b79
TH
857 if (unlikely(ret != -ERESTARTSYS))
858 DRM_ERROR("could not find surface for DMA.\n");
859 goto out_no_surface;
5bb39e81
TH
860 }
861
c0951b79 862 srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
f18c8840 863
c0951b79 864 vmw_kms_cursor_snoop(srf, sw_context->tfile, &vmw_bo->base, header);
fb1d9738 865
c0951b79 866out_no_surface:
fb1d9738
JB
867 vmw_dmabuf_unreference(&vmw_bo);
868 return ret;
869}
870
7a73ba74
TH
871static int vmw_cmd_draw(struct vmw_private *dev_priv,
872 struct vmw_sw_context *sw_context,
873 SVGA3dCmdHeader *header)
874{
875 struct vmw_draw_cmd {
876 SVGA3dCmdHeader header;
877 SVGA3dCmdDrawPrimitives body;
878 } *cmd;
879 SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
880 (unsigned long)header + sizeof(*cmd));
881 SVGA3dPrimitiveRange *range;
882 uint32_t i;
883 uint32_t maxnum;
884 int ret;
885
886 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
887 if (unlikely(ret != 0))
888 return ret;
889
890 cmd = container_of(header, struct vmw_draw_cmd, header);
891 maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
892
893 if (unlikely(cmd->body.numVertexDecls > maxnum)) {
894 DRM_ERROR("Illegal number of vertex declarations.\n");
895 return -EINVAL;
896 }
897
898 for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
c0951b79
TH
899 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
900 user_surface_converter,
901 &decl->array.surfaceId, NULL);
7a73ba74
TH
902 if (unlikely(ret != 0))
903 return ret;
904 }
905
906 maxnum = (header->size - sizeof(cmd->body) -
907 cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
908 if (unlikely(cmd->body.numRanges > maxnum)) {
909 DRM_ERROR("Illegal number of index ranges.\n");
910 return -EINVAL;
911 }
912
913 range = (SVGA3dPrimitiveRange *) decl;
914 for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
c0951b79
TH
915 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
916 user_surface_converter,
917 &range->indexArray.surfaceId, NULL);
7a73ba74
TH
918 if (unlikely(ret != 0))
919 return ret;
920 }
921 return 0;
922}
923
924
925static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
926 struct vmw_sw_context *sw_context,
927 SVGA3dCmdHeader *header)
928{
929 struct vmw_tex_state_cmd {
930 SVGA3dCmdHeader header;
931 SVGA3dCmdSetTextureState state;
932 };
933
934 SVGA3dTextureState *last_state = (SVGA3dTextureState *)
935 ((unsigned long) header + header->size + sizeof(header));
936 SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
937 ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
938 int ret;
939
940 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
941 if (unlikely(ret != 0))
942 return ret;
943
944 for (; cur_state < last_state; ++cur_state) {
945 if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
946 continue;
947
c0951b79
TH
948 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
949 user_surface_converter,
950 &cur_state->value, NULL);
7a73ba74
TH
951 if (unlikely(ret != 0))
952 return ret;
953 }
954
955 return 0;
956}
957
4084fb89
JB
958static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
959 struct vmw_sw_context *sw_context,
960 void *buf)
961{
962 struct vmw_dma_buffer *vmw_bo;
963 int ret;
964
965 struct {
966 uint32_t header;
967 SVGAFifoCmdDefineGMRFB body;
968 } *cmd = buf;
969
970 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
971 &cmd->body.ptr,
972 &vmw_bo);
973 if (unlikely(ret != 0))
974 return ret;
975
976 vmw_dmabuf_unreference(&vmw_bo);
977
978 return ret;
979}
980
c0951b79
TH
981/**
982 * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
983 * command
984 *
985 * @dev_priv: Pointer to a device private struct.
986 * @sw_context: The software context being used for this batch.
987 * @header: Pointer to the command header in the command stream.
988 */
989static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
990 struct vmw_sw_context *sw_context,
991 SVGA3dCmdHeader *header)
992{
993 struct vmw_set_shader_cmd {
994 SVGA3dCmdHeader header;
995 SVGA3dCmdSetShader body;
996 } *cmd;
997 int ret;
998
999 cmd = container_of(header, struct vmw_set_shader_cmd,
1000 header);
1001
1002 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1003 if (unlikely(ret != 0))
1004 return ret;
1005
1006 return 0;
1007}
1008
4084fb89
JB
1009static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
1010 struct vmw_sw_context *sw_context,
1011 void *buf, uint32_t *size)
1012{
1013 uint32_t size_remaining = *size;
4084fb89
JB
1014 uint32_t cmd_id;
1015
1016 cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
1017 switch (cmd_id) {
1018 case SVGA_CMD_UPDATE:
1019 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
4084fb89
JB
1020 break;
1021 case SVGA_CMD_DEFINE_GMRFB:
1022 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
1023 break;
1024 case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
1025 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
1026 break;
1027 case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
1028 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
1029 break;
1030 default:
1031 DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
1032 return -EINVAL;
1033 }
1034
1035 if (*size > size_remaining) {
1036 DRM_ERROR("Invalid SVGA command (size mismatch):"
1037 " %u.\n", cmd_id);
1038 return -EINVAL;
1039 }
1040
0cff60c6 1041 if (unlikely(!sw_context->kernel)) {
4084fb89
JB
1042 DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
1043 return -EPERM;
1044 }
1045
1046 if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
1047 return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
1048
1049 return 0;
1050}
fb1d9738
JB
1051
1052typedef int (*vmw_cmd_func) (struct vmw_private *,
1053 struct vmw_sw_context *,
1054 SVGA3dCmdHeader *);
1055
1056#define VMW_CMD_DEF(cmd, func) \
1057 [cmd - SVGA_3D_CMD_BASE] = func
1058
1059static vmw_cmd_func vmw_cmd_funcs[SVGA_3D_CMD_MAX] = {
1060 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid),
1061 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid),
1062 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check),
1063 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check),
1064 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma),
1065 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid),
1066 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid),
1067 VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check),
1068 VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check),
1069 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check),
1070 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
1071 &vmw_cmd_set_render_target_check),
7a73ba74 1072 VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state),
fb1d9738
JB
1073 VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check),
1074 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check),
1075 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check),
1076 VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check),
1077 VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check),
1078 VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check),
1079 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check),
1080 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_cid_check),
1081 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_cid_check),
c0951b79 1082 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader),
fb1d9738 1083 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_cid_check),
7a73ba74 1084 VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw),
fb1d9738 1085 VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check),
c0951b79 1086 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query),
4e4ddd47
TH
1087 VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query),
1088 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query),
fb1d9738
JB
1089 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok),
1090 VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
c0951b79
TH
1091 &vmw_cmd_blt_surf_screen_check),
1092 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid),
1093 VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid),
1094 VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid),
1095 VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid),
fb1d9738
JB
1096};
1097
1098static int vmw_cmd_check(struct vmw_private *dev_priv,
1099 struct vmw_sw_context *sw_context,
1100 void *buf, uint32_t *size)
1101{
1102 uint32_t cmd_id;
7a73ba74 1103 uint32_t size_remaining = *size;
fb1d9738
JB
1104 SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
1105 int ret;
1106
4084fb89
JB
1107 cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
1108 /* Handle any none 3D commands */
1109 if (unlikely(cmd_id < SVGA_CMD_MAX))
1110 return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
1111
fb1d9738
JB
1112
1113 cmd_id = le32_to_cpu(header->id);
1114 *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
1115
1116 cmd_id -= SVGA_3D_CMD_BASE;
7a73ba74
TH
1117 if (unlikely(*size > size_remaining))
1118 goto out_err;
1119
fb1d9738
JB
1120 if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
1121 goto out_err;
1122
1123 ret = vmw_cmd_funcs[cmd_id](dev_priv, sw_context, header);
1124 if (unlikely(ret != 0))
1125 goto out_err;
1126
1127 return 0;
1128out_err:
1129 DRM_ERROR("Illegal / Invalid SVGA3D command: %d\n",
1130 cmd_id + SVGA_3D_CMD_BASE);
1131 return -EINVAL;
1132}
1133
1134static int vmw_cmd_check_all(struct vmw_private *dev_priv,
1135 struct vmw_sw_context *sw_context,
922ade0d 1136 void *buf,
be38ab6e 1137 uint32_t size)
fb1d9738
JB
1138{
1139 int32_t cur_size = size;
1140 int ret;
1141
c0951b79
TH
1142 sw_context->buf_start = buf;
1143
fb1d9738 1144 while (cur_size > 0) {
7a73ba74 1145 size = cur_size;
fb1d9738
JB
1146 ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
1147 if (unlikely(ret != 0))
1148 return ret;
1149 buf = (void *)((unsigned long) buf + size);
1150 cur_size -= size;
1151 }
1152
1153 if (unlikely(cur_size != 0)) {
1154 DRM_ERROR("Command verifier out of sync.\n");
1155 return -EINVAL;
1156 }
1157
1158 return 0;
1159}
1160
1161static void vmw_free_relocations(struct vmw_sw_context *sw_context)
1162{
1163 sw_context->cur_reloc = 0;
1164}
1165
1166static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
1167{
1168 uint32_t i;
1169 struct vmw_relocation *reloc;
1170 struct ttm_validate_buffer *validate;
1171 struct ttm_buffer_object *bo;
1172
1173 for (i = 0; i < sw_context->cur_reloc; ++i) {
1174 reloc = &sw_context->relocs[i];
c0951b79 1175 validate = &sw_context->val_bufs[reloc->index].base;
fb1d9738 1176 bo = validate->bo;
c0951b79
TH
1177 switch (bo->mem.mem_type) {
1178 case TTM_PL_VRAM:
135cba0d
TH
1179 reloc->location->offset += bo->offset;
1180 reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
c0951b79
TH
1181 break;
1182 case VMW_PL_GMR:
135cba0d 1183 reloc->location->gmrId = bo->mem.start;
c0951b79
TH
1184 break;
1185 default:
1186 BUG();
1187 }
fb1d9738
JB
1188 }
1189 vmw_free_relocations(sw_context);
1190}
1191
c0951b79
TH
1192/**
1193 * vmw_resource_list_unrefererence - Free up a resource list and unreference
1194 * all resources referenced by it.
1195 *
1196 * @list: The resource list.
1197 */
1198static void vmw_resource_list_unreference(struct list_head *list)
1199{
1200 struct vmw_resource_val_node *val, *val_next;
1201
1202 /*
1203 * Drop references to resources held during command submission.
1204 */
1205
1206 list_for_each_entry_safe(val, val_next, list, head) {
1207 list_del_init(&val->head);
1208 vmw_resource_unreference(&val->res);
1209 kfree(val);
1210 }
1211}
1212
fb1d9738
JB
1213static void vmw_clear_validations(struct vmw_sw_context *sw_context)
1214{
c0951b79
TH
1215 struct vmw_validate_buffer *entry, *next;
1216 struct vmw_resource_val_node *val;
fb1d9738 1217
be38ab6e
TH
1218 /*
1219 * Drop references to DMA buffers held during command submission.
1220 */
fb1d9738 1221 list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
c0951b79
TH
1222 base.head) {
1223 list_del(&entry->base.head);
1224 ttm_bo_unref(&entry->base.bo);
1225 (void) drm_ht_remove_item(&sw_context->res_ht, &entry->hash);
fb1d9738
JB
1226 sw_context->cur_val_buf--;
1227 }
1228 BUG_ON(sw_context->cur_val_buf != 0);
be38ab6e 1229
c0951b79
TH
1230 list_for_each_entry(val, &sw_context->resource_list, head)
1231 (void) drm_ht_remove_item(&sw_context->res_ht, &val->hash);
fb1d9738
JB
1232}
1233
1234static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
96c5f0df
TH
1235 struct ttm_buffer_object *bo,
1236 bool validate_as_mob)
fb1d9738
JB
1237{
1238 int ret;
1239
e2fa3a76
TH
1240
1241 /*
1242 * Don't validate pinned buffers.
1243 */
1244
1245 if (bo == dev_priv->pinned_bo ||
1246 (bo == dev_priv->dummy_query_bo &&
1247 dev_priv->dummy_query_bo_pinned))
1248 return 0;
1249
96c5f0df
TH
1250 if (validate_as_mob)
1251 return ttm_bo_validate(bo, &vmw_mob_placement, true, false);
1252
8ba5152a 1253 /**
135cba0d
TH
1254 * Put BO in VRAM if there is space, otherwise as a GMR.
1255 * If there is no space in VRAM and GMR ids are all used up,
1256 * start evicting GMRs to make room. If the DMA buffer can't be
1257 * used as a GMR, this will return -ENOMEM.
8ba5152a
TH
1258 */
1259
97a875cb 1260 ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, true, false);
3d3a5b32 1261 if (likely(ret == 0 || ret == -ERESTARTSYS))
fb1d9738
JB
1262 return ret;
1263
8ba5152a
TH
1264 /**
1265 * If that failed, try VRAM again, this time evicting
1266 * previous contents.
1267 */
fb1d9738 1268
135cba0d 1269 DRM_INFO("Falling through to VRAM.\n");
97a875cb 1270 ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
fb1d9738
JB
1271 return ret;
1272}
1273
fb1d9738
JB
1274static int vmw_validate_buffers(struct vmw_private *dev_priv,
1275 struct vmw_sw_context *sw_context)
1276{
c0951b79 1277 struct vmw_validate_buffer *entry;
fb1d9738
JB
1278 int ret;
1279
c0951b79 1280 list_for_each_entry(entry, &sw_context->validate_nodes, base.head) {
96c5f0df
TH
1281 ret = vmw_validate_single_buffer(dev_priv, entry->base.bo,
1282 entry->validate_as_mob);
fb1d9738
JB
1283 if (unlikely(ret != 0))
1284 return ret;
1285 }
1286 return 0;
1287}
1288
be38ab6e
TH
1289static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
1290 uint32_t size)
1291{
1292 if (likely(sw_context->cmd_bounce_size >= size))
1293 return 0;
1294
1295 if (sw_context->cmd_bounce_size == 0)
1296 sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
1297
1298 while (sw_context->cmd_bounce_size < size) {
1299 sw_context->cmd_bounce_size =
1300 PAGE_ALIGN(sw_context->cmd_bounce_size +
1301 (sw_context->cmd_bounce_size >> 1));
1302 }
1303
1304 if (sw_context->cmd_bounce != NULL)
1305 vfree(sw_context->cmd_bounce);
1306
1307 sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
1308
1309 if (sw_context->cmd_bounce == NULL) {
1310 DRM_ERROR("Failed to allocate command bounce buffer.\n");
1311 sw_context->cmd_bounce_size = 0;
1312 return -ENOMEM;
1313 }
1314
1315 return 0;
1316}
1317
ae2a1040
TH
1318/**
1319 * vmw_execbuf_fence_commands - create and submit a command stream fence
1320 *
1321 * Creates a fence object and submits a command stream marker.
1322 * If this fails for some reason, We sync the fifo and return NULL.
1323 * It is then safe to fence buffers with a NULL pointer.
6070e9fa
JB
1324 *
1325 * If @p_handle is not NULL @file_priv must also not be NULL. Creates
1326 * a userspace handle if @p_handle is not NULL, otherwise not.
ae2a1040
TH
1327 */
1328
1329int vmw_execbuf_fence_commands(struct drm_file *file_priv,
1330 struct vmw_private *dev_priv,
1331 struct vmw_fence_obj **p_fence,
1332 uint32_t *p_handle)
1333{
1334 uint32_t sequence;
1335 int ret;
1336 bool synced = false;
1337
6070e9fa
JB
1338 /* p_handle implies file_priv. */
1339 BUG_ON(p_handle != NULL && file_priv == NULL);
ae2a1040
TH
1340
1341 ret = vmw_fifo_send_fence(dev_priv, &sequence);
1342 if (unlikely(ret != 0)) {
1343 DRM_ERROR("Fence submission error. Syncing.\n");
1344 synced = true;
1345 }
1346
1347 if (p_handle != NULL)
1348 ret = vmw_user_fence_create(file_priv, dev_priv->fman,
1349 sequence,
1350 DRM_VMW_FENCE_FLAG_EXEC,
1351 p_fence, p_handle);
1352 else
1353 ret = vmw_fence_create(dev_priv->fman, sequence,
1354 DRM_VMW_FENCE_FLAG_EXEC,
1355 p_fence);
1356
1357 if (unlikely(ret != 0 && !synced)) {
1358 (void) vmw_fallback_wait(dev_priv, false, false,
1359 sequence, false,
1360 VMW_FENCE_WAIT_TIMEOUT);
1361 *p_fence = NULL;
1362 }
1363
1364 return 0;
1365}
1366
8bf445ce
TH
1367/**
1368 * vmw_execbuf_copy_fence_user - copy fence object information to
1369 * user-space.
1370 *
1371 * @dev_priv: Pointer to a vmw_private struct.
1372 * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
1373 * @ret: Return value from fence object creation.
1374 * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
1375 * which the information should be copied.
1376 * @fence: Pointer to the fenc object.
1377 * @fence_handle: User-space fence handle.
1378 *
1379 * This function copies fence information to user-space. If copying fails,
1380 * The user-space struct drm_vmw_fence_rep::error member is hopefully
1381 * left untouched, and if it's preloaded with an -EFAULT by user-space,
1382 * the error will hopefully be detected.
1383 * Also if copying fails, user-space will be unable to signal the fence
1384 * object so we wait for it immediately, and then unreference the
1385 * user-space reference.
1386 */
57c5ee79 1387void
8bf445ce
TH
1388vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
1389 struct vmw_fpriv *vmw_fp,
1390 int ret,
1391 struct drm_vmw_fence_rep __user *user_fence_rep,
1392 struct vmw_fence_obj *fence,
1393 uint32_t fence_handle)
1394{
1395 struct drm_vmw_fence_rep fence_rep;
1396
1397 if (user_fence_rep == NULL)
1398 return;
1399
80d9b24a
DC
1400 memset(&fence_rep, 0, sizeof(fence_rep));
1401
8bf445ce
TH
1402 fence_rep.error = ret;
1403 if (ret == 0) {
1404 BUG_ON(fence == NULL);
1405
1406 fence_rep.handle = fence_handle;
1407 fence_rep.seqno = fence->seqno;
1408 vmw_update_seqno(dev_priv, &dev_priv->fifo);
1409 fence_rep.passed_seqno = dev_priv->last_read_seqno;
1410 }
1411
1412 /*
1413 * copy_to_user errors will be detected by user space not
1414 * seeing fence_rep::error filled in. Typically
1415 * user-space would have pre-set that member to -EFAULT.
1416 */
1417 ret = copy_to_user(user_fence_rep, &fence_rep,
1418 sizeof(fence_rep));
1419
1420 /*
1421 * User-space lost the fence object. We need to sync
1422 * and unreference the handle.
1423 */
1424 if (unlikely(ret != 0) && (fence_rep.error == 0)) {
1425 ttm_ref_object_base_unref(vmw_fp->tfile,
1426 fence_handle, TTM_REF_USAGE);
1427 DRM_ERROR("Fence copy error. Syncing.\n");
1428 (void) vmw_fence_obj_wait(fence, fence->signal_mask,
1429 false, false,
1430 VMW_FENCE_WAIT_TIMEOUT);
1431 }
1432}
1433
922ade0d
TH
1434int vmw_execbuf_process(struct drm_file *file_priv,
1435 struct vmw_private *dev_priv,
1436 void __user *user_commands,
1437 void *kernel_commands,
1438 uint32_t command_size,
1439 uint64_t throttle_us,
bb1bd2f4
JB
1440 struct drm_vmw_fence_rep __user *user_fence_rep,
1441 struct vmw_fence_obj **out_fence)
fb1d9738 1442{
fb1d9738 1443 struct vmw_sw_context *sw_context = &dev_priv->ctx;
bb1bd2f4 1444 struct vmw_fence_obj *fence = NULL;
c0951b79
TH
1445 struct vmw_resource *error_resource;
1446 struct list_head resource_list;
ecff665f 1447 struct ww_acquire_ctx ticket;
ae2a1040 1448 uint32_t handle;
922ade0d
TH
1449 void *cmd;
1450 int ret;
fb1d9738 1451
922ade0d 1452 ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
fb1d9738 1453 if (unlikely(ret != 0))
922ade0d 1454 return -ERESTARTSYS;
fb1d9738 1455
922ade0d
TH
1456 if (kernel_commands == NULL) {
1457 sw_context->kernel = false;
fb1d9738 1458
922ade0d
TH
1459 ret = vmw_resize_cmd_bounce(sw_context, command_size);
1460 if (unlikely(ret != 0))
1461 goto out_unlock;
fb1d9738 1462
fb1d9738 1463
922ade0d
TH
1464 ret = copy_from_user(sw_context->cmd_bounce,
1465 user_commands, command_size);
1466
1467 if (unlikely(ret != 0)) {
1468 ret = -EFAULT;
1469 DRM_ERROR("Failed copying commands.\n");
1470 goto out_unlock;
1471 }
1472 kernel_commands = sw_context->cmd_bounce;
1473 } else
1474 sw_context->kernel = true;
fb1d9738
JB
1475
1476 sw_context->tfile = vmw_fpriv(file_priv)->tfile;
fb1d9738
JB
1477 sw_context->cur_reloc = 0;
1478 sw_context->cur_val_buf = 0;
e2fa3a76 1479 sw_context->fence_flags = 0;
f18c8840 1480 INIT_LIST_HEAD(&sw_context->resource_list);
e2fa3a76 1481 sw_context->cur_query_bo = dev_priv->pinned_bo;
c0951b79
TH
1482 sw_context->last_query_ctx = NULL;
1483 sw_context->needs_post_query_barrier = false;
1484 memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
fb1d9738 1485 INIT_LIST_HEAD(&sw_context->validate_nodes);
c0951b79
TH
1486 INIT_LIST_HEAD(&sw_context->res_relocations);
1487 if (!sw_context->res_ht_initialized) {
1488 ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
1489 if (unlikely(ret != 0))
1490 goto out_unlock;
1491 sw_context->res_ht_initialized = true;
1492 }
fb1d9738 1493
c0951b79 1494 INIT_LIST_HEAD(&resource_list);
922ade0d
TH
1495 ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
1496 command_size);
fb1d9738
JB
1497 if (unlikely(ret != 0))
1498 goto out_err;
be38ab6e 1499
c0951b79
TH
1500 ret = vmw_resources_reserve(sw_context);
1501 if (unlikely(ret != 0))
1502 goto out_err;
1503
ecff665f 1504 ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes);
fb1d9738
JB
1505 if (unlikely(ret != 0))
1506 goto out_err;
1507
1508 ret = vmw_validate_buffers(dev_priv, sw_context);
1509 if (unlikely(ret != 0))
1510 goto out_err;
1511
c0951b79
TH
1512 ret = vmw_resources_validate(sw_context);
1513 if (unlikely(ret != 0))
1514 goto out_err;
1925d456 1515
922ade0d 1516 if (throttle_us) {
6bcd8d3c 1517 ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
922ade0d 1518 throttle_us);
1925d456
TH
1519
1520 if (unlikely(ret != 0))
c0951b79 1521 goto out_err;
be38ab6e
TH
1522 }
1523
922ade0d 1524 cmd = vmw_fifo_reserve(dev_priv, command_size);
be38ab6e
TH
1525 if (unlikely(cmd == NULL)) {
1526 DRM_ERROR("Failed reserving fifo space for commands.\n");
1527 ret = -ENOMEM;
c0951b79 1528 goto out_err;
1925d456
TH
1529 }
1530
c0951b79 1531 vmw_apply_relocations(sw_context);
922ade0d 1532 memcpy(cmd, kernel_commands, command_size);
c0951b79
TH
1533
1534 vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
1535 vmw_resource_relocations_free(&sw_context->res_relocations);
1536
922ade0d 1537 vmw_fifo_commit(dev_priv, command_size);
fb1d9738 1538
e2fa3a76 1539 vmw_query_bo_switch_commit(dev_priv, sw_context);
ae2a1040
TH
1540 ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
1541 &fence,
1542 (user_fence_rep) ? &handle : NULL);
fb1d9738
JB
1543 /*
1544 * This error is harmless, because if fence submission fails,
ae2a1040
TH
1545 * vmw_fifo_send_fence will sync. The error will be propagated to
1546 * user-space in @fence_rep
fb1d9738
JB
1547 */
1548
1549 if (ret != 0)
1550 DRM_ERROR("Fence submission error. Syncing.\n");
1551
c0951b79 1552 vmw_resource_list_unreserve(&sw_context->resource_list, false);
ecff665f 1553 ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
ae2a1040 1554 (void *) fence);
fb1d9738 1555
c0951b79
TH
1556 if (unlikely(dev_priv->pinned_bo != NULL &&
1557 !dev_priv->query_cid_valid))
1558 __vmw_execbuf_release_pinned_bo(dev_priv, fence);
1559
ae2a1040 1560 vmw_clear_validations(sw_context);
8bf445ce
TH
1561 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
1562 user_fence_rep, fence, handle);
fb1d9738 1563
bb1bd2f4
JB
1564 /* Don't unreference when handing fence out */
1565 if (unlikely(out_fence != NULL)) {
1566 *out_fence = fence;
1567 fence = NULL;
1568 } else if (likely(fence != NULL)) {
ae2a1040 1569 vmw_fence_obj_unreference(&fence);
bb1bd2f4 1570 }
fb1d9738 1571
c0951b79 1572 list_splice_init(&sw_context->resource_list, &resource_list);
922ade0d 1573 mutex_unlock(&dev_priv->cmdbuf_mutex);
c0951b79
TH
1574
1575 /*
1576 * Unreference resources outside of the cmdbuf_mutex to
1577 * avoid deadlocks in resource destruction paths.
1578 */
1579 vmw_resource_list_unreference(&resource_list);
1580
fb1d9738 1581 return 0;
922ade0d 1582
fb1d9738 1583out_err:
c0951b79 1584 vmw_resource_relocations_free(&sw_context->res_relocations);
fb1d9738 1585 vmw_free_relocations(sw_context);
ecff665f 1586 ttm_eu_backoff_reservation(&ticket, &sw_context->validate_nodes);
c0951b79 1587 vmw_resource_list_unreserve(&sw_context->resource_list, true);
fb1d9738 1588 vmw_clear_validations(sw_context);
c0951b79
TH
1589 if (unlikely(dev_priv->pinned_bo != NULL &&
1590 !dev_priv->query_cid_valid))
1591 __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
fb1d9738 1592out_unlock:
c0951b79
TH
1593 list_splice_init(&sw_context->resource_list, &resource_list);
1594 error_resource = sw_context->error_resource;
1595 sw_context->error_resource = NULL;
fb1d9738 1596 mutex_unlock(&dev_priv->cmdbuf_mutex);
c0951b79
TH
1597
1598 /*
1599 * Unreference resources outside of the cmdbuf_mutex to
1600 * avoid deadlocks in resource destruction paths.
1601 */
1602 vmw_resource_list_unreference(&resource_list);
1603 if (unlikely(error_resource != NULL))
1604 vmw_resource_unreference(&error_resource);
1605
922ade0d
TH
1606 return ret;
1607}
1608
e2fa3a76
TH
1609/**
1610 * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
1611 *
1612 * @dev_priv: The device private structure.
1613 *
1614 * This function is called to idle the fifo and unpin the query buffer
1615 * if the normal way to do this hits an error, which should typically be
1616 * extremely rare.
1617 */
1618static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
1619{
1620 DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
1621
1622 (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
1623 vmw_bo_pin(dev_priv->pinned_bo, false);
1624 vmw_bo_pin(dev_priv->dummy_query_bo, false);
1625 dev_priv->dummy_query_bo_pinned = false;
1626}
1627
1628
1629/**
c0951b79 1630 * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
e2fa3a76
TH
1631 * query bo.
1632 *
1633 * @dev_priv: The device private structure.
c0951b79
TH
1634 * @fence: If non-NULL should point to a struct vmw_fence_obj issued
1635 * _after_ a query barrier that flushes all queries touching the current
1636 * buffer pointed to by @dev_priv->pinned_bo
e2fa3a76
TH
1637 *
1638 * This function should be used to unpin the pinned query bo, or
1639 * as a query barrier when we need to make sure that all queries have
1640 * finished before the next fifo command. (For example on hardware
1641 * context destructions where the hardware may otherwise leak unfinished
1642 * queries).
1643 *
1644 * This function does not return any failure codes, but make attempts
1645 * to do safe unpinning in case of errors.
1646 *
1647 * The function will synchronize on the previous query barrier, and will
1648 * thus not finish until that barrier has executed.
c0951b79
TH
1649 *
1650 * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
1651 * before calling this function.
e2fa3a76 1652 */
c0951b79
TH
1653void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
1654 struct vmw_fence_obj *fence)
e2fa3a76
TH
1655{
1656 int ret = 0;
1657 struct list_head validate_list;
1658 struct ttm_validate_buffer pinned_val, query_val;
c0951b79 1659 struct vmw_fence_obj *lfence = NULL;
ecff665f 1660 struct ww_acquire_ctx ticket;
e2fa3a76
TH
1661
1662 if (dev_priv->pinned_bo == NULL)
1663 goto out_unlock;
1664
e2fa3a76
TH
1665 INIT_LIST_HEAD(&validate_list);
1666
e2fa3a76
TH
1667 pinned_val.bo = ttm_bo_reference(dev_priv->pinned_bo);
1668 list_add_tail(&pinned_val.head, &validate_list);
1669
e2fa3a76
TH
1670 query_val.bo = ttm_bo_reference(dev_priv->dummy_query_bo);
1671 list_add_tail(&query_val.head, &validate_list);
1672
1673 do {
ecff665f 1674 ret = ttm_eu_reserve_buffers(&ticket, &validate_list);
e2fa3a76
TH
1675 } while (ret == -ERESTARTSYS);
1676
1677 if (unlikely(ret != 0)) {
1678 vmw_execbuf_unpin_panic(dev_priv);
1679 goto out_no_reserve;
1680 }
1681
c0951b79
TH
1682 if (dev_priv->query_cid_valid) {
1683 BUG_ON(fence != NULL);
1684 ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
1685 if (unlikely(ret != 0)) {
1686 vmw_execbuf_unpin_panic(dev_priv);
1687 goto out_no_emit;
1688 }
1689 dev_priv->query_cid_valid = false;
e2fa3a76
TH
1690 }
1691
1692 vmw_bo_pin(dev_priv->pinned_bo, false);
1693 vmw_bo_pin(dev_priv->dummy_query_bo, false);
1694 dev_priv->dummy_query_bo_pinned = false;
1695
c0951b79
TH
1696 if (fence == NULL) {
1697 (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
1698 NULL);
1699 fence = lfence;
1700 }
ecff665f 1701 ttm_eu_fence_buffer_objects(&ticket, &validate_list, (void *) fence);
c0951b79
TH
1702 if (lfence != NULL)
1703 vmw_fence_obj_unreference(&lfence);
e2fa3a76
TH
1704
1705 ttm_bo_unref(&query_val.bo);
1706 ttm_bo_unref(&pinned_val.bo);
1707 ttm_bo_unref(&dev_priv->pinned_bo);
1708
1709out_unlock:
e2fa3a76
TH
1710 return;
1711
1712out_no_emit:
ecff665f 1713 ttm_eu_backoff_reservation(&ticket, &validate_list);
e2fa3a76
TH
1714out_no_reserve:
1715 ttm_bo_unref(&query_val.bo);
1716 ttm_bo_unref(&pinned_val.bo);
1717 ttm_bo_unref(&dev_priv->pinned_bo);
c0951b79
TH
1718}
1719
1720/**
1721 * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
1722 * query bo.
1723 *
1724 * @dev_priv: The device private structure.
1725 *
1726 * This function should be used to unpin the pinned query bo, or
1727 * as a query barrier when we need to make sure that all queries have
1728 * finished before the next fifo command. (For example on hardware
1729 * context destructions where the hardware may otherwise leak unfinished
1730 * queries).
1731 *
1732 * This function does not return any failure codes, but make attempts
1733 * to do safe unpinning in case of errors.
1734 *
1735 * The function will synchronize on the previous query barrier, and will
1736 * thus not finish until that barrier has executed.
1737 */
1738void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
1739{
1740 mutex_lock(&dev_priv->cmdbuf_mutex);
1741 if (dev_priv->query_cid_valid)
1742 __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
e2fa3a76
TH
1743 mutex_unlock(&dev_priv->cmdbuf_mutex);
1744}
1745
922ade0d
TH
1746
1747int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
1748 struct drm_file *file_priv)
1749{
1750 struct vmw_private *dev_priv = vmw_priv(dev);
1751 struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
1752 struct vmw_master *vmaster = vmw_master(file_priv->master);
1753 int ret;
1754
1755 /*
1756 * This will allow us to extend the ioctl argument while
1757 * maintaining backwards compatibility:
1758 * We take different code paths depending on the value of
1759 * arg->version.
1760 */
1761
1762 if (unlikely(arg->version != DRM_VMW_EXECBUF_VERSION)) {
1763 DRM_ERROR("Incorrect execbuf version.\n");
1764 DRM_ERROR("You're running outdated experimental "
1765 "vmwgfx user-space drivers.");
1766 return -EINVAL;
1767 }
1768
1769 ret = ttm_read_lock(&vmaster->lock, true);
1770 if (unlikely(ret != 0))
1771 return ret;
1772
1773 ret = vmw_execbuf_process(file_priv, dev_priv,
1774 (void __user *)(unsigned long)arg->commands,
1775 NULL, arg->command_size, arg->throttle_us,
bb1bd2f4
JB
1776 (void __user *)(unsigned long)arg->fence_rep,
1777 NULL);
922ade0d
TH
1778
1779 if (unlikely(ret != 0))
1780 goto out_unlock;
1781
1782 vmw_kms_cursor_post_execbuf(dev_priv);
1783
1784out_unlock:
fb1d9738
JB
1785 ttm_read_unlock(&vmaster->lock);
1786 return ret;
1787}