drm/vmwgfx: Hook up guest-backed contexts
[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_execbuf.c
CommitLineData
fb1d9738
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1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "vmwgfx_reg.h"
760285e7
DH
30#include <drm/ttm/ttm_bo_api.h>
31#include <drm/ttm/ttm_placement.h>
fb1d9738 32
c0951b79
TH
33#define VMW_RES_HT_ORDER 12
34
35/**
36 * struct vmw_resource_relocation - Relocation info for resources
37 *
38 * @head: List head for the software context's relocation list.
39 * @res: Non-ref-counted pointer to the resource.
40 * @offset: Offset of 4 byte entries into the command buffer where the
41 * id that needs fixup is located.
42 */
43struct vmw_resource_relocation {
44 struct list_head head;
45 const struct vmw_resource *res;
46 unsigned long offset;
47};
48
49/**
50 * struct vmw_resource_val_node - Validation info for resources
51 *
52 * @head: List head for the software context's resource list.
53 * @hash: Hash entry for quick resouce to val_node lookup.
54 * @res: Ref-counted pointer to the resource.
55 * @switch_backup: Boolean whether to switch backup buffer on unreserve.
56 * @new_backup: Refcounted pointer to the new backup buffer.
57 * @new_backup_offset: New backup buffer offset if @new_backup is non-NUll.
58 * @first_usage: Set to true the first time the resource is referenced in
59 * the command stream.
60 * @no_buffer_needed: Resources do not need to allocate buffer backup on
61 * reservation. The command stream will provide one.
62 */
63struct vmw_resource_val_node {
64 struct list_head head;
65 struct drm_hash_item hash;
66 struct vmw_resource *res;
67 struct vmw_dma_buffer *new_backup;
68 unsigned long new_backup_offset;
69 bool first_usage;
70 bool no_buffer_needed;
71};
72
73/**
74 * vmw_resource_unreserve - unreserve resources previously reserved for
75 * command submission.
76 *
77 * @list_head: list of resources to unreserve.
78 * @backoff: Whether command submission failed.
79 */
80static void vmw_resource_list_unreserve(struct list_head *list,
81 bool backoff)
82{
83 struct vmw_resource_val_node *val;
84
85 list_for_each_entry(val, list, head) {
86 struct vmw_resource *res = val->res;
87 struct vmw_dma_buffer *new_backup =
88 backoff ? NULL : val->new_backup;
89
90 vmw_resource_unreserve(res, new_backup,
91 val->new_backup_offset);
92 vmw_dmabuf_unreference(&val->new_backup);
93 }
94}
95
96
97/**
98 * vmw_resource_val_add - Add a resource to the software context's
99 * resource list if it's not already on it.
100 *
101 * @sw_context: Pointer to the software context.
102 * @res: Pointer to the resource.
103 * @p_node On successful return points to a valid pointer to a
104 * struct vmw_resource_val_node, if non-NULL on entry.
105 */
106static int vmw_resource_val_add(struct vmw_sw_context *sw_context,
107 struct vmw_resource *res,
108 struct vmw_resource_val_node **p_node)
109{
110 struct vmw_resource_val_node *node;
111 struct drm_hash_item *hash;
112 int ret;
113
114 if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) res,
115 &hash) == 0)) {
116 node = container_of(hash, struct vmw_resource_val_node, hash);
117 node->first_usage = false;
118 if (unlikely(p_node != NULL))
119 *p_node = node;
120 return 0;
121 }
122
123 node = kzalloc(sizeof(*node), GFP_KERNEL);
124 if (unlikely(node == NULL)) {
125 DRM_ERROR("Failed to allocate a resource validation "
126 "entry.\n");
127 return -ENOMEM;
128 }
129
130 node->hash.key = (unsigned long) res;
131 ret = drm_ht_insert_item(&sw_context->res_ht, &node->hash);
132 if (unlikely(ret != 0)) {
133 DRM_ERROR("Failed to initialize a resource validation "
134 "entry.\n");
135 kfree(node);
136 return ret;
137 }
138 list_add_tail(&node->head, &sw_context->resource_list);
139 node->res = vmw_resource_reference(res);
140 node->first_usage = true;
141
142 if (unlikely(p_node != NULL))
143 *p_node = node;
144
145 return 0;
146}
147
148/**
149 * vmw_resource_relocation_add - Add a relocation to the relocation list
150 *
151 * @list: Pointer to head of relocation list.
152 * @res: The resource.
153 * @offset: Offset into the command buffer currently being parsed where the
154 * id that needs fixup is located. Granularity is 4 bytes.
155 */
156static int vmw_resource_relocation_add(struct list_head *list,
157 const struct vmw_resource *res,
158 unsigned long offset)
159{
160 struct vmw_resource_relocation *rel;
161
162 rel = kmalloc(sizeof(*rel), GFP_KERNEL);
163 if (unlikely(rel == NULL)) {
164 DRM_ERROR("Failed to allocate a resource relocation.\n");
165 return -ENOMEM;
166 }
167
168 rel->res = res;
169 rel->offset = offset;
170 list_add_tail(&rel->head, list);
171
172 return 0;
173}
174
175/**
176 * vmw_resource_relocations_free - Free all relocations on a list
177 *
178 * @list: Pointer to the head of the relocation list.
179 */
180static void vmw_resource_relocations_free(struct list_head *list)
181{
182 struct vmw_resource_relocation *rel, *n;
183
184 list_for_each_entry_safe(rel, n, list, head) {
185 list_del(&rel->head);
186 kfree(rel);
187 }
188}
189
190/**
191 * vmw_resource_relocations_apply - Apply all relocations on a list
192 *
193 * @cb: Pointer to the start of the command buffer bein patch. This need
194 * not be the same buffer as the one being parsed when the relocation
195 * list was built, but the contents must be the same modulo the
196 * resource ids.
197 * @list: Pointer to the head of the relocation list.
198 */
199static void vmw_resource_relocations_apply(uint32_t *cb,
200 struct list_head *list)
201{
202 struct vmw_resource_relocation *rel;
203
204 list_for_each_entry(rel, list, head)
205 cb[rel->offset] = rel->res->id;
206}
207
fb1d9738
JB
208static int vmw_cmd_invalid(struct vmw_private *dev_priv,
209 struct vmw_sw_context *sw_context,
210 SVGA3dCmdHeader *header)
211{
212 return capable(CAP_SYS_ADMIN) ? : -EINVAL;
213}
214
215static int vmw_cmd_ok(struct vmw_private *dev_priv,
216 struct vmw_sw_context *sw_context,
217 SVGA3dCmdHeader *header)
218{
219 return 0;
220}
221
e2fa3a76
TH
222/**
223 * vmw_bo_to_validate_list - add a bo to a validate list
224 *
225 * @sw_context: The software context used for this command submission batch.
226 * @bo: The buffer object to add.
96c5f0df 227 * @validate_as_mob: Validate this buffer as a MOB.
e2fa3a76
TH
228 * @p_val_node: If non-NULL Will be updated with the validate node number
229 * on return.
230 *
231 * Returns -EINVAL if the limit of number of buffer objects per command
232 * submission is reached.
233 */
234static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context,
235 struct ttm_buffer_object *bo,
96c5f0df 236 bool validate_as_mob,
e2fa3a76
TH
237 uint32_t *p_val_node)
238{
239 uint32_t val_node;
c0951b79 240 struct vmw_validate_buffer *vval_buf;
e2fa3a76 241 struct ttm_validate_buffer *val_buf;
c0951b79
TH
242 struct drm_hash_item *hash;
243 int ret;
e2fa3a76 244
c0951b79
TH
245 if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) bo,
246 &hash) == 0)) {
247 vval_buf = container_of(hash, struct vmw_validate_buffer,
248 hash);
96c5f0df
TH
249 if (unlikely(vval_buf->validate_as_mob != validate_as_mob)) {
250 DRM_ERROR("Inconsistent buffer usage.\n");
251 return -EINVAL;
252 }
c0951b79
TH
253 val_buf = &vval_buf->base;
254 val_node = vval_buf - sw_context->val_bufs;
255 } else {
256 val_node = sw_context->cur_val_buf;
257 if (unlikely(val_node >= VMWGFX_MAX_VALIDATIONS)) {
258 DRM_ERROR("Max number of DMA buffers per submission "
259 "exceeded.\n");
260 return -EINVAL;
261 }
262 vval_buf = &sw_context->val_bufs[val_node];
263 vval_buf->hash.key = (unsigned long) bo;
264 ret = drm_ht_insert_item(&sw_context->res_ht, &vval_buf->hash);
265 if (unlikely(ret != 0)) {
266 DRM_ERROR("Failed to initialize a buffer validation "
267 "entry.\n");
268 return ret;
269 }
270 ++sw_context->cur_val_buf;
271 val_buf = &vval_buf->base;
e2fa3a76 272 val_buf->bo = ttm_bo_reference(bo);
c0951b79 273 val_buf->reserved = false;
e2fa3a76 274 list_add_tail(&val_buf->head, &sw_context->validate_nodes);
96c5f0df 275 vval_buf->validate_as_mob = validate_as_mob;
e2fa3a76
TH
276 }
277
be013367 278 sw_context->fence_flags |= DRM_VMW_FENCE_FLAG_EXEC;
e2fa3a76
TH
279
280 if (p_val_node)
281 *p_val_node = val_node;
282
283 return 0;
284}
285
c0951b79
TH
286/**
287 * vmw_resources_reserve - Reserve all resources on the sw_context's
288 * resource list.
289 *
290 * @sw_context: Pointer to the software context.
291 *
292 * Note that since vmware's command submission currently is protected by
293 * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
294 * since only a single thread at once will attempt this.
295 */
296static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
fb1d9738 297{
c0951b79 298 struct vmw_resource_val_node *val;
fb1d9738
JB
299 int ret;
300
c0951b79
TH
301 list_for_each_entry(val, &sw_context->resource_list, head) {
302 struct vmw_resource *res = val->res;
fb1d9738 303
c0951b79
TH
304 ret = vmw_resource_reserve(res, val->no_buffer_needed);
305 if (unlikely(ret != 0))
306 return ret;
307
308 if (res->backup) {
309 struct ttm_buffer_object *bo = &res->backup->base;
310
311 ret = vmw_bo_to_validate_list
96c5f0df
TH
312 (sw_context, bo,
313 vmw_resource_needs_backup(res), NULL);
c0951b79
TH
314
315 if (unlikely(ret != 0))
316 return ret;
317 }
fb1d9738 318 }
c0951b79
TH
319 return 0;
320}
fb1d9738 321
c0951b79
TH
322/**
323 * vmw_resources_validate - Validate all resources on the sw_context's
324 * resource list.
325 *
326 * @sw_context: Pointer to the software context.
327 *
328 * Before this function is called, all resource backup buffers must have
329 * been validated.
330 */
331static int vmw_resources_validate(struct vmw_sw_context *sw_context)
332{
333 struct vmw_resource_val_node *val;
334 int ret;
335
336 list_for_each_entry(val, &sw_context->resource_list, head) {
337 struct vmw_resource *res = val->res;
f18c8840 338
c0951b79
TH
339 ret = vmw_resource_validate(res);
340 if (unlikely(ret != 0)) {
341 if (ret != -ERESTARTSYS)
342 DRM_ERROR("Failed to validate resource.\n");
343 return ret;
344 }
345 }
f18c8840 346 return 0;
fb1d9738
JB
347}
348
c0951b79
TH
349/**
350 * vmw_cmd_res_check - Check that a resource is present and if so, put it
351 * on the resource validate list unless it's already there.
352 *
353 * @dev_priv: Pointer to a device private structure.
354 * @sw_context: Pointer to the software context.
355 * @res_type: Resource type.
356 * @converter: User-space visisble type specific information.
357 * @id: Pointer to the location in the command buffer currently being
358 * parsed from where the user-space resource id handle is located.
359 */
360static int vmw_cmd_res_check(struct vmw_private *dev_priv,
fb1d9738 361 struct vmw_sw_context *sw_context,
c0951b79
TH
362 enum vmw_res_type res_type,
363 const struct vmw_user_resource_conv *converter,
364 uint32_t *id,
365 struct vmw_resource_val_node **p_val)
fb1d9738 366{
c0951b79
TH
367 struct vmw_res_cache_entry *rcache =
368 &sw_context->res_cache[res_type];
be38ab6e 369 struct vmw_resource *res;
c0951b79
TH
370 struct vmw_resource_val_node *node;
371 int ret;
be38ab6e 372
c0951b79 373 if (*id == SVGA3D_INVALID_ID)
7a73ba74
TH
374 return 0;
375
c0951b79
TH
376 /*
377 * Fastpath in case of repeated commands referencing the same
378 * resource
379 */
7a73ba74 380
c0951b79
TH
381 if (likely(rcache->valid && *id == rcache->handle)) {
382 const struct vmw_resource *res = rcache->res;
383
384 rcache->node->first_usage = false;
385 if (p_val)
386 *p_val = rcache->node;
387
388 return vmw_resource_relocation_add
389 (&sw_context->res_relocations, res,
390 id - sw_context->buf_start);
be38ab6e
TH
391 }
392
c0951b79
TH
393 ret = vmw_user_resource_lookup_handle(dev_priv,
394 sw_context->tfile,
395 *id,
396 converter,
397 &res);
5bb39e81 398 if (unlikely(ret != 0)) {
c0951b79
TH
399 DRM_ERROR("Could not find or use resource 0x%08x.\n",
400 (unsigned) *id);
401 dump_stack();
5bb39e81
TH
402 return ret;
403 }
404
c0951b79
TH
405 rcache->valid = true;
406 rcache->res = res;
407 rcache->handle = *id;
be38ab6e 408
c0951b79
TH
409 ret = vmw_resource_relocation_add(&sw_context->res_relocations,
410 res,
411 id - sw_context->buf_start);
412 if (unlikely(ret != 0))
413 goto out_no_reloc;
414
415 ret = vmw_resource_val_add(sw_context, res, &node);
416 if (unlikely(ret != 0))
417 goto out_no_reloc;
f18c8840 418
c0951b79
TH
419 rcache->node = node;
420 if (p_val)
421 *p_val = node;
422 vmw_resource_unreference(&res);
f18c8840 423 return 0;
c0951b79
TH
424
425out_no_reloc:
426 BUG_ON(sw_context->error_resource != NULL);
427 sw_context->error_resource = res;
428
429 return ret;
fb1d9738
JB
430}
431
c0951b79
TH
432/**
433 * vmw_cmd_cid_check - Check a command header for valid context information.
434 *
435 * @dev_priv: Pointer to a device private structure.
436 * @sw_context: Pointer to the software context.
437 * @header: A command header with an embedded user-space context handle.
438 *
439 * Convenience function: Call vmw_cmd_res_check with the user-space context
440 * handle embedded in @header.
441 */
442static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
443 struct vmw_sw_context *sw_context,
444 SVGA3dCmdHeader *header)
445{
446 struct vmw_cid_cmd {
447 SVGA3dCmdHeader header;
448 __le32 cid;
449 } *cmd;
450
451 cmd = container_of(header, struct vmw_cid_cmd, header);
452 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
453 user_context_converter, &cmd->cid, NULL);
454}
fb1d9738
JB
455
456static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
457 struct vmw_sw_context *sw_context,
458 SVGA3dCmdHeader *header)
459{
460 struct vmw_sid_cmd {
461 SVGA3dCmdHeader header;
462 SVGA3dCmdSetRenderTarget body;
463 } *cmd;
464 int ret;
465
466 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
467 if (unlikely(ret != 0))
468 return ret;
469
470 cmd = container_of(header, struct vmw_sid_cmd, header);
c0951b79
TH
471 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
472 user_surface_converter,
473 &cmd->body.target.sid, NULL);
7a73ba74 474 return ret;
fb1d9738
JB
475}
476
477static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
478 struct vmw_sw_context *sw_context,
479 SVGA3dCmdHeader *header)
480{
481 struct vmw_sid_cmd {
482 SVGA3dCmdHeader header;
483 SVGA3dCmdSurfaceCopy body;
484 } *cmd;
485 int ret;
486
487 cmd = container_of(header, struct vmw_sid_cmd, header);
c0951b79
TH
488 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
489 user_surface_converter,
490 &cmd->body.src.sid, NULL);
fb1d9738
JB
491 if (unlikely(ret != 0))
492 return ret;
c0951b79
TH
493 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
494 user_surface_converter,
495 &cmd->body.dest.sid, NULL);
fb1d9738
JB
496}
497
498static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
499 struct vmw_sw_context *sw_context,
500 SVGA3dCmdHeader *header)
501{
502 struct vmw_sid_cmd {
503 SVGA3dCmdHeader header;
504 SVGA3dCmdSurfaceStretchBlt body;
505 } *cmd;
506 int ret;
507
508 cmd = container_of(header, struct vmw_sid_cmd, header);
c0951b79
TH
509 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
510 user_surface_converter,
511 &cmd->body.src.sid, NULL);
fb1d9738
JB
512 if (unlikely(ret != 0))
513 return ret;
c0951b79
TH
514 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
515 user_surface_converter,
516 &cmd->body.dest.sid, NULL);
fb1d9738
JB
517}
518
519static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
520 struct vmw_sw_context *sw_context,
521 SVGA3dCmdHeader *header)
522{
523 struct vmw_sid_cmd {
524 SVGA3dCmdHeader header;
525 SVGA3dCmdBlitSurfaceToScreen body;
526 } *cmd;
527
528 cmd = container_of(header, struct vmw_sid_cmd, header);
0cff60c6
JB
529
530 if (unlikely(!sw_context->kernel)) {
531 DRM_ERROR("Kernel only SVGA3d command: %u.\n", cmd->header.id);
532 return -EPERM;
533 }
534
c0951b79
TH
535 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
536 user_surface_converter,
537 &cmd->body.srcImage.sid, NULL);
fb1d9738
JB
538}
539
540static int vmw_cmd_present_check(struct vmw_private *dev_priv,
541 struct vmw_sw_context *sw_context,
542 SVGA3dCmdHeader *header)
543{
544 struct vmw_sid_cmd {
545 SVGA3dCmdHeader header;
546 SVGA3dCmdPresent body;
547 } *cmd;
548
5bb39e81 549
fb1d9738 550 cmd = container_of(header, struct vmw_sid_cmd, header);
0cff60c6
JB
551
552 if (unlikely(!sw_context->kernel)) {
553 DRM_ERROR("Kernel only SVGA3d command: %u.\n", cmd->header.id);
554 return -EPERM;
555 }
556
c0951b79
TH
557 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
558 user_surface_converter, &cmd->body.sid,
559 NULL);
fb1d9738
JB
560}
561
e2fa3a76
TH
562/**
563 * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
564 *
565 * @dev_priv: The device private structure.
e2fa3a76
TH
566 * @new_query_bo: The new buffer holding query results.
567 * @sw_context: The software context used for this command submission.
568 *
569 * This function checks whether @new_query_bo is suitable for holding
570 * query results, and if another buffer currently is pinned for query
571 * results. If so, the function prepares the state of @sw_context for
572 * switching pinned buffers after successful submission of the current
c0951b79 573 * command batch.
e2fa3a76
TH
574 */
575static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
e2fa3a76
TH
576 struct ttm_buffer_object *new_query_bo,
577 struct vmw_sw_context *sw_context)
578{
c0951b79
TH
579 struct vmw_res_cache_entry *ctx_entry =
580 &sw_context->res_cache[vmw_res_context];
e2fa3a76 581 int ret;
c0951b79
TH
582
583 BUG_ON(!ctx_entry->valid);
584 sw_context->last_query_ctx = ctx_entry->res;
e2fa3a76
TH
585
586 if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
587
588 if (unlikely(new_query_bo->num_pages > 4)) {
589 DRM_ERROR("Query buffer too large.\n");
590 return -EINVAL;
591 }
592
593 if (unlikely(sw_context->cur_query_bo != NULL)) {
c0951b79 594 sw_context->needs_post_query_barrier = true;
e2fa3a76
TH
595 ret = vmw_bo_to_validate_list(sw_context,
596 sw_context->cur_query_bo,
96c5f0df 597 dev_priv->has_mob, NULL);
e2fa3a76
TH
598 if (unlikely(ret != 0))
599 return ret;
600 }
601 sw_context->cur_query_bo = new_query_bo;
602
603 ret = vmw_bo_to_validate_list(sw_context,
604 dev_priv->dummy_query_bo,
96c5f0df 605 dev_priv->has_mob, NULL);
e2fa3a76
TH
606 if (unlikely(ret != 0))
607 return ret;
608
609 }
610
e2fa3a76
TH
611 return 0;
612}
613
614
615/**
616 * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
617 *
618 * @dev_priv: The device private structure.
619 * @sw_context: The software context used for this command submission batch.
620 *
621 * This function will check if we're switching query buffers, and will then,
e2fa3a76
TH
622 * issue a dummy occlusion query wait used as a query barrier. When the fence
623 * object following that query wait has signaled, we are sure that all
c0951b79 624 * preceding queries have finished, and the old query buffer can be unpinned.
e2fa3a76
TH
625 * However, since both the new query buffer and the old one are fenced with
626 * that fence, we can do an asynchronus unpin now, and be sure that the
627 * old query buffer won't be moved until the fence has signaled.
628 *
629 * As mentioned above, both the new - and old query buffers need to be fenced
630 * using a sequence emitted *after* calling this function.
631 */
632static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
633 struct vmw_sw_context *sw_context)
634{
e2fa3a76
TH
635 /*
636 * The validate list should still hold references to all
637 * contexts here.
638 */
639
c0951b79
TH
640 if (sw_context->needs_post_query_barrier) {
641 struct vmw_res_cache_entry *ctx_entry =
642 &sw_context->res_cache[vmw_res_context];
643 struct vmw_resource *ctx;
644 int ret;
e2fa3a76 645
c0951b79
TH
646 BUG_ON(!ctx_entry->valid);
647 ctx = ctx_entry->res;
e2fa3a76
TH
648
649 ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
650
651 if (unlikely(ret != 0))
652 DRM_ERROR("Out of fifo space for dummy query.\n");
653 }
654
655 if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
656 if (dev_priv->pinned_bo) {
657 vmw_bo_pin(dev_priv->pinned_bo, false);
658 ttm_bo_unref(&dev_priv->pinned_bo);
659 }
660
c0951b79
TH
661 if (!sw_context->needs_post_query_barrier) {
662 vmw_bo_pin(sw_context->cur_query_bo, true);
e2fa3a76 663
c0951b79
TH
664 /*
665 * We pin also the dummy_query_bo buffer so that we
666 * don't need to validate it when emitting
667 * dummy queries in context destroy paths.
668 */
e2fa3a76 669
c0951b79
TH
670 vmw_bo_pin(dev_priv->dummy_query_bo, true);
671 dev_priv->dummy_query_bo_pinned = true;
e2fa3a76 672
c0951b79
TH
673 BUG_ON(sw_context->last_query_ctx == NULL);
674 dev_priv->query_cid = sw_context->last_query_ctx->id;
675 dev_priv->query_cid_valid = true;
676 dev_priv->pinned_bo =
677 ttm_bo_reference(sw_context->cur_query_bo);
678 }
e2fa3a76
TH
679 }
680}
681
ddcda24e
TH
682/**
683 * vmw_translate_mob_pointer - Prepare to translate a user-space buffer
684 * handle to a MOB id.
685 *
686 * @dev_priv: Pointer to a device private structure.
687 * @sw_context: The software context used for this command batch validation.
688 * @id: Pointer to the user-space handle to be translated.
689 * @vmw_bo_p: Points to a location that, on successful return will carry
690 * a reference-counted pointer to the DMA buffer identified by the
691 * user-space handle in @id.
692 *
693 * This function saves information needed to translate a user-space buffer
694 * handle to a MOB id. The translation does not take place immediately, but
695 * during a call to vmw_apply_relocations(). This function builds a relocation
696 * list and a list of buffers to validate. The former needs to be freed using
697 * either vmw_apply_relocations() or vmw_free_relocations(). The latter
698 * needs to be freed using vmw_clear_validations.
699 */
700static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
701 struct vmw_sw_context *sw_context,
702 SVGAMobId *id,
703 struct vmw_dma_buffer **vmw_bo_p)
704{
705 struct vmw_dma_buffer *vmw_bo = NULL;
706 struct ttm_buffer_object *bo;
707 uint32_t handle = *id;
708 struct vmw_relocation *reloc;
709 int ret;
710
711 ret = vmw_user_dmabuf_lookup(sw_context->tfile, handle, &vmw_bo);
712 if (unlikely(ret != 0)) {
713 DRM_ERROR("Could not find or use MOB buffer.\n");
714 return -EINVAL;
715 }
716 bo = &vmw_bo->base;
717
718 if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
719 DRM_ERROR("Max number relocations per submission"
720 " exceeded\n");
721 ret = -EINVAL;
722 goto out_no_reloc;
723 }
724
725 reloc = &sw_context->relocs[sw_context->cur_reloc++];
726 reloc->mob_loc = id;
727 reloc->location = NULL;
728
729 ret = vmw_bo_to_validate_list(sw_context, bo, true, &reloc->index);
730 if (unlikely(ret != 0))
731 goto out_no_reloc;
732
733 *vmw_bo_p = vmw_bo;
734 return 0;
735
736out_no_reloc:
737 vmw_dmabuf_unreference(&vmw_bo);
738 vmw_bo_p = NULL;
739 return ret;
740}
741
e2fa3a76 742/**
c0951b79
TH
743 * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
744 * handle to a valid SVGAGuestPtr
e2fa3a76 745 *
c0951b79
TH
746 * @dev_priv: Pointer to a device private structure.
747 * @sw_context: The software context used for this command batch validation.
748 * @ptr: Pointer to the user-space handle to be translated.
749 * @vmw_bo_p: Points to a location that, on successful return will carry
750 * a reference-counted pointer to the DMA buffer identified by the
751 * user-space handle in @id.
e2fa3a76 752 *
c0951b79
TH
753 * This function saves information needed to translate a user-space buffer
754 * handle to a valid SVGAGuestPtr. The translation does not take place
755 * immediately, but during a call to vmw_apply_relocations().
756 * This function builds a relocation list and a list of buffers to validate.
757 * The former needs to be freed using either vmw_apply_relocations() or
758 * vmw_free_relocations(). The latter needs to be freed using
759 * vmw_clear_validations.
e2fa3a76 760 */
4e4ddd47
TH
761static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
762 struct vmw_sw_context *sw_context,
763 SVGAGuestPtr *ptr,
764 struct vmw_dma_buffer **vmw_bo_p)
fb1d9738 765{
fb1d9738
JB
766 struct vmw_dma_buffer *vmw_bo = NULL;
767 struct ttm_buffer_object *bo;
4e4ddd47 768 uint32_t handle = ptr->gmrId;
fb1d9738 769 struct vmw_relocation *reloc;
4e4ddd47 770 int ret;
fb1d9738 771
fb1d9738
JB
772 ret = vmw_user_dmabuf_lookup(sw_context->tfile, handle, &vmw_bo);
773 if (unlikely(ret != 0)) {
774 DRM_ERROR("Could not find or use GMR region.\n");
775 return -EINVAL;
776 }
777 bo = &vmw_bo->base;
778
779 if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
4e4ddd47 780 DRM_ERROR("Max number relocations per submission"
fb1d9738
JB
781 " exceeded\n");
782 ret = -EINVAL;
783 goto out_no_reloc;
784 }
785
786 reloc = &sw_context->relocs[sw_context->cur_reloc++];
4e4ddd47 787 reloc->location = ptr;
fb1d9738 788
96c5f0df 789 ret = vmw_bo_to_validate_list(sw_context, bo, false, &reloc->index);
e2fa3a76 790 if (unlikely(ret != 0))
fb1d9738 791 goto out_no_reloc;
fb1d9738 792
4e4ddd47
TH
793 *vmw_bo_p = vmw_bo;
794 return 0;
795
796out_no_reloc:
797 vmw_dmabuf_unreference(&vmw_bo);
798 vmw_bo_p = NULL;
799 return ret;
800}
801
ddcda24e
TH
802/**
803 * vmw_cmd_begin_gb_query - validate a SVGA_3D_CMD_BEGIN_GB_QUERY command.
804 *
805 * @dev_priv: Pointer to a device private struct.
806 * @sw_context: The software context used for this command submission.
807 * @header: Pointer to the command header in the command stream.
808 */
809static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
810 struct vmw_sw_context *sw_context,
811 SVGA3dCmdHeader *header)
812{
813 struct vmw_begin_gb_query_cmd {
814 SVGA3dCmdHeader header;
815 SVGA3dCmdBeginGBQuery q;
816 } *cmd;
817
818 cmd = container_of(header, struct vmw_begin_gb_query_cmd,
819 header);
820
821 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
822 user_context_converter, &cmd->q.cid,
823 NULL);
824}
825
c0951b79
TH
826/**
827 * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
828 *
829 * @dev_priv: Pointer to a device private struct.
830 * @sw_context: The software context used for this command submission.
831 * @header: Pointer to the command header in the command stream.
832 */
833static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
834 struct vmw_sw_context *sw_context,
835 SVGA3dCmdHeader *header)
836{
837 struct vmw_begin_query_cmd {
838 SVGA3dCmdHeader header;
839 SVGA3dCmdBeginQuery q;
840 } *cmd;
841
842 cmd = container_of(header, struct vmw_begin_query_cmd,
843 header);
844
ddcda24e
TH
845 if (unlikely(dev_priv->has_mob)) {
846 struct {
847 SVGA3dCmdHeader header;
848 SVGA3dCmdBeginGBQuery q;
849 } gb_cmd;
850
851 BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
852
853 gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
854 gb_cmd.header.size = cmd->header.size;
855 gb_cmd.q.cid = cmd->q.cid;
856 gb_cmd.q.type = cmd->q.type;
857
858 memcpy(cmd, &gb_cmd, sizeof(*cmd));
859 return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
860 }
861
c0951b79
TH
862 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
863 user_context_converter, &cmd->q.cid,
864 NULL);
865}
866
ddcda24e
TH
867/**
868 * vmw_cmd_end_gb_query - validate a SVGA_3D_CMD_END_GB_QUERY command.
869 *
870 * @dev_priv: Pointer to a device private struct.
871 * @sw_context: The software context used for this command submission.
872 * @header: Pointer to the command header in the command stream.
873 */
874static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
875 struct vmw_sw_context *sw_context,
876 SVGA3dCmdHeader *header)
877{
878 struct vmw_dma_buffer *vmw_bo;
879 struct vmw_query_cmd {
880 SVGA3dCmdHeader header;
881 SVGA3dCmdEndGBQuery q;
882 } *cmd;
883 int ret;
884
885 cmd = container_of(header, struct vmw_query_cmd, header);
886 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
887 if (unlikely(ret != 0))
888 return ret;
889
890 ret = vmw_translate_mob_ptr(dev_priv, sw_context,
891 &cmd->q.mobid,
892 &vmw_bo);
893 if (unlikely(ret != 0))
894 return ret;
895
896 ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
897
898 vmw_dmabuf_unreference(&vmw_bo);
899 return ret;
900}
901
c0951b79
TH
902/**
903 * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
904 *
905 * @dev_priv: Pointer to a device private struct.
906 * @sw_context: The software context used for this command submission.
907 * @header: Pointer to the command header in the command stream.
908 */
4e4ddd47
TH
909static int vmw_cmd_end_query(struct vmw_private *dev_priv,
910 struct vmw_sw_context *sw_context,
911 SVGA3dCmdHeader *header)
912{
913 struct vmw_dma_buffer *vmw_bo;
914 struct vmw_query_cmd {
915 SVGA3dCmdHeader header;
916 SVGA3dCmdEndQuery q;
917 } *cmd;
918 int ret;
919
920 cmd = container_of(header, struct vmw_query_cmd, header);
ddcda24e
TH
921 if (dev_priv->has_mob) {
922 struct {
923 SVGA3dCmdHeader header;
924 SVGA3dCmdEndGBQuery q;
925 } gb_cmd;
926
927 BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
928
929 gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
930 gb_cmd.header.size = cmd->header.size;
931 gb_cmd.q.cid = cmd->q.cid;
932 gb_cmd.q.type = cmd->q.type;
933 gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
934 gb_cmd.q.offset = cmd->q.guestResult.offset;
935
936 memcpy(cmd, &gb_cmd, sizeof(*cmd));
937 return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
938 }
939
4e4ddd47
TH
940 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
941 if (unlikely(ret != 0))
942 return ret;
943
944 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
945 &cmd->q.guestResult,
946 &vmw_bo);
947 if (unlikely(ret != 0))
948 return ret;
949
c0951b79 950 ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
e2fa3a76 951
4e4ddd47 952 vmw_dmabuf_unreference(&vmw_bo);
e2fa3a76 953 return ret;
4e4ddd47 954}
fb1d9738 955
ddcda24e
TH
956/**
957 * vmw_cmd_wait_gb_query - validate a SVGA_3D_CMD_WAIT_GB_QUERY command.
958 *
959 * @dev_priv: Pointer to a device private struct.
960 * @sw_context: The software context used for this command submission.
961 * @header: Pointer to the command header in the command stream.
962 */
963static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
964 struct vmw_sw_context *sw_context,
965 SVGA3dCmdHeader *header)
966{
967 struct vmw_dma_buffer *vmw_bo;
968 struct vmw_query_cmd {
969 SVGA3dCmdHeader header;
970 SVGA3dCmdWaitForGBQuery q;
971 } *cmd;
972 int ret;
973
974 cmd = container_of(header, struct vmw_query_cmd, header);
975 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
976 if (unlikely(ret != 0))
977 return ret;
978
979 ret = vmw_translate_mob_ptr(dev_priv, sw_context,
980 &cmd->q.mobid,
981 &vmw_bo);
982 if (unlikely(ret != 0))
983 return ret;
984
985 vmw_dmabuf_unreference(&vmw_bo);
986 return 0;
987}
988
989/**
c0951b79
TH
990 * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
991 *
992 * @dev_priv: Pointer to a device private struct.
993 * @sw_context: The software context used for this command submission.
994 * @header: Pointer to the command header in the command stream.
995 */
4e4ddd47
TH
996static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
997 struct vmw_sw_context *sw_context,
998 SVGA3dCmdHeader *header)
999{
1000 struct vmw_dma_buffer *vmw_bo;
1001 struct vmw_query_cmd {
1002 SVGA3dCmdHeader header;
1003 SVGA3dCmdWaitForQuery q;
1004 } *cmd;
1005 int ret;
1006
1007 cmd = container_of(header, struct vmw_query_cmd, header);
ddcda24e
TH
1008 if (dev_priv->has_mob) {
1009 struct {
1010 SVGA3dCmdHeader header;
1011 SVGA3dCmdWaitForGBQuery q;
1012 } gb_cmd;
1013
1014 BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
1015
1016 gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
1017 gb_cmd.header.size = cmd->header.size;
1018 gb_cmd.q.cid = cmd->q.cid;
1019 gb_cmd.q.type = cmd->q.type;
1020 gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
1021 gb_cmd.q.offset = cmd->q.guestResult.offset;
1022
1023 memcpy(cmd, &gb_cmd, sizeof(*cmd));
1024 return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
1025 }
1026
4e4ddd47
TH
1027 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1028 if (unlikely(ret != 0))
1029 return ret;
1030
1031 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1032 &cmd->q.guestResult,
1033 &vmw_bo);
1034 if (unlikely(ret != 0))
1035 return ret;
1036
1037 vmw_dmabuf_unreference(&vmw_bo);
1038 return 0;
1039}
1040
4e4ddd47
TH
1041static int vmw_cmd_dma(struct vmw_private *dev_priv,
1042 struct vmw_sw_context *sw_context,
1043 SVGA3dCmdHeader *header)
1044{
1045 struct vmw_dma_buffer *vmw_bo = NULL;
4e4ddd47
TH
1046 struct vmw_surface *srf = NULL;
1047 struct vmw_dma_cmd {
1048 SVGA3dCmdHeader header;
1049 SVGA3dCmdSurfaceDMA dma;
1050 } *cmd;
1051 int ret;
1052
1053 cmd = container_of(header, struct vmw_dma_cmd, header);
1054 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1055 &cmd->dma.guest.ptr,
1056 &vmw_bo);
1057 if (unlikely(ret != 0))
1058 return ret;
1059
c0951b79
TH
1060 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1061 user_surface_converter, &cmd->dma.host.sid,
1062 NULL);
5bb39e81 1063 if (unlikely(ret != 0)) {
c0951b79
TH
1064 if (unlikely(ret != -ERESTARTSYS))
1065 DRM_ERROR("could not find surface for DMA.\n");
1066 goto out_no_surface;
5bb39e81
TH
1067 }
1068
c0951b79 1069 srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
f18c8840 1070
c0951b79 1071 vmw_kms_cursor_snoop(srf, sw_context->tfile, &vmw_bo->base, header);
fb1d9738 1072
c0951b79 1073out_no_surface:
fb1d9738
JB
1074 vmw_dmabuf_unreference(&vmw_bo);
1075 return ret;
1076}
1077
7a73ba74
TH
1078static int vmw_cmd_draw(struct vmw_private *dev_priv,
1079 struct vmw_sw_context *sw_context,
1080 SVGA3dCmdHeader *header)
1081{
1082 struct vmw_draw_cmd {
1083 SVGA3dCmdHeader header;
1084 SVGA3dCmdDrawPrimitives body;
1085 } *cmd;
1086 SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
1087 (unsigned long)header + sizeof(*cmd));
1088 SVGA3dPrimitiveRange *range;
1089 uint32_t i;
1090 uint32_t maxnum;
1091 int ret;
1092
1093 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1094 if (unlikely(ret != 0))
1095 return ret;
1096
1097 cmd = container_of(header, struct vmw_draw_cmd, header);
1098 maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
1099
1100 if (unlikely(cmd->body.numVertexDecls > maxnum)) {
1101 DRM_ERROR("Illegal number of vertex declarations.\n");
1102 return -EINVAL;
1103 }
1104
1105 for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
c0951b79
TH
1106 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1107 user_surface_converter,
1108 &decl->array.surfaceId, NULL);
7a73ba74
TH
1109 if (unlikely(ret != 0))
1110 return ret;
1111 }
1112
1113 maxnum = (header->size - sizeof(cmd->body) -
1114 cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
1115 if (unlikely(cmd->body.numRanges > maxnum)) {
1116 DRM_ERROR("Illegal number of index ranges.\n");
1117 return -EINVAL;
1118 }
1119
1120 range = (SVGA3dPrimitiveRange *) decl;
1121 for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
c0951b79
TH
1122 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1123 user_surface_converter,
1124 &range->indexArray.surfaceId, NULL);
7a73ba74
TH
1125 if (unlikely(ret != 0))
1126 return ret;
1127 }
1128 return 0;
1129}
1130
1131
1132static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
1133 struct vmw_sw_context *sw_context,
1134 SVGA3dCmdHeader *header)
1135{
1136 struct vmw_tex_state_cmd {
1137 SVGA3dCmdHeader header;
1138 SVGA3dCmdSetTextureState state;
1139 };
1140
1141 SVGA3dTextureState *last_state = (SVGA3dTextureState *)
1142 ((unsigned long) header + header->size + sizeof(header));
1143 SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
1144 ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
1145 int ret;
1146
1147 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1148 if (unlikely(ret != 0))
1149 return ret;
1150
1151 for (; cur_state < last_state; ++cur_state) {
1152 if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
1153 continue;
1154
c0951b79
TH
1155 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1156 user_surface_converter,
1157 &cur_state->value, NULL);
7a73ba74
TH
1158 if (unlikely(ret != 0))
1159 return ret;
1160 }
1161
1162 return 0;
1163}
1164
4084fb89
JB
1165static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
1166 struct vmw_sw_context *sw_context,
1167 void *buf)
1168{
1169 struct vmw_dma_buffer *vmw_bo;
1170 int ret;
1171
1172 struct {
1173 uint32_t header;
1174 SVGAFifoCmdDefineGMRFB body;
1175 } *cmd = buf;
1176
1177 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1178 &cmd->body.ptr,
1179 &vmw_bo);
1180 if (unlikely(ret != 0))
1181 return ret;
1182
1183 vmw_dmabuf_unreference(&vmw_bo);
1184
1185 return ret;
1186}
1187
c0951b79
TH
1188/**
1189 * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
1190 * command
1191 *
1192 * @dev_priv: Pointer to a device private struct.
1193 * @sw_context: The software context being used for this batch.
1194 * @header: Pointer to the command header in the command stream.
1195 */
1196static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
1197 struct vmw_sw_context *sw_context,
1198 SVGA3dCmdHeader *header)
1199{
1200 struct vmw_set_shader_cmd {
1201 SVGA3dCmdHeader header;
1202 SVGA3dCmdSetShader body;
1203 } *cmd;
1204 int ret;
1205
1206 cmd = container_of(header, struct vmw_set_shader_cmd,
1207 header);
1208
1209 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1210 if (unlikely(ret != 0))
1211 return ret;
1212
1213 return 0;
1214}
1215
4084fb89
JB
1216static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
1217 struct vmw_sw_context *sw_context,
1218 void *buf, uint32_t *size)
1219{
1220 uint32_t size_remaining = *size;
4084fb89
JB
1221 uint32_t cmd_id;
1222
1223 cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
1224 switch (cmd_id) {
1225 case SVGA_CMD_UPDATE:
1226 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
4084fb89
JB
1227 break;
1228 case SVGA_CMD_DEFINE_GMRFB:
1229 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
1230 break;
1231 case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
1232 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
1233 break;
1234 case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
1235 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
1236 break;
1237 default:
1238 DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
1239 return -EINVAL;
1240 }
1241
1242 if (*size > size_remaining) {
1243 DRM_ERROR("Invalid SVGA command (size mismatch):"
1244 " %u.\n", cmd_id);
1245 return -EINVAL;
1246 }
1247
0cff60c6 1248 if (unlikely(!sw_context->kernel)) {
4084fb89
JB
1249 DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
1250 return -EPERM;
1251 }
1252
1253 if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
1254 return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
1255
1256 return 0;
1257}
fb1d9738
JB
1258
1259typedef int (*vmw_cmd_func) (struct vmw_private *,
1260 struct vmw_sw_context *,
1261 SVGA3dCmdHeader *);
1262
1263#define VMW_CMD_DEF(cmd, func) \
1264 [cmd - SVGA_3D_CMD_BASE] = func
1265
1266static vmw_cmd_func vmw_cmd_funcs[SVGA_3D_CMD_MAX] = {
1267 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid),
1268 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid),
1269 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check),
1270 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check),
1271 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma),
1272 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid),
1273 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid),
1274 VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check),
1275 VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check),
1276 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check),
1277 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
1278 &vmw_cmd_set_render_target_check),
7a73ba74 1279 VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state),
fb1d9738
JB
1280 VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check),
1281 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check),
1282 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check),
1283 VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check),
1284 VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check),
1285 VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check),
1286 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check),
1287 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_cid_check),
1288 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_cid_check),
c0951b79 1289 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader),
fb1d9738 1290 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_cid_check),
7a73ba74 1291 VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw),
fb1d9738 1292 VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check),
c0951b79 1293 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query),
4e4ddd47
TH
1294 VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query),
1295 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query),
fb1d9738
JB
1296 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok),
1297 VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
c0951b79
TH
1298 &vmw_cmd_blt_surf_screen_check),
1299 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid),
1300 VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid),
1301 VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid),
1302 VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid),
58a0c5f0
TH
1303 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid),
1304 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid),
1305 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid),
1306 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid),
1307 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid),
ddcda24e
TH
1308 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query),
1309 VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query),
1310 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query),
fb1d9738
JB
1311};
1312
1313static int vmw_cmd_check(struct vmw_private *dev_priv,
1314 struct vmw_sw_context *sw_context,
1315 void *buf, uint32_t *size)
1316{
1317 uint32_t cmd_id;
7a73ba74 1318 uint32_t size_remaining = *size;
fb1d9738
JB
1319 SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
1320 int ret;
1321
4084fb89
JB
1322 cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
1323 /* Handle any none 3D commands */
1324 if (unlikely(cmd_id < SVGA_CMD_MAX))
1325 return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
1326
fb1d9738
JB
1327
1328 cmd_id = le32_to_cpu(header->id);
1329 *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
1330
1331 cmd_id -= SVGA_3D_CMD_BASE;
7a73ba74
TH
1332 if (unlikely(*size > size_remaining))
1333 goto out_err;
1334
fb1d9738
JB
1335 if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
1336 goto out_err;
1337
1338 ret = vmw_cmd_funcs[cmd_id](dev_priv, sw_context, header);
1339 if (unlikely(ret != 0))
1340 goto out_err;
1341
1342 return 0;
1343out_err:
1344 DRM_ERROR("Illegal / Invalid SVGA3D command: %d\n",
1345 cmd_id + SVGA_3D_CMD_BASE);
1346 return -EINVAL;
1347}
1348
1349static int vmw_cmd_check_all(struct vmw_private *dev_priv,
1350 struct vmw_sw_context *sw_context,
922ade0d 1351 void *buf,
be38ab6e 1352 uint32_t size)
fb1d9738
JB
1353{
1354 int32_t cur_size = size;
1355 int ret;
1356
c0951b79
TH
1357 sw_context->buf_start = buf;
1358
fb1d9738 1359 while (cur_size > 0) {
7a73ba74 1360 size = cur_size;
fb1d9738
JB
1361 ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
1362 if (unlikely(ret != 0))
1363 return ret;
1364 buf = (void *)((unsigned long) buf + size);
1365 cur_size -= size;
1366 }
1367
1368 if (unlikely(cur_size != 0)) {
1369 DRM_ERROR("Command verifier out of sync.\n");
1370 return -EINVAL;
1371 }
1372
1373 return 0;
1374}
1375
1376static void vmw_free_relocations(struct vmw_sw_context *sw_context)
1377{
1378 sw_context->cur_reloc = 0;
1379}
1380
1381static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
1382{
1383 uint32_t i;
1384 struct vmw_relocation *reloc;
1385 struct ttm_validate_buffer *validate;
1386 struct ttm_buffer_object *bo;
1387
1388 for (i = 0; i < sw_context->cur_reloc; ++i) {
1389 reloc = &sw_context->relocs[i];
c0951b79 1390 validate = &sw_context->val_bufs[reloc->index].base;
fb1d9738 1391 bo = validate->bo;
c0951b79
TH
1392 switch (bo->mem.mem_type) {
1393 case TTM_PL_VRAM:
135cba0d
TH
1394 reloc->location->offset += bo->offset;
1395 reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
c0951b79
TH
1396 break;
1397 case VMW_PL_GMR:
135cba0d 1398 reloc->location->gmrId = bo->mem.start;
c0951b79 1399 break;
ddcda24e
TH
1400 case VMW_PL_MOB:
1401 *reloc->mob_loc = bo->mem.start;
1402 break;
c0951b79
TH
1403 default:
1404 BUG();
1405 }
fb1d9738
JB
1406 }
1407 vmw_free_relocations(sw_context);
1408}
1409
c0951b79
TH
1410/**
1411 * vmw_resource_list_unrefererence - Free up a resource list and unreference
1412 * all resources referenced by it.
1413 *
1414 * @list: The resource list.
1415 */
1416static void vmw_resource_list_unreference(struct list_head *list)
1417{
1418 struct vmw_resource_val_node *val, *val_next;
1419
1420 /*
1421 * Drop references to resources held during command submission.
1422 */
1423
1424 list_for_each_entry_safe(val, val_next, list, head) {
1425 list_del_init(&val->head);
1426 vmw_resource_unreference(&val->res);
1427 kfree(val);
1428 }
1429}
1430
fb1d9738
JB
1431static void vmw_clear_validations(struct vmw_sw_context *sw_context)
1432{
c0951b79
TH
1433 struct vmw_validate_buffer *entry, *next;
1434 struct vmw_resource_val_node *val;
fb1d9738 1435
be38ab6e
TH
1436 /*
1437 * Drop references to DMA buffers held during command submission.
1438 */
fb1d9738 1439 list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
c0951b79
TH
1440 base.head) {
1441 list_del(&entry->base.head);
1442 ttm_bo_unref(&entry->base.bo);
1443 (void) drm_ht_remove_item(&sw_context->res_ht, &entry->hash);
fb1d9738
JB
1444 sw_context->cur_val_buf--;
1445 }
1446 BUG_ON(sw_context->cur_val_buf != 0);
be38ab6e 1447
c0951b79
TH
1448 list_for_each_entry(val, &sw_context->resource_list, head)
1449 (void) drm_ht_remove_item(&sw_context->res_ht, &val->hash);
fb1d9738
JB
1450}
1451
1452static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
96c5f0df
TH
1453 struct ttm_buffer_object *bo,
1454 bool validate_as_mob)
fb1d9738
JB
1455{
1456 int ret;
1457
e2fa3a76
TH
1458
1459 /*
1460 * Don't validate pinned buffers.
1461 */
1462
1463 if (bo == dev_priv->pinned_bo ||
1464 (bo == dev_priv->dummy_query_bo &&
1465 dev_priv->dummy_query_bo_pinned))
1466 return 0;
1467
96c5f0df
TH
1468 if (validate_as_mob)
1469 return ttm_bo_validate(bo, &vmw_mob_placement, true, false);
1470
8ba5152a 1471 /**
135cba0d
TH
1472 * Put BO in VRAM if there is space, otherwise as a GMR.
1473 * If there is no space in VRAM and GMR ids are all used up,
1474 * start evicting GMRs to make room. If the DMA buffer can't be
1475 * used as a GMR, this will return -ENOMEM.
8ba5152a
TH
1476 */
1477
97a875cb 1478 ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, true, false);
3d3a5b32 1479 if (likely(ret == 0 || ret == -ERESTARTSYS))
fb1d9738
JB
1480 return ret;
1481
8ba5152a
TH
1482 /**
1483 * If that failed, try VRAM again, this time evicting
1484 * previous contents.
1485 */
fb1d9738 1486
135cba0d 1487 DRM_INFO("Falling through to VRAM.\n");
97a875cb 1488 ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
fb1d9738
JB
1489 return ret;
1490}
1491
fb1d9738
JB
1492static int vmw_validate_buffers(struct vmw_private *dev_priv,
1493 struct vmw_sw_context *sw_context)
1494{
c0951b79 1495 struct vmw_validate_buffer *entry;
fb1d9738
JB
1496 int ret;
1497
c0951b79 1498 list_for_each_entry(entry, &sw_context->validate_nodes, base.head) {
96c5f0df
TH
1499 ret = vmw_validate_single_buffer(dev_priv, entry->base.bo,
1500 entry->validate_as_mob);
fb1d9738
JB
1501 if (unlikely(ret != 0))
1502 return ret;
1503 }
1504 return 0;
1505}
1506
be38ab6e
TH
1507static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
1508 uint32_t size)
1509{
1510 if (likely(sw_context->cmd_bounce_size >= size))
1511 return 0;
1512
1513 if (sw_context->cmd_bounce_size == 0)
1514 sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
1515
1516 while (sw_context->cmd_bounce_size < size) {
1517 sw_context->cmd_bounce_size =
1518 PAGE_ALIGN(sw_context->cmd_bounce_size +
1519 (sw_context->cmd_bounce_size >> 1));
1520 }
1521
1522 if (sw_context->cmd_bounce != NULL)
1523 vfree(sw_context->cmd_bounce);
1524
1525 sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
1526
1527 if (sw_context->cmd_bounce == NULL) {
1528 DRM_ERROR("Failed to allocate command bounce buffer.\n");
1529 sw_context->cmd_bounce_size = 0;
1530 return -ENOMEM;
1531 }
1532
1533 return 0;
1534}
1535
ae2a1040
TH
1536/**
1537 * vmw_execbuf_fence_commands - create and submit a command stream fence
1538 *
1539 * Creates a fence object and submits a command stream marker.
1540 * If this fails for some reason, We sync the fifo and return NULL.
1541 * It is then safe to fence buffers with a NULL pointer.
6070e9fa
JB
1542 *
1543 * If @p_handle is not NULL @file_priv must also not be NULL. Creates
1544 * a userspace handle if @p_handle is not NULL, otherwise not.
ae2a1040
TH
1545 */
1546
1547int vmw_execbuf_fence_commands(struct drm_file *file_priv,
1548 struct vmw_private *dev_priv,
1549 struct vmw_fence_obj **p_fence,
1550 uint32_t *p_handle)
1551{
1552 uint32_t sequence;
1553 int ret;
1554 bool synced = false;
1555
6070e9fa
JB
1556 /* p_handle implies file_priv. */
1557 BUG_ON(p_handle != NULL && file_priv == NULL);
ae2a1040
TH
1558
1559 ret = vmw_fifo_send_fence(dev_priv, &sequence);
1560 if (unlikely(ret != 0)) {
1561 DRM_ERROR("Fence submission error. Syncing.\n");
1562 synced = true;
1563 }
1564
1565 if (p_handle != NULL)
1566 ret = vmw_user_fence_create(file_priv, dev_priv->fman,
1567 sequence,
1568 DRM_VMW_FENCE_FLAG_EXEC,
1569 p_fence, p_handle);
1570 else
1571 ret = vmw_fence_create(dev_priv->fman, sequence,
1572 DRM_VMW_FENCE_FLAG_EXEC,
1573 p_fence);
1574
1575 if (unlikely(ret != 0 && !synced)) {
1576 (void) vmw_fallback_wait(dev_priv, false, false,
1577 sequence, false,
1578 VMW_FENCE_WAIT_TIMEOUT);
1579 *p_fence = NULL;
1580 }
1581
1582 return 0;
1583}
1584
8bf445ce
TH
1585/**
1586 * vmw_execbuf_copy_fence_user - copy fence object information to
1587 * user-space.
1588 *
1589 * @dev_priv: Pointer to a vmw_private struct.
1590 * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
1591 * @ret: Return value from fence object creation.
1592 * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
1593 * which the information should be copied.
1594 * @fence: Pointer to the fenc object.
1595 * @fence_handle: User-space fence handle.
1596 *
1597 * This function copies fence information to user-space. If copying fails,
1598 * The user-space struct drm_vmw_fence_rep::error member is hopefully
1599 * left untouched, and if it's preloaded with an -EFAULT by user-space,
1600 * the error will hopefully be detected.
1601 * Also if copying fails, user-space will be unable to signal the fence
1602 * object so we wait for it immediately, and then unreference the
1603 * user-space reference.
1604 */
57c5ee79 1605void
8bf445ce
TH
1606vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
1607 struct vmw_fpriv *vmw_fp,
1608 int ret,
1609 struct drm_vmw_fence_rep __user *user_fence_rep,
1610 struct vmw_fence_obj *fence,
1611 uint32_t fence_handle)
1612{
1613 struct drm_vmw_fence_rep fence_rep;
1614
1615 if (user_fence_rep == NULL)
1616 return;
1617
80d9b24a
DC
1618 memset(&fence_rep, 0, sizeof(fence_rep));
1619
8bf445ce
TH
1620 fence_rep.error = ret;
1621 if (ret == 0) {
1622 BUG_ON(fence == NULL);
1623
1624 fence_rep.handle = fence_handle;
1625 fence_rep.seqno = fence->seqno;
1626 vmw_update_seqno(dev_priv, &dev_priv->fifo);
1627 fence_rep.passed_seqno = dev_priv->last_read_seqno;
1628 }
1629
1630 /*
1631 * copy_to_user errors will be detected by user space not
1632 * seeing fence_rep::error filled in. Typically
1633 * user-space would have pre-set that member to -EFAULT.
1634 */
1635 ret = copy_to_user(user_fence_rep, &fence_rep,
1636 sizeof(fence_rep));
1637
1638 /*
1639 * User-space lost the fence object. We need to sync
1640 * and unreference the handle.
1641 */
1642 if (unlikely(ret != 0) && (fence_rep.error == 0)) {
1643 ttm_ref_object_base_unref(vmw_fp->tfile,
1644 fence_handle, TTM_REF_USAGE);
1645 DRM_ERROR("Fence copy error. Syncing.\n");
1646 (void) vmw_fence_obj_wait(fence, fence->signal_mask,
1647 false, false,
1648 VMW_FENCE_WAIT_TIMEOUT);
1649 }
1650}
1651
922ade0d
TH
1652int vmw_execbuf_process(struct drm_file *file_priv,
1653 struct vmw_private *dev_priv,
1654 void __user *user_commands,
1655 void *kernel_commands,
1656 uint32_t command_size,
1657 uint64_t throttle_us,
bb1bd2f4
JB
1658 struct drm_vmw_fence_rep __user *user_fence_rep,
1659 struct vmw_fence_obj **out_fence)
fb1d9738 1660{
fb1d9738 1661 struct vmw_sw_context *sw_context = &dev_priv->ctx;
bb1bd2f4 1662 struct vmw_fence_obj *fence = NULL;
c0951b79
TH
1663 struct vmw_resource *error_resource;
1664 struct list_head resource_list;
ecff665f 1665 struct ww_acquire_ctx ticket;
ae2a1040 1666 uint32_t handle;
922ade0d
TH
1667 void *cmd;
1668 int ret;
fb1d9738 1669
922ade0d 1670 ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
fb1d9738 1671 if (unlikely(ret != 0))
922ade0d 1672 return -ERESTARTSYS;
fb1d9738 1673
922ade0d
TH
1674 if (kernel_commands == NULL) {
1675 sw_context->kernel = false;
fb1d9738 1676
922ade0d
TH
1677 ret = vmw_resize_cmd_bounce(sw_context, command_size);
1678 if (unlikely(ret != 0))
1679 goto out_unlock;
fb1d9738 1680
fb1d9738 1681
922ade0d
TH
1682 ret = copy_from_user(sw_context->cmd_bounce,
1683 user_commands, command_size);
1684
1685 if (unlikely(ret != 0)) {
1686 ret = -EFAULT;
1687 DRM_ERROR("Failed copying commands.\n");
1688 goto out_unlock;
1689 }
1690 kernel_commands = sw_context->cmd_bounce;
1691 } else
1692 sw_context->kernel = true;
fb1d9738
JB
1693
1694 sw_context->tfile = vmw_fpriv(file_priv)->tfile;
fb1d9738
JB
1695 sw_context->cur_reloc = 0;
1696 sw_context->cur_val_buf = 0;
e2fa3a76 1697 sw_context->fence_flags = 0;
f18c8840 1698 INIT_LIST_HEAD(&sw_context->resource_list);
e2fa3a76 1699 sw_context->cur_query_bo = dev_priv->pinned_bo;
c0951b79
TH
1700 sw_context->last_query_ctx = NULL;
1701 sw_context->needs_post_query_barrier = false;
1702 memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
fb1d9738 1703 INIT_LIST_HEAD(&sw_context->validate_nodes);
c0951b79
TH
1704 INIT_LIST_HEAD(&sw_context->res_relocations);
1705 if (!sw_context->res_ht_initialized) {
1706 ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
1707 if (unlikely(ret != 0))
1708 goto out_unlock;
1709 sw_context->res_ht_initialized = true;
1710 }
fb1d9738 1711
c0951b79 1712 INIT_LIST_HEAD(&resource_list);
922ade0d
TH
1713 ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
1714 command_size);
fb1d9738
JB
1715 if (unlikely(ret != 0))
1716 goto out_err;
be38ab6e 1717
c0951b79
TH
1718 ret = vmw_resources_reserve(sw_context);
1719 if (unlikely(ret != 0))
1720 goto out_err;
1721
ecff665f 1722 ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes);
fb1d9738
JB
1723 if (unlikely(ret != 0))
1724 goto out_err;
1725
1726 ret = vmw_validate_buffers(dev_priv, sw_context);
1727 if (unlikely(ret != 0))
1728 goto out_err;
1729
c0951b79
TH
1730 ret = vmw_resources_validate(sw_context);
1731 if (unlikely(ret != 0))
1732 goto out_err;
1925d456 1733
922ade0d 1734 if (throttle_us) {
6bcd8d3c 1735 ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
922ade0d 1736 throttle_us);
1925d456
TH
1737
1738 if (unlikely(ret != 0))
c0951b79 1739 goto out_err;
be38ab6e
TH
1740 }
1741
922ade0d 1742 cmd = vmw_fifo_reserve(dev_priv, command_size);
be38ab6e
TH
1743 if (unlikely(cmd == NULL)) {
1744 DRM_ERROR("Failed reserving fifo space for commands.\n");
1745 ret = -ENOMEM;
c0951b79 1746 goto out_err;
1925d456
TH
1747 }
1748
c0951b79 1749 vmw_apply_relocations(sw_context);
922ade0d 1750 memcpy(cmd, kernel_commands, command_size);
c0951b79
TH
1751
1752 vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
1753 vmw_resource_relocations_free(&sw_context->res_relocations);
1754
922ade0d 1755 vmw_fifo_commit(dev_priv, command_size);
fb1d9738 1756
e2fa3a76 1757 vmw_query_bo_switch_commit(dev_priv, sw_context);
ae2a1040
TH
1758 ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
1759 &fence,
1760 (user_fence_rep) ? &handle : NULL);
fb1d9738
JB
1761 /*
1762 * This error is harmless, because if fence submission fails,
ae2a1040
TH
1763 * vmw_fifo_send_fence will sync. The error will be propagated to
1764 * user-space in @fence_rep
fb1d9738
JB
1765 */
1766
1767 if (ret != 0)
1768 DRM_ERROR("Fence submission error. Syncing.\n");
1769
c0951b79 1770 vmw_resource_list_unreserve(&sw_context->resource_list, false);
ecff665f 1771 ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
ae2a1040 1772 (void *) fence);
fb1d9738 1773
c0951b79
TH
1774 if (unlikely(dev_priv->pinned_bo != NULL &&
1775 !dev_priv->query_cid_valid))
1776 __vmw_execbuf_release_pinned_bo(dev_priv, fence);
1777
ae2a1040 1778 vmw_clear_validations(sw_context);
8bf445ce
TH
1779 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
1780 user_fence_rep, fence, handle);
fb1d9738 1781
bb1bd2f4
JB
1782 /* Don't unreference when handing fence out */
1783 if (unlikely(out_fence != NULL)) {
1784 *out_fence = fence;
1785 fence = NULL;
1786 } else if (likely(fence != NULL)) {
ae2a1040 1787 vmw_fence_obj_unreference(&fence);
bb1bd2f4 1788 }
fb1d9738 1789
c0951b79 1790 list_splice_init(&sw_context->resource_list, &resource_list);
922ade0d 1791 mutex_unlock(&dev_priv->cmdbuf_mutex);
c0951b79
TH
1792
1793 /*
1794 * Unreference resources outside of the cmdbuf_mutex to
1795 * avoid deadlocks in resource destruction paths.
1796 */
1797 vmw_resource_list_unreference(&resource_list);
1798
fb1d9738 1799 return 0;
922ade0d 1800
fb1d9738 1801out_err:
c0951b79 1802 vmw_resource_relocations_free(&sw_context->res_relocations);
fb1d9738 1803 vmw_free_relocations(sw_context);
ecff665f 1804 ttm_eu_backoff_reservation(&ticket, &sw_context->validate_nodes);
c0951b79 1805 vmw_resource_list_unreserve(&sw_context->resource_list, true);
fb1d9738 1806 vmw_clear_validations(sw_context);
c0951b79
TH
1807 if (unlikely(dev_priv->pinned_bo != NULL &&
1808 !dev_priv->query_cid_valid))
1809 __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
fb1d9738 1810out_unlock:
c0951b79
TH
1811 list_splice_init(&sw_context->resource_list, &resource_list);
1812 error_resource = sw_context->error_resource;
1813 sw_context->error_resource = NULL;
fb1d9738 1814 mutex_unlock(&dev_priv->cmdbuf_mutex);
c0951b79
TH
1815
1816 /*
1817 * Unreference resources outside of the cmdbuf_mutex to
1818 * avoid deadlocks in resource destruction paths.
1819 */
1820 vmw_resource_list_unreference(&resource_list);
1821 if (unlikely(error_resource != NULL))
1822 vmw_resource_unreference(&error_resource);
1823
922ade0d
TH
1824 return ret;
1825}
1826
e2fa3a76
TH
1827/**
1828 * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
1829 *
1830 * @dev_priv: The device private structure.
1831 *
1832 * This function is called to idle the fifo and unpin the query buffer
1833 * if the normal way to do this hits an error, which should typically be
1834 * extremely rare.
1835 */
1836static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
1837{
1838 DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
1839
1840 (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
1841 vmw_bo_pin(dev_priv->pinned_bo, false);
1842 vmw_bo_pin(dev_priv->dummy_query_bo, false);
1843 dev_priv->dummy_query_bo_pinned = false;
1844}
1845
1846
1847/**
c0951b79 1848 * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
e2fa3a76
TH
1849 * query bo.
1850 *
1851 * @dev_priv: The device private structure.
c0951b79
TH
1852 * @fence: If non-NULL should point to a struct vmw_fence_obj issued
1853 * _after_ a query barrier that flushes all queries touching the current
1854 * buffer pointed to by @dev_priv->pinned_bo
e2fa3a76
TH
1855 *
1856 * This function should be used to unpin the pinned query bo, or
1857 * as a query barrier when we need to make sure that all queries have
1858 * finished before the next fifo command. (For example on hardware
1859 * context destructions where the hardware may otherwise leak unfinished
1860 * queries).
1861 *
1862 * This function does not return any failure codes, but make attempts
1863 * to do safe unpinning in case of errors.
1864 *
1865 * The function will synchronize on the previous query barrier, and will
1866 * thus not finish until that barrier has executed.
c0951b79
TH
1867 *
1868 * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
1869 * before calling this function.
e2fa3a76 1870 */
c0951b79
TH
1871void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
1872 struct vmw_fence_obj *fence)
e2fa3a76
TH
1873{
1874 int ret = 0;
1875 struct list_head validate_list;
1876 struct ttm_validate_buffer pinned_val, query_val;
c0951b79 1877 struct vmw_fence_obj *lfence = NULL;
ecff665f 1878 struct ww_acquire_ctx ticket;
e2fa3a76
TH
1879
1880 if (dev_priv->pinned_bo == NULL)
1881 goto out_unlock;
1882
e2fa3a76
TH
1883 INIT_LIST_HEAD(&validate_list);
1884
e2fa3a76
TH
1885 pinned_val.bo = ttm_bo_reference(dev_priv->pinned_bo);
1886 list_add_tail(&pinned_val.head, &validate_list);
1887
e2fa3a76
TH
1888 query_val.bo = ttm_bo_reference(dev_priv->dummy_query_bo);
1889 list_add_tail(&query_val.head, &validate_list);
1890
1891 do {
ecff665f 1892 ret = ttm_eu_reserve_buffers(&ticket, &validate_list);
e2fa3a76
TH
1893 } while (ret == -ERESTARTSYS);
1894
1895 if (unlikely(ret != 0)) {
1896 vmw_execbuf_unpin_panic(dev_priv);
1897 goto out_no_reserve;
1898 }
1899
c0951b79
TH
1900 if (dev_priv->query_cid_valid) {
1901 BUG_ON(fence != NULL);
1902 ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
1903 if (unlikely(ret != 0)) {
1904 vmw_execbuf_unpin_panic(dev_priv);
1905 goto out_no_emit;
1906 }
1907 dev_priv->query_cid_valid = false;
e2fa3a76
TH
1908 }
1909
1910 vmw_bo_pin(dev_priv->pinned_bo, false);
1911 vmw_bo_pin(dev_priv->dummy_query_bo, false);
1912 dev_priv->dummy_query_bo_pinned = false;
1913
c0951b79
TH
1914 if (fence == NULL) {
1915 (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
1916 NULL);
1917 fence = lfence;
1918 }
ecff665f 1919 ttm_eu_fence_buffer_objects(&ticket, &validate_list, (void *) fence);
c0951b79
TH
1920 if (lfence != NULL)
1921 vmw_fence_obj_unreference(&lfence);
e2fa3a76
TH
1922
1923 ttm_bo_unref(&query_val.bo);
1924 ttm_bo_unref(&pinned_val.bo);
1925 ttm_bo_unref(&dev_priv->pinned_bo);
1926
1927out_unlock:
e2fa3a76
TH
1928 return;
1929
1930out_no_emit:
ecff665f 1931 ttm_eu_backoff_reservation(&ticket, &validate_list);
e2fa3a76
TH
1932out_no_reserve:
1933 ttm_bo_unref(&query_val.bo);
1934 ttm_bo_unref(&pinned_val.bo);
1935 ttm_bo_unref(&dev_priv->pinned_bo);
c0951b79
TH
1936}
1937
1938/**
1939 * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
1940 * query bo.
1941 *
1942 * @dev_priv: The device private structure.
1943 *
1944 * This function should be used to unpin the pinned query bo, or
1945 * as a query barrier when we need to make sure that all queries have
1946 * finished before the next fifo command. (For example on hardware
1947 * context destructions where the hardware may otherwise leak unfinished
1948 * queries).
1949 *
1950 * This function does not return any failure codes, but make attempts
1951 * to do safe unpinning in case of errors.
1952 *
1953 * The function will synchronize on the previous query barrier, and will
1954 * thus not finish until that barrier has executed.
1955 */
1956void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
1957{
1958 mutex_lock(&dev_priv->cmdbuf_mutex);
1959 if (dev_priv->query_cid_valid)
1960 __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
e2fa3a76
TH
1961 mutex_unlock(&dev_priv->cmdbuf_mutex);
1962}
1963
922ade0d
TH
1964
1965int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
1966 struct drm_file *file_priv)
1967{
1968 struct vmw_private *dev_priv = vmw_priv(dev);
1969 struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
1970 struct vmw_master *vmaster = vmw_master(file_priv->master);
1971 int ret;
1972
1973 /*
1974 * This will allow us to extend the ioctl argument while
1975 * maintaining backwards compatibility:
1976 * We take different code paths depending on the value of
1977 * arg->version.
1978 */
1979
1980 if (unlikely(arg->version != DRM_VMW_EXECBUF_VERSION)) {
1981 DRM_ERROR("Incorrect execbuf version.\n");
1982 DRM_ERROR("You're running outdated experimental "
1983 "vmwgfx user-space drivers.");
1984 return -EINVAL;
1985 }
1986
1987 ret = ttm_read_lock(&vmaster->lock, true);
1988 if (unlikely(ret != 0))
1989 return ret;
1990
1991 ret = vmw_execbuf_process(file_priv, dev_priv,
1992 (void __user *)(unsigned long)arg->commands,
1993 NULL, arg->command_size, arg->throttle_us,
bb1bd2f4
JB
1994 (void __user *)(unsigned long)arg->fence_rep,
1995 NULL);
922ade0d
TH
1996
1997 if (unlikely(ret != 0))
1998 goto out_unlock;
1999
2000 vmw_kms_cursor_post_execbuf(dev_priv);
2001
2002out_unlock:
fb1d9738
JB
2003 ttm_read_unlock(&vmaster->lock);
2004 return ret;
2005}