leds: gpio: Support the "panic-indicator" firmware property
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_irq_kms.c
CommitLineData
771fe6b9
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1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
760285e7
DH
28#include <drm/drmP.h>
29#include <drm/drm_crtc_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon_reg.h"
771fe6b9
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32#include "radeon.h"
33#include "atom.h"
34
10ebc0bc
DA
35#include <linux/pm_runtime.h>
36
fb98257a
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37#define RADEON_WAIT_IDLE_TIMEOUT 200
38
b73ba98d
AD
39/**
40 * radeon_driver_irq_handler_kms - irq handler for KMS
41 *
e9f0d76f 42 * @int irq, void *arg: args
b73ba98d
AD
43 *
44 * This is the irq handler for the radeon KMS driver (all asics).
45 * radeon_irq_process is a macro that points to the per-asic
46 * irq handler callback.
47 */
e9f0d76f 48irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
771fe6b9
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49{
50 struct drm_device *dev = (struct drm_device *) arg;
51 struct radeon_device *rdev = dev->dev_private;
10ebc0bc 52 irqreturn_t ret;
771fe6b9 53
10ebc0bc
DA
54 ret = radeon_irq_process(rdev);
55 if (ret == IRQ_HANDLED)
56 pm_runtime_mark_last_busy(dev->dev);
57 return ret;
771fe6b9
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58}
59
d4877cf2
AD
60/*
61 * Handle hotplug events outside the interrupt handler proper.
62 */
b73ba98d
AD
63/**
64 * radeon_hotplug_work_func - display hotplug work handler
65 *
66 * @work: work struct
67 *
68 * This is the hot plug event work handler (all asics).
69 * The work gets scheduled from the irq handler if there
70 * was a hot plug interrupt. It walks the connector table
71 * and calls the hotplug handler for each one, then sends
72 * a drm hotplug event to alert userspace.
73 */
d4877cf2
AD
74static void radeon_hotplug_work_func(struct work_struct *work)
75{
76 struct radeon_device *rdev = container_of(work, struct radeon_device,
cb5d4166 77 hotplug_work.work);
d4877cf2
AD
78 struct drm_device *dev = rdev->ddev;
79 struct drm_mode_config *mode_config = &dev->mode_config;
80 struct drm_connector *connector;
81
7f98ca45
DA
82 /* we can race here at startup, some boards seem to trigger
83 * hotplug irqs when they shouldn't. */
84 if (!rdev->mode_info.mode_config_initialized)
85 return;
86
39fa10f7 87 mutex_lock(&mode_config->mutex);
d4877cf2
AD
88 if (mode_config->num_connector) {
89 list_for_each_entry(connector, &mode_config->connector_list, head)
90 radeon_connector_hotplug(connector);
91 }
39fa10f7 92 mutex_unlock(&mode_config->mutex);
d4877cf2 93 /* Just fire off a uevent and let userspace tell us what to do */
eb1f8e4f 94 drm_helper_hpd_irq_event(dev);
d4877cf2
AD
95}
96
de6284aa
DA
97static void radeon_dp_work_func(struct work_struct *work)
98{
9843ead0
DA
99 struct radeon_device *rdev = container_of(work, struct radeon_device,
100 dp_work);
101 struct drm_device *dev = rdev->ddev;
102 struct drm_mode_config *mode_config = &dev->mode_config;
103 struct drm_connector *connector;
104
105 /* this should take a mutex */
106 if (mode_config->num_connector) {
107 list_for_each_entry(connector, &mode_config->connector_list, head)
108 radeon_connector_hotplug(connector);
109 }
de6284aa 110}
b73ba98d
AD
111/**
112 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
113 *
114 * @dev: drm dev pointer
115 *
116 * Gets the hw ready to enable irqs (all asics).
117 * This function disables all interrupt sources on the GPU.
118 */
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119void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
120{
121 struct radeon_device *rdev = dev->dev_private;
fb98257a 122 unsigned long irqflags;
771fe6b9
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123 unsigned i;
124
fb98257a 125 spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9 126 /* Disable *all* interrupts */
1b37078b 127 for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f 128 atomic_set(&rdev->irq.ring_int[i], 0);
4a6369e9 129 rdev->irq.dpm_thermal = false;
54bd5206 130 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
9e7b414e 131 rdev->irq.hpd[i] = false;
54bd5206
IH
132 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
133 rdev->irq.crtc_vblank_int[i] = false;
736fc37f 134 atomic_set(&rdev->irq.pflip[i], 0);
f122c610 135 rdev->irq.afmt[i] = false;
6f34be50 136 }
771fe6b9 137 radeon_irq_set(rdev);
fb98257a 138 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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139 /* Clear bits */
140 radeon_irq_process(rdev);
141}
142
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143/**
144 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
145 *
146 * @dev: drm dev pointer
147 *
148 * Handles stuff to be done after enabling irqs (all asics).
149 * Returns 0 on success.
150 */
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151int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
152{
b0b9bb4d
MD
153 struct radeon_device *rdev = dev->dev_private;
154
155 if (ASIC_IS_AVIVO(rdev))
156 dev->max_vblank_count = 0x00ffffff;
157 else
158 dev->max_vblank_count = 0x001fffff;
159
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160 return 0;
161}
162
b73ba98d
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163/**
164 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
165 *
166 * @dev: drm dev pointer
167 *
168 * This function disables all interrupt sources on the GPU (all asics).
169 */
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170void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
171{
172 struct radeon_device *rdev = dev->dev_private;
fb98257a 173 unsigned long irqflags;
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174 unsigned i;
175
176 if (rdev == NULL) {
177 return;
178 }
fb98257a 179 spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9 180 /* Disable *all* interrupts */
1b37078b 181 for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f 182 atomic_set(&rdev->irq.ring_int[i], 0);
4a6369e9 183 rdev->irq.dpm_thermal = false;
54bd5206 184 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
003e69f9 185 rdev->irq.hpd[i] = false;
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IH
186 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
187 rdev->irq.crtc_vblank_int[i] = false;
736fc37f 188 atomic_set(&rdev->irq.pflip[i], 0);
f122c610 189 rdev->irq.afmt[i] = false;
6f34be50 190 }
771fe6b9 191 radeon_irq_set(rdev);
fb98257a 192 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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193}
194
b73ba98d
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195/**
196 * radeon_msi_ok - asic specific msi checks
197 *
198 * @rdev: radeon device pointer
199 *
200 * Handles asic specific MSI checks to determine if
201 * MSIs should be enabled on a particular chip (all asics).
202 * Returns true if MSIs should be enabled, false if MSIs
203 * should not be enabled.
204 */
8f6c25c5
AD
205static bool radeon_msi_ok(struct radeon_device *rdev)
206{
207 /* RV370/RV380 was first asic with MSI support */
208 if (rdev->family < CHIP_RV380)
209 return false;
210
211 /* MSIs don't work on AGP */
212 if (rdev->flags & RADEON_IS_AGP)
213 return false;
214
91ed6fd2
BH
215 /*
216 * Older chips have a HW limitation, they can only generate 40 bits
217 * of address for "64-bit" MSIs which breaks on some platforms, notably
218 * IBM POWER servers, so we limit them
219 */
220 if (rdev->family < CHIP_BONAIRE) {
221 dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
222 rdev->pdev->no_64bit_msi = 1;
223 }
224
a18cee15
AD
225 /* force MSI on */
226 if (radeon_msi == 1)
227 return true;
228 else if (radeon_msi == 0)
229 return false;
230
b362105f
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231 /* Quirks */
232 /* HP RS690 only seems to work with MSIs. */
233 if ((rdev->pdev->device == 0x791f) &&
234 (rdev->pdev->subsystem_vendor == 0x103c) &&
235 (rdev->pdev->subsystem_device == 0x30c2))
236 return true;
237
44517c44
AD
238 /* Dell RS690 only seems to work with MSIs. */
239 if ((rdev->pdev->device == 0x791f) &&
240 (rdev->pdev->subsystem_vendor == 0x1028) &&
241 (rdev->pdev->subsystem_device == 0x01fc))
242 return true;
243
01e718ec
AD
244 /* Dell RS690 only seems to work with MSIs. */
245 if ((rdev->pdev->device == 0x791f) &&
246 (rdev->pdev->subsystem_vendor == 0x1028) &&
247 (rdev->pdev->subsystem_device == 0x01fd))
248 return true;
249
3a6d59df
AD
250 /* Gateway RS690 only seems to work with MSIs. */
251 if ((rdev->pdev->device == 0x791f) &&
252 (rdev->pdev->subsystem_vendor == 0x107b) &&
253 (rdev->pdev->subsystem_device == 0x0185))
254 return true;
255
fb6ca6d1
AD
256 /* try and enable MSIs by default on all RS690s */
257 if (rdev->family == CHIP_RS690)
258 return true;
259
16a5e32b
DA
260 /* RV515 seems to have MSI issues where it loses
261 * MSI rearms occasionally. This leads to lockups and freezes.
262 * disable it by default.
263 */
264 if (rdev->family == CHIP_RV515)
265 return false;
8f6c25c5
AD
266 if (rdev->flags & RADEON_IS_IGP) {
267 /* APUs work fine with MSIs */
268 if (rdev->family >= CHIP_PALM)
269 return true;
270 /* lots of IGPs have problems with MSIs */
271 return false;
272 }
273
274 return true;
275}
276
b73ba98d
AD
277/**
278 * radeon_irq_kms_init - init driver interrupt info
279 *
280 * @rdev: radeon device pointer
281 *
282 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
283 * Returns 0 for success, error for failure.
284 */
771fe6b9
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285int radeon_irq_kms_init(struct radeon_device *rdev)
286{
287 int r = 0;
288
fb98257a 289 spin_lock_init(&rdev->irq.lock);
9e7b414e 290 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
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291 if (r) {
292 return r;
293 }
3e5cb98d
AD
294 /* enable msi */
295 rdev->msi_enabled = 0;
8f6c25c5
AD
296
297 if (radeon_msi_ok(rdev)) {
3e5cb98d 298 int ret = pci_enable_msi(rdev->pdev);
d8f60cfc 299 if (!ret) {
3e5cb98d 300 rdev->msi_enabled = 1;
da7be684 301 dev_info(rdev->dev, "radeon: using MSI.\n");
d8f60cfc 302 }
3e5cb98d 303 }
27c505ca 304
cb5d4166 305 INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
de6284aa 306 INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
27c505ca 307 INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
27c505ca 308
771fe6b9 309 rdev->irq.installed = true;
bb0f1b5c 310 r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
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311 if (r) {
312 rdev->irq.installed = false;
cb5d4166 313 flush_delayed_work(&rdev->hotplug_work);
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314 return r;
315 }
a01c34f7 316
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317 DRM_INFO("radeon: irq initialized.\n");
318 return 0;
319}
320
b73ba98d 321/**
cf2fbdd2 322 * radeon_irq_kms_fini - tear down driver interrupt info
b73ba98d
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323 *
324 * @rdev: radeon device pointer
325 *
326 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
327 */
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328void radeon_irq_kms_fini(struct radeon_device *rdev)
329{
003e69f9 330 drm_vblank_cleanup(rdev->ddev);
771fe6b9 331 if (rdev->irq.installed) {
771fe6b9 332 drm_irq_uninstall(rdev->ddev);
003e69f9 333 rdev->irq.installed = false;
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AD
334 if (rdev->msi_enabled)
335 pci_disable_msi(rdev->pdev);
cb5d4166 336 flush_delayed_work(&rdev->hotplug_work);
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337 }
338}
1614f8b1 339
b73ba98d
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340/**
341 * radeon_irq_kms_sw_irq_get - enable software interrupt
342 *
343 * @rdev: radeon device pointer
344 * @ring: ring whose interrupt you want to enable
345 *
346 * Enables the software interrupt for a specific ring (all asics).
347 * The software interrupt is generally used to signal a fence on
348 * a particular ring.
349 */
1b37078b 350void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
1614f8b1
DA
351{
352 unsigned long irqflags;
353
736fc37f
CK
354 if (!rdev->ddev->irq_enabled)
355 return;
356
357 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
358 spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1 359 radeon_irq_set(rdev);
736fc37f 360 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1 361 }
1614f8b1
DA
362}
363
954605ca
ML
364/**
365 * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
366 *
367 * @rdev: radeon device pointer
368 * @ring: ring whose interrupt you want to enable
369 *
370 * Enables the software interrupt for a specific ring (all asics).
371 * The software interrupt is generally used to signal a fence on
372 * a particular ring.
373 */
374bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
375{
376 return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
377}
378
b73ba98d
AD
379/**
380 * radeon_irq_kms_sw_irq_put - disable software interrupt
381 *
382 * @rdev: radeon device pointer
383 * @ring: ring whose interrupt you want to disable
384 *
385 * Disables the software interrupt for a specific ring (all asics).
386 * The software interrupt is generally used to signal a fence on
387 * a particular ring.
388 */
1b37078b 389void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
1614f8b1
DA
390{
391 unsigned long irqflags;
392
736fc37f
CK
393 if (!rdev->ddev->irq_enabled)
394 return;
395
396 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
397 spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1 398 radeon_irq_set(rdev);
736fc37f 399 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1 400 }
1614f8b1
DA
401}
402
b73ba98d
AD
403/**
404 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
405 *
406 * @rdev: radeon device pointer
407 * @crtc: crtc whose interrupt you want to enable
408 *
409 * Enables the pageflip interrupt for a specific crtc (all asics).
410 * For pageflips we use the vblank interrupt source.
411 */
6f34be50
AD
412void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
413{
414 unsigned long irqflags;
415
416 if (crtc < 0 || crtc >= rdev->num_crtc)
417 return;
418
736fc37f
CK
419 if (!rdev->ddev->irq_enabled)
420 return;
421
422 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
423 spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50 424 radeon_irq_set(rdev);
736fc37f 425 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50 426 }
6f34be50
AD
427}
428
b73ba98d
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429/**
430 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
431 *
432 * @rdev: radeon device pointer
433 * @crtc: crtc whose interrupt you want to disable
434 *
435 * Disables the pageflip interrupt for a specific crtc (all asics).
436 * For pageflips we use the vblank interrupt source.
437 */
6f34be50
AD
438void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
439{
440 unsigned long irqflags;
441
442 if (crtc < 0 || crtc >= rdev->num_crtc)
443 return;
444
736fc37f
CK
445 if (!rdev->ddev->irq_enabled)
446 return;
447
448 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
449 spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50 450 radeon_irq_set(rdev);
736fc37f 451 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50 452 }
6f34be50
AD
453}
454
b73ba98d
AD
455/**
456 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
457 *
458 * @rdev: radeon device pointer
459 * @block: afmt block whose interrupt you want to enable
460 *
461 * Enables the afmt change interrupt for a specific afmt block (all asics).
462 */
fb98257a
CK
463void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
464{
465 unsigned long irqflags;
466
cc9945bf
AD
467 if (!rdev->ddev->irq_enabled)
468 return;
469
fb98257a
CK
470 spin_lock_irqsave(&rdev->irq.lock, irqflags);
471 rdev->irq.afmt[block] = true;
472 radeon_irq_set(rdev);
473 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
474
475}
476
b73ba98d
AD
477/**
478 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
479 *
480 * @rdev: radeon device pointer
481 * @block: afmt block whose interrupt you want to disable
482 *
483 * Disables the afmt change interrupt for a specific afmt block (all asics).
484 */
fb98257a
CK
485void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
486{
487 unsigned long irqflags;
488
cc9945bf
AD
489 if (!rdev->ddev->irq_enabled)
490 return;
491
fb98257a
CK
492 spin_lock_irqsave(&rdev->irq.lock, irqflags);
493 rdev->irq.afmt[block] = false;
494 radeon_irq_set(rdev);
495 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
496}
497
b73ba98d
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498/**
499 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
500 *
501 * @rdev: radeon device pointer
502 * @hpd_mask: mask of hpd pins you want to enable.
503 *
504 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
505 */
fb98257a
CK
506void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
507{
508 unsigned long irqflags;
509 int i;
510
cc9945bf
AD
511 if (!rdev->ddev->irq_enabled)
512 return;
513
fb98257a
CK
514 spin_lock_irqsave(&rdev->irq.lock, irqflags);
515 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
516 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
517 radeon_irq_set(rdev);
518 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
519}
520
b73ba98d
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521/**
522 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
523 *
524 * @rdev: radeon device pointer
525 * @hpd_mask: mask of hpd pins you want to disable.
526 *
527 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
528 */
fb98257a
CK
529void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
530{
531 unsigned long irqflags;
532 int i;
533
cc9945bf
AD
534 if (!rdev->ddev->irq_enabled)
535 return;
536
fb98257a
CK
537 spin_lock_irqsave(&rdev->irq.lock, irqflags);
538 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
539 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
540 radeon_irq_set(rdev);
541 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
542}
543