[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_cs.c

/*
 * Copyright 2008 Jerome Glisse.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *    Jerome Glisse <glisse@freedesktop.org>
 */
#include "drmP.h"
#include "radeon_drm.h"
#include "radeon_reg.h"
#include "radeon.h"

void r100_cs_dump_packet(struct radeon_cs_parser *p,
			 struct radeon_cs_packet *pkt);

int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
{
	struct drm_device *ddev = p->rdev->ddev;
	struct radeon_cs_chunk *chunk;
	unsigned i, j;
	bool duplicate;

	if (p->chunk_relocs_idx == -1) {
		return 0;
	}
	chunk = &p->chunks[p->chunk_relocs_idx];
	/* FIXME: we assume that each relocs use 4 dwords */
	p->nrelocs = chunk->length_dw / 4;
	p->relocs_ptr = kcalloc(p->nrelocs, sizeof(void *), GFP_KERNEL);
	if (p->relocs_ptr == NULL) {
		return -ENOMEM;
	}
	p->relocs = kcalloc(p->nrelocs, sizeof(struct radeon_cs_reloc), GFP_KERNEL);
	if (p->relocs == NULL) {
		return -ENOMEM;
	}
	for (i = 0; i < p->nrelocs; i++) {
		struct drm_radeon_cs_reloc *r;

		duplicate = false;
		r = (struct drm_radeon_cs_reloc *)&chunk->kdata[i*4];
		for (j = 0; j < i; j++) {
			if (r->handle == p->relocs[j].handle) {
				p->relocs_ptr[i] = &p->relocs[j];
				duplicate = true;
				break;
			}
		}
		if (!duplicate) {
			p->relocs[i].gobj = drm_gem_object_lookup(ddev,
								  p->filp,
								  r->handle);
			if (p->relocs[i].gobj == NULL) {
				DRM_ERROR("gem object lookup failed 0x%x\n",
					  r->handle);
				return -ENOENT;
			}
			p->relocs_ptr[i] = &p->relocs[i];
			p->relocs[i].robj = gem_to_radeon_bo(p->relocs[i].gobj);
			p->relocs[i].lobj.bo = p->relocs[i].robj;
			p->relocs[i].lobj.wdomain = r->write_domain;
			p->relocs[i].lobj.rdomain = r->read_domains;
			p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo;
			p->relocs[i].handle = r->handle;
			p->relocs[i].flags = r->flags;
			radeon_bo_list_add_object(&p->relocs[i].lobj,
						  &p->validated);

		} else
			p->relocs[i].handle = 0;
	}
	return radeon_bo_list_validate(&p->validated);
}

static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority)
{
	p->priority = priority;

	switch (ring) {
	default:
		DRM_ERROR("unknown ring id: %d\n", ring);
		return -EINVAL;
	case RADEON_CS_RING_GFX:
		p->ring = RADEON_RING_TYPE_GFX_INDEX;
		break;
	case RADEON_CS_RING_COMPUTE:
		/* for now */
		p->ring = RADEON_RING_TYPE_GFX_INDEX;
		break;
	}
	return 0;
}

static int radeon_cs_sync_rings(struct radeon_cs_parser *p)
{
	bool sync_to_ring[RADEON_NUM_RINGS] = { };
	int i, r;

	for (i = 0; i < p->nrelocs; i++) {
		if (!p->relocs[i].robj || !p->relocs[i].robj->tbo.sync_obj)
			continue;

		if (!(p->relocs[i].flags & RADEON_RELOC_DONT_SYNC)) {
			struct radeon_fence *fence = p->relocs[i].robj->tbo.sync_obj;
			if (!radeon_fence_signaled(fence)) {
				sync_to_ring[fence->ring] = true;
			}
		}
	}

	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
		/* no need to sync to our own or unused rings */
		if (i == p->ring || !sync_to_ring[i] || !p->rdev->ring[i].ready)
			continue;

		if (!p->ib->fence->semaphore) {
			r = radeon_semaphore_create(p->rdev, &p->ib->fence->semaphore);
			if (r)
				return r;
		}

		r = radeon_ring_lock(p->rdev, &p->rdev->ring[i], 3);
		if (r)
			return r;
		radeon_semaphore_emit_signal(p->rdev, i, p->ib->fence->semaphore);
		radeon_ring_unlock_commit(p->rdev, &p->rdev->ring[i]);

		r = radeon_ring_lock(p->rdev, &p->rdev->ring[p->ring], 3);
		if (r)
			return r;
		radeon_semaphore_emit_wait(p->rdev, p->ring, p->ib->fence->semaphore);
		radeon_ring_unlock_commit(p->rdev, &p->rdev->ring[p->ring]);
	}
	return 0;
}

int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
{
	struct drm_radeon_cs *cs = data;
	uint64_t *chunk_array_ptr;
	unsigned size, i;
	u32 ring = RADEON_CS_RING_GFX;
	s32 priority = 0;

	if (!cs->num_chunks) {
		return 0;
	}
	/* get chunks */
	INIT_LIST_HEAD(&p->validated);
	p->idx = 0;
	p->chunk_ib_idx = -1;
	p->chunk_relocs_idx = -1;
	p->chunk_flags_idx = -1;
	p->chunk_const_ib_idx = -1;
	p->chunks_array = kcalloc(cs->num_chunks, sizeof(uint64_t), GFP_KERNEL);
	if (p->chunks_array == NULL) {
		return -ENOMEM;
	}
	chunk_array_ptr = (uint64_t *)(unsigned long)(cs->chunks);
	if (DRM_COPY_FROM_USER(p->chunks_array, chunk_array_ptr,
			       sizeof(uint64_t)*cs->num_chunks)) {
		return -EFAULT;
	}
	p->cs_flags = 0;
	p->nchunks = cs->num_chunks;
	p->chunks = kcalloc(p->nchunks, sizeof(struct radeon_cs_chunk), GFP_KERNEL);
	if (p->chunks == NULL) {
		return -ENOMEM;
	}
	for (i = 0; i < p->nchunks; i++) {
		struct drm_radeon_cs_chunk __user **chunk_ptr = NULL;
		struct drm_radeon_cs_chunk user_chunk;
		uint32_t __user *cdata;

		chunk_ptr = (void __user*)(unsigned long)p->chunks_array[i];
		if (DRM_COPY_FROM_USER(&user_chunk, chunk_ptr,
				       sizeof(struct drm_radeon_cs_chunk))) {
			return -EFAULT;
		}
		p->chunks[i].length_dw = user_chunk.length_dw;
		p->chunks[i].kdata = NULL;
		p->chunks[i].chunk_id = user_chunk.chunk_id;

		if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) {
			p->chunk_relocs_idx = i;
		}
		if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) {
			p->chunk_ib_idx = i;
			/* zero length IB isn't useful */
			if (p->chunks[i].length_dw == 0)
				return -EINVAL;
		}
		if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_CONST_IB) {
			p->chunk_const_ib_idx = i;
			/* zero length CONST IB isn't useful */
			if (p->chunks[i].length_dw == 0)
				return -EINVAL;
		}
		if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
			p->chunk_flags_idx = i;
			/* zero length flags aren't useful */
			if (p->chunks[i].length_dw == 0)
				return -EINVAL;
		}

		p->chunks[i].length_dw = user_chunk.length_dw;
		p->chunks[i].user_ptr = (void __user *)(unsigned long)user_chunk.chunk_data;

		cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data;
		if ((p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) ||
		    (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS)) {
			size = p->chunks[i].length_dw * sizeof(uint32_t);
			p->chunks[i].kdata = kmalloc(size, GFP_KERNEL);
			if (p->chunks[i].kdata == NULL) {
				return -ENOMEM;
			}
			if (DRM_COPY_FROM_USER(p->chunks[i].kdata,
					       p->chunks[i].user_ptr, size)) {
				return -EFAULT;
			}
			if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
				p->cs_flags = p->chunks[i].kdata[0];
				if (p->chunks[i].length_dw > 1)
					ring = p->chunks[i].kdata[1];
				if (p->chunks[i].length_dw > 2)
					priority = (s32)p->chunks[i].kdata[2];
			}
		}
	}

	if ((p->cs_flags & RADEON_CS_USE_VM) &&
	    !p->rdev->vm_manager.enabled) {
		DRM_ERROR("VM not active on asic!\n");
		return -EINVAL;
	}

	if (radeon_cs_get_ring(p, ring, priority))
		return -EINVAL;


	/* deal with non-vm */
	if ((p->chunk_ib_idx != -1) &&
	    ((p->cs_flags & RADEON_CS_USE_VM) == 0) &&
	    (p->chunks[p->chunk_ib_idx].chunk_id == RADEON_CHUNK_ID_IB)) {
		if (p->chunks[p->chunk_ib_idx].length_dw > (16 * 1024)) {
			DRM_ERROR("cs IB too big: %d\n",
				  p->chunks[p->chunk_ib_idx].length_dw);
			return -EINVAL;
		}
		p->chunks[p->chunk_ib_idx].kpage[0] = kmalloc(PAGE_SIZE, GFP_KERNEL);
		p->chunks[p->chunk_ib_idx].kpage[1] = kmalloc(PAGE_SIZE, GFP_KERNEL);
		if (p->chunks[p->chunk_ib_idx].kpage[0] == NULL ||
		    p->chunks[p->chunk_ib_idx].kpage[1] == NULL)
			return -ENOMEM;
		p->chunks[p->chunk_ib_idx].kpage_idx[0] = -1;
		p->chunks[p->chunk_ib_idx].kpage_idx[1] = -1;
		p->chunks[p->chunk_ib_idx].last_copied_page = -1;
		p->chunks[p->chunk_ib_idx].last_page_index =
			((p->chunks[p->chunk_ib_idx].length_dw * 4) - 1) / PAGE_SIZE;
	}

	return 0;
}

/**
 * cs_parser_fini() - clean parser states
 * @parser:	parser structure holding parsing context.
 * @error:	error number
 *
 * If error is set than unvalidate buffer, otherwise just free memory
 * used by parsing context.
 **/
static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
{
	unsigned i;


	if (!error && parser->ib)
		ttm_eu_fence_buffer_objects(&parser->validated,
					    parser->ib->fence);
	else
		ttm_eu_backoff_reservation(&parser->validated);

	if (parser->relocs != NULL) {
		for (i = 0; i < parser->nrelocs; i++) {
			if (parser->relocs[i].gobj)
				drm_gem_object_unreference_unlocked(parser->relocs[i].gobj);
		}
	}
	kfree(parser->track);
	kfree(parser->relocs);
	kfree(parser->relocs_ptr);
	for (i = 0; i < parser->nchunks; i++) {
		kfree(parser->chunks[i].kdata);
		kfree(parser->chunks[i].kpage[0]);
		kfree(parser->chunks[i].kpage[1]);
	}
	kfree(parser->chunks);
	kfree(parser->chunks_array);
	radeon_ib_free(parser->rdev, &parser->ib);
}

static int radeon_cs_ib_chunk(struct radeon_device *rdev,
			      struct radeon_cs_parser *parser)
{
	struct radeon_cs_chunk *ib_chunk;
	int r;

	if (parser->chunk_ib_idx == -1)
		return 0;

	if (parser->cs_flags & RADEON_CS_USE_VM)
		return 0;

	ib_chunk = &parser->chunks[parser->chunk_ib_idx];
	/* Copy the packet into the IB, the parser will read from the
	 * input memory (cached) and write to the IB (which can be
	 * uncached).
	 */
	r =  radeon_ib_get(rdev, parser->ring, &parser->ib,
			   ib_chunk->length_dw * 4);
	if (r) {
		DRM_ERROR("Failed to get ib !\n");
		return r;
	}
	parser->ib->length_dw = ib_chunk->length_dw;
	r = radeon_cs_parse(rdev, parser->ring, parser);
	if (r || parser->parser_error) {
		DRM_ERROR("Invalid command stream !\n");
		return r;
	}
	r = radeon_cs_finish_pages(parser);
	if (r) {
		DRM_ERROR("Invalid command stream !\n");
		return r;
	}
	r = radeon_cs_sync_rings(parser);
	if (r) {
		DRM_ERROR("Failed to synchronize rings !\n");
	}
	parser->ib->vm_id = 0;
	r = radeon_ib_schedule(rdev, parser->ib);
	if (r) {
		DRM_ERROR("Failed to schedule IB !\n");
	}
	return 0;
}

static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser,
				   struct radeon_vm *vm)
{
	struct radeon_bo_list *lobj;
	struct radeon_bo *bo;
	int r;

	list_for_each_entry(lobj, &parser->validated, tv.head) {
		bo = lobj->bo;
		r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem);
		if (r) {
			return r;
		}
	}
	return 0;
}

static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
				 struct radeon_cs_parser *parser)
{
	struct radeon_cs_chunk *ib_chunk;
	struct radeon_fpriv *fpriv = parser->filp->driver_priv;
	struct radeon_vm *vm = &fpriv->vm;
	int r;

	if (parser->chunk_ib_idx == -1)
		return 0;

	if ((parser->cs_flags & RADEON_CS_USE_VM) == 0)
		return 0;

	if ((rdev->family >= CHIP_TAHITI) &&
	    (parser->chunk_const_ib_idx != -1)) {
		ib_chunk = &parser->chunks[parser->chunk_const_ib_idx];
		if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
			DRM_ERROR("cs IB CONST too big: %d\n", ib_chunk->length_dw);
			return -EINVAL;
		}
		r =  radeon_ib_get(rdev, parser->ring, &parser->const_ib,
				   ib_chunk->length_dw * 4);
		if (r) {
			DRM_ERROR("Failed to get const ib !\n");
			return r;
		}
		parser->const_ib->is_const_ib = true;
		parser->const_ib->length_dw = ib_chunk->length_dw;
		/* Copy the packet into the IB */
		if (DRM_COPY_FROM_USER(parser->const_ib->ptr, ib_chunk->user_ptr,
				       ib_chunk->length_dw * 4)) {
			return -EFAULT;
		}
		r = radeon_ring_ib_parse(rdev, parser->ring, parser->const_ib);
		if (r) {
			return r;
		}
	}

	ib_chunk = &parser->chunks[parser->chunk_ib_idx];
	if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
		DRM_ERROR("cs IB too big: %d\n", ib_chunk->length_dw);
		return -EINVAL;
	}
	r =  radeon_ib_get(rdev, parser->ring, &parser->ib,
			   ib_chunk->length_dw * 4);
	if (r) {
		DRM_ERROR("Failed to get ib !\n");
		return r;
	}
	parser->ib->length_dw = ib_chunk->length_dw;
	/* Copy the packet into the IB */
	if (DRM_COPY_FROM_USER(parser->ib->ptr, ib_chunk->user_ptr,
			       ib_chunk->length_dw * 4)) {
		return -EFAULT;
	}
	r = radeon_ring_ib_parse(rdev, parser->ring, parser->ib);
	if (r) {
		return r;
	}

	mutex_lock(&vm->mutex);
	r = radeon_vm_bind(rdev, vm);
	if (r) {
		goto out;
	}
	r = radeon_bo_vm_update_pte(parser, vm);
	if (r) {
		goto out;
	}
	r = radeon_cs_sync_rings(parser);
	if (r) {
		DRM_ERROR("Failed to synchronize rings !\n");
	}

	if ((rdev->family >= CHIP_TAHITI) &&
	    (parser->chunk_const_ib_idx != -1)) {
		parser->const_ib->vm_id = vm->id;
		/* ib pool is bind at 0 in virtual address space to gpu_addr is the
		 * offset inside the pool bo
		 */
		parser->const_ib->gpu_addr = parser->const_ib->sa_bo.offset;
		r = radeon_ib_schedule(rdev, parser->const_ib);
		if (r)
			goto out;
	}

	parser->ib->vm_id = vm->id;
	/* ib pool is bind at 0 in virtual address space to gpu_addr is the
	 * offset inside the pool bo
	 */
	parser->ib->gpu_addr = parser->ib->sa_bo.offset;
	parser->ib->is_const_ib = false;
	r = radeon_ib_schedule(rdev, parser->ib);
out:
	if (!r) {
		if (vm->fence) {
			radeon_fence_unref(&vm->fence);
		}
		vm->fence = radeon_fence_ref(parser->ib->fence);
	}
	mutex_unlock(&fpriv->vm.mutex);
	return r;
}

int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_cs_parser parser;
	int r;

	radeon_mutex_lock(&rdev->cs_mutex);
	if (!rdev->accel_working) {
		radeon_mutex_unlock(&rdev->cs_mutex);
		return -EBUSY;
	}
	/* initialize parser */
	memset(&parser, 0, sizeof(struct radeon_cs_parser));
	parser.filp = filp;
	parser.rdev = rdev;
	parser.dev = rdev->dev;
	parser.family = rdev->family;
	r = radeon_cs_parser_init(&parser, data);
	if (r) {
		DRM_ERROR("Failed to initialize parser !\n");
		radeon_cs_parser_fini(&parser, r);
		radeon_mutex_unlock(&rdev->cs_mutex);
		return r;
	}
	r = radeon_cs_parser_relocs(&parser);
	if (r) {
		if (r != -ERESTARTSYS)
			DRM_ERROR("Failed to parse relocation %d!\n", r);
		radeon_cs_parser_fini(&parser, r);
		radeon_mutex_unlock(&rdev->cs_mutex);
		return r;
	}
	r = radeon_cs_ib_chunk(rdev, &parser);
	if (r) {
		goto out;
	}
	r = radeon_cs_ib_vm_chunk(rdev, &parser);
	if (r) {
		goto out;
	}
out:
	radeon_cs_parser_fini(&parser, r);
	radeon_mutex_unlock(&rdev->cs_mutex);
	return r;
}

int radeon_cs_finish_pages(struct radeon_cs_parser *p)
{
	struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
	int i;
	int size = PAGE_SIZE;

	for (i = ibc->last_copied_page + 1; i <= ibc->last_page_index; i++) {
		if (i == ibc->last_page_index) {
			size = (ibc->length_dw * 4) % PAGE_SIZE;
			if (size == 0)
				size = PAGE_SIZE;
		}
		
		if (DRM_COPY_FROM_USER(p->ib->ptr + (i * (PAGE_SIZE/4)),
				       ibc->user_ptr + (i * PAGE_SIZE),
				       size))
			return -EFAULT;
	}
	return 0;
}

int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
{
	int new_page;
	struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
	int i;
	int size = PAGE_SIZE;

	for (i = ibc->last_copied_page + 1; i < pg_idx; i++) {
		if (DRM_COPY_FROM_USER(p->ib->ptr + (i * (PAGE_SIZE/4)),
				       ibc->user_ptr + (i * PAGE_SIZE),
				       PAGE_SIZE)) {
			p->parser_error = -EFAULT;
			return 0;
		}
	}

	new_page = ibc->kpage_idx[0] < ibc->kpage_idx[1] ? 0 : 1;

	if (pg_idx == ibc->last_page_index) {
		size = (ibc->length_dw * 4) % PAGE_SIZE;
			if (size == 0)
				size = PAGE_SIZE;
	}

	if (DRM_COPY_FROM_USER(ibc->kpage[new_page],
			       ibc->user_ptr + (pg_idx * PAGE_SIZE),
			       size)) {
		p->parser_error = -EFAULT;
		return 0;
	}

	/* copy to IB here */
	memcpy((void *)(p->ib->ptr+(pg_idx*(PAGE_SIZE/4))), ibc->kpage[new_page], size);

	ibc->last_copied_page = pg_idx;
	ibc->kpage_idx[new_page] = pg_idx;

	return new_page;
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2008 Jerome Glisse.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors:
	25	* Jerome Glisse <glisse@freedesktop.org>
	26	*/
	27	#include "drmP.h"
	28	#include "radeon_drm.h"
	29	#include "radeon_reg.h"
	30	#include "radeon.h"
	31
	32	void r100_cs_dump_packet(struct radeon_cs_parser *p,
	33	struct radeon_cs_packet *pkt);
	34
	35	int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
	36	{
	37	struct drm_device *ddev = p->rdev->ddev;
	38	struct radeon_cs_chunk *chunk;
	39	unsigned i, j;
	40	bool duplicate;
	41
	42	if (p->chunk_relocs_idx == -1) {
	43	return 0;
	44	}
	45	chunk = &p->chunks[p->chunk_relocs_idx];
	46	/* FIXME: we assume that each relocs use 4 dwords */
	47	p->nrelocs = chunk->length_dw / 4;
	48	p->relocs_ptr = kcalloc(p->nrelocs, sizeof(void *), GFP_KERNEL);
	49	if (p->relocs_ptr == NULL) {
	50	return -ENOMEM;
	51	}
	52	p->relocs = kcalloc(p->nrelocs, sizeof(struct radeon_cs_reloc), GFP_KERNEL);
	53	if (p->relocs == NULL) {
	54	return -ENOMEM;
	55	}
	56	for (i = 0; i < p->nrelocs; i++) {
	57	struct drm_radeon_cs_reloc *r;
	58
	59	duplicate = false;
	60	r = (struct drm_radeon_cs_reloc )&chunk->kdata[i4];
16557f1e	61	for (j = 0; j < i; j++) {
771fe6b9 JG	62	if (r->handle == p->relocs[j].handle) {
	63	p->relocs_ptr[i] = &p->relocs[j];
	64	duplicate = true;
	65	break;
	66	}
	67	}
	68	if (!duplicate) {
	69	p->relocs[i].gobj = drm_gem_object_lookup(ddev,
	70	p->filp,
	71	r->handle);
	72	if (p->relocs[i].gobj == NULL) {
	73	DRM_ERROR("gem object lookup failed 0x%x\n",
	74	r->handle);
bf79cb91	75	return -ENOENT;
771fe6b9 JG	76	}
771fe6b9 JG	77	p->relocs_ptr[i] = &p->relocs[i];
7e4d15d9	78	p->relocs[i].robj = gem_to_radeon_bo(p->relocs[i].gobj);
4c788679	79	p->relocs[i].lobj.bo = p->relocs[i].robj;
771fe6b9	80	p->relocs[i].lobj.wdomain = r->write_domain;
147666fb TH	81	p->relocs[i].lobj.rdomain = r->read_domains;
147666fb TH	82	p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo;
771fe6b9 JG	83	p->relocs[i].handle = r->handle;
771fe6b9 JG	84	p->relocs[i].flags = r->flags;
4c788679	85	radeon_bo_list_add_object(&p->relocs[i].lobj,
147666fb	86	&p->validated);
93504fce	87
16557f1e CK	88	} else
16557f1e CK	89	p->relocs[i].handle = 0;
771fe6b9	90	}
94429bb6	91	return radeon_bo_list_validate(&p->validated);
771fe6b9 JG	92	}
771fe6b9 JG	93
721604a1 JG	94	static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority)
	95	{
	96	p->priority = priority;
	97
	98	switch (ring) {
	99	default:
	100	DRM_ERROR("unknown ring id: %d\n", ring);
	101	return -EINVAL;
	102	case RADEON_CS_RING_GFX:
	103	p->ring = RADEON_RING_TYPE_GFX_INDEX;
	104	break;
	105	case RADEON_CS_RING_COMPUTE:
	106	/* for now */
	107	p->ring = RADEON_RING_TYPE_GFX_INDEX;
	108	break;
	109	}
	110	return 0;
	111	}
	112
93504fce CK	113	static int radeon_cs_sync_rings(struct radeon_cs_parser *p)
93504fce CK	114	{
cdac5504	115	bool sync_to_ring[RADEON_NUM_RINGS] = { };
93504fce CK	116	int i, r;
93504fce CK	117
cdac5504 CK	118	for (i = 0; i < p->nrelocs; i++) {
	119	if (!p->relocs[i].robj \|\| !p->relocs[i].robj->tbo.sync_obj)
	120	continue;
	121
	122	if (!(p->relocs[i].flags & RADEON_RELOC_DONT_SYNC)) {
	123	struct radeon_fence *fence = p->relocs[i].robj->tbo.sync_obj;
	124	if (!radeon_fence_signaled(fence)) {
	125	sync_to_ring[fence->ring] = true;
	126	}
	127	}
	128	}
	129
93504fce CK	130	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
93504fce CK	131	/* no need to sync to our own or unused rings */
cdac5504	132	if (i == p->ring \|\| !sync_to_ring[i] \|\| !p->rdev->ring[i].ready)
93504fce CK	133	continue;
	134
	135	if (!p->ib->fence->semaphore) {
	136	r = radeon_semaphore_create(p->rdev, &p->ib->fence->semaphore);
	137	if (r)
	138	return r;
	139	}
	140
	141	r = radeon_ring_lock(p->rdev, &p->rdev->ring[i], 3);
	142	if (r)
	143	return r;
	144	radeon_semaphore_emit_signal(p->rdev, i, p->ib->fence->semaphore);
	145	radeon_ring_unlock_commit(p->rdev, &p->rdev->ring[i]);
	146
	147	r = radeon_ring_lock(p->rdev, &p->rdev->ring[p->ring], 3);
	148	if (r)
	149	return r;
	150	radeon_semaphore_emit_wait(p->rdev, p->ring, p->ib->fence->semaphore);
	151	radeon_ring_unlock_commit(p->rdev, &p->rdev->ring[p->ring]);
	152	}
	153	return 0;
	154	}
	155
771fe6b9 JG	156	int radeon_cs_parser_init(struct radeon_cs_parser p, void data)
	157	{
	158	struct drm_radeon_cs *cs = data;
	159	uint64_t *chunk_array_ptr;
721604a1 JG	160	unsigned size, i;
	161	u32 ring = RADEON_CS_RING_GFX;
	162	s32 priority = 0;
771fe6b9 JG	163
	164	if (!cs->num_chunks) {
	165	return 0;
	166	}
	167	/* get chunks */
	168	INIT_LIST_HEAD(&p->validated);
	169	p->idx = 0;
	170	p->chunk_ib_idx = -1;
	171	p->chunk_relocs_idx = -1;
721604a1	172	p->chunk_flags_idx = -1;
dfcf5f36	173	p->chunk_const_ib_idx = -1;
771fe6b9 JG	174	p->chunks_array = kcalloc(cs->num_chunks, sizeof(uint64_t), GFP_KERNEL);
	175	if (p->chunks_array == NULL) {
	176	return -ENOMEM;
	177	}
	178	chunk_array_ptr = (uint64_t *)(unsigned long)(cs->chunks);
	179	if (DRM_COPY_FROM_USER(p->chunks_array, chunk_array_ptr,
	180	sizeof(uint64_t)*cs->num_chunks)) {
	181	return -EFAULT;
	182	}
721604a1	183	p->cs_flags = 0;
771fe6b9 JG	184	p->nchunks = cs->num_chunks;
	185	p->chunks = kcalloc(p->nchunks, sizeof(struct radeon_cs_chunk), GFP_KERNEL);
	186	if (p->chunks == NULL) {
	187	return -ENOMEM;
	188	}
	189	for (i = 0; i < p->nchunks; i++) {
	190	struct drm_radeon_cs_chunk __user **chunk_ptr = NULL;
	191	struct drm_radeon_cs_chunk user_chunk;
	192	uint32_t __user *cdata;
	193
	194	chunk_ptr = (void __user*)(unsigned long)p->chunks_array[i];
	195	if (DRM_COPY_FROM_USER(&user_chunk, chunk_ptr,
	196	sizeof(struct drm_radeon_cs_chunk))) {
	197	return -EFAULT;
	198	}
5176fdc4 DA	199	p->chunks[i].length_dw = user_chunk.length_dw;
5176fdc4 DA	200	p->chunks[i].kdata = NULL;
771fe6b9	201	p->chunks[i].chunk_id = user_chunk.chunk_id;
5176fdc4	202
771fe6b9 JG	203	if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) {
	204	p->chunk_relocs_idx = i;
	205	}
	206	if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) {
	207	p->chunk_ib_idx = i;
5176fdc4 DA	208	/* zero length IB isn't useful */
	209	if (p->chunks[i].length_dw == 0)
	210	return -EINVAL;
771fe6b9	211	}
dfcf5f36 AD	212	if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_CONST_IB) {
	213	p->chunk_const_ib_idx = i;
	214	/* zero length CONST IB isn't useful */
	215	if (p->chunks[i].length_dw == 0)
	216	return -EINVAL;
	217	}
721604a1 JG	218	if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
	219	p->chunk_flags_idx = i;
	220	/* zero length flags aren't useful */
	221	if (p->chunks[i].length_dw == 0)
	222	return -EINVAL;
e70f224c	223	}
5176fdc4	224
771fe6b9	225	p->chunks[i].length_dw = user_chunk.length_dw;
513bcb46	226	p->chunks[i].user_ptr = (void __user *)(unsigned long)user_chunk.chunk_data;
771fe6b9	227
513bcb46	228	cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data;
721604a1 JG	229	if ((p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) \|\|
721604a1 JG	230	(p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS)) {
513bcb46 DA	231	size = p->chunks[i].length_dw * sizeof(uint32_t);
	232	p->chunks[i].kdata = kmalloc(size, GFP_KERNEL);
	233	if (p->chunks[i].kdata == NULL) {
	234	return -ENOMEM;
	235	}
	236	if (DRM_COPY_FROM_USER(p->chunks[i].kdata,
	237	p->chunks[i].user_ptr, size)) {
	238	return -EFAULT;
	239	}
e70f224c	240	if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
721604a1 JG	241	p->cs_flags = p->chunks[i].kdata[0];
	242	if (p->chunks[i].length_dw > 1)
	243	ring = p->chunks[i].kdata[1];
	244	if (p->chunks[i].length_dw > 2)
	245	priority = (s32)p->chunks[i].kdata[2];
e70f224c	246	}
771fe6b9 JG	247	}
771fe6b9 JG	248	}
721604a1 JG	249
721604a1 JG	250	if ((p->cs_flags & RADEON_CS_USE_VM) &&
67e915e4 AD	251	!p->rdev->vm_manager.enabled) {
67e915e4 AD	252	DRM_ERROR("VM not active on asic!\n");
771fe6b9 JG	253	return -EINVAL;
771fe6b9 JG	254	}
e70f224c	255
f48bb04a	256	if (radeon_cs_get_ring(p, ring, priority))
721604a1	257	return -EINVAL;
721604a1 JG	258
	259
	260	/* deal with non-vm */
	261	if ((p->chunk_ib_idx != -1) &&
	262	((p->cs_flags & RADEON_CS_USE_VM) == 0) &&
	263	(p->chunks[p->chunk_ib_idx].chunk_id == RADEON_CHUNK_ID_IB)) {
	264	if (p->chunks[p->chunk_ib_idx].length_dw > (16 * 1024)) {
	265	DRM_ERROR("cs IB too big: %d\n",
	266	p->chunks[p->chunk_ib_idx].length_dw);
	267	return -EINVAL;
	268	}
	269	p->chunks[p->chunk_ib_idx].kpage[0] = kmalloc(PAGE_SIZE, GFP_KERNEL);
	270	p->chunks[p->chunk_ib_idx].kpage[1] = kmalloc(PAGE_SIZE, GFP_KERNEL);
	271	if (p->chunks[p->chunk_ib_idx].kpage[0] == NULL \|\|
f48bb04a	272	p->chunks[p->chunk_ib_idx].kpage[1] == NULL)
721604a1	273	return -ENOMEM;
721604a1 JG	274	p->chunks[p->chunk_ib_idx].kpage_idx[0] = -1;
	275	p->chunks[p->chunk_ib_idx].kpage_idx[1] = -1;
	276	p->chunks[p->chunk_ib_idx].last_copied_page = -1;
	277	p->chunks[p->chunk_ib_idx].last_page_index =
	278	((p->chunks[p->chunk_ib_idx].length_dw * 4) - 1) / PAGE_SIZE;
	279	}
	280
771fe6b9 JG	281	return 0;
	282	}
	283
	284	/**
	285	* cs_parser_fini() - clean parser states
	286	* @parser: parser structure holding parsing context.
	287	* @error: error number
	288	*
	289	* If error is set than unvalidate buffer, otherwise just free memory
	290	* used by parsing context.
	291	**/
	292	static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
	293	{
	294	unsigned i;
	295
147666fb TH	296
	297	if (!error && parser->ib)
	298	ttm_eu_fence_buffer_objects(&parser->validated,
	299	parser->ib->fence);
	300	else
	301	ttm_eu_backoff_reservation(&parser->validated);
	302
fcbc451b PN	303	if (parser->relocs != NULL) {
	304	for (i = 0; i < parser->nrelocs; i++) {
	305	if (parser->relocs[i].gobj)
	306	drm_gem_object_unreference_unlocked(parser->relocs[i].gobj);
	307	}
771fe6b9	308	}
48e113e5	309	kfree(parser->track);
771fe6b9 JG	310	kfree(parser->relocs);
	311	kfree(parser->relocs_ptr);
	312	for (i = 0; i < parser->nchunks; i++) {
	313	kfree(parser->chunks[i].kdata);
513bcb46 DA	314	kfree(parser->chunks[i].kpage[0]);
513bcb46 DA	315	kfree(parser->chunks[i].kpage[1]);
771fe6b9 JG	316	}
	317	kfree(parser->chunks);
	318	kfree(parser->chunks_array);
	319	radeon_ib_free(parser->rdev, &parser->ib);
	320	}
	321
721604a1 JG	322	static int radeon_cs_ib_chunk(struct radeon_device *rdev,
	323	struct radeon_cs_parser *parser)
	324	{
	325	struct radeon_cs_chunk *ib_chunk;
	326	int r;
	327
	328	if (parser->chunk_ib_idx == -1)
	329	return 0;
	330
	331	if (parser->cs_flags & RADEON_CS_USE_VM)
	332	return 0;
	333
	334	ib_chunk = &parser->chunks[parser->chunk_ib_idx];
	335	/* Copy the packet into the IB, the parser will read from the
	336	* input memory (cached) and write to the IB (which can be
	337	* uncached).
	338	*/
	339	r = radeon_ib_get(rdev, parser->ring, &parser->ib,
	340	ib_chunk->length_dw * 4);
	341	if (r) {
	342	DRM_ERROR("Failed to get ib !\n");
	343	return r;
	344	}
	345	parser->ib->length_dw = ib_chunk->length_dw;
eb0c19c5	346	r = radeon_cs_parse(rdev, parser->ring, parser);
721604a1 JG	347	if (r \|\| parser->parser_error) {
	348	DRM_ERROR("Invalid command stream !\n");
	349	return r;
	350	}
	351	r = radeon_cs_finish_pages(parser);
	352	if (r) {
	353	DRM_ERROR("Invalid command stream !\n");
	354	return r;
	355	}
93504fce CK	356	r = radeon_cs_sync_rings(parser);
	357	if (r) {
	358	DRM_ERROR("Failed to synchronize rings !\n");
	359	}
721604a1 JG	360	parser->ib->vm_id = 0;
	361	r = radeon_ib_schedule(rdev, parser->ib);
	362	if (r) {
	363	DRM_ERROR("Failed to schedule IB !\n");
	364	}
	365	return 0;
	366	}
	367
	368	static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser,
	369	struct radeon_vm *vm)
	370	{
	371	struct radeon_bo_list *lobj;
	372	struct radeon_bo *bo;
	373	int r;
	374
	375	list_for_each_entry(lobj, &parser->validated, tv.head) {
	376	bo = lobj->bo;
	377	r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem);
	378	if (r) {
	379	return r;
	380	}
	381	}
	382	return 0;
	383	}
	384
	385	static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
	386	struct radeon_cs_parser *parser)
	387	{
	388	struct radeon_cs_chunk *ib_chunk;
	389	struct radeon_fpriv *fpriv = parser->filp->driver_priv;
	390	struct radeon_vm *vm = &fpriv->vm;
	391	int r;
	392
	393	if (parser->chunk_ib_idx == -1)
	394	return 0;
	395
	396	if ((parser->cs_flags & RADEON_CS_USE_VM) == 0)
	397	return 0;
	398
dfcf5f36 AD	399	if ((rdev->family >= CHIP_TAHITI) &&
	400	(parser->chunk_const_ib_idx != -1)) {
	401	ib_chunk = &parser->chunks[parser->chunk_const_ib_idx];
	402	if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
	403	DRM_ERROR("cs IB CONST too big: %d\n", ib_chunk->length_dw);
	404	return -EINVAL;
	405	}
	406	r = radeon_ib_get(rdev, parser->ring, &parser->const_ib,
	407	ib_chunk->length_dw * 4);
	408	if (r) {
	409	DRM_ERROR("Failed to get const ib !\n");
	410	return r;
	411	}
	412	parser->const_ib->is_const_ib = true;
	413	parser->const_ib->length_dw = ib_chunk->length_dw;
	414	/* Copy the packet into the IB */
	415	if (DRM_COPY_FROM_USER(parser->const_ib->ptr, ib_chunk->user_ptr,
	416	ib_chunk->length_dw * 4)) {
	417	return -EFAULT;
	418	}
	419	r = radeon_ring_ib_parse(rdev, parser->ring, parser->const_ib);
	420	if (r) {
	421	return r;
	422	}
	423	}
	424
721604a1 JG	425	ib_chunk = &parser->chunks[parser->chunk_ib_idx];
	426	if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
	427	DRM_ERROR("cs IB too big: %d\n", ib_chunk->length_dw);
	428	return -EINVAL;
	429	}
	430	r = radeon_ib_get(rdev, parser->ring, &parser->ib,
	431	ib_chunk->length_dw * 4);
	432	if (r) {
	433	DRM_ERROR("Failed to get ib !\n");
	434	return r;
	435	}
	436	parser->ib->length_dw = ib_chunk->length_dw;
	437	/* Copy the packet into the IB */
	438	if (DRM_COPY_FROM_USER(parser->ib->ptr, ib_chunk->user_ptr,
	439	ib_chunk->length_dw * 4)) {
	440	return -EFAULT;
	441	}
	442	r = radeon_ring_ib_parse(rdev, parser->ring, parser->ib);
	443	if (r) {
	444	return r;
	445	}
	446
	447	mutex_lock(&vm->mutex);
	448	r = radeon_vm_bind(rdev, vm);
	449	if (r) {
	450	goto out;
	451	}
	452	r = radeon_bo_vm_update_pte(parser, vm);
	453	if (r) {
	454	goto out;
	455	}
93504fce CK	456	r = radeon_cs_sync_rings(parser);
	457	if (r) {
	458	DRM_ERROR("Failed to synchronize rings !\n");
	459	}
dfcf5f36 AD	460
	461	if ((rdev->family >= CHIP_TAHITI) &&
	462	(parser->chunk_const_ib_idx != -1)) {
	463	parser->const_ib->vm_id = vm->id;
	464	/* ib pool is bind at 0 in virtual address space to gpu_addr is the
	465	* offset inside the pool bo
	466	*/
	467	parser->const_ib->gpu_addr = parser->const_ib->sa_bo.offset;
	468	r = radeon_ib_schedule(rdev, parser->const_ib);
	469	if (r)
	470	goto out;
	471	}
	472
721604a1 JG	473	parser->ib->vm_id = vm->id;
	474	/* ib pool is bind at 0 in virtual address space to gpu_addr is the
	475	* offset inside the pool bo
	476	*/
	477	parser->ib->gpu_addr = parser->ib->sa_bo.offset;
dfcf5f36	478	parser->ib->is_const_ib = false;
721604a1 JG	479	r = radeon_ib_schedule(rdev, parser->ib);
	480	out:
	481	if (!r) {
	482	if (vm->fence) {
	483	radeon_fence_unref(&vm->fence);
	484	}
	485	vm->fence = radeon_fence_ref(parser->ib->fence);
	486	}
	487	mutex_unlock(&fpriv->vm.mutex);
	488	return r;
	489	}
	490
771fe6b9 JG	491	int radeon_cs_ioctl(struct drm_device dev, void data, struct drm_file *filp)
	492	{
	493	struct radeon_device *rdev = dev->dev_private;
	494	struct radeon_cs_parser parser;
771fe6b9 JG	495	int r;
771fe6b9 JG	496
7a1619b9	497	radeon_mutex_lock(&rdev->cs_mutex);
6b7746e8 JG	498	if (!rdev->accel_working) {
	499	radeon_mutex_unlock(&rdev->cs_mutex);
	500	return -EBUSY;
	501	}
771fe6b9 JG	502	/* initialize parser */
	503	memset(&parser, 0, sizeof(struct radeon_cs_parser));
	504	parser.filp = filp;
	505	parser.rdev = rdev;
c8c15ff1	506	parser.dev = rdev->dev;
428c6e36	507	parser.family = rdev->family;
771fe6b9 JG	508	r = radeon_cs_parser_init(&parser, data);
	509	if (r) {
	510	DRM_ERROR("Failed to initialize parser !\n");
	511	radeon_cs_parser_fini(&parser, r);
7a1619b9	512	radeon_mutex_unlock(&rdev->cs_mutex);
771fe6b9 JG	513	return r;
771fe6b9 JG	514	}
771fe6b9 JG	515	r = radeon_cs_parser_relocs(&parser);
771fe6b9 JG	516	if (r) {
97f23b3d DA	517	if (r != -ERESTARTSYS)
97f23b3d DA	518	DRM_ERROR("Failed to parse relocation %d!\n", r);
771fe6b9	519	radeon_cs_parser_fini(&parser, r);
7a1619b9	520	radeon_mutex_unlock(&rdev->cs_mutex);
771fe6b9 JG	521	return r;
771fe6b9 JG	522	}
721604a1	523	r = radeon_cs_ib_chunk(rdev, &parser);
771fe6b9	524	if (r) {
721604a1	525	goto out;
771fe6b9	526	}
721604a1	527	r = radeon_cs_ib_vm_chunk(rdev, &parser);
771fe6b9	528	if (r) {
721604a1	529	goto out;
771fe6b9	530	}
721604a1	531	out:
771fe6b9	532	radeon_cs_parser_fini(&parser, r);
7a1619b9	533	radeon_mutex_unlock(&rdev->cs_mutex);
771fe6b9 JG	534	return r;
771fe6b9 JG	535	}
513bcb46 DA	536
	537	int radeon_cs_finish_pages(struct radeon_cs_parser *p)
	538	{
	539	struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
	540	int i;
	541	int size = PAGE_SIZE;
	542
	543	for (i = ibc->last_copied_page + 1; i <= ibc->last_page_index; i++) {
	544	if (i == ibc->last_page_index) {
	545	size = (ibc->length_dw * 4) % PAGE_SIZE;
	546	if (size == 0)
	547	size = PAGE_SIZE;
	548	}
	549
	550	if (DRM_COPY_FROM_USER(p->ib->ptr + (i * (PAGE_SIZE/4)),
	551	ibc->user_ptr + (i * PAGE_SIZE),
	552	size))
	553	return -EFAULT;
	554	}
	555	return 0;
	556	}
	557
	558	int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
	559	{
	560	int new_page;
513bcb46 DA	561	struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
	562	int i;
	563	int size = PAGE_SIZE;
	564
c5e617e2	565	for (i = ibc->last_copied_page + 1; i < pg_idx; i++) {
513bcb46 DA	566	if (DRM_COPY_FROM_USER(p->ib->ptr + (i * (PAGE_SIZE/4)),
	567	ibc->user_ptr + (i * PAGE_SIZE),
	568	PAGE_SIZE)) {
	569	p->parser_error = -EFAULT;
	570	return 0;
	571	}
	572	}
	573
	574	new_page = ibc->kpage_idx[0] < ibc->kpage_idx[1] ? 0 : 1;
	575
	576	if (pg_idx == ibc->last_page_index) {
	577	size = (ibc->length_dw * 4) % PAGE_SIZE;
	578	if (size == 0)
	579	size = PAGE_SIZE;
	580	}
	581
	582	if (DRM_COPY_FROM_USER(ibc->kpage[new_page],
	583	ibc->user_ptr + (pg_idx * PAGE_SIZE),
	584	size)) {
	585	p->parser_error = -EFAULT;
	586	return 0;
	587	}
	588
	589	/* copy to IB here */
	590	memcpy((void )(p->ib->ptr+(pg_idx(PAGE_SIZE/4))), ibc->kpage[new_page], size);
	591
	592	ibc->last_copied_page = pg_idx;
	593	ibc->kpage_idx[new_page] = pg_idx;
	594
	595	return new_page;
	596	}