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drm/radeon: remove null test before kfree
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH		 26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9 33
10ebc0bc
DA		 34#include <linux/pm_runtime.h>
35
d4877cf2
AD		 36void radeon_connector_hotplug(struct drm_connector *connector)
37{
38 struct drm_device *dev = connector->dev;
39 struct radeon_device *rdev = dev->dev_private;
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41
cbac9543
AD		 42 /* bail if the connector does not have hpd pin, e.g.,
43 * VGA, TV, etc.
44 */
45 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
46 return;
47
1e85e1d0 48 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 49
73104b5c 50 /* if the connector is already off, don't turn it back on */
6e9f798d 51 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD		 52 if (connector->dpms != DRM_MODE_DPMS_ON)
53 return;
54
d5811e87
AD		 55 /* just deal with DP (not eDP) here. */
56 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG		 57 struct radeon_connector_atom_dig *dig_connector =
58 radeon_connector->con_priv;
7c3ed0fd 59
266dcba5
JG		 60 /* if existing sink type was not DP no need to retrain */
61 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
62 return;
63
64 /* first get sink type as it may be reset after (un)plug */
65 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
66 /* don't do anything if sink is not display port, i.e.,
67 * passive dp->(dvi|hdmi) adaptor
68 */
69 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
70 int saved_dpms = connector->dpms;
71 /* Only turn off the display if it's physically disconnected */
ca2ccde5 72 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 73 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG		 74 } else if (radeon_dp_needs_link_train(radeon_connector)) {
75 /* set it to OFF so that drm_helper_connector_dpms()
76 * won't return immediately since the current state
77 * is ON at this point.
78 */
79 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 80 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 81 }
266dcba5
JG		 82 connector->dpms = saved_dpms;
83 }
d4877cf2 84 }
d4877cf2
AD		 85}
86
445282db
DA		 87static void radeon_property_change_mode(struct drm_encoder *encoder)
88{
89 struct drm_crtc *crtc = encoder->crtc;
90
91 if (crtc && crtc->enabled) {
92 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 93 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA		 94 }
95}
eccea792
AD		 96
97int radeon_get_monitor_bpc(struct drm_connector *connector)
98{
99 struct drm_device *dev = connector->dev;
100 struct radeon_device *rdev = dev->dev_private;
101 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
102 struct radeon_connector_atom_dig *dig_connector;
103 int bpc = 8;
ea292861 104 int mode_clock, max_tmds_clock;
eccea792
AD		 105
106 switch (connector->connector_type) {
107 case DRM_MODE_CONNECTOR_DVII:
108 case DRM_MODE_CONNECTOR_HDMIB:
109 if (radeon_connector->use_digital) {
110 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
111 if (connector->display_info.bpc)
112 bpc = connector->display_info.bpc;
113 }
114 }
115 break;
116 case DRM_MODE_CONNECTOR_DVID:
117 case DRM_MODE_CONNECTOR_HDMIA:
118 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
119 if (connector->display_info.bpc)
120 bpc = connector->display_info.bpc;
121 }
122 break;
123 case DRM_MODE_CONNECTOR_DisplayPort:
124 dig_connector = radeon_connector->con_priv;
125 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
126 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
127 drm_detect_hdmi_monitor(radeon_connector->edid)) {
128 if (connector->display_info.bpc)
129 bpc = connector->display_info.bpc;
130 }
131 break;
132 case DRM_MODE_CONNECTOR_eDP:
133 case DRM_MODE_CONNECTOR_LVDS:
134 if (connector->display_info.bpc)
135 bpc = connector->display_info.bpc;
136 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
137 struct drm_connector_helper_funcs *connector_funcs =
138 connector->helper_private;
139 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
140 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
141 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
142
143 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
144 bpc = 6;
145 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
146 bpc = 8;
147 }
148 break;
149 }
89b92339
MK		 150
151 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
152 /* hdmi deep color only implemented on DCE4+ */
153 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
154 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 155 connector->name, bpc);
89b92339
MK		 156 bpc = 8;
157 }
158
159 /*
160 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
161 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
162 * 12 bpc is always supported on hdmi deep color sinks, as this is
163 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
164 */
165 if (bpc > 12) {
166 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 167 connector->name, bpc);
89b92339
MK		 168 bpc = 12;
169 }
ea292861
MK		 170
171 /* Any defined maximum tmds clock limit we must not exceed? */
172 if (connector->max_tmds_clock > 0) {
173 /* mode_clock is clock in kHz for mode to be modeset on this connector */
174 mode_clock = radeon_connector->pixelclock_for_modeset;
175
176 /* Maximum allowable input clock in kHz */
177 max_tmds_clock = connector->max_tmds_clock * 1000;
178
179 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
180 connector->name, mode_clock, max_tmds_clock);
181
182 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
183 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
184 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
185 (mode_clock * 5/4 <= max_tmds_clock))
186 bpc = 10;
187 else
188 bpc = 8;
189
190 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
191 connector->name, bpc);
192 }
193
194 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
195 bpc = 8;
196 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
197 connector->name, bpc);
198 }
199 }
89b92339
MK		 200 }
201
a624f429
AD		 202 if ((radeon_deep_color == 0) && (bpc > 8))
203 bpc = 8;
204
89b92339 205 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 206 connector->name, connector->display_info.bpc, bpc);
89b92339 207
eccea792
AD		 208 return bpc;
209}
210
771fe6b9
JG		 211static void
212radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
213{
214 struct drm_device *dev = connector->dev;
215 struct radeon_device *rdev = dev->dev_private;
216 struct drm_encoder *best_encoder = NULL;
217 struct drm_encoder *encoder = NULL;
218 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
771fe6b9
JG		 219 bool connected;
220 int i;
221
222 best_encoder = connector_funcs->best_encoder(connector);
223
224 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
225 if (connector->encoder_ids[i] == 0)
226 break;
227
b957f457
RC		 228 encoder = drm_encoder_find(connector->dev,
229 connector->encoder_ids[i]);
230 if (!encoder)
771fe6b9
JG		 231 continue;
232
771fe6b9
JG		 233 if ((encoder == best_encoder) && (status == connector_status_connected))
234 connected = true;
235 else
236 connected = false;
237
238 if (rdev->is_atom_bios)
239 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
240 else
241 radeon_combios_connected_scratch_regs(connector, encoder, connected);
242
243 }
244}
245
1109ca09 246static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db 247{
445282db
DA		 248 struct drm_encoder *encoder;
249 int i;
250
251 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
252 if (connector->encoder_ids[i] == 0)
253 break;
254
b957f457
RC		 255 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
256 if (!encoder)
445282db
DA		 257 continue;
258
445282db
DA		 259 if (encoder->encoder_type == encoder_type)
260 return encoder;
261 }
262 return NULL;
263}
264
1109ca09 265static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG		 266{
267 int enc_id = connector->encoder_ids[0];
771fe6b9 268 /* pick the encoder ids */
b957f457
RC		 269 if (enc_id)
270 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 271 return NULL;
272}
273
4ce001ab
DA		 274/*
275 * radeon_connector_analog_encoder_conflict_solve
276 * - search for other connectors sharing this encoder
277 * if priority is true, then set them disconnected if this is connected
278 * if priority is false, set us disconnected if they are connected
279 */
280static enum drm_connector_status
281radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
282 struct drm_encoder *encoder,
283 enum drm_connector_status current_status,
284 bool priority)
285{
286 struct drm_device *dev = connector->dev;
287 struct drm_connector *conflict;
08d07511 288 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 289 int i;
290
291 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
292 if (conflict == connector)
293 continue;
294
08d07511 295 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 296 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
297 if (conflict->encoder_ids[i] == 0)
298 break;
299
300 /* if the IDs match */
301 if (conflict->encoder_ids[i] == encoder->base.id) {
302 if (conflict->status != connector_status_connected)
303 continue;
08d07511
AD		 304
305 if (radeon_conflict->use_digital)
306 continue;
4ce001ab
DA		 307
308 if (priority == true) {
72082093
JN		 309 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
310 conflict->name);
311 DRM_DEBUG_KMS("in favor of %s\n",
312 connector->name);
4ce001ab
DA		 313 conflict->status = connector_status_disconnected;
314 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
315 } else {
72082093
JN		 316 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
317 connector->name);
318 DRM_DEBUG_KMS("in favor of %s\n",
319 conflict->name);
4ce001ab
DA		 320 current_status = connector_status_disconnected;
321 }
322 break;
323 }
324 }
325 }
326 return current_status;
327
328}
329
771fe6b9
JG		 330static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
331{
332 struct drm_device *dev = encoder->dev;
333 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
334 struct drm_display_mode *mode = NULL;
de2103e4 335 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 336
de2103e4
AD		 337 if (native_mode->hdisplay != 0 &&
338 native_mode->vdisplay != 0 &&
339 native_mode->clock != 0) {
fb06ca8f 340 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 341 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
342 drm_mode_set_name(mode);
343
d9fdaafb 344 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 345 } else if (native_mode->hdisplay != 0 &&
346 native_mode->vdisplay != 0) {
347 /* mac laptops without an edid */
348 /* Note that this is not necessarily the exact panel mode,
349 * but an approximation based on the cvt formula. For these
350 * systems we should ideally read the mode info out of the
351 * registers or add a mode table, but this works and is much
352 * simpler.
353 */
354 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
355 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 356 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 357 }
358 return mode;
359}
360
923f6848
AD		 361static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
362{
363 struct drm_device *dev = encoder->dev;
364 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
365 struct drm_display_mode *mode = NULL;
de2103e4 366 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 367 int i;
368 struct mode_size {
369 int w;
370 int h;
371 } common_modes[17] = {
372 { 640, 480},
373 { 720, 480},
374 { 800, 600},
375 { 848, 480},
376 {1024, 768},
377 {1152, 768},
378 {1280, 720},
379 {1280, 800},
380 {1280, 854},
381 {1280, 960},
382 {1280, 1024},
383 {1440, 900},
384 {1400, 1050},
385 {1680, 1050},
386 {1600, 1200},
387 {1920, 1080},
388 {1920, 1200}
389 };
390
391 for (i = 0; i < 17; i++) {
dfdd6467
AD		 392 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
393 if (common_modes[i].w > 1024 ||
394 common_modes[i].h > 768)
395 continue;
396 }
923f6848 397 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 398 if (common_modes[i].w > native_mode->hdisplay ||
399 common_modes[i].h > native_mode->vdisplay ||
400 (common_modes[i].w == native_mode->hdisplay &&
401 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 402 continue;
403 }
404 if (common_modes[i].w < 320 || common_modes[i].h < 200)
405 continue;
406
d50ba256 407 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 408 drm_mode_probed_add(connector, mode);
409 }
410}
411
1109ca09 412static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG		 413 uint64_t val)
414{
445282db
DA		 415 struct drm_device *dev = connector->dev;
416 struct radeon_device *rdev = dev->dev_private;
417 struct drm_encoder *encoder;
418 struct radeon_encoder *radeon_encoder;
419
420 if (property == rdev->mode_info.coherent_mode_property) {
421 struct radeon_encoder_atom_dig *dig;
ce227c41 422 bool new_coherent_mode;
445282db
DA		 423
424 /* need to find digital encoder on connector */
425 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
426 if (!encoder)
427 return 0;
428
429 radeon_encoder = to_radeon_encoder(encoder);
430
431 if (!radeon_encoder->enc_priv)
432 return 0;
433
434 dig = radeon_encoder->enc_priv;
ce227c41
DA		 435 new_coherent_mode = val ? true : false;
436 if (dig->coherent_mode != new_coherent_mode) {
437 dig->coherent_mode = new_coherent_mode;
438 radeon_property_change_mode(&radeon_encoder->base);
439 }
445282db
DA		 440 }
441
8666c076
AD		 442 if (property == rdev->mode_info.audio_property) {
443 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
444 /* need to find digital encoder on connector */
445 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
446 if (!encoder)
447 return 0;
448
449 radeon_encoder = to_radeon_encoder(encoder);
450
451 if (radeon_connector->audio != val) {
452 radeon_connector->audio = val;
453 radeon_property_change_mode(&radeon_encoder->base);
454 }
455 }
456
6214bb74
AD		 457 if (property == rdev->mode_info.dither_property) {
458 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
459 /* need to find digital encoder on connector */
460 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
461 if (!encoder)
462 return 0;
463
464 radeon_encoder = to_radeon_encoder(encoder);
465
466 if (radeon_connector->dither != val) {
467 radeon_connector->dither = val;
468 radeon_property_change_mode(&radeon_encoder->base);
469 }
470 }
471
5b1714d3
AD		 472 if (property == rdev->mode_info.underscan_property) {
473 /* need to find digital encoder on connector */
474 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
475 if (!encoder)
476 return 0;
477
478 radeon_encoder = to_radeon_encoder(encoder);
479
480 if (radeon_encoder->underscan_type != val) {
481 radeon_encoder->underscan_type = val;
482 radeon_property_change_mode(&radeon_encoder->base);
483 }
484 }
485
5bccf5e3
MG		 486 if (property == rdev->mode_info.underscan_hborder_property) {
487 /* need to find digital encoder on connector */
488 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
489 if (!encoder)
490 return 0;
491
492 radeon_encoder = to_radeon_encoder(encoder);
493
494 if (radeon_encoder->underscan_hborder != val) {
495 radeon_encoder->underscan_hborder = val;
496 radeon_property_change_mode(&radeon_encoder->base);
497 }
498 }
499
500 if (property == rdev->mode_info.underscan_vborder_property) {
501 /* need to find digital encoder on connector */
502 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
503 if (!encoder)
504 return 0;
505
506 radeon_encoder = to_radeon_encoder(encoder);
507
508 if (radeon_encoder->underscan_vborder != val) {
509 radeon_encoder->underscan_vborder = val;
510 radeon_property_change_mode(&radeon_encoder->base);
511 }
512 }
513
445282db
DA		 514 if (property == rdev->mode_info.tv_std_property) {
515 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
516 if (!encoder) {
517 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
518 }
519
520 if (!encoder)
521 return 0;
522
523 radeon_encoder = to_radeon_encoder(encoder);
524 if (!radeon_encoder->enc_priv)
525 return 0;
643acacf 526 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 527 struct radeon_encoder_atom_dac *dac_int;
528 dac_int = radeon_encoder->enc_priv;
529 dac_int->tv_std = val;
530 } else {
531 struct radeon_encoder_tv_dac *dac_int;
532 dac_int = radeon_encoder->enc_priv;
533 dac_int->tv_std = val;
534 }
535 radeon_property_change_mode(&radeon_encoder->base);
536 }
537
538 if (property == rdev->mode_info.load_detect_property) {
539 struct radeon_connector *radeon_connector =
540 to_radeon_connector(connector);
541
542 if (val == 0)
543 radeon_connector->dac_load_detect = false;
544 else
545 radeon_connector->dac_load_detect = true;
546 }
547
548 if (property == rdev->mode_info.tmds_pll_property) {
549 struct radeon_encoder_int_tmds *tmds = NULL;
550 bool ret = false;
551 /* need to find digital encoder on connector */
552 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
553 if (!encoder)
554 return 0;
555
556 radeon_encoder = to_radeon_encoder(encoder);
557
558 tmds = radeon_encoder->enc_priv;
559 if (!tmds)
560 return 0;
561
562 if (val == 0) {
563 if (rdev->is_atom_bios)
564 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
565 else
566 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
567 }
568 if (val == 1 || ret == false) {
569 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
570 }
571 radeon_property_change_mode(&radeon_encoder->base);
572 }
573
771fe6b9
JG		 574 return 0;
575}
576
8dfaa8a7
MD		 577static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
578 struct drm_connector *connector)
579{
580 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 581 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 582 struct drm_display_mode *t, *mode;
583
584 /* If the EDID preferred mode doesn't match the native mode, use it */
585 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
586 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
587 if (mode->hdisplay != native_mode->hdisplay ||
588 mode->vdisplay != native_mode->vdisplay)
589 memcpy(native_mode, mode, sizeof(*mode));
590 }
591 }
8dfaa8a7
MD		 592
593 /* Try to get native mode details from EDID if necessary */
de2103e4 594 if (!native_mode->clock) {
8dfaa8a7 595 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 596 if (mode->hdisplay == native_mode->hdisplay &&
597 mode->vdisplay == native_mode->vdisplay) {
598 *native_mode = *mode;
599 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 600 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 601 break;
602 }
603 }
604 }
13bb9430 605
de2103e4 606 if (!native_mode->clock) {
c5d46b4e 607 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 608 radeon_encoder->rmx_type = RMX_OFF;
609 }
610}
771fe6b9
JG		 611
612static int radeon_lvds_get_modes(struct drm_connector *connector)
613{
614 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
615 struct drm_encoder *encoder;
616 int ret = 0;
617 struct drm_display_mode *mode;
618
619 if (radeon_connector->ddc_bus) {
620 ret = radeon_ddc_get_modes(radeon_connector);
621 if (ret > 0) {
7747b713 622 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD		 623 if (encoder) {
624 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD		 625 /* add scaled modes */
626 radeon_add_common_modes(encoder, connector);
8dfaa8a7 627 }
771fe6b9
JG		 628 return ret;
629 }
630 }
631
632 encoder = radeon_best_single_encoder(connector);
633 if (!encoder)
634 return 0;
635
636 /* we have no EDID modes */
637 mode = radeon_fp_native_mode(encoder);
638 if (mode) {
639 ret = 1;
640 drm_mode_probed_add(connector, mode);
7a868e18
AD		 641 /* add the width/height from vbios tables if available */
642 connector->display_info.width_mm = mode->width_mm;
643 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 644 /* add scaled modes */
645 radeon_add_common_modes(encoder, connector);
771fe6b9 646 }
923f6848 647
771fe6b9
JG		 648 return ret;
649}
650
651static int radeon_lvds_mode_valid(struct drm_connector *connector,
652 struct drm_display_mode *mode)
653{
a3fa6320
AD		 654 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
655
656 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
657 return MODE_PANEL;
658
659 if (encoder) {
660 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
661 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
662
663 /* AVIVO hardware supports downscaling modes larger than the panel
664 * to the panel size, but I'm not sure this is desirable.
665 */
666 if ((mode->hdisplay > native_mode->hdisplay) ||
667 (mode->vdisplay > native_mode->vdisplay))
668 return MODE_PANEL;
669
670 /* if scaling is disabled, block non-native modes */
671 if (radeon_encoder->rmx_type == RMX_OFF) {
672 if ((mode->hdisplay != native_mode->hdisplay) ||
673 (mode->vdisplay != native_mode->vdisplay))
674 return MODE_PANEL;
675 }
676 }
677
771fe6b9
JG		 678 return MODE_OK;
679}
680
7b334fcb 681static enum drm_connector_status
930a9e28 682radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 683{
0549a061 684 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 685 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 686 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 687 int r;
688
689 r = pm_runtime_get_sync(connector->dev->dev);
690 if (r < 0)
691 return connector_status_disconnected;
2ffb8429
AD		 692
693 if (encoder) {
694 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 695 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 696
697 /* check if panel is valid */
de2103e4 698 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD		 699 ret = connector_status_connected;
700
701 }
0549a061
AD		 702
703 /* check for edid as well */
0294cf4f
AD		 704 if (radeon_connector->edid)
705 ret = connector_status_connected;
706 else {
707 if (radeon_connector->ddc_bus) {
0294cf4f
AD		 708 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
709 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD		 710 if (radeon_connector->edid)
711 ret = connector_status_connected;
712 }
0549a061 713 }
771fe6b9 714 /* check acpi lid status ??? */
2ffb8429 715
771fe6b9 716 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 717 pm_runtime_mark_last_busy(connector->dev->dev);
718 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG		 719 return ret;
720}
721
722static void radeon_connector_destroy(struct drm_connector *connector)
723{
724 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
725
0294cf4f
AD		 726 if (radeon_connector->edid)
727 kfree(radeon_connector->edid);
771fe6b9 728 kfree(radeon_connector->con_priv);
34ea3d38 729 drm_connector_unregister(connector);
771fe6b9
JG		 730 drm_connector_cleanup(connector);
731 kfree(connector);
732}
733
445282db
DA		 734static int radeon_lvds_set_property(struct drm_connector *connector,
735 struct drm_property *property,
736 uint64_t value)
737{
738 struct drm_device *dev = connector->dev;
739 struct radeon_encoder *radeon_encoder;
740 enum radeon_rmx_type rmx_type;
741
d9fdaafb 742 DRM_DEBUG_KMS("\n");
445282db
DA		 743 if (property != dev->mode_config.scaling_mode_property)
744 return 0;
745
746 if (connector->encoder)
747 radeon_encoder = to_radeon_encoder(connector->encoder);
748 else {
749 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
750 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
751 }
752
753 switch (value) {
754 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
755 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
756 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
757 default:
758 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
759 }
760 if (radeon_encoder->rmx_type == rmx_type)
761 return 0;
762
763 radeon_encoder->rmx_type = rmx_type;
764
765 radeon_property_change_mode(&radeon_encoder->base);
766 return 0;
767}
768
769
1109ca09 770static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG		 771 .get_modes = radeon_lvds_get_modes,
772 .mode_valid = radeon_lvds_mode_valid,
773 .best_encoder = radeon_best_single_encoder,
774};
775
1109ca09 776static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG		 777 .dpms = drm_helper_connector_dpms,
778 .detect = radeon_lvds_detect,
779 .fill_modes = drm_helper_probe_single_connector_modes,
780 .destroy = radeon_connector_destroy,
445282db 781 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 782};
783
784static int radeon_vga_get_modes(struct drm_connector *connector)
785{
786 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
787 int ret;
788
789 ret = radeon_ddc_get_modes(radeon_connector);
790
791 return ret;
792}
793
794static int radeon_vga_mode_valid(struct drm_connector *connector,
795 struct drm_display_mode *mode)
796{
b20f9bef
AD		 797 struct drm_device *dev = connector->dev;
798 struct radeon_device *rdev = dev->dev_private;
799
a3fa6320 800 /* XXX check mode bandwidth */
b20f9bef
AD		 801
802 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
803 return MODE_CLOCK_HIGH;
804
771fe6b9
JG		 805 return MODE_OK;
806}
807
7b334fcb 808static enum drm_connector_status
930a9e28 809radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 810{
fafcf94e
AD		 811 struct drm_device *dev = connector->dev;
812 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 813 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
814 struct drm_encoder *encoder;
815 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 816 bool dret = false;
771fe6b9 817 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 818 int r;
819
820 r = pm_runtime_get_sync(connector->dev->dev);
821 if (r < 0)
822 return connector_status_disconnected;
771fe6b9 823
4ce001ab
DA		 824 encoder = radeon_best_single_encoder(connector);
825 if (!encoder)
826 ret = connector_status_disconnected;
827
eb6b6d7c 828 if (radeon_connector->ddc_bus)
0a9069d3 829 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 830 if (dret) {
d0d0a225 831 radeon_connector->detected_by_load = false;
0294cf4f
AD		 832 if (radeon_connector->edid) {
833 kfree(radeon_connector->edid);
834 radeon_connector->edid = NULL;
835 }
0294cf4f 836 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD		 837
838 if (!radeon_connector->edid) {
f82f5f3a 839 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 840 connector->name);
f82f5f3a 841 ret = connector_status_connected;
0294cf4f
AD		 842 } else {
843 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
844
845 /* some oems have boards with separate digital and analog connectors
846 * with a shared ddc line (often vga + hdmi)
847 */
848 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
849 kfree(radeon_connector->edid);
850 radeon_connector->edid = NULL;
851 ret = connector_status_disconnected;
852 } else
853 ret = connector_status_connected;
854 }
855 } else {
c3cceedd
DA		 856
857 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 858 if (!force) {
859 /* only return the previous status if we last
860 * detected a monitor via load.
861 */
862 if (radeon_connector->detected_by_load)
10ebc0bc
DA		 863 ret = connector->status;
864 goto out;
d0d0a225 865 }
c3cceedd 866
d8a7f792 867 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 868 encoder_funcs = encoder->helper_private;
869 ret = encoder_funcs->detect(encoder, connector);
34076446 870 if (ret != connector_status_disconnected)
d0d0a225 871 radeon_connector->detected_by_load = true;
445282db 872 }
771fe6b9
JG		 873 }
874
4ce001ab
DA		 875 if (ret == connector_status_connected)
876 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 877
878 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
879 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
880 * by other means, assume the CRT is connected and use that EDID.
881 */
882 if ((!rdev->is_atom_bios) &&
883 (ret == connector_status_disconnected) &&
884 rdev->mode_info.bios_hardcoded_edid_size) {
885 ret = connector_status_connected;
886 }
887
771fe6b9 888 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 889
890out:
891 pm_runtime_mark_last_busy(connector->dev->dev);
892 pm_runtime_put_autosuspend(connector->dev->dev);
893
771fe6b9
JG		 894 return ret;
895}
896
1109ca09 897static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG		 898 .get_modes = radeon_vga_get_modes,
899 .mode_valid = radeon_vga_mode_valid,
900 .best_encoder = radeon_best_single_encoder,
901};
902
1109ca09 903static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG		 904 .dpms = drm_helper_connector_dpms,
905 .detect = radeon_vga_detect,
906 .fill_modes = drm_helper_probe_single_connector_modes,
907 .destroy = radeon_connector_destroy,
908 .set_property = radeon_connector_set_property,
909};
910
4ce001ab
DA		 911static int radeon_tv_get_modes(struct drm_connector *connector)
912{
913 struct drm_device *dev = connector->dev;
923f6848 914 struct radeon_device *rdev = dev->dev_private;
4ce001ab 915 struct drm_display_mode *tv_mode;
923f6848 916 struct drm_encoder *encoder;
4ce001ab 917
923f6848
AD		 918 encoder = radeon_best_single_encoder(connector);
919 if (!encoder)
920 return 0;
4ce001ab 921
923f6848
AD		 922 /* avivo chips can scale any mode */
923 if (rdev->family >= CHIP_RS600)
924 /* add scaled modes */
925 radeon_add_common_modes(encoder, connector);
926 else {
927 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 928 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 929 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
930 drm_mode_probed_add(connector, tv_mode);
931 }
4ce001ab
DA		 932 return 1;
933}
934
935static int radeon_tv_mode_valid(struct drm_connector *connector,
936 struct drm_display_mode *mode)
937{
a3fa6320
AD		 938 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
939 return MODE_CLOCK_RANGE;
4ce001ab
DA		 940 return MODE_OK;
941}
942
7b334fcb 943static enum drm_connector_status
930a9e28 944radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 945{
946 struct drm_encoder *encoder;
947 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 948 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
949 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 950 int r;
445282db
DA		 951
952 if (!radeon_connector->dac_load_detect)
953 return ret;
4ce001ab 954
10ebc0bc
DA		 955 r = pm_runtime_get_sync(connector->dev->dev);
956 if (r < 0)
957 return connector_status_disconnected;
958
4ce001ab
DA		 959 encoder = radeon_best_single_encoder(connector);
960 if (!encoder)
961 ret = connector_status_disconnected;
962 else {
963 encoder_funcs = encoder->helper_private;
964 ret = encoder_funcs->detect(encoder, connector);
965 }
966 if (ret == connector_status_connected)
967 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
968 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 969 pm_runtime_mark_last_busy(connector->dev->dev);
970 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA		 971 return ret;
972}
973
1109ca09 974static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA		 975 .get_modes = radeon_tv_get_modes,
976 .mode_valid = radeon_tv_mode_valid,
977 .best_encoder = radeon_best_single_encoder,
978};
979
1109ca09 980static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA		 981 .dpms = drm_helper_connector_dpms,
982 .detect = radeon_tv_detect,
983 .fill_modes = drm_helper_probe_single_connector_modes,
984 .destroy = radeon_connector_destroy,
985 .set_property = radeon_connector_set_property,
986};
987
771fe6b9
JG		 988static int radeon_dvi_get_modes(struct drm_connector *connector)
989{
990 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
991 int ret;
992
993 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG		 994 return ret;
995}
996
11fe1266
TU		 997static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
998{
999 struct drm_device *dev = connector->dev;
1000 struct radeon_device *rdev = dev->dev_private;
1001 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1002 enum drm_connector_status status;
1003
1004 /* We only trust HPD on R600 and newer ASICS. */
1005 if (rdev->family >= CHIP_R600
1006 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1007 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1008 status = connector_status_connected;
1009 else
1010 status = connector_status_disconnected;
1011 if (connector->status == status)
1012 return true;
1013 }
1014
1015 return false;
1016}
1017
4ce001ab
DA		 1018/*
1019 * DVI is complicated
1020 * Do a DDC probe, if DDC probe passes, get the full EDID so
1021 * we can do analog/digital monitor detection at this point.
1022 * If the monitor is an analog monitor or we got no DDC,
1023 * we need to find the DAC encoder object for this connector.
1024 * If we got no DDC, we do load detection on the DAC encoder object.
1025 * If we got analog DDC or load detection passes on the DAC encoder
1026 * we have to check if this analog encoder is shared with anyone else (TV)
1027 * if its shared we have to set the other connector to disconnected.
1028 */
7b334fcb 1029static enum drm_connector_status
930a9e28 1030radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1031{
fafcf94e
AD		 1032 struct drm_device *dev = connector->dev;
1033 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1034 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1035 struct drm_encoder *encoder = NULL;
771fe6b9 1036 struct drm_encoder_helper_funcs *encoder_funcs;
10ebc0bc 1037 int i, r;
771fe6b9 1038 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1039 bool dret = false, broken_edid = false;
771fe6b9 1040
10ebc0bc
DA		 1041 r = pm_runtime_get_sync(connector->dev->dev);
1042 if (r < 0)
1043 return connector_status_disconnected;
1044
1045 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1046 ret = connector->status;
1047 goto exit;
1048 }
11fe1266 1049
eb6b6d7c 1050 if (radeon_connector->ddc_bus)
0a9069d3 1051 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1052 if (dret) {
d0d0a225 1053 radeon_connector->detected_by_load = false;
0294cf4f
AD		 1054 if (radeon_connector->edid) {
1055 kfree(radeon_connector->edid);
1056 radeon_connector->edid = NULL;
1057 }
4ce001ab 1058 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA		 1059
1060 if (!radeon_connector->edid) {
f82f5f3a 1061 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1062 connector->name);
4a9a8b71
DA		 1063 /* rs690 seems to have a problem with connectors not existing and always
1064 * return a block of 0's. If we see this just stop polling on this output */
1065 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
1066 ret = connector_status_disconnected;
72082093
JN		 1067 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1068 connector->name);
4a9a8b71 1069 radeon_connector->ddc_bus = NULL;
fc87f13b
EE		 1070 } else {
1071 ret = connector_status_connected;
1072 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1073 }
4ce001ab
DA		 1074 } else {
1075 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1076
0294cf4f
AD		 1077 /* some oems have boards with separate digital and analog connectors
1078 * with a shared ddc line (often vga + hdmi)
1079 */
1080 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
1081 kfree(radeon_connector->edid);
1082 radeon_connector->edid = NULL;
1083 ret = connector_status_disconnected;
1084 } else
1085 ret = connector_status_connected;
71407c46 1086
42f14c4b
AD		 1087 /* This gets complicated. We have boards with VGA + HDMI with a
1088 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1089 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1090 * you don't really know what's connected to which port as both are digital.
71407c46 1091 */
d3932d6c 1092 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 1093 struct drm_connector *list_connector;
1094 struct radeon_connector *list_radeon_connector;
1095 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1096 if (connector == list_connector)
1097 continue;
1098 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 1099 if (list_radeon_connector->shared_ddc &&
1100 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1101 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 1102 /* cases where both connectors are digital */
1103 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1104 /* hpd is our only option in this case */
1105 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD		 1106 kfree(radeon_connector->edid);
1107 radeon_connector->edid = NULL;
1108 ret = connector_status_disconnected;
1109 }
1110 }
1111 }
1112 }
1113 }
4ce001ab
DA		 1114 }
1115 }
1116
1117 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1118 goto out;
1119
5f0a2612
AD		 1120 /* DVI-D and HDMI-A are digital only */
1121 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1122 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1123 goto out;
1124
d0d0a225 1125 /* if we aren't forcing don't do destructive polling */
c3cceedd 1126 if (!force) {
d0d0a225
AD		 1127 /* only return the previous status if we last
1128 * detected a monitor via load.
1129 */
1130 if (radeon_connector->detected_by_load)
1131 ret = connector->status;
c3cceedd
DA		 1132 goto out;
1133 }
1134
4ce001ab 1135 /* find analog encoder */
445282db
DA		 1136 if (radeon_connector->dac_load_detect) {
1137 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1138 if (connector->encoder_ids[i] == 0)
1139 break;
771fe6b9 1140
b957f457
RC		 1141 encoder = drm_encoder_find(connector->dev,
1142 connector->encoder_ids[i]);
1143 if (!encoder)
445282db 1144 continue;
771fe6b9 1145
e3632507 1146 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD		 1147 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1148 continue;
1149
445282db
DA		 1150 encoder_funcs = encoder->helper_private;
1151 if (encoder_funcs->detect) {
fc87f13b
EE		 1152 if (!broken_edid) {
1153 if (ret != connector_status_connected) {
1154 /* deal with analog monitors without DDC */
1155 ret = encoder_funcs->detect(encoder, connector);
1156 if (ret == connector_status_connected) {
1157 radeon_connector->use_digital = false;
1158 }
1159 if (ret != connector_status_disconnected)
1160 radeon_connector->detected_by_load = true;
445282db 1161 }
fc87f13b
EE		 1162 } else {
1163 enum drm_connector_status lret;
1164 /* assume digital unless load detected otherwise */
1165 radeon_connector->use_digital = true;
1166 lret = encoder_funcs->detect(encoder, connector);
1167 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1168 if (lret == connector_status_connected)
1169 radeon_connector->use_digital = false;
771fe6b9 1170 }
445282db 1171 break;
771fe6b9
JG		 1172 }
1173 }
1174 }
1175
4ce001ab
DA		 1176 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1177 encoder) {
1178 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1179 }
1180
fafcf94e
AD		 1181 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1182 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1183 * by other means, assume the DFP is connected and use that EDID. In most
1184 * cases the DVI port is actually a virtual KVM port connected to the service
1185 * processor.
1186 */
a09d431f 1187out:
fafcf94e
AD		 1188 if ((!rdev->is_atom_bios) &&
1189 (ret == connector_status_disconnected) &&
1190 rdev->mode_info.bios_hardcoded_edid_size) {
1191 radeon_connector->use_digital = true;
1192 ret = connector_status_connected;
1193 }
1194
771fe6b9
JG		 1195 /* updated in get modes as well since we need to know if it's analog or digital */
1196 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1197
1198exit:
1199 pm_runtime_mark_last_busy(connector->dev->dev);
1200 pm_runtime_put_autosuspend(connector->dev->dev);
1201
771fe6b9
JG		 1202 return ret;
1203}
1204
1205/* okay need to be smart in here about which encoder to pick */
1109ca09 1206static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG		 1207{
1208 int enc_id = connector->encoder_ids[0];
1209 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
771fe6b9
JG		 1210 struct drm_encoder *encoder;
1211 int i;
1212 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1213 if (connector->encoder_ids[i] == 0)
1214 break;
1215
b957f457
RC		 1216 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1217 if (!encoder)
771fe6b9
JG		 1218 continue;
1219
4ce001ab 1220 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1221 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1222 return encoder;
1223 } else {
1224 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1225 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1226 return encoder;
1227 }
1228 }
1229
1230 /* see if we have a default encoder TODO */
1231
1232 /* then check use digitial */
1233 /* pick the first one */
b957f457
RC		 1234 if (enc_id)
1235 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 1236 return NULL;
1237}
1238
d50ba256
DA		 1239static void radeon_dvi_force(struct drm_connector *connector)
1240{
1241 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1242 if (connector->force == DRM_FORCE_ON)
1243 radeon_connector->use_digital = false;
1244 if (connector->force == DRM_FORCE_ON_DIGITAL)
1245 radeon_connector->use_digital = true;
1246}
1247
a3fa6320
AD		 1248static int radeon_dvi_mode_valid(struct drm_connector *connector,
1249 struct drm_display_mode *mode)
1250{
1b24203e
AD		 1251 struct drm_device *dev = connector->dev;
1252 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1253 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1254
1255 /* XXX check mode bandwidth */
1256
1b24203e
AD		 1257 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1258 if (radeon_connector->use_digital &&
1259 (rdev->family == CHIP_RV100) &&
1260 (mode->clock > 135000))
1261 return MODE_CLOCK_HIGH;
1262
a3fa6320
AD		 1263 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1264 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1265 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1266 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1267 return MODE_OK;
f2263fc7
AD		 1268 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
1269 /* HDMI 1.3+ supports max clock of 340 Mhz */
1270 if (mode->clock > 340000)
e1e84017 1271 return MODE_CLOCK_HIGH;
f2263fc7
AD		 1272 else
1273 return MODE_OK;
1274 } else {
a3fa6320 1275 return MODE_CLOCK_HIGH;
f2263fc7 1276 }
a3fa6320 1277 }
b20f9bef
AD		 1278
1279 /* check against the max pixel clock */
1280 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1281 return MODE_CLOCK_HIGH;
1282
a3fa6320
AD		 1283 return MODE_OK;
1284}
1285
1109ca09 1286static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
771fe6b9 1287 .get_modes = radeon_dvi_get_modes,
a3fa6320 1288 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1289 .best_encoder = radeon_dvi_encoder,
1290};
1291
1109ca09 1292static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG		 1293 .dpms = drm_helper_connector_dpms,
1294 .detect = radeon_dvi_detect,
1295 .fill_modes = drm_helper_probe_single_connector_modes,
1296 .set_property = radeon_connector_set_property,
1297 .destroy = radeon_connector_destroy,
d50ba256 1298 .force = radeon_dvi_force,
771fe6b9
JG		 1299};
1300
746c1aa4
DA		 1301static int radeon_dp_get_modes(struct drm_connector *connector)
1302{
1303 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1304 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1305 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1306 int ret;
1307
f89931f3
AD		 1308 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1309 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1310 struct drm_display_mode *mode;
1311
2b69ffb9
AD		 1312 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1313 if (!radeon_dig_connector->edp_on)
1314 atombios_set_edp_panel_power(connector,
1315 ATOM_TRANSMITTER_ACTION_POWER_ON);
1316 ret = radeon_ddc_get_modes(radeon_connector);
1317 if (!radeon_dig_connector->edp_on)
1318 atombios_set_edp_panel_power(connector,
1319 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1320 } else {
1321 /* need to setup ddc on the bridge */
1322 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1323 ENCODER_OBJECT_ID_NONE) {
1324 if (encoder)
1325 radeon_atom_ext_encoder_setup_ddc(encoder);
1326 }
1327 ret = radeon_ddc_get_modes(radeon_connector);
1328 }
d291767b
AD		 1329
1330 if (ret > 0) {
d291767b
AD		 1331 if (encoder) {
1332 radeon_fixup_lvds_native_mode(encoder, connector);
1333 /* add scaled modes */
1334 radeon_add_common_modes(encoder, connector);
1335 }
1336 return ret;
1337 }
1338
d291767b
AD		 1339 if (!encoder)
1340 return 0;
1341
1342 /* we have no EDID modes */
1343 mode = radeon_fp_native_mode(encoder);
1344 if (mode) {
1345 ret = 1;
1346 drm_mode_probed_add(connector, mode);
1347 /* add the width/height from vbios tables if available */
1348 connector->display_info.width_mm = mode->width_mm;
1349 connector->display_info.height_mm = mode->height_mm;
1350 /* add scaled modes */
1351 radeon_add_common_modes(encoder, connector);
1352 }
591a10e1
AD		 1353 } else {
1354 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1355 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1356 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1357 if (encoder)
1358 radeon_atom_ext_encoder_setup_ddc(encoder);
1359 }
d291767b 1360 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1361 }
8b834852 1362
746c1aa4
DA		 1363 return ret;
1364}
1365
1d33e1fc 1366u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3 1367{
d7fa8bb3
AD		 1368 struct drm_encoder *encoder;
1369 struct radeon_encoder *radeon_encoder;
1370 int i;
d7fa8bb3
AD		 1371
1372 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1373 if (connector->encoder_ids[i] == 0)
1374 break;
1375
b957f457
RC		 1376 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1377 if (!encoder)
d7fa8bb3
AD		 1378 continue;
1379
d7fa8bb3
AD		 1380 radeon_encoder = to_radeon_encoder(encoder);
1381
1382 switch (radeon_encoder->encoder_id) {
1383 case ENCODER_OBJECT_ID_TRAVIS:
1384 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1385 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1386 default:
1387 break;
1388 }
1389 }
1390
1d33e1fc 1391 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1392}
1393
1394bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1395{
d7fa8bb3
AD		 1396 struct drm_encoder *encoder;
1397 struct radeon_encoder *radeon_encoder;
1398 int i;
1399 bool found = false;
1400
1401 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1402 if (connector->encoder_ids[i] == 0)
1403 break;
1404
b957f457
RC		 1405 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1406 if (!encoder)
d7fa8bb3
AD		 1407 continue;
1408
d7fa8bb3
AD		 1409 radeon_encoder = to_radeon_encoder(encoder);
1410 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1411 found = true;
1412 }
1413
1414 return found;
1415}
1416
1417bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1418{
1419 struct drm_device *dev = connector->dev;
1420 struct radeon_device *rdev = dev->dev_private;
1421
1422 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1423 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD		 1424 radeon_connector_encoder_is_hbr2(connector)) {
1425 return true;
1426 }
1427
1428 return false;
1429}
1430
7b334fcb 1431static enum drm_connector_status
930a9e28 1432radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1433{
f8d0edde
AD		 1434 struct drm_device *dev = connector->dev;
1435 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1436 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1437 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1438 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1439 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1440 int r;
746c1aa4 1441
10ebc0bc
DA		 1442 r = pm_runtime_get_sync(connector->dev->dev);
1443 if (r < 0)
1444 return connector_status_disconnected;
1445
1446 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1447 ret = connector->status;
1448 goto out;
1449 }
11fe1266 1450
746c1aa4
DA		 1451 if (radeon_connector->edid) {
1452 kfree(radeon_connector->edid);
1453 radeon_connector->edid = NULL;
1454 }
1455
f89931f3
AD		 1456 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1457 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1458 if (encoder) {
1459 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1460 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1461
1462 /* check if panel is valid */
1463 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1464 ret = connector_status_connected;
1465 }
6f50eae7
AD		 1466 /* eDP is always DP */
1467 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1468 if (!radeon_dig_connector->edp_on)
1469 atombios_set_edp_panel_power(connector,
1470 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1471 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1472 ret = connector_status_connected;
8b834852
AD		 1473 if (!radeon_dig_connector->edp_on)
1474 atombios_set_edp_panel_power(connector,
1475 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1476 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1477 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1478 /* DP bridges are always DP */
1479 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1480 /* get the DPCD from the bridge */
1481 radeon_dp_getdpcd(radeon_connector);
1482
6777a4f6
AD		 1483 if (encoder) {
1484 /* setup ddc on the bridge */
1485 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS		 1486 /* bridge chips are always aux */
1487 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1488 ret = connector_status_connected;
6777a4f6
AD		 1489 else if (radeon_connector->dac_load_detect) { /* try load detection */
1490 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1491 ret = encoder_funcs->detect(encoder, connector);
1492 }
591a10e1 1493 }
b06947b5 1494 } else {
6f50eae7 1495 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1496 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1497 ret = connector_status_connected;
1498 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1499 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1500 } else {
f8d0edde
AD		 1501 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1502 if (radeon_dp_getdpcd(radeon_connector))
1503 ret = connector_status_connected;
1504 } else {
d592fca9 1505 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1506 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD		 1507 ret = connector_status_connected;
1508 }
4143e919 1509 }
746c1aa4 1510 }
4143e919 1511
30f44372 1512 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1513out:
1514 pm_runtime_mark_last_busy(connector->dev->dev);
1515 pm_runtime_put_autosuspend(connector->dev->dev);
1516
746c1aa4
DA		 1517 return ret;
1518}
1519
5801ead6
AD		 1520static int radeon_dp_mode_valid(struct drm_connector *connector,
1521 struct drm_display_mode *mode)
1522{
6536a3a6
AD		 1523 struct drm_device *dev = connector->dev;
1524 struct radeon_device *rdev = dev->dev_private;
5801ead6
AD		 1525 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1526 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1527
1528 /* XXX check mode bandwidth */
1529
f89931f3
AD		 1530 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1531 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1532 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1533
1534 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1535 return MODE_PANEL;
1536
1537 if (encoder) {
1538 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1539 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1540
f89931f3 1541 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1542 * to the panel size, but I'm not sure this is desirable.
1543 */
1544 if ((mode->hdisplay > native_mode->hdisplay) ||
1545 (mode->vdisplay > native_mode->vdisplay))
1546 return MODE_PANEL;
1547
1548 /* if scaling is disabled, block non-native modes */
1549 if (radeon_encoder->rmx_type == RMX_OFF) {
1550 if ((mode->hdisplay != native_mode->hdisplay) ||
1551 (mode->vdisplay != native_mode->vdisplay))
1552 return MODE_PANEL;
1553 }
1554 }
d291767b
AD		 1555 } else {
1556 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
6536a3a6 1557 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
d291767b 1558 return radeon_dp_mode_valid_helper(connector, mode);
6536a3a6
AD		 1559 } else {
1560 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
1561 /* HDMI 1.3+ supports max clock of 340 Mhz */
1562 if (mode->clock > 340000)
1563 return MODE_CLOCK_HIGH;
1564 } else {
1565 if (mode->clock > 165000)
1566 return MODE_CLOCK_HIGH;
1567 }
1568 }
d291767b 1569 }
6536a3a6
AD		 1570
1571 return MODE_OK;
5801ead6
AD		 1572}
1573
1109ca09 1574static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1575 .get_modes = radeon_dp_get_modes,
5801ead6 1576 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1577 .best_encoder = radeon_dvi_encoder,
1578};
1579
1109ca09 1580static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA		 1581 .dpms = drm_helper_connector_dpms,
1582 .detect = radeon_dp_detect,
1583 .fill_modes = drm_helper_probe_single_connector_modes,
1584 .set_property = radeon_connector_set_property,
379dfc25 1585 .destroy = radeon_connector_destroy,
746c1aa4
DA		 1586 .force = radeon_dvi_force,
1587};
1588
855f5f1d
AD		 1589static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1590 .dpms = drm_helper_connector_dpms,
1591 .detect = radeon_dp_detect,
1592 .fill_modes = drm_helper_probe_single_connector_modes,
1593 .set_property = radeon_lvds_set_property,
379dfc25 1594 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1595 .force = radeon_dvi_force,
1596};
1597
1598static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1599 .dpms = drm_helper_connector_dpms,
1600 .detect = radeon_dp_detect,
1601 .fill_modes = drm_helper_probe_single_connector_modes,
1602 .set_property = radeon_lvds_set_property,
379dfc25 1603 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1604 .force = radeon_dvi_force,
1605};
1606
771fe6b9
JG		 1607void
1608radeon_add_atom_connector(struct drm_device *dev,
1609 uint32_t connector_id,
1610 uint32_t supported_device,
1611 int connector_type,
1612 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1613 uint32_t igp_lane_info,
eed45b30 1614 uint16_t connector_object_id,
26b5bc98
AD		 1615 struct radeon_hpd *hpd,
1616 struct radeon_router *router)
771fe6b9 1617{
445282db 1618 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1619 struct drm_connector *connector;
1620 struct radeon_connector *radeon_connector;
1621 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1622 struct drm_encoder *encoder;
1623 struct radeon_encoder *radeon_encoder;
771fe6b9 1624 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1625 bool shared_ddc = false;
eac4dff6 1626 bool is_dp_bridge = false;
496263bf 1627 bool has_aux = false;
771fe6b9 1628
4ce001ab 1629 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1630 return;
1631
cf4c12f9
AD		 1632 /* if the user selected tv=0 don't try and add the connector */
1633 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1634 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1635 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1636 (radeon_tv == 0))
1637 return;
1638
771fe6b9
JG		 1639 /* see if we already added it */
1640 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1641 radeon_connector = to_radeon_connector(connector);
1642 if (radeon_connector->connector_id == connector_id) {
1643 radeon_connector->devices |= supported_device;
1644 return;
1645 }
0294cf4f 1646 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1647 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1648 radeon_connector->shared_ddc = true;
1649 shared_ddc = true;
1650 }
fb939dfc 1651 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1652 (radeon_connector->router.router_id == router->router_id)) {
1653 radeon_connector->shared_ddc = false;
1654 shared_ddc = false;
1655 }
0294cf4f 1656 }
771fe6b9
JG		 1657 }
1658
eac4dff6
AD		 1659 /* check if it's a dp bridge */
1660 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1661 radeon_encoder = to_radeon_encoder(encoder);
1662 if (radeon_encoder->devices & supported_device) {
1663 switch (radeon_encoder->encoder_id) {
1664 case ENCODER_OBJECT_ID_TRAVIS:
1665 case ENCODER_OBJECT_ID_NUTMEG:
1666 is_dp_bridge = true;
1667 break;
1668 default:
1669 break;
1670 }
1671 }
1672 }
1673
771fe6b9
JG		 1674 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1675 if (!radeon_connector)
1676 return;
1677
1678 connector = &radeon_connector->base;
1679
1680 radeon_connector->connector_id = connector_id;
1681 radeon_connector->devices = supported_device;
0294cf4f 1682 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1683 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1684 radeon_connector->hpd = *hpd;
bc1c4dc3 1685
26b5bc98 1686 radeon_connector->router = *router;
fb939dfc 1687 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1688 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1689 if (!radeon_connector->router_bus)
a70882aa 1690 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1691 }
eac4dff6
AD		 1692
1693 if (is_dp_bridge) {
771fe6b9
JG		 1694 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1695 if (!radeon_dig_connector)
1696 goto failed;
771fe6b9
JG		 1697 radeon_dig_connector->igp_lane_info = igp_lane_info;
1698 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1699 if (i2c_bus->valid) {
379dfc25
AD		 1700 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1701 if (radeon_connector->ddc_bus)
496263bf
AD		 1702 has_aux = true;
1703 else
eac4dff6 1704 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1705 }
eac4dff6
AD		 1706 switch (connector_type) {
1707 case DRM_MODE_CONNECTOR_VGA:
1708 case DRM_MODE_CONNECTOR_DVIA:
1709 default:
855f5f1d
AD		 1710 drm_connector_init(dev, &radeon_connector->base,
1711 &radeon_dp_connector_funcs, connector_type);
1712 drm_connector_helper_add(&radeon_connector->base,
1713 &radeon_dp_connector_helper_funcs);
eac4dff6
AD		 1714 connector->interlace_allowed = true;
1715 connector->doublescan_allowed = true;
d629a3ce 1716 radeon_connector->dac_load_detect = true;
e35755fa 1717 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1718 rdev->mode_info.load_detect_property,
1719 1);
eac4dff6
AD		 1720 break;
1721 case DRM_MODE_CONNECTOR_DVII:
1722 case DRM_MODE_CONNECTOR_DVID:
1723 case DRM_MODE_CONNECTOR_HDMIA:
1724 case DRM_MODE_CONNECTOR_HDMIB:
1725 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD		 1726 drm_connector_init(dev, &radeon_connector->base,
1727 &radeon_dp_connector_funcs, connector_type);
1728 drm_connector_helper_add(&radeon_connector->base,
1729 &radeon_dp_connector_helper_funcs);
e35755fa 1730 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1731 rdev->mode_info.underscan_property,
56bec7c0 1732 UNDERSCAN_OFF);
e35755fa 1733 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1734 rdev->mode_info.underscan_hborder_property,
1735 0);
e35755fa 1736 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1737 rdev->mode_info.underscan_vborder_property,
1738 0);
91915260 1739
6214bb74
AD		 1740 drm_object_attach_property(&radeon_connector->base.base,
1741 rdev->mode_info.dither_property,
1742 RADEON_FMT_DITHER_DISABLE);
91915260 1743
108dc8e8
AD		 1744 if (radeon_audio != 0)
1745 drm_object_attach_property(&radeon_connector->base.base,
1746 rdev->mode_info.audio_property,
e31fadd3 1747 RADEON_AUDIO_AUTO);
91915260 1748
eac4dff6
AD		 1749 subpixel_order = SubPixelHorizontalRGB;
1750 connector->interlace_allowed = true;
1751 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1752 connector->doublescan_allowed = true;
1753 else
1754 connector->doublescan_allowed = false;
d629a3ce
AD		 1755 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1756 radeon_connector->dac_load_detect = true;
e35755fa 1757 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1758 rdev->mode_info.load_detect_property,
1759 1);
1760 }
eac4dff6
AD		 1761 break;
1762 case DRM_MODE_CONNECTOR_LVDS:
1763 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD		 1764 drm_connector_init(dev, &radeon_connector->base,
1765 &radeon_lvds_bridge_connector_funcs, connector_type);
1766 drm_connector_helper_add(&radeon_connector->base,
1767 &radeon_dp_connector_helper_funcs);
e35755fa 1768 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1769 dev->mode_config.scaling_mode_property,
1770 DRM_MODE_SCALE_FULLSCREEN);
1771 subpixel_order = SubPixelHorizontalRGB;
1772 connector->interlace_allowed = false;
1773 connector->doublescan_allowed = false;
1774 break;
5bccf5e3 1775 }
eac4dff6
AD		 1776 } else {
1777 switch (connector_type) {
1778 case DRM_MODE_CONNECTOR_VGA:
1779 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1780 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1781 if (i2c_bus->valid) {
1782 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1783 if (!radeon_connector->ddc_bus)
1784 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1785 }
390d0bbe 1786 radeon_connector->dac_load_detect = true;
e35755fa 1787 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD		 1788 rdev->mode_info.load_detect_property,
1789 1);
eac4dff6
AD		 1790 /* no HPD on analog connectors */
1791 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1792 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1793 connector->interlace_allowed = true;
c49948f4 1794 connector->doublescan_allowed = true;
eac4dff6
AD		 1795 break;
1796 case DRM_MODE_CONNECTOR_DVIA:
1797 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1798 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1799 if (i2c_bus->valid) {
1800 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1801 if (!radeon_connector->ddc_bus)
1802 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1803 }
1804 radeon_connector->dac_load_detect = true;
e35755fa 1805 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1806 rdev->mode_info.load_detect_property,
1807 1);
1808 /* no HPD on analog connectors */
1809 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1810 connector->interlace_allowed = true;
1811 connector->doublescan_allowed = true;
1812 break;
1813 case DRM_MODE_CONNECTOR_DVII:
1814 case DRM_MODE_CONNECTOR_DVID:
1815 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1816 if (!radeon_dig_connector)
1817 goto failed;
1818 radeon_dig_connector->igp_lane_info = igp_lane_info;
1819 radeon_connector->con_priv = radeon_dig_connector;
1820 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1821 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1822 if (i2c_bus->valid) {
1823 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1824 if (!radeon_connector->ddc_bus)
1825 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1826 }
1827 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1828 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1829 rdev->mode_info.coherent_mode_property,
1830 1);
1831 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1832 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1833 rdev->mode_info.underscan_property,
1834 UNDERSCAN_OFF);
e35755fa 1835 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1836 rdev->mode_info.underscan_hborder_property,
1837 0);
e35755fa 1838 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1839 rdev->mode_info.underscan_vborder_property,
1840 0);
1841 }
108dc8e8 1842 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1843 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1844 rdev->mode_info.audio_property,
e31fadd3 1845 RADEON_AUDIO_AUTO);
8666c076 1846 }
6214bb74
AD		 1847 if (ASIC_IS_AVIVO(rdev)) {
1848 drm_object_attach_property(&radeon_connector->base.base,
1849 rdev->mode_info.dither_property,
1850 RADEON_FMT_DITHER_DISABLE);
1851 }
eac4dff6
AD		 1852 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1853 radeon_connector->dac_load_detect = true;
e35755fa 1854 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1855 rdev->mode_info.load_detect_property,
1856 1);
1857 }
1858 connector->interlace_allowed = true;
1859 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1860 connector->doublescan_allowed = true;
1861 else
1862 connector->doublescan_allowed = false;
1863 break;
1864 case DRM_MODE_CONNECTOR_HDMIA:
1865 case DRM_MODE_CONNECTOR_HDMIB:
1866 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1867 if (!radeon_dig_connector)
1868 goto failed;
1869 radeon_dig_connector->igp_lane_info = igp_lane_info;
1870 radeon_connector->con_priv = radeon_dig_connector;
1871 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1872 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1873 if (i2c_bus->valid) {
1874 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1875 if (!radeon_connector->ddc_bus)
1876 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1877 }
e35755fa 1878 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1879 rdev->mode_info.coherent_mode_property,
1880 1);
1881 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1882 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1883 rdev->mode_info.underscan_property,
1884 UNDERSCAN_OFF);
e35755fa 1885 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1886 rdev->mode_info.underscan_hborder_property,
1887 0);
e35755fa 1888 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1889 rdev->mode_info.underscan_vborder_property,
1890 0);
1891 }
108dc8e8 1892 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1893 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1894 rdev->mode_info.audio_property,
e31fadd3 1895 RADEON_AUDIO_AUTO);
8666c076 1896 }
6214bb74
AD		 1897 if (ASIC_IS_AVIVO(rdev)) {
1898 drm_object_attach_property(&radeon_connector->base.base,
1899 rdev->mode_info.dither_property,
1900 RADEON_FMT_DITHER_DISABLE);
1901 }
eac4dff6
AD		 1902 subpixel_order = SubPixelHorizontalRGB;
1903 connector->interlace_allowed = true;
1904 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1905 connector->doublescan_allowed = true;
1906 else
1907 connector->doublescan_allowed = false;
1908 break;
1909 case DRM_MODE_CONNECTOR_DisplayPort:
1910 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1911 if (!radeon_dig_connector)
1912 goto failed;
1913 radeon_dig_connector->igp_lane_info = igp_lane_info;
1914 radeon_connector->con_priv = radeon_dig_connector;
1915 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1916 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1917 if (i2c_bus->valid) {
eac4dff6 1918 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD		 1919 if (radeon_connector->ddc_bus)
1920 has_aux = true;
1921 else
eac4dff6
AD		 1922 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1923 }
1924 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1925 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1926 rdev->mode_info.coherent_mode_property,
1927 1);
1928 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1929 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1930 rdev->mode_info.underscan_property,
1931 UNDERSCAN_OFF);
e35755fa 1932 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1933 rdev->mode_info.underscan_hborder_property,
1934 0);
e35755fa 1935 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1936 rdev->mode_info.underscan_vborder_property,
1937 0);
1938 }
108dc8e8 1939 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1940 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1941 rdev->mode_info.audio_property,
e31fadd3 1942 RADEON_AUDIO_AUTO);
8666c076 1943 }
6214bb74
AD		 1944 if (ASIC_IS_AVIVO(rdev)) {
1945 drm_object_attach_property(&radeon_connector->base.base,
1946 rdev->mode_info.dither_property,
1947 RADEON_FMT_DITHER_DISABLE);
91915260 1948
6214bb74 1949 }
eac4dff6
AD		 1950 connector->interlace_allowed = true;
1951 /* in theory with a DP to VGA converter... */
c49948f4 1952 connector->doublescan_allowed = false;
eac4dff6
AD		 1953 break;
1954 case DRM_MODE_CONNECTOR_eDP:
1955 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1956 if (!radeon_dig_connector)
1957 goto failed;
1958 radeon_dig_connector->igp_lane_info = igp_lane_info;
1959 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 1960 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD		 1961 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1962 if (i2c_bus->valid) {
379dfc25
AD		 1963 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1964 if (radeon_connector->ddc_bus)
496263bf
AD		 1965 has_aux = true;
1966 else
eac4dff6
AD		 1967 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1968 }
e35755fa 1969 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1970 dev->mode_config.scaling_mode_property,
1971 DRM_MODE_SCALE_FULLSCREEN);
1972 subpixel_order = SubPixelHorizontalRGB;
1973 connector->interlace_allowed = false;
1974 connector->doublescan_allowed = false;
1975 break;
1976 case DRM_MODE_CONNECTOR_SVIDEO:
1977 case DRM_MODE_CONNECTOR_Composite:
1978 case DRM_MODE_CONNECTOR_9PinDIN:
1979 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1980 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1981 radeon_connector->dac_load_detect = true;
e35755fa 1982 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1983 rdev->mode_info.load_detect_property,
1984 1);
e35755fa 1985 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1986 rdev->mode_info.tv_std_property,
1987 radeon_atombios_get_tv_info(rdev));
1988 /* no HPD on analog connectors */
1989 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1990 connector->interlace_allowed = false;
1991 connector->doublescan_allowed = false;
1992 break;
1993 case DRM_MODE_CONNECTOR_LVDS:
1994 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1995 if (!radeon_dig_connector)
1996 goto failed;
1997 radeon_dig_connector->igp_lane_info = igp_lane_info;
1998 radeon_connector->con_priv = radeon_dig_connector;
1999 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2000 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2001 if (i2c_bus->valid) {
2002 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2003 if (!radeon_connector->ddc_bus)
2004 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2005 }
e35755fa 2006 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2007 dev->mode_config.scaling_mode_property,
2008 DRM_MODE_SCALE_FULLSCREEN);
2009 subpixel_order = SubPixelHorizontalRGB;
2010 connector->interlace_allowed = false;
2011 connector->doublescan_allowed = false;
2012 break;
771fe6b9 2013 }
771fe6b9
JG		 2014 }
2015
2581afcc 2016 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2017 if (i2c_bus->valid)
2018 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2019 } else
2020 connector->polled = DRM_CONNECTOR_POLL_HPD;
2021
771fe6b9 2022 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2023 drm_connector_register(connector);
496263bf
AD		 2024
2025 if (has_aux)
2026 radeon_dp_aux_init(radeon_connector);
2027
771fe6b9
JG		 2028 return;
2029
2030failed:
771fe6b9
JG		 2031 drm_connector_cleanup(connector);
2032 kfree(connector);
2033}
2034
2035void
2036radeon_add_legacy_connector(struct drm_device *dev,
2037 uint32_t connector_id,
2038 uint32_t supported_device,
2039 int connector_type,
b75fad06 2040 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 2041 uint16_t connector_object_id,
2042 struct radeon_hpd *hpd)
771fe6b9 2043{
445282db 2044 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 2045 struct drm_connector *connector;
2046 struct radeon_connector *radeon_connector;
2047 uint32_t subpixel_order = SubPixelNone;
2048
4ce001ab 2049 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 2050 return;
2051
cf4c12f9
AD		 2052 /* if the user selected tv=0 don't try and add the connector */
2053 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2054 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2055 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2056 (radeon_tv == 0))
2057 return;
2058
771fe6b9
JG		 2059 /* see if we already added it */
2060 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2061 radeon_connector = to_radeon_connector(connector);
2062 if (radeon_connector->connector_id == connector_id) {
2063 radeon_connector->devices |= supported_device;
2064 return;
2065 }
2066 }
2067
2068 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2069 if (!radeon_connector)
2070 return;
2071
2072 connector = &radeon_connector->base;
2073
2074 radeon_connector->connector_id = connector_id;
2075 radeon_connector->devices = supported_device;
b75fad06 2076 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2077 radeon_connector->hpd = *hpd;
bc1c4dc3 2078
771fe6b9
JG		 2079 switch (connector_type) {
2080 case DRM_MODE_CONNECTOR_VGA:
2081 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2082 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2083 if (i2c_bus->valid) {
f376b94f 2084 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2085 if (!radeon_connector->ddc_bus)
a70882aa 2086 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2087 }
35e4b7af 2088 radeon_connector->dac_load_detect = true;
e35755fa 2089 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2090 rdev->mode_info.load_detect_property,
2091 1);
2581afcc
AD		 2092 /* no HPD on analog connectors */
2093 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2094 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 2095 connector->interlace_allowed = true;
2096 connector->doublescan_allowed = true;
771fe6b9
JG		 2097 break;
2098 case DRM_MODE_CONNECTOR_DVIA:
2099 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2100 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2101 if (i2c_bus->valid) {
f376b94f 2102 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2103 if (!radeon_connector->ddc_bus)
a70882aa 2104 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2105 }
35e4b7af 2106 radeon_connector->dac_load_detect = true;
e35755fa 2107 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2108 rdev->mode_info.load_detect_property,
2109 1);
2581afcc
AD		 2110 /* no HPD on analog connectors */
2111 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2112 connector->interlace_allowed = true;
2113 connector->doublescan_allowed = true;
771fe6b9
JG		 2114 break;
2115 case DRM_MODE_CONNECTOR_DVII:
2116 case DRM_MODE_CONNECTOR_DVID:
2117 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2118 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2119 if (i2c_bus->valid) {
f376b94f 2120 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2121 if (!radeon_connector->ddc_bus)
a70882aa 2122 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 2123 }
2124 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2125 radeon_connector->dac_load_detect = true;
e35755fa 2126 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2127 rdev->mode_info.load_detect_property,
2128 1);
771fe6b9
JG		 2129 }
2130 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2131 connector->interlace_allowed = true;
2132 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2133 connector->doublescan_allowed = true;
2134 else
2135 connector->doublescan_allowed = false;
771fe6b9
JG		 2136 break;
2137 case DRM_MODE_CONNECTOR_SVIDEO:
2138 case DRM_MODE_CONNECTOR_Composite:
2139 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 2140 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2141 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2142 radeon_connector->dac_load_detect = true;
2143 /* RS400,RC410,RS480 chipset seems to report a lot
2144 * of false positive on load detect, we haven't yet
2145 * found a way to make load detect reliable on those
2146 * chipset, thus just disable it for TV.
2147 */
2148 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2149 radeon_connector->dac_load_detect = false;
e35755fa 2150 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2151 rdev->mode_info.load_detect_property,
2152 radeon_connector->dac_load_detect);
e35755fa 2153 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2154 rdev->mode_info.tv_std_property,
2155 radeon_combios_get_tv_info(rdev));
2156 /* no HPD on analog connectors */
2157 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2158 connector->interlace_allowed = false;
2159 connector->doublescan_allowed = false;
771fe6b9
JG		 2160 break;
2161 case DRM_MODE_CONNECTOR_LVDS:
2162 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2163 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2164 if (i2c_bus->valid) {
f376b94f 2165 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2166 if (!radeon_connector->ddc_bus)
a70882aa 2167 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2168 }
e35755fa 2169 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2170 dev->mode_config.scaling_mode_property,
2171 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2172 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2173 connector->interlace_allowed = false;
2174 connector->doublescan_allowed = false;
771fe6b9
JG		 2175 break;
2176 }
2177
2581afcc 2178 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2179 if (i2c_bus->valid)
2180 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2181 } else
2182 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9 2183 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2184 drm_connector_register(connector);
771fe6b9 2185}
Linux 6.x block layer and io_uring tree(s)