drm/radeon: Use dce5/6 hdmi deep color clock setup also on dce8+
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
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1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH
26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9 33
10ebc0bc
DA
34#include <linux/pm_runtime.h>
35
d4877cf2
AD
36void radeon_connector_hotplug(struct drm_connector *connector)
37{
38 struct drm_device *dev = connector->dev;
39 struct radeon_device *rdev = dev->dev_private;
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41
cbac9543
AD
42 /* bail if the connector does not have hpd pin, e.g.,
43 * VGA, TV, etc.
44 */
45 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
46 return;
47
1e85e1d0 48 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 49
73104b5c 50 /* if the connector is already off, don't turn it back on */
6e9f798d 51 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD
52 if (connector->dpms != DRM_MODE_DPMS_ON)
53 return;
54
d5811e87
AD
55 /* just deal with DP (not eDP) here. */
56 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG
57 struct radeon_connector_atom_dig *dig_connector =
58 radeon_connector->con_priv;
7c3ed0fd 59
266dcba5
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60 /* if existing sink type was not DP no need to retrain */
61 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
62 return;
63
64 /* first get sink type as it may be reset after (un)plug */
65 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
66 /* don't do anything if sink is not display port, i.e.,
67 * passive dp->(dvi|hdmi) adaptor
68 */
69 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
70 int saved_dpms = connector->dpms;
71 /* Only turn off the display if it's physically disconnected */
ca2ccde5 72 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 73 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG
74 } else if (radeon_dp_needs_link_train(radeon_connector)) {
75 /* set it to OFF so that drm_helper_connector_dpms()
76 * won't return immediately since the current state
77 * is ON at this point.
78 */
79 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 80 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 81 }
266dcba5
JG
82 connector->dpms = saved_dpms;
83 }
d4877cf2 84 }
d4877cf2
AD
85}
86
445282db
DA
87static void radeon_property_change_mode(struct drm_encoder *encoder)
88{
89 struct drm_crtc *crtc = encoder->crtc;
90
91 if (crtc && crtc->enabled) {
92 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 93 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA
94 }
95}
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96
97int radeon_get_monitor_bpc(struct drm_connector *connector)
98{
99 struct drm_device *dev = connector->dev;
100 struct radeon_device *rdev = dev->dev_private;
101 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
102 struct radeon_connector_atom_dig *dig_connector;
103 int bpc = 8;
ea292861 104 int mode_clock, max_tmds_clock;
eccea792
AD
105
106 switch (connector->connector_type) {
107 case DRM_MODE_CONNECTOR_DVII:
108 case DRM_MODE_CONNECTOR_HDMIB:
109 if (radeon_connector->use_digital) {
110 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
111 if (connector->display_info.bpc)
112 bpc = connector->display_info.bpc;
113 }
114 }
115 break;
116 case DRM_MODE_CONNECTOR_DVID:
117 case DRM_MODE_CONNECTOR_HDMIA:
118 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
119 if (connector->display_info.bpc)
120 bpc = connector->display_info.bpc;
121 }
122 break;
123 case DRM_MODE_CONNECTOR_DisplayPort:
124 dig_connector = radeon_connector->con_priv;
125 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
126 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
127 drm_detect_hdmi_monitor(radeon_connector->edid)) {
128 if (connector->display_info.bpc)
129 bpc = connector->display_info.bpc;
130 }
131 break;
132 case DRM_MODE_CONNECTOR_eDP:
133 case DRM_MODE_CONNECTOR_LVDS:
134 if (connector->display_info.bpc)
135 bpc = connector->display_info.bpc;
136 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
137 struct drm_connector_helper_funcs *connector_funcs =
138 connector->helper_private;
139 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
140 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
141 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
142
143 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
144 bpc = 6;
145 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
146 bpc = 8;
147 }
148 break;
149 }
89b92339
MK
150
151 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
152 /* hdmi deep color only implemented on DCE4+ */
153 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
154 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 155 connector->name, bpc);
89b92339
MK
156 bpc = 8;
157 }
158
159 /*
160 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
161 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
162 * 12 bpc is always supported on hdmi deep color sinks, as this is
163 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
164 */
165 if (bpc > 12) {
166 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 167 connector->name, bpc);
89b92339
MK
168 bpc = 12;
169 }
ea292861
MK
170
171 /* Any defined maximum tmds clock limit we must not exceed? */
172 if (connector->max_tmds_clock > 0) {
173 /* mode_clock is clock in kHz for mode to be modeset on this connector */
174 mode_clock = radeon_connector->pixelclock_for_modeset;
175
176 /* Maximum allowable input clock in kHz */
177 max_tmds_clock = connector->max_tmds_clock * 1000;
178
179 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
180 connector->name, mode_clock, max_tmds_clock);
181
182 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
183 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
184 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
185 (mode_clock * 5/4 <= max_tmds_clock))
186 bpc = 10;
187 else
188 bpc = 8;
189
190 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
191 connector->name, bpc);
192 }
193
194 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
195 bpc = 8;
196 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
197 connector->name, bpc);
198 }
199 }
89b92339
MK
200 }
201
202 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 203 connector->name, connector->display_info.bpc, bpc);
89b92339 204
eccea792
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205 return bpc;
206}
207
771fe6b9
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208static void
209radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
210{
211 struct drm_device *dev = connector->dev;
212 struct radeon_device *rdev = dev->dev_private;
213 struct drm_encoder *best_encoder = NULL;
214 struct drm_encoder *encoder = NULL;
215 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
216 struct drm_mode_object *obj;
217 bool connected;
218 int i;
219
220 best_encoder = connector_funcs->best_encoder(connector);
221
222 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
223 if (connector->encoder_ids[i] == 0)
224 break;
225
226 obj = drm_mode_object_find(connector->dev,
227 connector->encoder_ids[i],
228 DRM_MODE_OBJECT_ENCODER);
229 if (!obj)
230 continue;
231
232 encoder = obj_to_encoder(obj);
233
234 if ((encoder == best_encoder) && (status == connector_status_connected))
235 connected = true;
236 else
237 connected = false;
238
239 if (rdev->is_atom_bios)
240 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
241 else
242 radeon_combios_connected_scratch_regs(connector, encoder, connected);
243
244 }
245}
246
1109ca09 247static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db
DA
248{
249 struct drm_mode_object *obj;
250 struct drm_encoder *encoder;
251 int i;
252
253 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
254 if (connector->encoder_ids[i] == 0)
255 break;
256
257 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
258 if (!obj)
259 continue;
260
261 encoder = obj_to_encoder(obj);
262 if (encoder->encoder_type == encoder_type)
263 return encoder;
264 }
265 return NULL;
266}
267
1109ca09 268static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG
269{
270 int enc_id = connector->encoder_ids[0];
271 struct drm_mode_object *obj;
272 struct drm_encoder *encoder;
273
274 /* pick the encoder ids */
275 if (enc_id) {
276 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
277 if (!obj)
278 return NULL;
279 encoder = obj_to_encoder(obj);
280 return encoder;
281 }
282 return NULL;
283}
284
4ce001ab
DA
285/*
286 * radeon_connector_analog_encoder_conflict_solve
287 * - search for other connectors sharing this encoder
288 * if priority is true, then set them disconnected if this is connected
289 * if priority is false, set us disconnected if they are connected
290 */
291static enum drm_connector_status
292radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
293 struct drm_encoder *encoder,
294 enum drm_connector_status current_status,
295 bool priority)
296{
297 struct drm_device *dev = connector->dev;
298 struct drm_connector *conflict;
08d07511 299 struct radeon_connector *radeon_conflict;
4ce001ab
DA
300 int i;
301
302 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
303 if (conflict == connector)
304 continue;
305
08d07511 306 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA
307 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
308 if (conflict->encoder_ids[i] == 0)
309 break;
310
311 /* if the IDs match */
312 if (conflict->encoder_ids[i] == encoder->base.id) {
313 if (conflict->status != connector_status_connected)
314 continue;
08d07511
AD
315
316 if (radeon_conflict->use_digital)
317 continue;
4ce001ab
DA
318
319 if (priority == true) {
72082093
JN
320 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
321 conflict->name);
322 DRM_DEBUG_KMS("in favor of %s\n",
323 connector->name);
4ce001ab
DA
324 conflict->status = connector_status_disconnected;
325 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
326 } else {
72082093
JN
327 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
328 connector->name);
329 DRM_DEBUG_KMS("in favor of %s\n",
330 conflict->name);
4ce001ab
DA
331 current_status = connector_status_disconnected;
332 }
333 break;
334 }
335 }
336 }
337 return current_status;
338
339}
340
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341static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
342{
343 struct drm_device *dev = encoder->dev;
344 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
345 struct drm_display_mode *mode = NULL;
de2103e4 346 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 347
de2103e4
AD
348 if (native_mode->hdisplay != 0 &&
349 native_mode->vdisplay != 0 &&
350 native_mode->clock != 0) {
fb06ca8f 351 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG
352 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
353 drm_mode_set_name(mode);
354
d9fdaafb 355 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD
356 } else if (native_mode->hdisplay != 0 &&
357 native_mode->vdisplay != 0) {
358 /* mac laptops without an edid */
359 /* Note that this is not necessarily the exact panel mode,
360 * but an approximation based on the cvt formula. For these
361 * systems we should ideally read the mode info out of the
362 * registers or add a mode table, but this works and is much
363 * simpler.
364 */
365 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
366 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 367 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG
368 }
369 return mode;
370}
371
923f6848
AD
372static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
373{
374 struct drm_device *dev = encoder->dev;
375 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
376 struct drm_display_mode *mode = NULL;
de2103e4 377 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD
378 int i;
379 struct mode_size {
380 int w;
381 int h;
382 } common_modes[17] = {
383 { 640, 480},
384 { 720, 480},
385 { 800, 600},
386 { 848, 480},
387 {1024, 768},
388 {1152, 768},
389 {1280, 720},
390 {1280, 800},
391 {1280, 854},
392 {1280, 960},
393 {1280, 1024},
394 {1440, 900},
395 {1400, 1050},
396 {1680, 1050},
397 {1600, 1200},
398 {1920, 1080},
399 {1920, 1200}
400 };
401
402 for (i = 0; i < 17; i++) {
dfdd6467
AD
403 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
404 if (common_modes[i].w > 1024 ||
405 common_modes[i].h > 768)
406 continue;
407 }
923f6848 408 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD
409 if (common_modes[i].w > native_mode->hdisplay ||
410 common_modes[i].h > native_mode->vdisplay ||
411 (common_modes[i].w == native_mode->hdisplay &&
412 common_modes[i].h == native_mode->vdisplay))
923f6848
AD
413 continue;
414 }
415 if (common_modes[i].w < 320 || common_modes[i].h < 200)
416 continue;
417
d50ba256 418 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD
419 drm_mode_probed_add(connector, mode);
420 }
421}
422
1109ca09 423static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG
424 uint64_t val)
425{
445282db
DA
426 struct drm_device *dev = connector->dev;
427 struct radeon_device *rdev = dev->dev_private;
428 struct drm_encoder *encoder;
429 struct radeon_encoder *radeon_encoder;
430
431 if (property == rdev->mode_info.coherent_mode_property) {
432 struct radeon_encoder_atom_dig *dig;
ce227c41 433 bool new_coherent_mode;
445282db
DA
434
435 /* need to find digital encoder on connector */
436 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
437 if (!encoder)
438 return 0;
439
440 radeon_encoder = to_radeon_encoder(encoder);
441
442 if (!radeon_encoder->enc_priv)
443 return 0;
444
445 dig = radeon_encoder->enc_priv;
ce227c41
DA
446 new_coherent_mode = val ? true : false;
447 if (dig->coherent_mode != new_coherent_mode) {
448 dig->coherent_mode = new_coherent_mode;
449 radeon_property_change_mode(&radeon_encoder->base);
450 }
445282db
DA
451 }
452
8666c076
AD
453 if (property == rdev->mode_info.audio_property) {
454 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
455 /* need to find digital encoder on connector */
456 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
457 if (!encoder)
458 return 0;
459
460 radeon_encoder = to_radeon_encoder(encoder);
461
462 if (radeon_connector->audio != val) {
463 radeon_connector->audio = val;
464 radeon_property_change_mode(&radeon_encoder->base);
465 }
466 }
467
6214bb74
AD
468 if (property == rdev->mode_info.dither_property) {
469 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
470 /* need to find digital encoder on connector */
471 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
472 if (!encoder)
473 return 0;
474
475 radeon_encoder = to_radeon_encoder(encoder);
476
477 if (radeon_connector->dither != val) {
478 radeon_connector->dither = val;
479 radeon_property_change_mode(&radeon_encoder->base);
480 }
481 }
482
5b1714d3
AD
483 if (property == rdev->mode_info.underscan_property) {
484 /* need to find digital encoder on connector */
485 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
486 if (!encoder)
487 return 0;
488
489 radeon_encoder = to_radeon_encoder(encoder);
490
491 if (radeon_encoder->underscan_type != val) {
492 radeon_encoder->underscan_type = val;
493 radeon_property_change_mode(&radeon_encoder->base);
494 }
495 }
496
5bccf5e3
MG
497 if (property == rdev->mode_info.underscan_hborder_property) {
498 /* need to find digital encoder on connector */
499 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
500 if (!encoder)
501 return 0;
502
503 radeon_encoder = to_radeon_encoder(encoder);
504
505 if (radeon_encoder->underscan_hborder != val) {
506 radeon_encoder->underscan_hborder = val;
507 radeon_property_change_mode(&radeon_encoder->base);
508 }
509 }
510
511 if (property == rdev->mode_info.underscan_vborder_property) {
512 /* need to find digital encoder on connector */
513 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
514 if (!encoder)
515 return 0;
516
517 radeon_encoder = to_radeon_encoder(encoder);
518
519 if (radeon_encoder->underscan_vborder != val) {
520 radeon_encoder->underscan_vborder = val;
521 radeon_property_change_mode(&radeon_encoder->base);
522 }
523 }
524
445282db
DA
525 if (property == rdev->mode_info.tv_std_property) {
526 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
527 if (!encoder) {
528 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
529 }
530
531 if (!encoder)
532 return 0;
533
534 radeon_encoder = to_radeon_encoder(encoder);
535 if (!radeon_encoder->enc_priv)
536 return 0;
643acacf 537 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA
538 struct radeon_encoder_atom_dac *dac_int;
539 dac_int = radeon_encoder->enc_priv;
540 dac_int->tv_std = val;
541 } else {
542 struct radeon_encoder_tv_dac *dac_int;
543 dac_int = radeon_encoder->enc_priv;
544 dac_int->tv_std = val;
545 }
546 radeon_property_change_mode(&radeon_encoder->base);
547 }
548
549 if (property == rdev->mode_info.load_detect_property) {
550 struct radeon_connector *radeon_connector =
551 to_radeon_connector(connector);
552
553 if (val == 0)
554 radeon_connector->dac_load_detect = false;
555 else
556 radeon_connector->dac_load_detect = true;
557 }
558
559 if (property == rdev->mode_info.tmds_pll_property) {
560 struct radeon_encoder_int_tmds *tmds = NULL;
561 bool ret = false;
562 /* need to find digital encoder on connector */
563 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
564 if (!encoder)
565 return 0;
566
567 radeon_encoder = to_radeon_encoder(encoder);
568
569 tmds = radeon_encoder->enc_priv;
570 if (!tmds)
571 return 0;
572
573 if (val == 0) {
574 if (rdev->is_atom_bios)
575 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
576 else
577 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
578 }
579 if (val == 1 || ret == false) {
580 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
581 }
582 radeon_property_change_mode(&radeon_encoder->base);
583 }
584
771fe6b9
JG
585 return 0;
586}
587
8dfaa8a7
MD
588static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
589 struct drm_connector *connector)
590{
591 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 592 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG
593 struct drm_display_mode *t, *mode;
594
595 /* If the EDID preferred mode doesn't match the native mode, use it */
596 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
597 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
598 if (mode->hdisplay != native_mode->hdisplay ||
599 mode->vdisplay != native_mode->vdisplay)
600 memcpy(native_mode, mode, sizeof(*mode));
601 }
602 }
8dfaa8a7
MD
603
604 /* Try to get native mode details from EDID if necessary */
de2103e4 605 if (!native_mode->clock) {
8dfaa8a7 606 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD
607 if (mode->hdisplay == native_mode->hdisplay &&
608 mode->vdisplay == native_mode->vdisplay) {
609 *native_mode = *mode;
610 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 611 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD
612 break;
613 }
614 }
615 }
13bb9430 616
de2103e4 617 if (!native_mode->clock) {
c5d46b4e 618 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD
619 radeon_encoder->rmx_type = RMX_OFF;
620 }
621}
771fe6b9
JG
622
623static int radeon_lvds_get_modes(struct drm_connector *connector)
624{
625 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
626 struct drm_encoder *encoder;
627 int ret = 0;
628 struct drm_display_mode *mode;
629
630 if (radeon_connector->ddc_bus) {
631 ret = radeon_ddc_get_modes(radeon_connector);
632 if (ret > 0) {
7747b713 633 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD
634 if (encoder) {
635 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD
636 /* add scaled modes */
637 radeon_add_common_modes(encoder, connector);
8dfaa8a7 638 }
771fe6b9
JG
639 return ret;
640 }
641 }
642
643 encoder = radeon_best_single_encoder(connector);
644 if (!encoder)
645 return 0;
646
647 /* we have no EDID modes */
648 mode = radeon_fp_native_mode(encoder);
649 if (mode) {
650 ret = 1;
651 drm_mode_probed_add(connector, mode);
7a868e18
AD
652 /* add the width/height from vbios tables if available */
653 connector->display_info.width_mm = mode->width_mm;
654 connector->display_info.height_mm = mode->height_mm;
7747b713
AD
655 /* add scaled modes */
656 radeon_add_common_modes(encoder, connector);
771fe6b9 657 }
923f6848 658
771fe6b9
JG
659 return ret;
660}
661
662static int radeon_lvds_mode_valid(struct drm_connector *connector,
663 struct drm_display_mode *mode)
664{
a3fa6320
AD
665 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
666
667 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
668 return MODE_PANEL;
669
670 if (encoder) {
671 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
672 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
673
674 /* AVIVO hardware supports downscaling modes larger than the panel
675 * to the panel size, but I'm not sure this is desirable.
676 */
677 if ((mode->hdisplay > native_mode->hdisplay) ||
678 (mode->vdisplay > native_mode->vdisplay))
679 return MODE_PANEL;
680
681 /* if scaling is disabled, block non-native modes */
682 if (radeon_encoder->rmx_type == RMX_OFF) {
683 if ((mode->hdisplay != native_mode->hdisplay) ||
684 (mode->vdisplay != native_mode->vdisplay))
685 return MODE_PANEL;
686 }
687 }
688
771fe6b9
JG
689 return MODE_OK;
690}
691
7b334fcb 692static enum drm_connector_status
930a9e28 693radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 694{
0549a061 695 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 696 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 697 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA
698 int r;
699
700 r = pm_runtime_get_sync(connector->dev->dev);
701 if (r < 0)
702 return connector_status_disconnected;
2ffb8429
AD
703
704 if (encoder) {
705 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 706 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD
707
708 /* check if panel is valid */
de2103e4 709 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD
710 ret = connector_status_connected;
711
712 }
0549a061
AD
713
714 /* check for edid as well */
0294cf4f
AD
715 if (radeon_connector->edid)
716 ret = connector_status_connected;
717 else {
718 if (radeon_connector->ddc_bus) {
0294cf4f
AD
719 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
720 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
721 if (radeon_connector->edid)
722 ret = connector_status_connected;
723 }
0549a061 724 }
771fe6b9 725 /* check acpi lid status ??? */
2ffb8429 726
771fe6b9 727 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
728 pm_runtime_mark_last_busy(connector->dev->dev);
729 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG
730 return ret;
731}
732
733static void radeon_connector_destroy(struct drm_connector *connector)
734{
735 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
736
0294cf4f
AD
737 if (radeon_connector->edid)
738 kfree(radeon_connector->edid);
771fe6b9
JG
739 kfree(radeon_connector->con_priv);
740 drm_sysfs_connector_remove(connector);
741 drm_connector_cleanup(connector);
742 kfree(connector);
743}
744
445282db
DA
745static int radeon_lvds_set_property(struct drm_connector *connector,
746 struct drm_property *property,
747 uint64_t value)
748{
749 struct drm_device *dev = connector->dev;
750 struct radeon_encoder *radeon_encoder;
751 enum radeon_rmx_type rmx_type;
752
d9fdaafb 753 DRM_DEBUG_KMS("\n");
445282db
DA
754 if (property != dev->mode_config.scaling_mode_property)
755 return 0;
756
757 if (connector->encoder)
758 radeon_encoder = to_radeon_encoder(connector->encoder);
759 else {
760 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
761 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
762 }
763
764 switch (value) {
765 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
766 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
767 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
768 default:
769 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
770 }
771 if (radeon_encoder->rmx_type == rmx_type)
772 return 0;
773
774 radeon_encoder->rmx_type = rmx_type;
775
776 radeon_property_change_mode(&radeon_encoder->base);
777 return 0;
778}
779
780
1109ca09 781static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG
782 .get_modes = radeon_lvds_get_modes,
783 .mode_valid = radeon_lvds_mode_valid,
784 .best_encoder = radeon_best_single_encoder,
785};
786
1109ca09 787static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG
788 .dpms = drm_helper_connector_dpms,
789 .detect = radeon_lvds_detect,
790 .fill_modes = drm_helper_probe_single_connector_modes,
791 .destroy = radeon_connector_destroy,
445282db 792 .set_property = radeon_lvds_set_property,
771fe6b9
JG
793};
794
795static int radeon_vga_get_modes(struct drm_connector *connector)
796{
797 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
798 int ret;
799
800 ret = radeon_ddc_get_modes(radeon_connector);
801
802 return ret;
803}
804
805static int radeon_vga_mode_valid(struct drm_connector *connector,
806 struct drm_display_mode *mode)
807{
b20f9bef
AD
808 struct drm_device *dev = connector->dev;
809 struct radeon_device *rdev = dev->dev_private;
810
a3fa6320 811 /* XXX check mode bandwidth */
b20f9bef
AD
812
813 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
814 return MODE_CLOCK_HIGH;
815
771fe6b9
JG
816 return MODE_OK;
817}
818
7b334fcb 819static enum drm_connector_status
930a9e28 820radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 821{
fafcf94e
AD
822 struct drm_device *dev = connector->dev;
823 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
824 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
825 struct drm_encoder *encoder;
826 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 827 bool dret = false;
771fe6b9 828 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA
829 int r;
830
831 r = pm_runtime_get_sync(connector->dev->dev);
832 if (r < 0)
833 return connector_status_disconnected;
771fe6b9 834
4ce001ab
DA
835 encoder = radeon_best_single_encoder(connector);
836 if (!encoder)
837 ret = connector_status_disconnected;
838
eb6b6d7c 839 if (radeon_connector->ddc_bus)
0a9069d3 840 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 841 if (dret) {
d0d0a225 842 radeon_connector->detected_by_load = false;
0294cf4f
AD
843 if (radeon_connector->edid) {
844 kfree(radeon_connector->edid);
845 radeon_connector->edid = NULL;
846 }
0294cf4f 847 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
848
849 if (!radeon_connector->edid) {
f82f5f3a 850 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 851 connector->name);
f82f5f3a 852 ret = connector_status_connected;
0294cf4f
AD
853 } else {
854 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
855
856 /* some oems have boards with separate digital and analog connectors
857 * with a shared ddc line (often vga + hdmi)
858 */
859 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
860 kfree(radeon_connector->edid);
861 radeon_connector->edid = NULL;
862 ret = connector_status_disconnected;
863 } else
864 ret = connector_status_connected;
865 }
866 } else {
c3cceedd
DA
867
868 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD
869 if (!force) {
870 /* only return the previous status if we last
871 * detected a monitor via load.
872 */
873 if (radeon_connector->detected_by_load)
10ebc0bc
DA
874 ret = connector->status;
875 goto out;
d0d0a225 876 }
c3cceedd 877
d8a7f792 878 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA
879 encoder_funcs = encoder->helper_private;
880 ret = encoder_funcs->detect(encoder, connector);
34076446 881 if (ret != connector_status_disconnected)
d0d0a225 882 radeon_connector->detected_by_load = true;
445282db 883 }
771fe6b9
JG
884 }
885
4ce001ab
DA
886 if (ret == connector_status_connected)
887 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD
888
889 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
890 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
891 * by other means, assume the CRT is connected and use that EDID.
892 */
893 if ((!rdev->is_atom_bios) &&
894 (ret == connector_status_disconnected) &&
895 rdev->mode_info.bios_hardcoded_edid_size) {
896 ret = connector_status_connected;
897 }
898
771fe6b9 899 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
900
901out:
902 pm_runtime_mark_last_busy(connector->dev->dev);
903 pm_runtime_put_autosuspend(connector->dev->dev);
904
771fe6b9
JG
905 return ret;
906}
907
1109ca09 908static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG
909 .get_modes = radeon_vga_get_modes,
910 .mode_valid = radeon_vga_mode_valid,
911 .best_encoder = radeon_best_single_encoder,
912};
913
1109ca09 914static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG
915 .dpms = drm_helper_connector_dpms,
916 .detect = radeon_vga_detect,
917 .fill_modes = drm_helper_probe_single_connector_modes,
918 .destroy = radeon_connector_destroy,
919 .set_property = radeon_connector_set_property,
920};
921
4ce001ab
DA
922static int radeon_tv_get_modes(struct drm_connector *connector)
923{
924 struct drm_device *dev = connector->dev;
923f6848 925 struct radeon_device *rdev = dev->dev_private;
4ce001ab 926 struct drm_display_mode *tv_mode;
923f6848 927 struct drm_encoder *encoder;
4ce001ab 928
923f6848
AD
929 encoder = radeon_best_single_encoder(connector);
930 if (!encoder)
931 return 0;
4ce001ab 932
923f6848
AD
933 /* avivo chips can scale any mode */
934 if (rdev->family >= CHIP_RS600)
935 /* add scaled modes */
936 radeon_add_common_modes(encoder, connector);
937 else {
938 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 939 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD
940 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
941 drm_mode_probed_add(connector, tv_mode);
942 }
4ce001ab
DA
943 return 1;
944}
945
946static int radeon_tv_mode_valid(struct drm_connector *connector,
947 struct drm_display_mode *mode)
948{
a3fa6320
AD
949 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
950 return MODE_CLOCK_RANGE;
4ce001ab
DA
951 return MODE_OK;
952}
953
7b334fcb 954static enum drm_connector_status
930a9e28 955radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA
956{
957 struct drm_encoder *encoder;
958 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA
959 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
960 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 961 int r;
445282db
DA
962
963 if (!radeon_connector->dac_load_detect)
964 return ret;
4ce001ab 965
10ebc0bc
DA
966 r = pm_runtime_get_sync(connector->dev->dev);
967 if (r < 0)
968 return connector_status_disconnected;
969
4ce001ab
DA
970 encoder = radeon_best_single_encoder(connector);
971 if (!encoder)
972 ret = connector_status_disconnected;
973 else {
974 encoder_funcs = encoder->helper_private;
975 ret = encoder_funcs->detect(encoder, connector);
976 }
977 if (ret == connector_status_connected)
978 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
979 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
980 pm_runtime_mark_last_busy(connector->dev->dev);
981 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA
982 return ret;
983}
984
1109ca09 985static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA
986 .get_modes = radeon_tv_get_modes,
987 .mode_valid = radeon_tv_mode_valid,
988 .best_encoder = radeon_best_single_encoder,
989};
990
1109ca09 991static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA
992 .dpms = drm_helper_connector_dpms,
993 .detect = radeon_tv_detect,
994 .fill_modes = drm_helper_probe_single_connector_modes,
995 .destroy = radeon_connector_destroy,
996 .set_property = radeon_connector_set_property,
997};
998
771fe6b9
JG
999static int radeon_dvi_get_modes(struct drm_connector *connector)
1000{
1001 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1002 int ret;
1003
1004 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG
1005 return ret;
1006}
1007
11fe1266
TU
1008static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1009{
1010 struct drm_device *dev = connector->dev;
1011 struct radeon_device *rdev = dev->dev_private;
1012 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1013 enum drm_connector_status status;
1014
1015 /* We only trust HPD on R600 and newer ASICS. */
1016 if (rdev->family >= CHIP_R600
1017 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1018 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1019 status = connector_status_connected;
1020 else
1021 status = connector_status_disconnected;
1022 if (connector->status == status)
1023 return true;
1024 }
1025
1026 return false;
1027}
1028
4ce001ab
DA
1029/*
1030 * DVI is complicated
1031 * Do a DDC probe, if DDC probe passes, get the full EDID so
1032 * we can do analog/digital monitor detection at this point.
1033 * If the monitor is an analog monitor or we got no DDC,
1034 * we need to find the DAC encoder object for this connector.
1035 * If we got no DDC, we do load detection on the DAC encoder object.
1036 * If we got analog DDC or load detection passes on the DAC encoder
1037 * we have to check if this analog encoder is shared with anyone else (TV)
1038 * if its shared we have to set the other connector to disconnected.
1039 */
7b334fcb 1040static enum drm_connector_status
930a9e28 1041radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1042{
fafcf94e
AD
1043 struct drm_device *dev = connector->dev;
1044 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1045 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1046 struct drm_encoder *encoder = NULL;
771fe6b9
JG
1047 struct drm_encoder_helper_funcs *encoder_funcs;
1048 struct drm_mode_object *obj;
10ebc0bc 1049 int i, r;
771fe6b9 1050 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1051 bool dret = false, broken_edid = false;
771fe6b9 1052
10ebc0bc
DA
1053 r = pm_runtime_get_sync(connector->dev->dev);
1054 if (r < 0)
1055 return connector_status_disconnected;
1056
1057 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1058 ret = connector->status;
1059 goto exit;
1060 }
11fe1266 1061
eb6b6d7c 1062 if (radeon_connector->ddc_bus)
0a9069d3 1063 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1064 if (dret) {
d0d0a225 1065 radeon_connector->detected_by_load = false;
0294cf4f
AD
1066 if (radeon_connector->edid) {
1067 kfree(radeon_connector->edid);
1068 radeon_connector->edid = NULL;
1069 }
4ce001ab 1070 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA
1071
1072 if (!radeon_connector->edid) {
f82f5f3a 1073 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1074 connector->name);
4a9a8b71
DA
1075 /* rs690 seems to have a problem with connectors not existing and always
1076 * return a block of 0's. If we see this just stop polling on this output */
1077 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
1078 ret = connector_status_disconnected;
72082093
JN
1079 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1080 connector->name);
4a9a8b71 1081 radeon_connector->ddc_bus = NULL;
fc87f13b
EE
1082 } else {
1083 ret = connector_status_connected;
1084 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1085 }
4ce001ab
DA
1086 } else {
1087 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1088
0294cf4f
AD
1089 /* some oems have boards with separate digital and analog connectors
1090 * with a shared ddc line (often vga + hdmi)
1091 */
1092 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
1093 kfree(radeon_connector->edid);
1094 radeon_connector->edid = NULL;
1095 ret = connector_status_disconnected;
1096 } else
1097 ret = connector_status_connected;
71407c46 1098
42f14c4b
AD
1099 /* This gets complicated. We have boards with VGA + HDMI with a
1100 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1101 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1102 * you don't really know what's connected to which port as both are digital.
71407c46 1103 */
d3932d6c 1104 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD
1105 struct drm_connector *list_connector;
1106 struct radeon_connector *list_radeon_connector;
1107 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1108 if (connector == list_connector)
1109 continue;
1110 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD
1111 if (list_radeon_connector->shared_ddc &&
1112 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1113 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD
1114 /* cases where both connectors are digital */
1115 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1116 /* hpd is our only option in this case */
1117 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD
1118 kfree(radeon_connector->edid);
1119 radeon_connector->edid = NULL;
1120 ret = connector_status_disconnected;
1121 }
1122 }
1123 }
1124 }
1125 }
4ce001ab
DA
1126 }
1127 }
1128
1129 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1130 goto out;
1131
5f0a2612
AD
1132 /* DVI-D and HDMI-A are digital only */
1133 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1134 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1135 goto out;
1136
d0d0a225 1137 /* if we aren't forcing don't do destructive polling */
c3cceedd 1138 if (!force) {
d0d0a225
AD
1139 /* only return the previous status if we last
1140 * detected a monitor via load.
1141 */
1142 if (radeon_connector->detected_by_load)
1143 ret = connector->status;
c3cceedd
DA
1144 goto out;
1145 }
1146
4ce001ab 1147 /* find analog encoder */
445282db
DA
1148 if (radeon_connector->dac_load_detect) {
1149 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1150 if (connector->encoder_ids[i] == 0)
1151 break;
771fe6b9 1152
445282db
DA
1153 obj = drm_mode_object_find(connector->dev,
1154 connector->encoder_ids[i],
1155 DRM_MODE_OBJECT_ENCODER);
1156 if (!obj)
1157 continue;
771fe6b9 1158
445282db 1159 encoder = obj_to_encoder(obj);
771fe6b9 1160
e3632507 1161 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD
1162 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1163 continue;
1164
445282db
DA
1165 encoder_funcs = encoder->helper_private;
1166 if (encoder_funcs->detect) {
fc87f13b
EE
1167 if (!broken_edid) {
1168 if (ret != connector_status_connected) {
1169 /* deal with analog monitors without DDC */
1170 ret = encoder_funcs->detect(encoder, connector);
1171 if (ret == connector_status_connected) {
1172 radeon_connector->use_digital = false;
1173 }
1174 if (ret != connector_status_disconnected)
1175 radeon_connector->detected_by_load = true;
445282db 1176 }
fc87f13b
EE
1177 } else {
1178 enum drm_connector_status lret;
1179 /* assume digital unless load detected otherwise */
1180 radeon_connector->use_digital = true;
1181 lret = encoder_funcs->detect(encoder, connector);
1182 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1183 if (lret == connector_status_connected)
1184 radeon_connector->use_digital = false;
771fe6b9 1185 }
445282db 1186 break;
771fe6b9
JG
1187 }
1188 }
1189 }
1190
4ce001ab
DA
1191 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1192 encoder) {
1193 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1194 }
1195
fafcf94e
AD
1196 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1197 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1198 * by other means, assume the DFP is connected and use that EDID. In most
1199 * cases the DVI port is actually a virtual KVM port connected to the service
1200 * processor.
1201 */
a09d431f 1202out:
fafcf94e
AD
1203 if ((!rdev->is_atom_bios) &&
1204 (ret == connector_status_disconnected) &&
1205 rdev->mode_info.bios_hardcoded_edid_size) {
1206 radeon_connector->use_digital = true;
1207 ret = connector_status_connected;
1208 }
1209
771fe6b9
JG
1210 /* updated in get modes as well since we need to know if it's analog or digital */
1211 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
1212
1213exit:
1214 pm_runtime_mark_last_busy(connector->dev->dev);
1215 pm_runtime_put_autosuspend(connector->dev->dev);
1216
771fe6b9
JG
1217 return ret;
1218}
1219
1220/* okay need to be smart in here about which encoder to pick */
1109ca09 1221static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG
1222{
1223 int enc_id = connector->encoder_ids[0];
1224 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1225 struct drm_mode_object *obj;
1226 struct drm_encoder *encoder;
1227 int i;
1228 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1229 if (connector->encoder_ids[i] == 0)
1230 break;
1231
1232 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1233 if (!obj)
1234 continue;
1235
1236 encoder = obj_to_encoder(obj);
1237
4ce001ab 1238 if (radeon_connector->use_digital == true) {
771fe6b9
JG
1239 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1240 return encoder;
1241 } else {
1242 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1243 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1244 return encoder;
1245 }
1246 }
1247
1248 /* see if we have a default encoder TODO */
1249
1250 /* then check use digitial */
1251 /* pick the first one */
1252 if (enc_id) {
1253 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
1254 if (!obj)
1255 return NULL;
1256 encoder = obj_to_encoder(obj);
1257 return encoder;
1258 }
1259 return NULL;
1260}
1261
d50ba256
DA
1262static void radeon_dvi_force(struct drm_connector *connector)
1263{
1264 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1265 if (connector->force == DRM_FORCE_ON)
1266 radeon_connector->use_digital = false;
1267 if (connector->force == DRM_FORCE_ON_DIGITAL)
1268 radeon_connector->use_digital = true;
1269}
1270
a3fa6320
AD
1271static int radeon_dvi_mode_valid(struct drm_connector *connector,
1272 struct drm_display_mode *mode)
1273{
1b24203e
AD
1274 struct drm_device *dev = connector->dev;
1275 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD
1276 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1277
1278 /* XXX check mode bandwidth */
1279
1b24203e
AD
1280 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1281 if (radeon_connector->use_digital &&
1282 (rdev->family == CHIP_RV100) &&
1283 (mode->clock > 135000))
1284 return MODE_CLOCK_HIGH;
1285
a3fa6320
AD
1286 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1287 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1288 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1289 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1290 return MODE_OK;
e1e84017 1291 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1b2681ba 1292 if (ASIC_IS_DCE6(rdev)) {
e1e84017
AD
1293 /* HDMI 1.3+ supports max clock of 340 Mhz */
1294 if (mode->clock > 340000)
1295 return MODE_CLOCK_HIGH;
1296 else
1297 return MODE_OK;
1298 } else
1299 return MODE_CLOCK_HIGH;
1300 } else
a3fa6320
AD
1301 return MODE_CLOCK_HIGH;
1302 }
b20f9bef
AD
1303
1304 /* check against the max pixel clock */
1305 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1306 return MODE_CLOCK_HIGH;
1307
a3fa6320
AD
1308 return MODE_OK;
1309}
1310
1109ca09 1311static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
771fe6b9 1312 .get_modes = radeon_dvi_get_modes,
a3fa6320 1313 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG
1314 .best_encoder = radeon_dvi_encoder,
1315};
1316
1109ca09 1317static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG
1318 .dpms = drm_helper_connector_dpms,
1319 .detect = radeon_dvi_detect,
1320 .fill_modes = drm_helper_probe_single_connector_modes,
1321 .set_property = radeon_connector_set_property,
1322 .destroy = radeon_connector_destroy,
d50ba256 1323 .force = radeon_dvi_force,
771fe6b9
JG
1324};
1325
746c1aa4
DA
1326static int radeon_dp_get_modes(struct drm_connector *connector)
1327{
1328 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1329 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1330 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA
1331 int ret;
1332
f89931f3
AD
1333 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1334 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1335 struct drm_display_mode *mode;
1336
2b69ffb9
AD
1337 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1338 if (!radeon_dig_connector->edp_on)
1339 atombios_set_edp_panel_power(connector,
1340 ATOM_TRANSMITTER_ACTION_POWER_ON);
1341 ret = radeon_ddc_get_modes(radeon_connector);
1342 if (!radeon_dig_connector->edp_on)
1343 atombios_set_edp_panel_power(connector,
1344 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1345 } else {
1346 /* need to setup ddc on the bridge */
1347 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1348 ENCODER_OBJECT_ID_NONE) {
1349 if (encoder)
1350 radeon_atom_ext_encoder_setup_ddc(encoder);
1351 }
1352 ret = radeon_ddc_get_modes(radeon_connector);
1353 }
d291767b
AD
1354
1355 if (ret > 0) {
d291767b
AD
1356 if (encoder) {
1357 radeon_fixup_lvds_native_mode(encoder, connector);
1358 /* add scaled modes */
1359 radeon_add_common_modes(encoder, connector);
1360 }
1361 return ret;
1362 }
1363
d291767b
AD
1364 if (!encoder)
1365 return 0;
1366
1367 /* we have no EDID modes */
1368 mode = radeon_fp_native_mode(encoder);
1369 if (mode) {
1370 ret = 1;
1371 drm_mode_probed_add(connector, mode);
1372 /* add the width/height from vbios tables if available */
1373 connector->display_info.width_mm = mode->width_mm;
1374 connector->display_info.height_mm = mode->height_mm;
1375 /* add scaled modes */
1376 radeon_add_common_modes(encoder, connector);
1377 }
591a10e1
AD
1378 } else {
1379 /* need to setup ddc on the bridge */
1d33e1fc
AD
1380 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1381 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD
1382 if (encoder)
1383 radeon_atom_ext_encoder_setup_ddc(encoder);
1384 }
d291767b 1385 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1386 }
8b834852 1387
746c1aa4
DA
1388 return ret;
1389}
1390
1d33e1fc 1391u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3
AD
1392{
1393 struct drm_mode_object *obj;
1394 struct drm_encoder *encoder;
1395 struct radeon_encoder *radeon_encoder;
1396 int i;
d7fa8bb3
AD
1397
1398 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1399 if (connector->encoder_ids[i] == 0)
1400 break;
1401
1402 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1403 if (!obj)
1404 continue;
1405
1406 encoder = obj_to_encoder(obj);
1407 radeon_encoder = to_radeon_encoder(encoder);
1408
1409 switch (radeon_encoder->encoder_id) {
1410 case ENCODER_OBJECT_ID_TRAVIS:
1411 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1412 return radeon_encoder->encoder_id;
d7fa8bb3
AD
1413 default:
1414 break;
1415 }
1416 }
1417
1d33e1fc 1418 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD
1419}
1420
1421bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1422{
1423 struct drm_mode_object *obj;
1424 struct drm_encoder *encoder;
1425 struct radeon_encoder *radeon_encoder;
1426 int i;
1427 bool found = false;
1428
1429 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1430 if (connector->encoder_ids[i] == 0)
1431 break;
1432
1433 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1434 if (!obj)
1435 continue;
1436
1437 encoder = obj_to_encoder(obj);
1438 radeon_encoder = to_radeon_encoder(encoder);
1439 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1440 found = true;
1441 }
1442
1443 return found;
1444}
1445
1446bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1447{
1448 struct drm_device *dev = connector->dev;
1449 struct radeon_device *rdev = dev->dev_private;
1450
1451 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1452 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD
1453 radeon_connector_encoder_is_hbr2(connector)) {
1454 return true;
1455 }
1456
1457 return false;
1458}
1459
7b334fcb 1460static enum drm_connector_status
930a9e28 1461radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1462{
f8d0edde
AD
1463 struct drm_device *dev = connector->dev;
1464 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1465 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1466 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1467 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1468 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1469 int r;
746c1aa4 1470
10ebc0bc
DA
1471 r = pm_runtime_get_sync(connector->dev->dev);
1472 if (r < 0)
1473 return connector_status_disconnected;
1474
1475 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1476 ret = connector->status;
1477 goto out;
1478 }
11fe1266 1479
746c1aa4
DA
1480 if (radeon_connector->edid) {
1481 kfree(radeon_connector->edid);
1482 radeon_connector->edid = NULL;
1483 }
1484
f89931f3
AD
1485 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1486 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1487 if (encoder) {
1488 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1489 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1490
1491 /* check if panel is valid */
1492 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1493 ret = connector_status_connected;
1494 }
6f50eae7
AD
1495 /* eDP is always DP */
1496 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD
1497 if (!radeon_dig_connector->edp_on)
1498 atombios_set_edp_panel_power(connector,
1499 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1500 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1501 ret = connector_status_connected;
8b834852
AD
1502 if (!radeon_dig_connector->edp_on)
1503 atombios_set_edp_panel_power(connector,
1504 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD
1505 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1506 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD
1507 /* DP bridges are always DP */
1508 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1509 /* get the DPCD from the bridge */
1510 radeon_dp_getdpcd(radeon_connector);
1511
6777a4f6
AD
1512 if (encoder) {
1513 /* setup ddc on the bridge */
1514 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS
1515 /* bridge chips are always aux */
1516 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1517 ret = connector_status_connected;
6777a4f6
AD
1518 else if (radeon_connector->dac_load_detect) { /* try load detection */
1519 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD
1520 ret = encoder_funcs->detect(encoder, connector);
1521 }
591a10e1 1522 }
b06947b5 1523 } else {
6f50eae7 1524 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD
1525 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1526 ret = connector_status_connected;
1527 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1528 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1529 } else {
f8d0edde
AD
1530 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1531 if (radeon_dp_getdpcd(radeon_connector))
1532 ret = connector_status_connected;
1533 } else {
d592fca9 1534 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1535 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD
1536 ret = connector_status_connected;
1537 }
4143e919 1538 }
746c1aa4 1539 }
4143e919 1540
30f44372 1541 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
1542out:
1543 pm_runtime_mark_last_busy(connector->dev->dev);
1544 pm_runtime_put_autosuspend(connector->dev->dev);
1545
746c1aa4
DA
1546 return ret;
1547}
1548
5801ead6
AD
1549static int radeon_dp_mode_valid(struct drm_connector *connector,
1550 struct drm_display_mode *mode)
1551{
1552 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1553 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1554
1555 /* XXX check mode bandwidth */
1556
f89931f3
AD
1557 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1558 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1559 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1560
1561 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1562 return MODE_PANEL;
1563
1564 if (encoder) {
1565 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1566 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1567
f89931f3 1568 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD
1569 * to the panel size, but I'm not sure this is desirable.
1570 */
1571 if ((mode->hdisplay > native_mode->hdisplay) ||
1572 (mode->vdisplay > native_mode->vdisplay))
1573 return MODE_PANEL;
1574
1575 /* if scaling is disabled, block non-native modes */
1576 if (radeon_encoder->rmx_type == RMX_OFF) {
1577 if ((mode->hdisplay != native_mode->hdisplay) ||
1578 (mode->vdisplay != native_mode->vdisplay))
1579 return MODE_PANEL;
1580 }
1581 }
5801ead6 1582 return MODE_OK;
d291767b
AD
1583 } else {
1584 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1585 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1586 return radeon_dp_mode_valid_helper(connector, mode);
1587 else
1588 return MODE_OK;
1589 }
5801ead6
AD
1590}
1591
1109ca09 1592static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1593 .get_modes = radeon_dp_get_modes,
5801ead6 1594 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA
1595 .best_encoder = radeon_dvi_encoder,
1596};
1597
1109ca09 1598static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA
1599 .dpms = drm_helper_connector_dpms,
1600 .detect = radeon_dp_detect,
1601 .fill_modes = drm_helper_probe_single_connector_modes,
1602 .set_property = radeon_connector_set_property,
379dfc25 1603 .destroy = radeon_connector_destroy,
746c1aa4
DA
1604 .force = radeon_dvi_force,
1605};
1606
855f5f1d
AD
1607static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1608 .dpms = drm_helper_connector_dpms,
1609 .detect = radeon_dp_detect,
1610 .fill_modes = drm_helper_probe_single_connector_modes,
1611 .set_property = radeon_lvds_set_property,
379dfc25 1612 .destroy = radeon_connector_destroy,
855f5f1d
AD
1613 .force = radeon_dvi_force,
1614};
1615
1616static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1617 .dpms = drm_helper_connector_dpms,
1618 .detect = radeon_dp_detect,
1619 .fill_modes = drm_helper_probe_single_connector_modes,
1620 .set_property = radeon_lvds_set_property,
379dfc25 1621 .destroy = radeon_connector_destroy,
855f5f1d
AD
1622 .force = radeon_dvi_force,
1623};
1624
771fe6b9
JG
1625void
1626radeon_add_atom_connector(struct drm_device *dev,
1627 uint32_t connector_id,
1628 uint32_t supported_device,
1629 int connector_type,
1630 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1631 uint32_t igp_lane_info,
eed45b30 1632 uint16_t connector_object_id,
26b5bc98
AD
1633 struct radeon_hpd *hpd,
1634 struct radeon_router *router)
771fe6b9 1635{
445282db 1636 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1637 struct drm_connector *connector;
1638 struct radeon_connector *radeon_connector;
1639 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD
1640 struct drm_encoder *encoder;
1641 struct radeon_encoder *radeon_encoder;
771fe6b9 1642 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1643 bool shared_ddc = false;
eac4dff6 1644 bool is_dp_bridge = false;
496263bf 1645 bool has_aux = false;
771fe6b9 1646
4ce001ab 1647 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1648 return;
1649
cf4c12f9
AD
1650 /* if the user selected tv=0 don't try and add the connector */
1651 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1652 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1653 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1654 (radeon_tv == 0))
1655 return;
1656
771fe6b9
JG
1657 /* see if we already added it */
1658 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1659 radeon_connector = to_radeon_connector(connector);
1660 if (radeon_connector->connector_id == connector_id) {
1661 radeon_connector->devices |= supported_device;
1662 return;
1663 }
0294cf4f 1664 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1665 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD
1666 radeon_connector->shared_ddc = true;
1667 shared_ddc = true;
1668 }
fb939dfc 1669 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD
1670 (radeon_connector->router.router_id == router->router_id)) {
1671 radeon_connector->shared_ddc = false;
1672 shared_ddc = false;
1673 }
0294cf4f 1674 }
771fe6b9
JG
1675 }
1676
eac4dff6
AD
1677 /* check if it's a dp bridge */
1678 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1679 radeon_encoder = to_radeon_encoder(encoder);
1680 if (radeon_encoder->devices & supported_device) {
1681 switch (radeon_encoder->encoder_id) {
1682 case ENCODER_OBJECT_ID_TRAVIS:
1683 case ENCODER_OBJECT_ID_NUTMEG:
1684 is_dp_bridge = true;
1685 break;
1686 default:
1687 break;
1688 }
1689 }
1690 }
1691
771fe6b9
JG
1692 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1693 if (!radeon_connector)
1694 return;
1695
1696 connector = &radeon_connector->base;
1697
1698 radeon_connector->connector_id = connector_id;
1699 radeon_connector->devices = supported_device;
0294cf4f 1700 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1701 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1702 radeon_connector->hpd = *hpd;
bc1c4dc3 1703
26b5bc98 1704 radeon_connector->router = *router;
fb939dfc 1705 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD
1706 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1707 if (!radeon_connector->router_bus)
a70882aa 1708 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1709 }
eac4dff6
AD
1710
1711 if (is_dp_bridge) {
771fe6b9
JG
1712 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1713 if (!radeon_dig_connector)
1714 goto failed;
771fe6b9
JG
1715 radeon_dig_connector->igp_lane_info = igp_lane_info;
1716 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1717 if (i2c_bus->valid) {
379dfc25
AD
1718 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1719 if (radeon_connector->ddc_bus)
496263bf
AD
1720 has_aux = true;
1721 else
eac4dff6 1722 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1723 }
eac4dff6
AD
1724 switch (connector_type) {
1725 case DRM_MODE_CONNECTOR_VGA:
1726 case DRM_MODE_CONNECTOR_DVIA:
1727 default:
855f5f1d
AD
1728 drm_connector_init(dev, &radeon_connector->base,
1729 &radeon_dp_connector_funcs, connector_type);
1730 drm_connector_helper_add(&radeon_connector->base,
1731 &radeon_dp_connector_helper_funcs);
eac4dff6
AD
1732 connector->interlace_allowed = true;
1733 connector->doublescan_allowed = true;
d629a3ce 1734 radeon_connector->dac_load_detect = true;
e35755fa 1735 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD
1736 rdev->mode_info.load_detect_property,
1737 1);
eac4dff6
AD
1738 break;
1739 case DRM_MODE_CONNECTOR_DVII:
1740 case DRM_MODE_CONNECTOR_DVID:
1741 case DRM_MODE_CONNECTOR_HDMIA:
1742 case DRM_MODE_CONNECTOR_HDMIB:
1743 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD
1744 drm_connector_init(dev, &radeon_connector->base,
1745 &radeon_dp_connector_funcs, connector_type);
1746 drm_connector_helper_add(&radeon_connector->base,
1747 &radeon_dp_connector_helper_funcs);
e35755fa 1748 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1749 rdev->mode_info.underscan_property,
56bec7c0 1750 UNDERSCAN_OFF);
e35755fa 1751 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG
1752 rdev->mode_info.underscan_hborder_property,
1753 0);
e35755fa 1754 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG
1755 rdev->mode_info.underscan_vborder_property,
1756 0);
91915260 1757
6214bb74
AD
1758 drm_object_attach_property(&radeon_connector->base.base,
1759 rdev->mode_info.dither_property,
1760 RADEON_FMT_DITHER_DISABLE);
91915260 1761
108dc8e8
AD
1762 if (radeon_audio != 0)
1763 drm_object_attach_property(&radeon_connector->base.base,
1764 rdev->mode_info.audio_property,
e31fadd3 1765 RADEON_AUDIO_AUTO);
91915260 1766
eac4dff6
AD
1767 subpixel_order = SubPixelHorizontalRGB;
1768 connector->interlace_allowed = true;
1769 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1770 connector->doublescan_allowed = true;
1771 else
1772 connector->doublescan_allowed = false;
d629a3ce
AD
1773 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1774 radeon_connector->dac_load_detect = true;
e35755fa 1775 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD
1776 rdev->mode_info.load_detect_property,
1777 1);
1778 }
eac4dff6
AD
1779 break;
1780 case DRM_MODE_CONNECTOR_LVDS:
1781 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD
1782 drm_connector_init(dev, &radeon_connector->base,
1783 &radeon_lvds_bridge_connector_funcs, connector_type);
1784 drm_connector_helper_add(&radeon_connector->base,
1785 &radeon_dp_connector_helper_funcs);
e35755fa 1786 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1787 dev->mode_config.scaling_mode_property,
1788 DRM_MODE_SCALE_FULLSCREEN);
1789 subpixel_order = SubPixelHorizontalRGB;
1790 connector->interlace_allowed = false;
1791 connector->doublescan_allowed = false;
1792 break;
5bccf5e3 1793 }
eac4dff6
AD
1794 } else {
1795 switch (connector_type) {
1796 case DRM_MODE_CONNECTOR_VGA:
1797 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1798 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1799 if (i2c_bus->valid) {
1800 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1801 if (!radeon_connector->ddc_bus)
1802 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1803 }
390d0bbe 1804 radeon_connector->dac_load_detect = true;
e35755fa 1805 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD
1806 rdev->mode_info.load_detect_property,
1807 1);
eac4dff6
AD
1808 /* no HPD on analog connectors */
1809 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1810 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1811 connector->interlace_allowed = true;
c49948f4 1812 connector->doublescan_allowed = true;
eac4dff6
AD
1813 break;
1814 case DRM_MODE_CONNECTOR_DVIA:
1815 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1816 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1817 if (i2c_bus->valid) {
1818 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1819 if (!radeon_connector->ddc_bus)
1820 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1821 }
1822 radeon_connector->dac_load_detect = true;
e35755fa 1823 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1824 rdev->mode_info.load_detect_property,
1825 1);
1826 /* no HPD on analog connectors */
1827 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1828 connector->interlace_allowed = true;
1829 connector->doublescan_allowed = true;
1830 break;
1831 case DRM_MODE_CONNECTOR_DVII:
1832 case DRM_MODE_CONNECTOR_DVID:
1833 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1834 if (!radeon_dig_connector)
1835 goto failed;
1836 radeon_dig_connector->igp_lane_info = igp_lane_info;
1837 radeon_connector->con_priv = radeon_dig_connector;
1838 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1839 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1840 if (i2c_bus->valid) {
1841 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1842 if (!radeon_connector->ddc_bus)
1843 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1844 }
1845 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1846 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1847 rdev->mode_info.coherent_mode_property,
1848 1);
1849 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1850 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1851 rdev->mode_info.underscan_property,
1852 UNDERSCAN_OFF);
e35755fa 1853 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1854 rdev->mode_info.underscan_hborder_property,
1855 0);
e35755fa 1856 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1857 rdev->mode_info.underscan_vborder_property,
1858 0);
1859 }
108dc8e8 1860 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1861 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1862 rdev->mode_info.audio_property,
e31fadd3 1863 RADEON_AUDIO_AUTO);
8666c076 1864 }
6214bb74
AD
1865 if (ASIC_IS_AVIVO(rdev)) {
1866 drm_object_attach_property(&radeon_connector->base.base,
1867 rdev->mode_info.dither_property,
1868 RADEON_FMT_DITHER_DISABLE);
1869 }
eac4dff6
AD
1870 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1871 radeon_connector->dac_load_detect = true;
e35755fa 1872 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1873 rdev->mode_info.load_detect_property,
1874 1);
1875 }
1876 connector->interlace_allowed = true;
1877 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1878 connector->doublescan_allowed = true;
1879 else
1880 connector->doublescan_allowed = false;
1881 break;
1882 case DRM_MODE_CONNECTOR_HDMIA:
1883 case DRM_MODE_CONNECTOR_HDMIB:
1884 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1885 if (!radeon_dig_connector)
1886 goto failed;
1887 radeon_dig_connector->igp_lane_info = igp_lane_info;
1888 radeon_connector->con_priv = radeon_dig_connector;
1889 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1890 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1891 if (i2c_bus->valid) {
1892 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1893 if (!radeon_connector->ddc_bus)
1894 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1895 }
e35755fa 1896 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1897 rdev->mode_info.coherent_mode_property,
1898 1);
1899 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1900 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1901 rdev->mode_info.underscan_property,
1902 UNDERSCAN_OFF);
e35755fa 1903 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1904 rdev->mode_info.underscan_hborder_property,
1905 0);
e35755fa 1906 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1907 rdev->mode_info.underscan_vborder_property,
1908 0);
1909 }
108dc8e8 1910 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1911 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1912 rdev->mode_info.audio_property,
e31fadd3 1913 RADEON_AUDIO_AUTO);
8666c076 1914 }
6214bb74
AD
1915 if (ASIC_IS_AVIVO(rdev)) {
1916 drm_object_attach_property(&radeon_connector->base.base,
1917 rdev->mode_info.dither_property,
1918 RADEON_FMT_DITHER_DISABLE);
1919 }
eac4dff6
AD
1920 subpixel_order = SubPixelHorizontalRGB;
1921 connector->interlace_allowed = true;
1922 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1923 connector->doublescan_allowed = true;
1924 else
1925 connector->doublescan_allowed = false;
1926 break;
1927 case DRM_MODE_CONNECTOR_DisplayPort:
1928 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1929 if (!radeon_dig_connector)
1930 goto failed;
1931 radeon_dig_connector->igp_lane_info = igp_lane_info;
1932 radeon_connector->con_priv = radeon_dig_connector;
1933 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1934 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1935 if (i2c_bus->valid) {
eac4dff6 1936 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD
1937 if (radeon_connector->ddc_bus)
1938 has_aux = true;
1939 else
eac4dff6
AD
1940 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1941 }
1942 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1943 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1944 rdev->mode_info.coherent_mode_property,
1945 1);
1946 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1947 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1948 rdev->mode_info.underscan_property,
1949 UNDERSCAN_OFF);
e35755fa 1950 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1951 rdev->mode_info.underscan_hborder_property,
1952 0);
e35755fa 1953 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1954 rdev->mode_info.underscan_vborder_property,
1955 0);
1956 }
108dc8e8 1957 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1958 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1959 rdev->mode_info.audio_property,
e31fadd3 1960 RADEON_AUDIO_AUTO);
8666c076 1961 }
6214bb74
AD
1962 if (ASIC_IS_AVIVO(rdev)) {
1963 drm_object_attach_property(&radeon_connector->base.base,
1964 rdev->mode_info.dither_property,
1965 RADEON_FMT_DITHER_DISABLE);
91915260 1966
6214bb74 1967 }
eac4dff6
AD
1968 connector->interlace_allowed = true;
1969 /* in theory with a DP to VGA converter... */
c49948f4 1970 connector->doublescan_allowed = false;
eac4dff6
AD
1971 break;
1972 case DRM_MODE_CONNECTOR_eDP:
1973 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1974 if (!radeon_dig_connector)
1975 goto failed;
1976 radeon_dig_connector->igp_lane_info = igp_lane_info;
1977 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 1978 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD
1979 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1980 if (i2c_bus->valid) {
379dfc25
AD
1981 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1982 if (radeon_connector->ddc_bus)
496263bf
AD
1983 has_aux = true;
1984 else
eac4dff6
AD
1985 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1986 }
e35755fa 1987 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1988 dev->mode_config.scaling_mode_property,
1989 DRM_MODE_SCALE_FULLSCREEN);
1990 subpixel_order = SubPixelHorizontalRGB;
1991 connector->interlace_allowed = false;
1992 connector->doublescan_allowed = false;
1993 break;
1994 case DRM_MODE_CONNECTOR_SVIDEO:
1995 case DRM_MODE_CONNECTOR_Composite:
1996 case DRM_MODE_CONNECTOR_9PinDIN:
1997 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1998 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1999 radeon_connector->dac_load_detect = true;
e35755fa 2000 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
2001 rdev->mode_info.load_detect_property,
2002 1);
e35755fa 2003 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
2004 rdev->mode_info.tv_std_property,
2005 radeon_atombios_get_tv_info(rdev));
2006 /* no HPD on analog connectors */
2007 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2008 connector->interlace_allowed = false;
2009 connector->doublescan_allowed = false;
2010 break;
2011 case DRM_MODE_CONNECTOR_LVDS:
2012 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2013 if (!radeon_dig_connector)
2014 goto failed;
2015 radeon_dig_connector->igp_lane_info = igp_lane_info;
2016 radeon_connector->con_priv = radeon_dig_connector;
2017 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2018 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2019 if (i2c_bus->valid) {
2020 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2021 if (!radeon_connector->ddc_bus)
2022 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2023 }
e35755fa 2024 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
2025 dev->mode_config.scaling_mode_property,
2026 DRM_MODE_SCALE_FULLSCREEN);
2027 subpixel_order = SubPixelHorizontalRGB;
2028 connector->interlace_allowed = false;
2029 connector->doublescan_allowed = false;
2030 break;
771fe6b9 2031 }
771fe6b9
JG
2032 }
2033
2581afcc 2034 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2035 if (i2c_bus->valid)
2036 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2037 } else
2038 connector->polled = DRM_CONNECTOR_POLL_HPD;
2039
771fe6b9
JG
2040 connector->display_info.subpixel_order = subpixel_order;
2041 drm_sysfs_connector_add(connector);
496263bf
AD
2042
2043 if (has_aux)
2044 radeon_dp_aux_init(radeon_connector);
2045
771fe6b9
JG
2046 return;
2047
2048failed:
771fe6b9
JG
2049 drm_connector_cleanup(connector);
2050 kfree(connector);
2051}
2052
2053void
2054radeon_add_legacy_connector(struct drm_device *dev,
2055 uint32_t connector_id,
2056 uint32_t supported_device,
2057 int connector_type,
b75fad06 2058 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD
2059 uint16_t connector_object_id,
2060 struct radeon_hpd *hpd)
771fe6b9 2061{
445282db 2062 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
2063 struct drm_connector *connector;
2064 struct radeon_connector *radeon_connector;
2065 uint32_t subpixel_order = SubPixelNone;
2066
4ce001ab 2067 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
2068 return;
2069
cf4c12f9
AD
2070 /* if the user selected tv=0 don't try and add the connector */
2071 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2072 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2073 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2074 (radeon_tv == 0))
2075 return;
2076
771fe6b9
JG
2077 /* see if we already added it */
2078 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2079 radeon_connector = to_radeon_connector(connector);
2080 if (radeon_connector->connector_id == connector_id) {
2081 radeon_connector->devices |= supported_device;
2082 return;
2083 }
2084 }
2085
2086 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2087 if (!radeon_connector)
2088 return;
2089
2090 connector = &radeon_connector->base;
2091
2092 radeon_connector->connector_id = connector_id;
2093 radeon_connector->devices = supported_device;
b75fad06 2094 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2095 radeon_connector->hpd = *hpd;
bc1c4dc3 2096
771fe6b9
JG
2097 switch (connector_type) {
2098 case DRM_MODE_CONNECTOR_VGA:
2099 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2100 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2101 if (i2c_bus->valid) {
f376b94f 2102 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2103 if (!radeon_connector->ddc_bus)
a70882aa 2104 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2105 }
35e4b7af 2106 radeon_connector->dac_load_detect = true;
e35755fa 2107 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2108 rdev->mode_info.load_detect_property,
2109 1);
2581afcc
AD
2110 /* no HPD on analog connectors */
2111 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2112 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD
2113 connector->interlace_allowed = true;
2114 connector->doublescan_allowed = true;
771fe6b9
JG
2115 break;
2116 case DRM_MODE_CONNECTOR_DVIA:
2117 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2118 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2119 if (i2c_bus->valid) {
f376b94f 2120 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2121 if (!radeon_connector->ddc_bus)
a70882aa 2122 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2123 }
35e4b7af 2124 radeon_connector->dac_load_detect = true;
e35755fa 2125 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2126 rdev->mode_info.load_detect_property,
2127 1);
2581afcc
AD
2128 /* no HPD on analog connectors */
2129 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
2130 connector->interlace_allowed = true;
2131 connector->doublescan_allowed = true;
771fe6b9
JG
2132 break;
2133 case DRM_MODE_CONNECTOR_DVII:
2134 case DRM_MODE_CONNECTOR_DVID:
2135 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2136 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2137 if (i2c_bus->valid) {
f376b94f 2138 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2139 if (!radeon_connector->ddc_bus)
a70882aa 2140 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD
2141 }
2142 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2143 radeon_connector->dac_load_detect = true;
e35755fa 2144 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2145 rdev->mode_info.load_detect_property,
2146 1);
771fe6b9
JG
2147 }
2148 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
2149 connector->interlace_allowed = true;
2150 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2151 connector->doublescan_allowed = true;
2152 else
2153 connector->doublescan_allowed = false;
771fe6b9
JG
2154 break;
2155 case DRM_MODE_CONNECTOR_SVIDEO:
2156 case DRM_MODE_CONNECTOR_Composite:
2157 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD
2158 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2159 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2160 radeon_connector->dac_load_detect = true;
2161 /* RS400,RC410,RS480 chipset seems to report a lot
2162 * of false positive on load detect, we haven't yet
2163 * found a way to make load detect reliable on those
2164 * chipset, thus just disable it for TV.
2165 */
2166 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2167 radeon_connector->dac_load_detect = false;
e35755fa 2168 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD
2169 rdev->mode_info.load_detect_property,
2170 radeon_connector->dac_load_detect);
e35755fa 2171 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD
2172 rdev->mode_info.tv_std_property,
2173 radeon_combios_get_tv_info(rdev));
2174 /* no HPD on analog connectors */
2175 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
2176 connector->interlace_allowed = false;
2177 connector->doublescan_allowed = false;
771fe6b9
JG
2178 break;
2179 case DRM_MODE_CONNECTOR_LVDS:
2180 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2181 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2182 if (i2c_bus->valid) {
f376b94f 2183 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2184 if (!radeon_connector->ddc_bus)
a70882aa 2185 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2186 }
e35755fa 2187 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2188 dev->mode_config.scaling_mode_property,
2189 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2190 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
2191 connector->interlace_allowed = false;
2192 connector->doublescan_allowed = false;
771fe6b9
JG
2193 break;
2194 }
2195
2581afcc 2196 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2197 if (i2c_bus->valid)
2198 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2199 } else
2200 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG
2201 connector->display_info.subpixel_order = subpixel_order;
2202 drm_sysfs_connector_add(connector);
771fe6b9 2203}