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bfc1f97d SG |
1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Slava Grigorev <slava.grigorev@amd.com> | |
23 | */ | |
24 | ||
25 | #include <drm/drmP.h> | |
1a626b68 | 26 | #include <drm/drm_crtc.h> |
bfc1f97d | 27 | #include "radeon.h" |
1a626b68 SG |
28 | #include "atom.h" |
29 | #include "radeon_audio.h" | |
bfc1f97d SG |
30 | |
31 | void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, | |
32 | u8 enable_mask); | |
8bf59820 SG |
33 | void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, |
34 | u8 enable_mask); | |
bfc1f97d SG |
35 | void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, |
36 | u8 enable_mask); | |
1a626b68 SG |
37 | u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); |
38 | void dce6_endpoint_wreg(struct radeon_device *rdev, | |
39 | u32 offset, u32 reg, u32 v); | |
070a2e63 AD |
40 | void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, |
41 | struct cea_sad *sads, int sad_count); | |
42 | void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, | |
43 | struct cea_sad *sads, int sad_count); | |
44 | void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, | |
45 | struct cea_sad *sads, int sad_count); | |
00a9d4bc SG |
46 | void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, |
47 | u8 *sadb, int sad_count); | |
48 | void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, | |
49 | u8 *sadb, int sad_count); | |
50 | void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, | |
51 | u8 *sadb, int sad_count); | |
52 | void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, | |
53 | u8 *sadb, int sad_count); | |
54 | void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, | |
55 | u8 *sadb, int sad_count); | |
56 | void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, | |
57 | u8 *sadb, int sad_count); | |
87654f87 SG |
58 | void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, |
59 | struct drm_connector *connector, struct drm_display_mode *mode); | |
60 | void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, | |
61 | struct drm_connector *connector, struct drm_display_mode *mode); | |
3cdde027 SG |
62 | struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); |
63 | struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); | |
88252d77 | 64 | void dce6_afmt_select_pin(struct drm_encoder *encoder); |
bfc1f97d SG |
65 | |
66 | static const u32 pin_offsets[7] = | |
67 | { | |
68 | (0x5e00 - 0x5e00), | |
69 | (0x5e18 - 0x5e00), | |
70 | (0x5e30 - 0x5e00), | |
71 | (0x5e48 - 0x5e00), | |
72 | (0x5e60 - 0x5e00), | |
73 | (0x5e78 - 0x5e00), | |
74 | (0x5e90 - 0x5e00), | |
75 | }; | |
76 | ||
1a626b68 SG |
77 | static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) |
78 | { | |
79 | return RREG32(reg); | |
80 | } | |
81 | ||
82 | static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, | |
83 | u32 reg, u32 v) | |
84 | { | |
85 | WREG32(reg, v); | |
86 | } | |
87 | ||
88 | static struct radeon_audio_basic_funcs dce32_funcs = { | |
89 | .endpoint_rreg = radeon_audio_rreg, | |
90 | .endpoint_wreg = radeon_audio_wreg, | |
8bf59820 | 91 | .enable = r600_audio_enable, |
1a626b68 SG |
92 | }; |
93 | ||
94 | static struct radeon_audio_basic_funcs dce4_funcs = { | |
95 | .endpoint_rreg = radeon_audio_rreg, | |
96 | .endpoint_wreg = radeon_audio_wreg, | |
8bf59820 | 97 | .enable = dce4_audio_enable, |
1a626b68 SG |
98 | }; |
99 | ||
100 | static struct radeon_audio_basic_funcs dce6_funcs = { | |
101 | .endpoint_rreg = dce6_endpoint_rreg, | |
102 | .endpoint_wreg = dce6_endpoint_wreg, | |
8bf59820 | 103 | .enable = dce6_audio_enable, |
1a626b68 SG |
104 | }; |
105 | ||
070a2e63 | 106 | static struct radeon_audio_funcs dce32_hdmi_funcs = { |
3cdde027 | 107 | .get_pin = r600_audio_get_pin, |
070a2e63 | 108 | .write_sad_regs = dce3_2_afmt_write_sad_regs, |
00a9d4bc | 109 | .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, |
070a2e63 AD |
110 | }; |
111 | ||
112 | static struct radeon_audio_funcs dce32_dp_funcs = { | |
3cdde027 | 113 | .get_pin = r600_audio_get_pin, |
070a2e63 | 114 | .write_sad_regs = dce3_2_afmt_write_sad_regs, |
00a9d4bc | 115 | .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, |
070a2e63 AD |
116 | }; |
117 | ||
118 | static struct radeon_audio_funcs dce4_hdmi_funcs = { | |
3cdde027 | 119 | .get_pin = r600_audio_get_pin, |
070a2e63 | 120 | .write_sad_regs = evergreen_hdmi_write_sad_regs, |
00a9d4bc | 121 | .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, |
87654f87 | 122 | .write_latency_fields = dce4_afmt_write_latency_fields, |
070a2e63 AD |
123 | }; |
124 | ||
125 | static struct radeon_audio_funcs dce4_dp_funcs = { | |
3cdde027 | 126 | .get_pin = r600_audio_get_pin, |
070a2e63 | 127 | .write_sad_regs = evergreen_hdmi_write_sad_regs, |
00a9d4bc | 128 | .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, |
87654f87 | 129 | .write_latency_fields = dce4_afmt_write_latency_fields, |
070a2e63 AD |
130 | }; |
131 | ||
132 | static struct radeon_audio_funcs dce6_hdmi_funcs = { | |
88252d77 | 133 | .select_pin = dce6_afmt_select_pin, |
3cdde027 | 134 | .get_pin = dce6_audio_get_pin, |
070a2e63 | 135 | .write_sad_regs = dce6_afmt_write_sad_regs, |
00a9d4bc | 136 | .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, |
87654f87 | 137 | .write_latency_fields = dce6_afmt_write_latency_fields, |
070a2e63 AD |
138 | }; |
139 | ||
140 | static struct radeon_audio_funcs dce6_dp_funcs = { | |
88252d77 | 141 | .select_pin = dce6_afmt_select_pin, |
3cdde027 | 142 | .get_pin = dce6_audio_get_pin, |
070a2e63 | 143 | .write_sad_regs = dce6_afmt_write_sad_regs, |
00a9d4bc | 144 | .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, |
87654f87 | 145 | .write_latency_fields = dce6_afmt_write_latency_fields, |
070a2e63 AD |
146 | }; |
147 | ||
1a626b68 SG |
148 | static void radeon_audio_interface_init(struct radeon_device *rdev) |
149 | { | |
150 | if (ASIC_IS_DCE6(rdev)) { | |
151 | rdev->audio.funcs = &dce6_funcs; | |
070a2e63 AD |
152 | rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; |
153 | rdev->audio.dp_funcs = &dce6_dp_funcs; | |
1a626b68 SG |
154 | } else if (ASIC_IS_DCE4(rdev)) { |
155 | rdev->audio.funcs = &dce4_funcs; | |
070a2e63 AD |
156 | rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; |
157 | rdev->audio.dp_funcs = &dce4_dp_funcs; | |
1a626b68 SG |
158 | } else { |
159 | rdev->audio.funcs = &dce32_funcs; | |
070a2e63 AD |
160 | rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; |
161 | rdev->audio.dp_funcs = &dce32_dp_funcs; | |
1a626b68 SG |
162 | } |
163 | } | |
164 | ||
bfc1f97d SG |
165 | static int radeon_audio_chipset_supported(struct radeon_device *rdev) |
166 | { | |
167 | return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); | |
168 | } | |
169 | ||
170 | int radeon_audio_init(struct radeon_device *rdev) | |
171 | { | |
172 | int i; | |
173 | ||
174 | if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) | |
175 | return 0; | |
176 | ||
177 | rdev->audio.enabled = true; | |
178 | ||
179 | if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ | |
180 | rdev->audio.num_pins = 3; | |
181 | else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ | |
182 | rdev->audio.num_pins = 7; | |
183 | else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ | |
184 | rdev->audio.num_pins = 7; | |
185 | else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ | |
186 | rdev->audio.num_pins = 2; | |
187 | else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ | |
188 | rdev->audio.num_pins = 6; | |
189 | else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ | |
190 | rdev->audio.num_pins = 6; | |
191 | else | |
192 | rdev->audio.num_pins = 1; | |
193 | ||
194 | for (i = 0; i < rdev->audio.num_pins; i++) { | |
195 | rdev->audio.pin[i].channels = -1; | |
196 | rdev->audio.pin[i].rate = -1; | |
197 | rdev->audio.pin[i].bits_per_sample = -1; | |
198 | rdev->audio.pin[i].status_bits = 0; | |
199 | rdev->audio.pin[i].category_code = 0; | |
200 | rdev->audio.pin[i].connected = false; | |
201 | rdev->audio.pin[i].offset = pin_offsets[i]; | |
202 | rdev->audio.pin[i].id = i; | |
1a626b68 SG |
203 | } |
204 | ||
205 | radeon_audio_interface_init(rdev); | |
206 | ||
207 | /* disable audio. it will be set up later */ | |
208 | for (i = 0; i < rdev->audio.num_pins; i++) | |
8bf59820 | 209 | radeon_audio_enable(rdev, &rdev->audio.pin[i], false); |
1a626b68 SG |
210 | |
211 | return 0; | |
212 | } | |
213 | ||
214 | void radeon_audio_detect(struct drm_connector *connector, | |
215 | enum drm_connector_status status) | |
216 | { | |
217 | if (!connector || !connector->encoder) | |
218 | return; | |
219 | ||
220 | if (status == connector_status_connected) { | |
221 | int sink_type; | |
222 | struct radeon_device *rdev = connector->encoder->dev->dev_private; | |
223 | struct radeon_connector *radeon_connector; | |
224 | struct radeon_encoder *radeon_encoder = | |
225 | to_radeon_encoder(connector->encoder); | |
226 | ||
227 | if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) { | |
228 | radeon_encoder->audio = 0; | |
229 | return; | |
230 | } | |
231 | ||
232 | radeon_connector = to_radeon_connector(connector); | |
233 | sink_type = radeon_dp_getsinktype(radeon_connector); | |
234 | ||
235 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && | |
236 | sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
237 | radeon_encoder->audio = rdev->audio.dp_funcs; | |
238 | else | |
239 | radeon_encoder->audio = rdev->audio.hdmi_funcs; | |
240 | /* TODO: set up the sads, etc. and set the audio enable_mask */ | |
241 | } else { | |
242 | /* TODO: reset the audio enable_mask */ | |
bfc1f97d | 243 | } |
1a626b68 SG |
244 | } |
245 | ||
246 | u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) | |
247 | { | |
248 | if (rdev->audio.funcs->endpoint_rreg) | |
249 | return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); | |
bfc1f97d SG |
250 | |
251 | return 0; | |
252 | } | |
1a626b68 SG |
253 | |
254 | void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, | |
255 | u32 reg, u32 v) | |
256 | { | |
257 | if (rdev->audio.funcs->endpoint_wreg) | |
258 | rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); | |
259 | } | |
070a2e63 AD |
260 | |
261 | void radeon_audio_write_sad_regs(struct drm_encoder *encoder) | |
262 | { | |
263 | struct radeon_encoder *radeon_encoder; | |
264 | struct drm_connector *connector; | |
265 | struct radeon_connector *radeon_connector = NULL; | |
266 | struct cea_sad *sads; | |
267 | int sad_count; | |
268 | ||
269 | list_for_each_entry(connector, | |
270 | &encoder->dev->mode_config.connector_list, head) { | |
271 | if (connector->encoder == encoder) { | |
272 | radeon_connector = to_radeon_connector(connector); | |
273 | break; | |
274 | } | |
275 | } | |
276 | ||
277 | if (!radeon_connector) { | |
278 | DRM_ERROR("Couldn't find encoder's connector\n"); | |
279 | return; | |
280 | } | |
281 | ||
282 | sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); | |
283 | if (sad_count <= 0) { | |
284 | DRM_ERROR("Couldn't read SADs: %d\n", sad_count); | |
285 | return; | |
286 | } | |
287 | BUG_ON(!sads); | |
288 | ||
289 | radeon_encoder = to_radeon_encoder(encoder); | |
290 | ||
291 | if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) | |
292 | radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); | |
293 | ||
294 | kfree(sads); | |
295 | } | |
00a9d4bc SG |
296 | |
297 | void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) | |
298 | { | |
299 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
300 | struct drm_connector *connector; | |
301 | struct radeon_connector *radeon_connector = NULL; | |
302 | u8 *sadb = NULL; | |
303 | int sad_count; | |
304 | ||
305 | list_for_each_entry(connector, | |
306 | &encoder->dev->mode_config.connector_list, head) { | |
307 | if (connector->encoder == encoder) { | |
308 | radeon_connector = to_radeon_connector(connector); | |
309 | break; | |
310 | } | |
311 | } | |
312 | ||
313 | if (!radeon_connector) { | |
314 | DRM_ERROR("Couldn't find encoder's connector\n"); | |
315 | return; | |
316 | } | |
317 | ||
318 | sad_count = drm_edid_to_speaker_allocation( | |
319 | radeon_connector_edid(connector), &sadb); | |
320 | if (sad_count < 0) { | |
321 | DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", | |
322 | sad_count); | |
323 | sad_count = 0; | |
324 | } | |
325 | ||
326 | if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) | |
327 | radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); | |
328 | ||
329 | kfree(sadb); | |
330 | } | |
87654f87 SG |
331 | |
332 | void radeon_audio_write_latency_fields(struct drm_encoder *encoder, | |
333 | struct drm_display_mode *mode) | |
334 | { | |
335 | struct radeon_encoder *radeon_encoder; | |
336 | struct drm_connector *connector; | |
337 | struct radeon_connector *radeon_connector = 0; | |
338 | ||
339 | list_for_each_entry(connector, | |
340 | &encoder->dev->mode_config.connector_list, head) { | |
341 | if (connector->encoder == encoder) { | |
342 | radeon_connector = to_radeon_connector(connector); | |
343 | break; | |
344 | } | |
345 | } | |
346 | ||
347 | if (!radeon_connector) { | |
348 | DRM_ERROR("Couldn't find encoder's connector\n"); | |
349 | return; | |
350 | } | |
351 | ||
352 | radeon_encoder = to_radeon_encoder(encoder); | |
353 | ||
354 | if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) | |
355 | radeon_encoder->audio->write_latency_fields(encoder, connector, mode); | |
356 | } | |
3cdde027 SG |
357 | |
358 | struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) | |
359 | { | |
360 | struct radeon_device *rdev = encoder->dev->dev_private; | |
361 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
362 | ||
363 | if (radeon_encoder->audio && radeon_encoder->audio->get_pin) | |
364 | return radeon_encoder->audio->get_pin(rdev); | |
365 | ||
366 | return NULL; | |
367 | } | |
88252d77 SG |
368 | |
369 | void radeon_audio_select_pin(struct drm_encoder *encoder) | |
370 | { | |
371 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
372 | ||
373 | if (radeon_encoder->audio && radeon_encoder->audio->select_pin) | |
374 | radeon_encoder->audio->select_pin(encoder); | |
375 | } | |
8bf59820 SG |
376 | |
377 | void radeon_audio_enable(struct radeon_device *rdev, | |
378 | struct r600_audio_pin *pin, u8 enable_mask) | |
379 | { | |
380 | if (rdev->audio.funcs->enable) | |
381 | rdev->audio.funcs->enable(rdev, pin, enable_mask); | |
382 | } |