radeon/audio: applied audio_dpms() and audio_mode_set() calls
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_audio.c
CommitLineData
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1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Slava Grigorev <slava.grigorev@amd.com>
23 */
24
64424d6e 25#include <linux/gcd.h>
bfc1f97d 26#include <drm/drmP.h>
1a626b68 27#include <drm/drm_crtc.h>
bfc1f97d 28#include "radeon.h"
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29#include "atom.h"
30#include "radeon_audio.h"
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31
32void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
33 u8 enable_mask);
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34void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
35 u8 enable_mask);
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36void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
37 u8 enable_mask);
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38u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
39void dce6_endpoint_wreg(struct radeon_device *rdev,
40 u32 offset, u32 reg, u32 v);
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41void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
42 struct cea_sad *sads, int sad_count);
43void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
44 struct cea_sad *sads, int sad_count);
45void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
46 struct cea_sad *sads, int sad_count);
00a9d4bc
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47void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
48 u8 *sadb, int sad_count);
49void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
50 u8 *sadb, int sad_count);
51void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
52 u8 *sadb, int sad_count);
53void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
54 u8 *sadb, int sad_count);
55void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
56 u8 *sadb, int sad_count);
57void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
58 u8 *sadb, int sad_count);
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59void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
60 struct drm_connector *connector, struct drm_display_mode *mode);
61void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
62 struct drm_connector *connector, struct drm_display_mode *mode);
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63struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
64struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
88252d77 65void dce6_afmt_select_pin(struct drm_encoder *encoder);
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66void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
67 struct radeon_crtc *crtc, unsigned int clock);
68void dce3_2_audio_set_dto(struct radeon_device *rdev,
69 struct radeon_crtc *crtc, unsigned int clock);
70void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
71 struct radeon_crtc *crtc, unsigned int clock);
72void dce4_dp_audio_set_dto(struct radeon_device *rdev,
73 struct radeon_crtc *crtc, unsigned int clock);
74void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
75 struct radeon_crtc *crtc, unsigned int clock);
76void dce6_dp_audio_set_dto(struct radeon_device *rdev,
77 struct radeon_crtc *crtc, unsigned int clock);
baa7d8e4 78void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
96ea7afb 79 unsigned char *buffer, size_t size);
baa7d8e4 80void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
96ea7afb 81 unsigned char *buffer, size_t size);
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82void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
83 const struct radeon_hdmi_acr *acr);
84void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
85 const struct radeon_hdmi_acr *acr);
86void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
87 const struct radeon_hdmi_acr *acr);
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88void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
89void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
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90void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
91 u32 offset, int bpc);
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92void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);
93void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
94void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);
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95void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
96void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
97void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
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98static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
99 struct drm_display_mode *mode);
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100void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
101void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
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102
103static const u32 pin_offsets[7] =
104{
105 (0x5e00 - 0x5e00),
106 (0x5e18 - 0x5e00),
107 (0x5e30 - 0x5e00),
108 (0x5e48 - 0x5e00),
109 (0x5e60 - 0x5e00),
110 (0x5e78 - 0x5e00),
111 (0x5e90 - 0x5e00),
112};
113
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114static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
115{
116 return RREG32(reg);
117}
118
119static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
120 u32 reg, u32 v)
121{
122 WREG32(reg, v);
123}
124
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125static struct radeon_audio_basic_funcs r600_funcs = {
126 .endpoint_rreg = radeon_audio_rreg,
127 .endpoint_wreg = radeon_audio_wreg,
128 .enable = r600_audio_enable,
129};
130
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131static struct radeon_audio_basic_funcs dce32_funcs = {
132 .endpoint_rreg = radeon_audio_rreg,
133 .endpoint_wreg = radeon_audio_wreg,
8bf59820 134 .enable = r600_audio_enable,
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135};
136
137static struct radeon_audio_basic_funcs dce4_funcs = {
138 .endpoint_rreg = radeon_audio_rreg,
139 .endpoint_wreg = radeon_audio_wreg,
8bf59820 140 .enable = dce4_audio_enable,
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141};
142
143static struct radeon_audio_basic_funcs dce6_funcs = {
144 .endpoint_rreg = dce6_endpoint_rreg,
145 .endpoint_wreg = dce6_endpoint_wreg,
8bf59820 146 .enable = dce6_audio_enable,
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147};
148
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149static struct radeon_audio_funcs r600_hdmi_funcs = {
150 .get_pin = r600_audio_get_pin,
151 .set_dto = r600_hdmi_audio_set_dto,
64424d6e 152 .update_acr = r600_hdmi_update_acr,
930a9785 153 .set_vbi_packet = r600_set_vbi_packet,
baa7d8e4 154 .set_avi_packet = r600_set_avi_packet,
1852c9a0 155 .set_audio_packet = r600_set_audio_packet,
3be2e7d0 156 .set_mute = r600_set_mute,
6e72376d 157 .mode_set = radeon_audio_hdmi_mode_set,
6f945693 158 .dpms = r600_hdmi_enable,
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159};
160
070a2e63 161static struct radeon_audio_funcs dce32_hdmi_funcs = {
3cdde027 162 .get_pin = r600_audio_get_pin,
070a2e63 163 .write_sad_regs = dce3_2_afmt_write_sad_regs,
00a9d4bc 164 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
a85d682a 165 .set_dto = dce3_2_audio_set_dto,
64424d6e 166 .update_acr = dce3_2_hdmi_update_acr,
930a9785 167 .set_vbi_packet = r600_set_vbi_packet,
baa7d8e4 168 .set_avi_packet = r600_set_avi_packet,
1852c9a0 169 .set_audio_packet = dce3_2_set_audio_packet,
3be2e7d0 170 .set_mute = dce3_2_set_mute,
6e72376d 171 .mode_set = radeon_audio_hdmi_mode_set,
6f945693 172 .dpms = r600_hdmi_enable,
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173};
174
175static struct radeon_audio_funcs dce32_dp_funcs = {
3cdde027 176 .get_pin = r600_audio_get_pin,
070a2e63 177 .write_sad_regs = dce3_2_afmt_write_sad_regs,
00a9d4bc 178 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
a85d682a 179 .set_dto = dce3_2_audio_set_dto,
baa7d8e4 180 .set_avi_packet = r600_set_avi_packet,
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181};
182
183static struct radeon_audio_funcs dce4_hdmi_funcs = {
3cdde027 184 .get_pin = r600_audio_get_pin,
070a2e63 185 .write_sad_regs = evergreen_hdmi_write_sad_regs,
00a9d4bc 186 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
87654f87 187 .write_latency_fields = dce4_afmt_write_latency_fields,
a85d682a 188 .set_dto = dce4_hdmi_audio_set_dto,
64424d6e 189 .update_acr = evergreen_hdmi_update_acr,
930a9785 190 .set_vbi_packet = dce4_set_vbi_packet,
be273e58 191 .set_color_depth = dce4_hdmi_set_color_depth,
baa7d8e4 192 .set_avi_packet = evergreen_set_avi_packet,
1852c9a0 193 .set_audio_packet = dce4_set_audio_packet,
3be2e7d0 194 .set_mute = dce4_set_mute,
6e72376d 195 .mode_set = radeon_audio_hdmi_mode_set,
6f945693 196 .dpms = evergreen_hdmi_enable,
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197};
198
199static struct radeon_audio_funcs dce4_dp_funcs = {
3cdde027 200 .get_pin = r600_audio_get_pin,
070a2e63 201 .write_sad_regs = evergreen_hdmi_write_sad_regs,
00a9d4bc 202 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
87654f87 203 .write_latency_fields = dce4_afmt_write_latency_fields,
a85d682a 204 .set_dto = dce4_dp_audio_set_dto,
baa7d8e4 205 .set_avi_packet = evergreen_set_avi_packet,
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206};
207
208static struct radeon_audio_funcs dce6_hdmi_funcs = {
88252d77 209 .select_pin = dce6_afmt_select_pin,
3cdde027 210 .get_pin = dce6_audio_get_pin,
070a2e63 211 .write_sad_regs = dce6_afmt_write_sad_regs,
00a9d4bc 212 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
87654f87 213 .write_latency_fields = dce6_afmt_write_latency_fields,
a85d682a 214 .set_dto = dce6_hdmi_audio_set_dto,
64424d6e 215 .update_acr = evergreen_hdmi_update_acr,
930a9785 216 .set_vbi_packet = dce4_set_vbi_packet,
be273e58 217 .set_color_depth = dce4_hdmi_set_color_depth,
baa7d8e4 218 .set_avi_packet = evergreen_set_avi_packet,
1852c9a0 219 .set_audio_packet = dce4_set_audio_packet,
3be2e7d0 220 .set_mute = dce4_set_mute,
6e72376d 221 .mode_set = radeon_audio_hdmi_mode_set,
6f945693 222 .dpms = evergreen_hdmi_enable,
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223};
224
225static struct radeon_audio_funcs dce6_dp_funcs = {
88252d77 226 .select_pin = dce6_afmt_select_pin,
3cdde027 227 .get_pin = dce6_audio_get_pin,
070a2e63 228 .write_sad_regs = dce6_afmt_write_sad_regs,
00a9d4bc 229 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
87654f87 230 .write_latency_fields = dce6_afmt_write_latency_fields,
a85d682a 231 .set_dto = dce6_dp_audio_set_dto,
baa7d8e4 232 .set_avi_packet = evergreen_set_avi_packet,
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233};
234
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235static void radeon_audio_interface_init(struct radeon_device *rdev)
236{
237 if (ASIC_IS_DCE6(rdev)) {
238 rdev->audio.funcs = &dce6_funcs;
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239 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
240 rdev->audio.dp_funcs = &dce6_dp_funcs;
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241 } else if (ASIC_IS_DCE4(rdev)) {
242 rdev->audio.funcs = &dce4_funcs;
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243 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
244 rdev->audio.dp_funcs = &dce4_dp_funcs;
a85d682a 245 } else if (ASIC_IS_DCE32(rdev)) {
1a626b68 246 rdev->audio.funcs = &dce32_funcs;
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247 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
248 rdev->audio.dp_funcs = &dce32_dp_funcs;
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249 } else {
250 rdev->audio.funcs = &r600_funcs;
251 rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
252 rdev->audio.dp_funcs = 0;
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253 }
254}
255
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256static int radeon_audio_chipset_supported(struct radeon_device *rdev)
257{
258 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
259}
260
261int radeon_audio_init(struct radeon_device *rdev)
262{
263 int i;
264
265 if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
266 return 0;
267
268 rdev->audio.enabled = true;
269
270 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
271 rdev->audio.num_pins = 3;
272 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
273 rdev->audio.num_pins = 7;
274 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
275 rdev->audio.num_pins = 7;
276 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
277 rdev->audio.num_pins = 2;
278 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
279 rdev->audio.num_pins = 6;
280 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
281 rdev->audio.num_pins = 6;
282 else
283 rdev->audio.num_pins = 1;
284
285 for (i = 0; i < rdev->audio.num_pins; i++) {
286 rdev->audio.pin[i].channels = -1;
287 rdev->audio.pin[i].rate = -1;
288 rdev->audio.pin[i].bits_per_sample = -1;
289 rdev->audio.pin[i].status_bits = 0;
290 rdev->audio.pin[i].category_code = 0;
291 rdev->audio.pin[i].connected = false;
292 rdev->audio.pin[i].offset = pin_offsets[i];
293 rdev->audio.pin[i].id = i;
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294 }
295
296 radeon_audio_interface_init(rdev);
297
298 /* disable audio. it will be set up later */
299 for (i = 0; i < rdev->audio.num_pins; i++)
8bf59820 300 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
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301
302 return 0;
303}
304
305void radeon_audio_detect(struct drm_connector *connector,
306 enum drm_connector_status status)
307{
308 if (!connector || !connector->encoder)
309 return;
310
311 if (status == connector_status_connected) {
312 int sink_type;
313 struct radeon_device *rdev = connector->encoder->dev->dev_private;
314 struct radeon_connector *radeon_connector;
315 struct radeon_encoder *radeon_encoder =
316 to_radeon_encoder(connector->encoder);
317
318 if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
319 radeon_encoder->audio = 0;
320 return;
321 }
322
323 radeon_connector = to_radeon_connector(connector);
324 sink_type = radeon_dp_getsinktype(radeon_connector);
325
326 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
327 sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
328 radeon_encoder->audio = rdev->audio.dp_funcs;
329 else
330 radeon_encoder->audio = rdev->audio.hdmi_funcs;
331 /* TODO: set up the sads, etc. and set the audio enable_mask */
332 } else {
333 /* TODO: reset the audio enable_mask */
bfc1f97d 334 }
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335}
336
337u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
338{
339 if (rdev->audio.funcs->endpoint_rreg)
340 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
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341
342 return 0;
343}
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344
345void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
346 u32 reg, u32 v)
347{
348 if (rdev->audio.funcs->endpoint_wreg)
349 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
350}
070a2e63 351
6e72376d 352static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
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353{
354 struct radeon_encoder *radeon_encoder;
355 struct drm_connector *connector;
356 struct radeon_connector *radeon_connector = NULL;
357 struct cea_sad *sads;
358 int sad_count;
359
360 list_for_each_entry(connector,
361 &encoder->dev->mode_config.connector_list, head) {
362 if (connector->encoder == encoder) {
363 radeon_connector = to_radeon_connector(connector);
364 break;
365 }
366 }
367
368 if (!radeon_connector) {
369 DRM_ERROR("Couldn't find encoder's connector\n");
370 return;
371 }
372
373 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
374 if (sad_count <= 0) {
375 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
376 return;
377 }
378 BUG_ON(!sads);
379
380 radeon_encoder = to_radeon_encoder(encoder);
381
382 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
383 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
384
385 kfree(sads);
386}
00a9d4bc 387
6e72376d 388static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
00a9d4bc
SG
389{
390 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
391 struct drm_connector *connector;
392 struct radeon_connector *radeon_connector = NULL;
393 u8 *sadb = NULL;
394 int sad_count;
395
396 list_for_each_entry(connector,
397 &encoder->dev->mode_config.connector_list, head) {
398 if (connector->encoder == encoder) {
399 radeon_connector = to_radeon_connector(connector);
400 break;
401 }
402 }
403
404 if (!radeon_connector) {
405 DRM_ERROR("Couldn't find encoder's connector\n");
406 return;
407 }
408
409 sad_count = drm_edid_to_speaker_allocation(
410 radeon_connector_edid(connector), &sadb);
411 if (sad_count < 0) {
412 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
413 sad_count);
414 sad_count = 0;
415 }
416
417 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
418 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
419
420 kfree(sadb);
421}
87654f87 422
6e72376d 423static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
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424 struct drm_display_mode *mode)
425{
426 struct radeon_encoder *radeon_encoder;
427 struct drm_connector *connector;
428 struct radeon_connector *radeon_connector = 0;
429
430 list_for_each_entry(connector,
431 &encoder->dev->mode_config.connector_list, head) {
432 if (connector->encoder == encoder) {
433 radeon_connector = to_radeon_connector(connector);
434 break;
435 }
436 }
437
438 if (!radeon_connector) {
439 DRM_ERROR("Couldn't find encoder's connector\n");
440 return;
441 }
442
443 radeon_encoder = to_radeon_encoder(encoder);
444
445 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
446 radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
447}
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SG
448
449struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
450{
451 struct radeon_device *rdev = encoder->dev->dev_private;
452 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
453
454 if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
455 return radeon_encoder->audio->get_pin(rdev);
456
457 return NULL;
458}
88252d77 459
6e72376d 460static void radeon_audio_select_pin(struct drm_encoder *encoder)
88252d77
SG
461{
462 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
463
464 if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
465 radeon_encoder->audio->select_pin(encoder);
466}
8bf59820
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467
468void radeon_audio_enable(struct radeon_device *rdev,
469 struct r600_audio_pin *pin, u8 enable_mask)
470{
471 if (rdev->audio.funcs->enable)
472 rdev->audio.funcs->enable(rdev, pin, enable_mask);
473}
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474
475void radeon_audio_fini(struct radeon_device *rdev)
476{
477 int i;
478
479 if (!rdev->audio.enabled)
480 return;
481
482 for (i = 0; i < rdev->audio.num_pins; i++)
483 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
484
485 rdev->audio.enabled = false;
486}
a85d682a 487
6e72376d 488static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
a85d682a
SG
489{
490 struct radeon_device *rdev = encoder->dev->dev_private;
491 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
492 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
493
494 if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
495 radeon_encoder->audio->set_dto(rdev, crtc, clock);
496}
96ea7afb 497
6e72376d 498static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
baa7d8e4 499 struct drm_display_mode *mode)
96ea7afb
SG
500{
501 struct radeon_device *rdev = encoder->dev->dev_private;
502 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
503 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
baa7d8e4
SG
504 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
505 struct hdmi_avi_infoframe frame;
506 int err;
507
508 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
509 if (err < 0) {
510 DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
511 return err;
512 }
513
514 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
515 if (err < 0) {
516 DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
517 return err;
518 }
519
520 if (dig && dig->afmt &&
521 radeon_encoder->audio && radeon_encoder->audio->set_avi_packet)
522 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
523 buffer, sizeof(buffer));
96ea7afb 524
baa7d8e4 525 return 0;
96ea7afb 526}
64424d6e
SG
527
528/*
529 * calculate CTS and N values if they are not found in the table
530 */
531static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
532{
533 int n, cts;
534 unsigned long div, mul;
535
536 /* Safe, but overly large values */
537 n = 128 * freq;
538 cts = clock * 1000;
539
540 /* Smallest valid fraction */
541 div = gcd(n, cts);
542
543 n /= div;
544 cts /= div;
545
546 /*
547 * The optimal N is 128*freq/1000. Calculate the closest larger
548 * value that doesn't truncate any bits.
549 */
550 mul = ((128*freq/1000) + (n-1))/n;
551
552 n *= mul;
553 cts *= mul;
554
555 /* Check that we are in spec (not always possible) */
556 if (n < (128*freq/1500))
557 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
558 if (n > (128*freq/300))
559 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
560
561 *N = n;
562 *CTS = cts;
563
564 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
565 *N, *CTS, freq);
566}
567
568static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
569{
570 static struct radeon_hdmi_acr res;
571 u8 i;
572
573 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
574 /* 32kHz 44.1kHz 48kHz */
575 /* Clock N CTS N CTS N CTS */
576 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
577 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
578 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
579 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
580 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
581 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
582 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
583 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
584 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
585 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
586 };
587
588 /* Precalculated values for common clocks */
589 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
590 if (hdmi_predefined_acr[i].clock == clock)
591 return &hdmi_predefined_acr[i];
592
593 /* And odd clocks get manually calculated */
594 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
595 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
596 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
597
598 return &res;
599}
600
601/*
602 * update the N and CTS parameters for a given pixel clock rate
603 */
6e72376d 604static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
64424d6e
SG
605{
606 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
607 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
608 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
609
610 if (!dig || !dig->afmt)
611 return;
612
613 if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
614 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
615}
930a9785 616
6e72376d 617static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
930a9785
AD
618{
619 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
620 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
621
622 if (!dig || !dig->afmt)
623 return;
624
625 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
626 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
627}
be273e58 628
6e72376d 629static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
be273e58
SG
630{
631 int bpc = 8;
632 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
633 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
634
635 if (!dig || !dig->afmt)
636 return;
637
638 if (encoder->crtc) {
639 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
640 bpc = radeon_crtc->bpc;
641 }
642
643 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
644 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
645}
1852c9a0 646
6e72376d 647static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
1852c9a0
SG
648{
649 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
650 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
651
652 if (!dig || !dig->afmt)
653 return;
654
655 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
656 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
657}
3be2e7d0 658
6e72376d 659static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
3be2e7d0
SG
660{
661 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
662 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
663
664 if (!dig || !dig->afmt)
665 return;
666
667 if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
668 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
669}
6e72376d
SG
670
671/*
672 * update the info frames with the data from the current display mode
673 */
674static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
675 struct drm_display_mode *mode)
676{
677 struct radeon_device *rdev = encoder->dev->dev_private;
678 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
679 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
680
681 if (!dig || !dig->afmt)
682 return;
683
684 /* disable audio prior to setting up hw */
685 dig->afmt->pin = radeon_audio_get_pin(encoder);
686 radeon_audio_enable(rdev, dig->afmt->pin, 0);
687
688 radeon_audio_set_dto(encoder, mode->clock);
689 radeon_audio_set_vbi_packet(encoder);
690 radeon_hdmi_set_color_depth(encoder);
691 radeon_audio_set_mute(encoder, false);
692 radeon_audio_update_acr(encoder, mode->clock);
693 radeon_audio_write_speaker_allocation(encoder);
694 radeon_audio_set_audio_packet(encoder);
695 radeon_audio_select_pin(encoder);
696 radeon_audio_write_sad_regs(encoder);
697 radeon_audio_write_latency_fields(encoder, mode);
698
699 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
700 return;
701
702 /* enable audio after to setting up hw */
703 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
704}
705
706void radeon_audio_mode_set(struct drm_encoder *encoder,
707 struct drm_display_mode *mode)
708{
709 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
710
711 if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
712 radeon_encoder->audio->mode_set(encoder, mode);
713}
6f945693
SG
714
715void radeon_audio_dpms(struct drm_encoder *encoder, int mode)
716{
717 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
718
719 if (radeon_encoder->audio && radeon_encoder->audio->dpms)
720 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON);
721}