[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_audio.c

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Slava Grigorev <slava.grigorev@amd.com>
 */

#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include "radeon.h"
#include "atom.h"
#include "radeon_audio.h"

void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
		u8 enable_mask);
void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
		u8 enable_mask);
u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
void dce6_endpoint_wreg(struct radeon_device *rdev,
		u32 offset, u32 reg, u32 v);

static const u32 pin_offsets[7] =
{
	(0x5e00 - 0x5e00),
	(0x5e18 - 0x5e00),
	(0x5e30 - 0x5e00),
	(0x5e48 - 0x5e00),
	(0x5e60 - 0x5e00),
	(0x5e78 - 0x5e00),
	(0x5e90 - 0x5e00),
};

static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
{
	return RREG32(reg);
}

static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
		u32 reg, u32 v)
{
	WREG32(reg, v);
}

static struct radeon_audio_basic_funcs dce32_funcs = {
	.endpoint_rreg = radeon_audio_rreg,
	.endpoint_wreg = radeon_audio_wreg,
};

static struct radeon_audio_basic_funcs dce4_funcs = {
	.endpoint_rreg = radeon_audio_rreg,
	.endpoint_wreg = radeon_audio_wreg,
};

static struct radeon_audio_basic_funcs dce6_funcs = {
	.endpoint_rreg = dce6_endpoint_rreg,
	.endpoint_wreg = dce6_endpoint_wreg,
};

static void radeon_audio_interface_init(struct radeon_device *rdev)
{
	if (ASIC_IS_DCE6(rdev)) {
		rdev->audio.funcs = &dce6_funcs;
	} else if (ASIC_IS_DCE4(rdev)) {
		rdev->audio.funcs = &dce4_funcs;
	} else {
		rdev->audio.funcs = &dce32_funcs;
	}
}

static int radeon_audio_chipset_supported(struct radeon_device *rdev)
{
	return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
}

int radeon_audio_init(struct radeon_device *rdev)
{
	int i;

	if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
		return 0;

	rdev->audio.enabled = true;

	if (ASIC_IS_DCE83(rdev))		/* KB: 2 streams, 3 endpoints */
		rdev->audio.num_pins = 3;
	else if (ASIC_IS_DCE81(rdev))	/* KV: 4 streams, 7 endpoints */
		rdev->audio.num_pins = 7;
	else if (ASIC_IS_DCE8(rdev))	/* BN/HW: 6 streams, 7 endpoints */
		rdev->audio.num_pins = 7;
	else if (ASIC_IS_DCE64(rdev))	/* OL: 2 streams, 2 endpoints */
		rdev->audio.num_pins = 2;
	else if (ASIC_IS_DCE61(rdev))	/* TN: 4 streams, 6 endpoints */
		rdev->audio.num_pins = 6;
	else if (ASIC_IS_DCE6(rdev))	/* SI: 6 streams, 6 endpoints */
		rdev->audio.num_pins = 6;
	else
		rdev->audio.num_pins = 1;

	for (i = 0; i < rdev->audio.num_pins; i++) {
		rdev->audio.pin[i].channels = -1;
		rdev->audio.pin[i].rate = -1;
		rdev->audio.pin[i].bits_per_sample = -1;
		rdev->audio.pin[i].status_bits = 0;
		rdev->audio.pin[i].category_code = 0;
		rdev->audio.pin[i].connected = false;
		rdev->audio.pin[i].offset = pin_offsets[i];
		rdev->audio.pin[i].id = i;
	}

	radeon_audio_interface_init(rdev);

	/* disable audio.  it will be set up later */
	for (i = 0; i < rdev->audio.num_pins; i++)
		if (ASIC_IS_DCE6(rdev))
			dce6_audio_enable(rdev, &rdev->audio.pin[i], false);
		else
			r600_audio_enable(rdev, &rdev->audio.pin[i], false);

	return 0;
}

void radeon_audio_detect(struct drm_connector *connector,
	enum drm_connector_status status)
{
	if (!connector || !connector->encoder)
		return;

	if (status == connector_status_connected) {
		int sink_type;
		struct radeon_device *rdev = connector->encoder->dev->dev_private;
		struct radeon_connector *radeon_connector;
		struct radeon_encoder *radeon_encoder =
			to_radeon_encoder(connector->encoder);

		if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
			radeon_encoder->audio = 0;
			return;
		}

		radeon_connector = to_radeon_connector(connector);
		sink_type = radeon_dp_getsinktype(radeon_connector);

		if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
			sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
			radeon_encoder->audio = rdev->audio.dp_funcs;
		else
			radeon_encoder->audio = rdev->audio.hdmi_funcs;
		/* TODO: set up the sads, etc. and set the audio enable_mask */
	} else {
		/* TODO: reset the audio enable_mask */
	}
}

u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
{
	if (rdev->audio.funcs->endpoint_rreg)
		return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);

	return 0;
}

void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
	u32 reg, u32 v)
{
	if (rdev->audio.funcs->endpoint_wreg)
		rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
}
Commit	Line	Data
bfc1f97d SG	1	/*
	2	* Copyright 2014 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Slava Grigorev <slava.grigorev@amd.com>
	23	*/
	24
	25	#include <drm/drmP.h>
1a626b68	26	#include <drm/drm_crtc.h>
bfc1f97d	27	#include "radeon.h"
1a626b68 SG	28	#include "atom.h"
1a626b68 SG	29	#include "radeon_audio.h"
bfc1f97d SG	30
	31	void r600_audio_enable(struct radeon_device rdev, struct r600_audio_pin pin,
	32	u8 enable_mask);
	33	void dce6_audio_enable(struct radeon_device rdev, struct r600_audio_pin pin,
	34	u8 enable_mask);
1a626b68 SG	35	u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
	36	void dce6_endpoint_wreg(struct radeon_device *rdev,
	37	u32 offset, u32 reg, u32 v);
bfc1f97d SG	38
	39	static const u32 pin_offsets[7] =
	40	{
	41	(0x5e00 - 0x5e00),
	42	(0x5e18 - 0x5e00),
	43	(0x5e30 - 0x5e00),
	44	(0x5e48 - 0x5e00),
	45	(0x5e60 - 0x5e00),
	46	(0x5e78 - 0x5e00),
	47	(0x5e90 - 0x5e00),
	48	};
	49
1a626b68 SG	50	static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
	51	{
	52	return RREG32(reg);
	53	}
	54
	55	static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
	56	u32 reg, u32 v)
	57	{
	58	WREG32(reg, v);
	59	}
	60
	61	static struct radeon_audio_basic_funcs dce32_funcs = {
	62	.endpoint_rreg = radeon_audio_rreg,
	63	.endpoint_wreg = radeon_audio_wreg,
	64	};
	65
	66	static struct radeon_audio_basic_funcs dce4_funcs = {
	67	.endpoint_rreg = radeon_audio_rreg,
	68	.endpoint_wreg = radeon_audio_wreg,
	69	};
	70
	71	static struct radeon_audio_basic_funcs dce6_funcs = {
	72	.endpoint_rreg = dce6_endpoint_rreg,
	73	.endpoint_wreg = dce6_endpoint_wreg,
	74	};
	75
	76	static void radeon_audio_interface_init(struct radeon_device *rdev)
	77	{
	78	if (ASIC_IS_DCE6(rdev)) {
	79	rdev->audio.funcs = &dce6_funcs;
	80	} else if (ASIC_IS_DCE4(rdev)) {
	81	rdev->audio.funcs = &dce4_funcs;
	82	} else {
	83	rdev->audio.funcs = &dce32_funcs;
	84	}
	85	}
	86
bfc1f97d SG	87	static int radeon_audio_chipset_supported(struct radeon_device *rdev)
	88	{
	89	return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
	90	}
	91
	92	int radeon_audio_init(struct radeon_device *rdev)
	93	{
	94	int i;
	95
	96	if (!radeon_audio \|\| !radeon_audio_chipset_supported(rdev))
	97	return 0;
	98
	99	rdev->audio.enabled = true;
	100
	101	if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
	102	rdev->audio.num_pins = 3;
	103	else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
	104	rdev->audio.num_pins = 7;
	105	else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
	106	rdev->audio.num_pins = 7;
	107	else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
	108	rdev->audio.num_pins = 2;
	109	else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
	110	rdev->audio.num_pins = 6;
	111	else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
	112	rdev->audio.num_pins = 6;
	113	else
	114	rdev->audio.num_pins = 1;
	115
	116	for (i = 0; i < rdev->audio.num_pins; i++) {
	117	rdev->audio.pin[i].channels = -1;
	118	rdev->audio.pin[i].rate = -1;
	119	rdev->audio.pin[i].bits_per_sample = -1;
	120	rdev->audio.pin[i].status_bits = 0;
	121	rdev->audio.pin[i].category_code = 0;
	122	rdev->audio.pin[i].connected = false;
	123	rdev->audio.pin[i].offset = pin_offsets[i];
	124	rdev->audio.pin[i].id = i;
1a626b68 SG	125	}
	126
	127	radeon_audio_interface_init(rdev);
	128
	129	/* disable audio. it will be set up later */
	130	for (i = 0; i < rdev->audio.num_pins; i++)
bfc1f97d SG	131	if (ASIC_IS_DCE6(rdev))
	132	dce6_audio_enable(rdev, &rdev->audio.pin[i], false);
	133	else
	134	r600_audio_enable(rdev, &rdev->audio.pin[i], false);
1a626b68 SG	135
	136	return 0;
	137	}
	138
	139	void radeon_audio_detect(struct drm_connector *connector,
	140	enum drm_connector_status status)
	141	{
	142	if (!connector \|\| !connector->encoder)
	143	return;
	144
	145	if (status == connector_status_connected) {
	146	int sink_type;
	147	struct radeon_device *rdev = connector->encoder->dev->dev_private;
	148	struct radeon_connector *radeon_connector;
	149	struct radeon_encoder *radeon_encoder =
	150	to_radeon_encoder(connector->encoder);
	151
	152	if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
	153	radeon_encoder->audio = 0;
	154	return;
	155	}
	156
	157	radeon_connector = to_radeon_connector(connector);
	158	sink_type = radeon_dp_getsinktype(radeon_connector);
	159
	160	if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
	161	sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
	162	radeon_encoder->audio = rdev->audio.dp_funcs;
	163	else
	164	radeon_encoder->audio = rdev->audio.hdmi_funcs;
	165	/* TODO: set up the sads, etc. and set the audio enable_mask */
	166	} else {
	167	/* TODO: reset the audio enable_mask */
bfc1f97d	168	}
1a626b68 SG	169	}
	170
	171	u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
	172	{
	173	if (rdev->audio.funcs->endpoint_rreg)
	174	return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
bfc1f97d SG	175
	176	return 0;
	177	}
1a626b68 SG	178
	179	void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
	180	u32 reg, u32 v)
	181	{
	182	if (rdev->audio.funcs->endpoint_wreg)
	183	rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
	184	}