Commit | Line | Data |
---|---|---|
f92f168f TV |
1 | /* |
2 | * LG.Philips LB035Q02 LCD Panel driver | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments | |
5 | * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> | |
6 | * Based on a driver by: Steve Sakoman <steve@sakoman.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License version 2 as published by | |
10 | * the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/spi/spi.h> | |
16 | #include <linux/mutex.h> | |
17 | #include <linux/gpio.h> | |
18 | ||
19 | #include <video/omapdss.h> | |
20 | #include <video/omap-panel-data.h> | |
21 | ||
22 | static struct omap_video_timings lb035q02_timings = { | |
23 | .x_res = 320, | |
24 | .y_res = 240, | |
25 | ||
d8d78941 | 26 | .pixelclock = 6500000, |
f92f168f TV |
27 | |
28 | .hsw = 2, | |
29 | .hfp = 20, | |
30 | .hbp = 68, | |
31 | ||
32 | .vsw = 2, | |
33 | .vfp = 4, | |
34 | .vbp = 18, | |
35 | ||
36 | .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, | |
37 | .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, | |
38 | .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, | |
39 | .de_level = OMAPDSS_SIG_ACTIVE_HIGH, | |
7a16360d | 40 | .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE, |
f92f168f TV |
41 | }; |
42 | ||
43 | struct panel_drv_data { | |
44 | struct omap_dss_device dssdev; | |
45 | struct omap_dss_device *in; | |
46 | ||
47 | struct spi_device *spi; | |
48 | ||
49 | int data_lines; | |
50 | ||
51 | struct omap_video_timings videomode; | |
52 | ||
fbf73098 | 53 | /* used for non-DT boot, to be removed */ |
f92f168f | 54 | int backlight_gpio; |
fbf73098 TV |
55 | |
56 | struct gpio_desc *enable_gpio; | |
f92f168f TV |
57 | }; |
58 | ||
59 | #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev) | |
60 | ||
61 | static int lb035q02_write_reg(struct spi_device *spi, u8 reg, u16 val) | |
62 | { | |
63 | struct spi_message msg; | |
64 | struct spi_transfer index_xfer = { | |
65 | .len = 3, | |
66 | .cs_change = 1, | |
67 | }; | |
68 | struct spi_transfer value_xfer = { | |
69 | .len = 3, | |
70 | }; | |
71 | u8 buffer[16]; | |
72 | ||
73 | spi_message_init(&msg); | |
74 | ||
75 | /* register index */ | |
76 | buffer[0] = 0x70; | |
77 | buffer[1] = 0x00; | |
78 | buffer[2] = reg & 0x7f; | |
79 | index_xfer.tx_buf = buffer; | |
80 | spi_message_add_tail(&index_xfer, &msg); | |
81 | ||
82 | /* register value */ | |
83 | buffer[4] = 0x72; | |
84 | buffer[5] = val >> 8; | |
85 | buffer[6] = val; | |
86 | value_xfer.tx_buf = buffer + 4; | |
87 | spi_message_add_tail(&value_xfer, &msg); | |
88 | ||
89 | return spi_sync(spi, &msg); | |
90 | } | |
91 | ||
92 | static void init_lb035q02_panel(struct spi_device *spi) | |
93 | { | |
94 | /* Init sequence from page 28 of the lb035q02 spec */ | |
95 | lb035q02_write_reg(spi, 0x01, 0x6300); | |
96 | lb035q02_write_reg(spi, 0x02, 0x0200); | |
97 | lb035q02_write_reg(spi, 0x03, 0x0177); | |
98 | lb035q02_write_reg(spi, 0x04, 0x04c7); | |
99 | lb035q02_write_reg(spi, 0x05, 0xffc0); | |
100 | lb035q02_write_reg(spi, 0x06, 0xe806); | |
101 | lb035q02_write_reg(spi, 0x0a, 0x4008); | |
102 | lb035q02_write_reg(spi, 0x0b, 0x0000); | |
103 | lb035q02_write_reg(spi, 0x0d, 0x0030); | |
104 | lb035q02_write_reg(spi, 0x0e, 0x2800); | |
105 | lb035q02_write_reg(spi, 0x0f, 0x0000); | |
106 | lb035q02_write_reg(spi, 0x16, 0x9f80); | |
107 | lb035q02_write_reg(spi, 0x17, 0x0a0f); | |
108 | lb035q02_write_reg(spi, 0x1e, 0x00c1); | |
109 | lb035q02_write_reg(spi, 0x30, 0x0300); | |
110 | lb035q02_write_reg(spi, 0x31, 0x0007); | |
111 | lb035q02_write_reg(spi, 0x32, 0x0000); | |
112 | lb035q02_write_reg(spi, 0x33, 0x0000); | |
113 | lb035q02_write_reg(spi, 0x34, 0x0707); | |
114 | lb035q02_write_reg(spi, 0x35, 0x0004); | |
115 | lb035q02_write_reg(spi, 0x36, 0x0302); | |
116 | lb035q02_write_reg(spi, 0x37, 0x0202); | |
117 | lb035q02_write_reg(spi, 0x3a, 0x0a0d); | |
118 | lb035q02_write_reg(spi, 0x3b, 0x0806); | |
119 | } | |
120 | ||
121 | static int lb035q02_connect(struct omap_dss_device *dssdev) | |
122 | { | |
123 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
124 | struct omap_dss_device *in = ddata->in; | |
125 | int r; | |
126 | ||
127 | if (omapdss_device_is_connected(dssdev)) | |
128 | return 0; | |
129 | ||
130 | r = in->ops.dpi->connect(in, dssdev); | |
131 | if (r) | |
132 | return r; | |
133 | ||
134 | init_lb035q02_panel(ddata->spi); | |
135 | ||
136 | return 0; | |
137 | } | |
138 | ||
139 | static void lb035q02_disconnect(struct omap_dss_device *dssdev) | |
140 | { | |
141 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
142 | struct omap_dss_device *in = ddata->in; | |
143 | ||
144 | if (!omapdss_device_is_connected(dssdev)) | |
145 | return; | |
146 | ||
147 | in->ops.dpi->disconnect(in, dssdev); | |
148 | } | |
149 | ||
150 | static int lb035q02_enable(struct omap_dss_device *dssdev) | |
151 | { | |
152 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
153 | struct omap_dss_device *in = ddata->in; | |
154 | int r; | |
155 | ||
156 | if (!omapdss_device_is_connected(dssdev)) | |
157 | return -ENODEV; | |
158 | ||
159 | if (omapdss_device_is_enabled(dssdev)) | |
160 | return 0; | |
161 | ||
1b71f104 TV |
162 | if (ddata->data_lines) |
163 | in->ops.dpi->set_data_lines(in, ddata->data_lines); | |
f92f168f TV |
164 | in->ops.dpi->set_timings(in, &ddata->videomode); |
165 | ||
166 | r = in->ops.dpi->enable(in); | |
167 | if (r) | |
168 | return r; | |
169 | ||
fbf73098 TV |
170 | if (ddata->enable_gpio) |
171 | gpiod_set_value_cansleep(ddata->enable_gpio, 1); | |
f92f168f TV |
172 | |
173 | if (gpio_is_valid(ddata->backlight_gpio)) | |
174 | gpio_set_value_cansleep(ddata->backlight_gpio, 1); | |
175 | ||
176 | dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
181 | static void lb035q02_disable(struct omap_dss_device *dssdev) | |
182 | { | |
183 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
184 | struct omap_dss_device *in = ddata->in; | |
185 | ||
186 | if (!omapdss_device_is_enabled(dssdev)) | |
187 | return; | |
188 | ||
fbf73098 TV |
189 | if (ddata->enable_gpio) |
190 | gpiod_set_value_cansleep(ddata->enable_gpio, 0); | |
f92f168f TV |
191 | |
192 | if (gpio_is_valid(ddata->backlight_gpio)) | |
193 | gpio_set_value_cansleep(ddata->backlight_gpio, 0); | |
194 | ||
195 | in->ops.dpi->disable(in); | |
196 | ||
197 | dssdev->state = OMAP_DSS_DISPLAY_DISABLED; | |
198 | } | |
199 | ||
200 | static void lb035q02_set_timings(struct omap_dss_device *dssdev, | |
201 | struct omap_video_timings *timings) | |
202 | { | |
203 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
204 | struct omap_dss_device *in = ddata->in; | |
205 | ||
206 | ddata->videomode = *timings; | |
207 | dssdev->panel.timings = *timings; | |
208 | ||
209 | in->ops.dpi->set_timings(in, timings); | |
210 | } | |
211 | ||
212 | static void lb035q02_get_timings(struct omap_dss_device *dssdev, | |
213 | struct omap_video_timings *timings) | |
214 | { | |
215 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
216 | ||
217 | *timings = ddata->videomode; | |
218 | } | |
219 | ||
220 | static int lb035q02_check_timings(struct omap_dss_device *dssdev, | |
221 | struct omap_video_timings *timings) | |
222 | { | |
223 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
224 | struct omap_dss_device *in = ddata->in; | |
225 | ||
226 | return in->ops.dpi->check_timings(in, timings); | |
227 | } | |
228 | ||
229 | static struct omap_dss_driver lb035q02_ops = { | |
230 | .connect = lb035q02_connect, | |
231 | .disconnect = lb035q02_disconnect, | |
232 | ||
233 | .enable = lb035q02_enable, | |
234 | .disable = lb035q02_disable, | |
235 | ||
236 | .set_timings = lb035q02_set_timings, | |
237 | .get_timings = lb035q02_get_timings, | |
238 | .check_timings = lb035q02_check_timings, | |
239 | ||
240 | .get_resolution = omapdss_default_get_resolution, | |
241 | }; | |
242 | ||
1b71f104 TV |
243 | static int lb035q02_probe_of(struct spi_device *spi) |
244 | { | |
245 | struct device_node *node = spi->dev.of_node; | |
246 | struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); | |
247 | struct omap_dss_device *in; | |
248 | struct gpio_desc *gpio; | |
249 | ||
ca8c67da | 250 | gpio = devm_gpiod_get(&spi->dev, "enable", GPIOD_OUT_LOW); |
1b71f104 TV |
251 | if (IS_ERR(gpio)) { |
252 | dev_err(&spi->dev, "failed to parse enable gpio\n"); | |
253 | return PTR_ERR(gpio); | |
1b71f104 TV |
254 | } |
255 | ||
ca8c67da UKK |
256 | ddata->enable_gpio = gpio; |
257 | ||
1b71f104 TV |
258 | ddata->backlight_gpio = -ENOENT; |
259 | ||
260 | in = omapdss_of_find_source_for_first_ep(node); | |
261 | if (IS_ERR(in)) { | |
262 | dev_err(&spi->dev, "failed to find video source\n"); | |
263 | return PTR_ERR(in); | |
264 | } | |
265 | ||
266 | ddata->in = in; | |
267 | ||
268 | return 0; | |
269 | } | |
270 | ||
f92f168f TV |
271 | static int lb035q02_panel_spi_probe(struct spi_device *spi) |
272 | { | |
273 | struct panel_drv_data *ddata; | |
274 | struct omap_dss_device *dssdev; | |
275 | int r; | |
276 | ||
277 | ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL); | |
278 | if (ddata == NULL) | |
279 | return -ENOMEM; | |
280 | ||
281 | dev_set_drvdata(&spi->dev, ddata); | |
282 | ||
283 | ddata->spi = spi; | |
284 | ||
4e040ec7 | 285 | if (!spi->dev.of_node) |
f92f168f | 286 | return -ENODEV; |
4e040ec7 TV |
287 | |
288 | r = lb035q02_probe_of(spi); | |
289 | if (r) | |
290 | return r; | |
f92f168f | 291 | |
f92f168f TV |
292 | if (gpio_is_valid(ddata->backlight_gpio)) { |
293 | r = devm_gpio_request_one(&spi->dev, ddata->backlight_gpio, | |
294 | GPIOF_OUT_INIT_LOW, "panel backlight"); | |
295 | if (r) | |
296 | goto err_gpio; | |
297 | } | |
298 | ||
299 | ddata->videomode = lb035q02_timings; | |
300 | ||
301 | dssdev = &ddata->dssdev; | |
302 | dssdev->dev = &spi->dev; | |
303 | dssdev->driver = &lb035q02_ops; | |
304 | dssdev->type = OMAP_DISPLAY_TYPE_DPI; | |
305 | dssdev->owner = THIS_MODULE; | |
306 | dssdev->panel.timings = ddata->videomode; | |
307 | dssdev->phy.dpi.data_lines = ddata->data_lines; | |
308 | ||
309 | r = omapdss_register_display(dssdev); | |
310 | if (r) { | |
311 | dev_err(&spi->dev, "Failed to register panel\n"); | |
312 | goto err_reg; | |
313 | } | |
314 | ||
315 | return 0; | |
316 | ||
317 | err_reg: | |
318 | err_gpio: | |
319 | omap_dss_put_device(ddata->in); | |
320 | return r; | |
321 | } | |
322 | ||
323 | static int lb035q02_panel_spi_remove(struct spi_device *spi) | |
324 | { | |
325 | struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); | |
326 | struct omap_dss_device *dssdev = &ddata->dssdev; | |
327 | struct omap_dss_device *in = ddata->in; | |
328 | ||
329 | omapdss_unregister_display(dssdev); | |
330 | ||
331 | lb035q02_disable(dssdev); | |
332 | lb035q02_disconnect(dssdev); | |
333 | ||
334 | omap_dss_put_device(in); | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
1b71f104 TV |
339 | static const struct of_device_id lb035q02_of_match[] = { |
340 | { .compatible = "omapdss,lgphilips,lb035q02", }, | |
341 | {}, | |
342 | }; | |
343 | ||
344 | MODULE_DEVICE_TABLE(of, lb035q02_of_match); | |
345 | ||
f92f168f TV |
346 | static struct spi_driver lb035q02_spi_driver = { |
347 | .probe = lb035q02_panel_spi_probe, | |
348 | .remove = lb035q02_panel_spi_remove, | |
349 | .driver = { | |
350 | .name = "panel_lgphilips_lb035q02", | |
1b71f104 | 351 | .of_match_table = lb035q02_of_match, |
422ccbd5 | 352 | .suppress_bind_attrs = true, |
f92f168f TV |
353 | }, |
354 | }; | |
355 | ||
356 | module_spi_driver(lb035q02_spi_driver); | |
357 | ||
1b71f104 | 358 | MODULE_ALIAS("spi:lgphilips,lb035q02"); |
f92f168f TV |
359 | MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>"); |
360 | MODULE_DESCRIPTION("LG.Philips LB035Q02 LCD Panel driver"); | |
361 | MODULE_LICENSE("GPL"); |