Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nvkm / subdev / ltc / gm107.c
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1/*
2 * Copyright 2014 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
2799bba6 24#include "priv.h"
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25
26#include <subdev/fb.h>
27#include <subdev/timer.h>
28
7d2813c4 29void
70bc7182 30gm107_ltc_cbc_clear(struct nvkm_ltc *ltc, u32 start, u32 limit)
95484b57 31{
70bc7182 32 struct nvkm_device *device = ltc->subdev.device;
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33 nvkm_wr32(device, 0x17e270, start);
34 nvkm_wr32(device, 0x17e274, limit);
4fb9c3f3 35 nvkm_mask(device, 0x17e26c, 0x00000000, 0x00000004);
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36}
37
7d2813c4 38void
70bc7182 39gm107_ltc_cbc_wait(struct nvkm_ltc *ltc)
95484b57 40{
70bc7182 41 struct nvkm_device *device = ltc->subdev.device;
95484b57 42 int c, s;
c7750cfb 43 for (c = 0; c < ltc->ltc_nr; c++) {
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44 for (s = 0; s < ltc->lts_nr; s++) {
45 const u32 addr = 0x14046c + (c * 0x2000) + (s * 0x200);
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46 nvkm_wait_msec(device, 2000, addr,
47 0x00000004, 0x00000000);
1302bcbb 48 }
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49 }
50}
51
7d2813c4 52void
70bc7182 53gm107_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4])
f38fdb6a 54{
70bc7182 55 struct nvkm_device *device = ltc->subdev.device;
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56 nvkm_mask(device, 0x17e338, 0x0000000f, i);
57 nvkm_wr32(device, 0x17e33c, color[0]);
58 nvkm_wr32(device, 0x17e340, color[1]);
59 nvkm_wr32(device, 0x17e344, color[2]);
60 nvkm_wr32(device, 0x17e348, color[3]);
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61}
62
7d2813c4 63void
70bc7182 64gm107_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth)
f38fdb6a 65{
70bc7182 66 struct nvkm_device *device = ltc->subdev.device;
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67 nvkm_mask(device, 0x17e338, 0x0000000f, i);
68 nvkm_wr32(device, 0x17e34c, depth);
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69}
70
95484b57 71static void
70bc7182 72gm107_ltc_lts_isr(struct nvkm_ltc *ltc, int c, int s)
f6bad8ab 73{
70bc7182 74 struct nvkm_subdev *subdev = &ltc->subdev;
59e1a2f1 75 struct nvkm_device *device = subdev->device;
96aedd0b 76 u32 base = 0x140000 + (c * 0x2000) + (s * 0x200);
99336ed3 77 u32 stat = nvkm_rd32(device, base + 0x00c);
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78
79 if (stat) {
59e1a2f1 80 nvkm_error(subdev, "LTC%d_LTS%d: %08x\n", c, s, stat);
99336ed3 81 nvkm_wr32(device, base + 0x00c, stat);
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82 }
83}
84
7d2813c4 85void
70bc7182 86gm107_ltc_intr(struct nvkm_ltc *ltc)
f6bad8ab 87{
70bc7182 88 struct nvkm_device *device = ltc->subdev.device;
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89 u32 mask;
90
99336ed3 91 mask = nvkm_rd32(device, 0x00017c);
f6bad8ab 92 while (mask) {
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93 u32 s, c = __ffs(mask);
94 for (s = 0; s < ltc->lts_nr; s++)
95 gm107_ltc_lts_isr(ltc, c, s);
96 mask &= ~(1 << c);
f6bad8ab 97 }
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98}
99
95484b57 100static int
70bc7182 101gm107_ltc_oneinit(struct nvkm_ltc *ltc)
f6bad8ab 102{
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103 struct nvkm_device *device = ltc->subdev.device;
104 const u32 parts = nvkm_rd32(device, 0x022438);
105 const u32 mask = nvkm_rd32(device, 0x021c14);
106 const u32 slice = nvkm_rd32(device, 0x17e280) >> 28;
107 int i;
f6bad8ab 108
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109 for (i = 0; i < parts; i++) {
110 if (!(mask & (1 << i)))
c7750cfb 111 ltc->ltc_nr++;
f6bad8ab 112 }
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113 ltc->lts_nr = slice;
114
115 return gf100_ltc_oneinit_tag_ram(ltc);
116}
f6bad8ab 117
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118static void
119gm107_ltc_init(struct nvkm_ltc *ltc)
120{
121 struct nvkm_device *device = ltc->subdev.device;
122 u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001);
f6bad8ab 123
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124 nvkm_wr32(device, 0x17e27c, ltc->ltc_nr);
125 nvkm_wr32(device, 0x17e278, ltc->tag_base);
126 nvkm_mask(device, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
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127}
128
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129static const struct nvkm_ltc_func
130gm107_ltc = {
131 .oneinit = gm107_ltc_oneinit,
132 .init = gm107_ltc_init,
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133 .intr = gm107_ltc_intr,
134 .cbc_clear = gm107_ltc_cbc_clear,
135 .cbc_wait = gm107_ltc_cbc_wait,
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136 .zbc = 16,
137 .zbc_clear_color = gm107_ltc_zbc_clear_color,
138 .zbc_clear_depth = gm107_ltc_zbc_clear_depth,
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139 .invalidate = gf100_ltc_invalidate,
140 .flush = gf100_ltc_flush,
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141};
142
143int
144gm107_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc)
145{
146 return nvkm_ltc_new_(&gm107_ltc, device, index, pltc);
147}