Merge tag 'vmwgfx-next-2014-03-28' of git://people.freedesktop.org/~thomash/linux...
[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
94580299
BS
26#include <linux/module.h>
27#include <linux/pci.h>
5addcf0a
DA
28#include <linux/pm_runtime.h>
29#include <linux/vga_switcheroo.h>
30#include "drmP.h"
31#include "drm_crtc_helper.h"
94580299
BS
32#include <core/device.h>
33#include <core/client.h>
ebb945a9 34#include <core/gpuobj.h>
94580299 35#include <core/class.h>
c33e05a1 36#include <core/option.h>
94580299 37
dded35de 38#include <engine/device.h>
1d7c71a3 39#include <engine/disp.h>
9fe72f9e 40#include <engine/fifo.h>
69a6146d 41#include <engine/software.h>
1d7c71a3 42
dded35de
BS
43#include <subdev/vm.h>
44
94580299 45#include "nouveau_drm.h"
ebb945a9 46#include "nouveau_dma.h"
77145f1c
BS
47#include "nouveau_ttm.h"
48#include "nouveau_gem.h"
cb75d97e 49#include "nouveau_agp.h"
77145f1c 50#include "nouveau_vga.h"
26fdd78c 51#include "nouveau_sysfs.h"
b9ed919f 52#include "nouveau_hwmon.h"
77145f1c
BS
53#include "nouveau_acpi.h"
54#include "nouveau_bios.h"
55#include "nouveau_ioctl.h"
ebb945a9
BS
56#include "nouveau_abi16.h"
57#include "nouveau_fbcon.h"
58#include "nouveau_fence.h"
33b903e8 59#include "nouveau_debugfs.h"
ebb945a9 60
94580299
BS
61MODULE_PARM_DESC(config, "option string to pass to driver core");
62static char *nouveau_config;
63module_param_named(config, nouveau_config, charp, 0400);
64
65MODULE_PARM_DESC(debug, "debug string to pass to driver core");
66static char *nouveau_debug;
67module_param_named(debug, nouveau_debug, charp, 0400);
68
ebb945a9
BS
69MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
70static int nouveau_noaccel = 0;
71module_param_named(noaccel, nouveau_noaccel, int, 0400);
72
9430738d
BS
73MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
74 "0 = disabled, 1 = enabled, 2 = headless)");
75int nouveau_modeset = -1;
77145f1c
BS
76module_param_named(modeset, nouveau_modeset, int, 0400);
77
5addcf0a
DA
78MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
79int nouveau_runtime_pm = -1;
80module_param_named(runpm, nouveau_runtime_pm, int, 0400);
81
77145f1c
BS
82static struct drm_driver driver;
83
94580299 84static u64
420b9469 85nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
86{
87 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
88 name |= pdev->bus->number << 16;
89 name |= PCI_SLOT(pdev->devfn) << 8;
90 return name | PCI_FUNC(pdev->devfn);
91}
92
420b9469
AC
93static u64
94nouveau_platform_name(struct platform_device *platformdev)
95{
96 return platformdev->id;
97}
98
99static u64
100nouveau_name(struct drm_device *dev)
101{
102 if (dev->pdev)
103 return nouveau_pci_name(dev->pdev);
104 else
105 return nouveau_platform_name(dev->platformdev);
106}
107
94580299 108static int
420b9469 109nouveau_cli_create(u64 name, const char *sname,
fa6df8c1 110 int size, void **pcli)
94580299
BS
111{
112 struct nouveau_cli *cli;
113 int ret;
114
dd5700ea 115 *pcli = NULL;
420b9469 116 ret = nouveau_client_create_(sname, name, nouveau_config,
94580299
BS
117 nouveau_debug, size, pcli);
118 cli = *pcli;
dd5700ea
MS
119 if (ret) {
120 if (cli)
121 nouveau_client_destroy(&cli->base);
122 *pcli = NULL;
94580299 123 return ret;
dd5700ea 124 }
94580299
BS
125
126 mutex_init(&cli->mutex);
127 return 0;
128}
129
130static void
131nouveau_cli_destroy(struct nouveau_cli *cli)
132{
133 struct nouveau_object *client = nv_object(cli);
ebb945a9 134 nouveau_vm_ref(NULL, &cli->base.vm, NULL);
94580299
BS
135 nouveau_client_fini(&cli->base, false);
136 atomic_set(&client->refcount, 1);
137 nouveau_object_ref(NULL, &client);
138}
139
ebb945a9
BS
140static void
141nouveau_accel_fini(struct nouveau_drm *drm)
142{
143 nouveau_gpuobj_ref(NULL, &drm->notify);
144 nouveau_channel_del(&drm->channel);
49981046 145 nouveau_channel_del(&drm->cechan);
ebb945a9
BS
146 if (drm->fence)
147 nouveau_fence(drm)->dtor(drm);
148}
149
150static void
151nouveau_accel_init(struct nouveau_drm *drm)
152{
153 struct nouveau_device *device = nv_device(drm->device);
154 struct nouveau_object *object;
49981046 155 u32 arg0, arg1;
ebb945a9
BS
156 int ret;
157
9fe72f9e 158 if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/)
ebb945a9
BS
159 return;
160
161 /* initialise synchronisation routines */
162 if (device->card_type < NV_10) ret = nv04_fence_create(drm);
8aa816b0
IM
163 else if (device->card_type < NV_11 ||
164 device->chipset < 0x17) ret = nv10_fence_create(drm);
60e5cb79 165 else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
ace5a9b8 166 else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
ebb945a9
BS
167 else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
168 else ret = nvc0_fence_create(drm);
169 if (ret) {
170 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
171 nouveau_accel_fini(drm);
172 return;
173 }
174
49981046
BS
175 if (device->card_type >= NV_E0) {
176 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
177 NVDRM_CHAN + 1,
178 NVE0_CHANNEL_IND_ENGINE_CE0 |
179 NVE0_CHANNEL_IND_ENGINE_CE1, 0,
180 &drm->cechan);
181 if (ret)
182 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
183
184 arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
49469800 185 arg1 = 1;
00fc6f6f
BS
186 } else
187 if (device->chipset >= 0xa3 &&
188 device->chipset != 0xaa &&
189 device->chipset != 0xac) {
190 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
191 NVDRM_CHAN + 1, NvDmaFB, NvDmaTT,
192 &drm->cechan);
193 if (ret)
194 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
195
196 arg0 = NvDmaFB;
197 arg1 = NvDmaTT;
49981046
BS
198 } else {
199 arg0 = NvDmaFB;
200 arg1 = NvDmaTT;
201 }
202
ebb945a9 203 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
49981046 204 arg0, arg1, &drm->channel);
ebb945a9
BS
205 if (ret) {
206 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
207 nouveau_accel_fini(drm);
208 return;
209 }
210
69a6146d
BS
211 ret = nouveau_object_new(nv_object(drm), NVDRM_CHAN, NVDRM_NVSW,
212 nouveau_abi16_swclass(drm), NULL, 0, &object);
213 if (ret == 0) {
214 struct nouveau_software_chan *swch = (void *)object->parent;
215 ret = RING_SPACE(drm->channel, 2);
216 if (ret == 0) {
217 if (device->card_type < NV_C0) {
218 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
219 OUT_RING (drm->channel, NVDRM_NVSW);
220 } else
221 if (device->card_type < NV_E0) {
222 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
223 OUT_RING (drm->channel, 0x001f0000);
224 }
225 }
226 swch = (void *)object->parent;
227 swch->flip = nouveau_flip_complete;
228 swch->flip_data = drm->channel;
229 }
230
231 if (ret) {
232 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
233 nouveau_accel_fini(drm);
234 return;
235 }
236
ebb945a9
BS
237 if (device->card_type < NV_C0) {
238 ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
239 &drm->notify);
240 if (ret) {
241 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
242 nouveau_accel_fini(drm);
243 return;
244 }
245
246 ret = nouveau_object_new(nv_object(drm),
247 drm->channel->handle, NvNotify0,
248 0x003d, &(struct nv_dma_class) {
249 .flags = NV_DMA_TARGET_VRAM |
250 NV_DMA_ACCESS_RDWR,
251 .start = drm->notify->addr,
252 .limit = drm->notify->addr + 31
253 }, sizeof(struct nv_dma_class),
254 &object);
255 if (ret) {
256 nouveau_accel_fini(drm);
257 return;
258 }
259 }
260
261
49981046 262 nouveau_bo_move_init(drm);
ebb945a9
BS
263}
264
56550d94
GKH
265static int nouveau_drm_probe(struct pci_dev *pdev,
266 const struct pci_device_id *pent)
94580299
BS
267{
268 struct nouveau_device *device;
ebb945a9
BS
269 struct apertures_struct *aper;
270 bool boot = false;
94580299
BS
271 int ret;
272
ebb945a9
BS
273 /* remove conflicting drivers (vesafb, efifb etc) */
274 aper = alloc_apertures(3);
275 if (!aper)
276 return -ENOMEM;
277
278 aper->ranges[0].base = pci_resource_start(pdev, 1);
279 aper->ranges[0].size = pci_resource_len(pdev, 1);
280 aper->count = 1;
281
282 if (pci_resource_len(pdev, 2)) {
283 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
284 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
285 aper->count++;
286 }
287
288 if (pci_resource_len(pdev, 3)) {
289 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
290 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
291 aper->count++;
292 }
293
294#ifdef CONFIG_X86
295 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
296#endif
297 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 298 kfree(aper);
ebb945a9 299
420b9469
AC
300 ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI,
301 nouveau_pci_name(pdev), pci_name(pdev),
94580299
BS
302 nouveau_config, nouveau_debug, &device);
303 if (ret)
304 return ret;
305
306 pci_set_master(pdev);
307
77145f1c 308 ret = drm_get_pci_dev(pdev, pent, &driver);
94580299 309 if (ret) {
ebb945a9 310 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
94580299
BS
311 return ret;
312 }
313
314 return 0;
315}
316
5addcf0a
DA
317#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
318
319static void
46941b0f 320nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 321{
46941b0f 322 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 323
420b9469 324 if (!pdev) {
40189b0c 325 DRM_INFO("not a PCI device; no HDMI\n");
420b9469
AC
326 drm->hdmi_device = NULL;
327 return;
328 }
329
5addcf0a
DA
330 /* subfunction one is a hdmi audio device? */
331 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
332 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
333
334 if (!drm->hdmi_device) {
46941b0f 335 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
336 return;
337 }
338
339 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 340 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
341 pci_dev_put(drm->hdmi_device);
342 drm->hdmi_device = NULL;
343 return;
344 }
345}
346
5b8a43ae 347static int
94580299
BS
348nouveau_drm_load(struct drm_device *dev, unsigned long flags)
349{
350 struct pci_dev *pdev = dev->pdev;
ebb945a9 351 struct nouveau_device *device;
94580299
BS
352 struct nouveau_drm *drm;
353 int ret;
354
420b9469
AC
355 ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm),
356 (void **)&drm);
94580299
BS
357 if (ret)
358 return ret;
359
77145f1c
BS
360 dev->dev_private = drm;
361 drm->dev = dev;
c33e05a1 362 nouveau_client(drm)->debug = nouveau_dbgopt(nouveau_debug, "DRM");
77145f1c 363
94580299 364 INIT_LIST_HEAD(&drm->clients);
ebb945a9 365 spin_lock_init(&drm->tile.lock);
94580299 366
46941b0f 367 nouveau_get_hdmi_dev(drm);
5addcf0a 368
cb75d97e
BS
369 /* make sure AGP controller is in a consistent state before we
370 * (possibly) execute vbios init tables (see nouveau_agp.h)
371 */
420b9469 372 if (pdev && drm_pci_device_is_agp(dev) && dev->agp) {
cb75d97e
BS
373 /* dummy device object, doesn't init anything, but allows
374 * agp code access to registers
375 */
376 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
377 NVDRM_DEVICE, 0x0080,
378 &(struct nv_device_class) {
379 .device = ~0,
380 .disable =
381 ~(NV_DEVICE_DISABLE_MMIO |
382 NV_DEVICE_DISABLE_IDENTIFY),
383 .debug0 = ~0,
384 }, sizeof(struct nv_device_class),
385 &drm->device);
386 if (ret)
ebb945a9 387 goto fail_device;
cb75d97e
BS
388
389 nouveau_agp_reset(drm);
390 nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
391 }
392
94580299
BS
393 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
394 0x0080, &(struct nv_device_class) {
395 .device = ~0,
396 .disable = 0,
397 .debug0 = 0,
398 }, sizeof(struct nv_device_class),
399 &drm->device);
400 if (ret)
401 goto fail_device;
402
7d3428cd
IM
403 dev->irq_enabled = true;
404
77145f1c
BS
405 /* workaround an odd issue on nvc1 by disabling the device's
406 * nosnoop capability. hopefully won't cause issues until a
407 * better fix is found - assuming there is one...
408 */
ebb945a9 409 device = nv_device(drm->device);
77145f1c
BS
410 if (nv_device(drm->device)->chipset == 0xc1)
411 nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 412
77145f1c 413 nouveau_vga_init(drm);
cb75d97e
BS
414 nouveau_agp_init(drm);
415
ebb945a9
BS
416 if (device->card_type >= NV_50) {
417 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
418 0x1000, &drm->client.base.vm);
419 if (ret)
420 goto fail_device;
421 }
422
423 ret = nouveau_ttm_init(drm);
94580299 424 if (ret)
77145f1c
BS
425 goto fail_ttm;
426
427 ret = nouveau_bios_init(dev);
428 if (ret)
429 goto fail_bios;
430
77145f1c 431 ret = nouveau_display_create(dev);
ebb945a9 432 if (ret)
77145f1c
BS
433 goto fail_dispctor;
434
435 if (dev->mode_config.num_crtc) {
436 ret = nouveau_display_init(dev);
437 if (ret)
438 goto fail_dispinit;
439 }
440
26fdd78c 441 nouveau_sysfs_init(dev);
b9ed919f 442 nouveau_hwmon_init(dev);
ebb945a9
BS
443 nouveau_accel_init(drm);
444 nouveau_fbcon_init(dev);
5addcf0a
DA
445
446 if (nouveau_runtime_pm != 0) {
447 pm_runtime_use_autosuspend(dev->dev);
448 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
449 pm_runtime_set_active(dev->dev);
450 pm_runtime_allow(dev->dev);
451 pm_runtime_mark_last_busy(dev->dev);
452 pm_runtime_put(dev->dev);
453 }
94580299
BS
454 return 0;
455
77145f1c
BS
456fail_dispinit:
457 nouveau_display_destroy(dev);
458fail_dispctor:
77145f1c
BS
459 nouveau_bios_takedown(dev);
460fail_bios:
ebb945a9 461 nouveau_ttm_fini(drm);
77145f1c
BS
462fail_ttm:
463 nouveau_agp_fini(drm);
464 nouveau_vga_fini(drm);
94580299
BS
465fail_device:
466 nouveau_cli_destroy(&drm->client);
467 return ret;
468}
469
5b8a43ae 470static int
94580299
BS
471nouveau_drm_unload(struct drm_device *dev)
472{
77145f1c 473 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 474
5addcf0a 475 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
476 nouveau_fbcon_fini(dev);
477 nouveau_accel_fini(drm);
b9ed919f 478 nouveau_hwmon_fini(dev);
26fdd78c 479 nouveau_sysfs_fini(dev);
77145f1c 480
9430738d
BS
481 if (dev->mode_config.num_crtc)
482 nouveau_display_fini(dev);
77145f1c
BS
483 nouveau_display_destroy(dev);
484
77145f1c 485 nouveau_bios_takedown(dev);
94580299 486
ebb945a9 487 nouveau_ttm_fini(drm);
cb75d97e 488 nouveau_agp_fini(drm);
77145f1c 489 nouveau_vga_fini(drm);
cb75d97e 490
5addcf0a
DA
491 if (drm->hdmi_device)
492 pci_dev_put(drm->hdmi_device);
94580299
BS
493 nouveau_cli_destroy(&drm->client);
494 return 0;
495}
496
497static void
498nouveau_drm_remove(struct pci_dev *pdev)
499{
77145f1c
BS
500 struct drm_device *dev = pci_get_drvdata(pdev);
501 struct nouveau_drm *drm = nouveau_drm(dev);
ebb945a9 502 struct nouveau_object *device;
77145f1c 503
7d3428cd 504 dev->irq_enabled = false;
77145f1c
BS
505 device = drm->client.base.device;
506 drm_put_dev(dev);
507
ebb945a9
BS
508 nouveau_object_ref(NULL, &device);
509 nouveau_object_debug();
94580299
BS
510}
511
cd897837 512static int
2d8b9ccb 513nouveau_do_suspend(struct drm_device *dev)
94580299 514{
77145f1c 515 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
516 struct nouveau_cli *cli;
517 int ret;
518
9430738d 519 if (dev->mode_config.num_crtc) {
c52f4fa6 520 NV_INFO(drm, "suspending display...\n");
9430738d
BS
521 ret = nouveau_display_suspend(dev);
522 if (ret)
523 return ret;
524 }
94580299 525
c52f4fa6 526 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
527 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
528
c52f4fa6 529 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
530 if (drm->cechan) {
531 ret = nouveau_channel_idle(drm->cechan);
532 if (ret)
f3980dc5 533 goto fail_display;
81dff21b
BS
534 }
535
536 if (drm->channel) {
537 ret = nouveau_channel_idle(drm->channel);
538 if (ret)
f3980dc5 539 goto fail_display;
81dff21b
BS
540 }
541
c52f4fa6 542 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 543 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
544 if (!nouveau_fence(drm)->suspend(drm)) {
545 ret = -ENOMEM;
546 goto fail_display;
547 }
ebb945a9
BS
548 }
549
94580299
BS
550 list_for_each_entry(cli, &drm->clients, head) {
551 ret = nouveau_client_fini(&cli->base, true);
552 if (ret)
553 goto fail_client;
554 }
555
c52f4fa6 556 NV_INFO(drm, "suspending kernel object tree...\n");
94580299
BS
557 ret = nouveau_client_fini(&drm->client.base, true);
558 if (ret)
559 goto fail_client;
560
cb75d97e 561 nouveau_agp_fini(drm);
94580299
BS
562 return 0;
563
564fail_client:
565 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
566 nouveau_client_init(&cli->base);
567 }
568
f3980dc5
IM
569 if (drm->fence && nouveau_fence(drm)->resume)
570 nouveau_fence(drm)->resume(drm);
571
572fail_display:
9430738d 573 if (dev->mode_config.num_crtc) {
c52f4fa6 574 NV_INFO(drm, "resuming display...\n");
9430738d
BS
575 nouveau_display_resume(dev);
576 }
94580299
BS
577 return ret;
578}
579
2d8b9ccb 580int nouveau_pmops_suspend(struct device *dev)
94580299 581{
2d8b9ccb
DA
582 struct pci_dev *pdev = to_pci_dev(dev);
583 struct drm_device *drm_dev = pci_get_drvdata(pdev);
94580299
BS
584 int ret;
585
5addcf0a
DA
586 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
587 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
94580299
BS
588 return 0;
589
5addcf0a
DA
590 if (drm_dev->mode_config.num_crtc)
591 nouveau_fbcon_set_suspend(drm_dev, 1);
592
2d8b9ccb 593 ret = nouveau_do_suspend(drm_dev);
94580299
BS
594 if (ret)
595 return ret;
2d8b9ccb
DA
596
597 pci_save_state(pdev);
598 pci_disable_device(pdev);
599 pci_set_power_state(pdev, PCI_D3hot);
2d8b9ccb
DA
600 return 0;
601}
602
cd897837 603static int
2d8b9ccb
DA
604nouveau_do_resume(struct drm_device *dev)
605{
606 struct nouveau_drm *drm = nouveau_drm(dev);
607 struct nouveau_cli *cli;
608
c52f4fa6 609 NV_INFO(drm, "re-enabling device...\n");
94580299 610
cb75d97e
BS
611 nouveau_agp_reset(drm);
612
c52f4fa6 613 NV_INFO(drm, "resuming kernel object tree...\n");
94580299 614 nouveau_client_init(&drm->client.base);
ebb945a9 615 nouveau_agp_init(drm);
94580299 616
c52f4fa6 617 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
618 if (drm->fence && nouveau_fence(drm)->resume)
619 nouveau_fence(drm)->resume(drm);
620
94580299
BS
621 list_for_each_entry(cli, &drm->clients, head) {
622 nouveau_client_init(&cli->base);
623 }
cb75d97e 624
77145f1c 625 nouveau_run_vbios_init(dev);
77145f1c 626
9430738d 627 if (dev->mode_config.num_crtc) {
c52f4fa6 628 NV_INFO(drm, "resuming display...\n");
5addcf0a 629 nouveau_display_repin(dev);
9430738d 630 }
5addcf0a 631
77145f1c 632 return 0;
94580299
BS
633}
634
2d8b9ccb
DA
635int nouveau_pmops_resume(struct device *dev)
636{
637 struct pci_dev *pdev = to_pci_dev(dev);
638 struct drm_device *drm_dev = pci_get_drvdata(pdev);
639 int ret;
640
5addcf0a
DA
641 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
642 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
643 return 0;
644
645 pci_set_power_state(pdev, PCI_D0);
646 pci_restore_state(pdev);
647 ret = pci_enable_device(pdev);
648 if (ret)
649 return ret;
650 pci_set_master(pdev);
651
5addcf0a 652 ret = nouveau_do_resume(drm_dev);
c52f4fa6 653 if (ret)
5addcf0a 654 return ret;
5addcf0a
DA
655 if (drm_dev->mode_config.num_crtc)
656 nouveau_fbcon_set_suspend(drm_dev, 0);
657
658 nouveau_fbcon_zfill_all(drm_dev);
01172772
DA
659 if (drm_dev->mode_config.num_crtc)
660 nouveau_display_resume(drm_dev);
5addcf0a 661 return 0;
2d8b9ccb
DA
662}
663
664static int nouveau_pmops_freeze(struct device *dev)
665{
666 struct pci_dev *pdev = to_pci_dev(dev);
667 struct drm_device *drm_dev = pci_get_drvdata(pdev);
5addcf0a
DA
668 int ret;
669
5addcf0a
DA
670 if (drm_dev->mode_config.num_crtc)
671 nouveau_fbcon_set_suspend(drm_dev, 1);
2d8b9ccb 672
5addcf0a 673 ret = nouveau_do_suspend(drm_dev);
5addcf0a 674 return ret;
2d8b9ccb
DA
675}
676
677static int nouveau_pmops_thaw(struct device *dev)
678{
679 struct pci_dev *pdev = to_pci_dev(dev);
680 struct drm_device *drm_dev = pci_get_drvdata(pdev);
5addcf0a 681 int ret;
2d8b9ccb 682
5addcf0a 683 ret = nouveau_do_resume(drm_dev);
c52f4fa6 684 if (ret)
5addcf0a 685 return ret;
5addcf0a
DA
686 if (drm_dev->mode_config.num_crtc)
687 nouveau_fbcon_set_suspend(drm_dev, 0);
688 nouveau_fbcon_zfill_all(drm_dev);
01172772
DA
689 if (drm_dev->mode_config.num_crtc)
690 nouveau_display_resume(drm_dev);
5addcf0a 691 return 0;
2d8b9ccb
DA
692}
693
694
5b8a43ae 695static int
ebb945a9
BS
696nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
697{
ebb945a9
BS
698 struct nouveau_drm *drm = nouveau_drm(dev);
699 struct nouveau_cli *cli;
a2896ced 700 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
701 int ret;
702
5addcf0a
DA
703 /* need to bring up power immediately if opening device */
704 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 705 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
706 return ret;
707
a2896ced
MS
708 get_task_comm(tmpname, current);
709 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 710
420b9469
AC
711 ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli),
712 (void **)&cli);
713
ebb945a9 714 if (ret)
5addcf0a 715 goto out_suspend;
ebb945a9
BS
716
717 if (nv_device(drm->device)->card_type >= NV_50) {
718 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
719 0x1000, &cli->base.vm);
720 if (ret) {
721 nouveau_cli_destroy(cli);
5addcf0a 722 goto out_suspend;
ebb945a9
BS
723 }
724 }
725
726 fpriv->driver_priv = cli;
727
728 mutex_lock(&drm->client.mutex);
729 list_add(&cli->head, &drm->clients);
730 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
731
732out_suspend:
733 pm_runtime_mark_last_busy(dev->dev);
734 pm_runtime_put_autosuspend(dev->dev);
735
736 return ret;
ebb945a9
BS
737}
738
5b8a43ae 739static void
ebb945a9
BS
740nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
741{
742 struct nouveau_cli *cli = nouveau_cli(fpriv);
743 struct nouveau_drm *drm = nouveau_drm(dev);
744
5addcf0a
DA
745 pm_runtime_get_sync(dev->dev);
746
ebb945a9
BS
747 if (cli->abi16)
748 nouveau_abi16_fini(cli->abi16);
749
750 mutex_lock(&drm->client.mutex);
751 list_del(&cli->head);
752 mutex_unlock(&drm->client.mutex);
5addcf0a 753
ebb945a9
BS
754}
755
5b8a43ae 756static void
ebb945a9
BS
757nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
758{
759 struct nouveau_cli *cli = nouveau_cli(fpriv);
760 nouveau_cli_destroy(cli);
5addcf0a
DA
761 pm_runtime_mark_last_busy(dev->dev);
762 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
763}
764
baa70943 765static const struct drm_ioctl_desc
77145f1c 766nouveau_ioctls[] = {
7d761258 767 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c 768 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
7d761258
MP
769 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
770 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
771 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
772 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
773 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
774 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
775 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
776 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
777 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
778 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
779};
780
5addcf0a
DA
781long nouveau_drm_ioctl(struct file *filp,
782 unsigned int cmd, unsigned long arg)
783{
784 struct drm_file *file_priv = filp->private_data;
785 struct drm_device *dev;
786 long ret;
787 dev = file_priv->minor->dev;
788
789 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 790 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
791 return ret;
792
793 ret = drm_ioctl(filp, cmd, arg);
794
795 pm_runtime_mark_last_busy(dev->dev);
796 pm_runtime_put_autosuspend(dev->dev);
797 return ret;
798}
77145f1c
BS
799static const struct file_operations
800nouveau_driver_fops = {
801 .owner = THIS_MODULE,
802 .open = drm_open,
803 .release = drm_release,
5addcf0a 804 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
805 .mmap = nouveau_ttm_mmap,
806 .poll = drm_poll,
77145f1c
BS
807 .read = drm_read,
808#if defined(CONFIG_COMPAT)
809 .compat_ioctl = nouveau_compat_ioctl,
810#endif
811 .llseek = noop_llseek,
812};
813
814static struct drm_driver
815driver = {
816 .driver_features =
4cb4ea39 817 DRIVER_USE_AGP |
7d761258 818 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
77145f1c
BS
819
820 .load = nouveau_drm_load,
821 .unload = nouveau_drm_unload,
822 .open = nouveau_drm_open,
823 .preclose = nouveau_drm_preclose,
824 .postclose = nouveau_drm_postclose,
825 .lastclose = nouveau_vga_lastclose,
826
33b903e8
MS
827#if defined(CONFIG_DEBUG_FS)
828 .debugfs_init = nouveau_debugfs_init,
829 .debugfs_cleanup = nouveau_debugfs_takedown,
830#endif
831
77145f1c 832 .get_vblank_counter = drm_vblank_count,
51cb4b39
BS
833 .enable_vblank = nouveau_display_vblank_enable,
834 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
835 .get_scanout_position = nouveau_display_scanoutpos,
836 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
837
838 .ioctls = nouveau_ioctls,
baa70943 839 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
840 .fops = &nouveau_driver_fops,
841
842 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
843 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
844 .gem_prime_export = drm_gem_prime_export,
845 .gem_prime_import = drm_gem_prime_import,
846 .gem_prime_pin = nouveau_gem_prime_pin,
1af7c7dd 847 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
848 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
849 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
850 .gem_prime_vmap = nouveau_gem_prime_vmap,
851 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 852
77145f1c
BS
853 .gem_free_object = nouveau_gem_object_del,
854 .gem_open_object = nouveau_gem_object_open,
855 .gem_close_object = nouveau_gem_object_close,
856
857 .dumb_create = nouveau_display_dumb_create,
858 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 859 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
860
861 .name = DRIVER_NAME,
862 .desc = DRIVER_DESC,
863#ifdef GIT_REVISION
864 .date = GIT_REVISION,
865#else
866 .date = DRIVER_DATE,
867#endif
868 .major = DRIVER_MAJOR,
869 .minor = DRIVER_MINOR,
870 .patchlevel = DRIVER_PATCHLEVEL,
871};
872
94580299
BS
873static struct pci_device_id
874nouveau_drm_pci_table[] = {
875 {
876 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
877 .class = PCI_BASE_CLASS_DISPLAY << 16,
878 .class_mask = 0xff << 16,
879 },
880 {
881 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
882 .class = PCI_BASE_CLASS_DISPLAY << 16,
883 .class_mask = 0xff << 16,
884 },
885 {}
886};
887
5addcf0a
DA
888static int nouveau_pmops_runtime_suspend(struct device *dev)
889{
890 struct pci_dev *pdev = to_pci_dev(dev);
891 struct drm_device *drm_dev = pci_get_drvdata(pdev);
892 int ret;
893
894 if (nouveau_runtime_pm == 0)
895 return -EINVAL;
896
b25b4427
IM
897 /* are we optimus enabled? */
898 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
899 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
900 return -EINVAL;
901 }
902
c52f4fa6 903 nv_debug_level(SILENT);
5addcf0a
DA
904 drm_kms_helper_poll_disable(drm_dev);
905 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
906 nouveau_switcheroo_optimus_dsm();
907 ret = nouveau_do_suspend(drm_dev);
908 pci_save_state(pdev);
909 pci_disable_device(pdev);
910 pci_set_power_state(pdev, PCI_D3cold);
911 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
912 return ret;
913}
914
915static int nouveau_pmops_runtime_resume(struct device *dev)
916{
917 struct pci_dev *pdev = to_pci_dev(dev);
918 struct drm_device *drm_dev = pci_get_drvdata(pdev);
919 struct nouveau_device *device = nouveau_dev(drm_dev);
920 int ret;
921
922 if (nouveau_runtime_pm == 0)
923 return -EINVAL;
924
925 pci_set_power_state(pdev, PCI_D0);
926 pci_restore_state(pdev);
927 ret = pci_enable_device(pdev);
928 if (ret)
929 return ret;
930 pci_set_master(pdev);
931
932 ret = nouveau_do_resume(drm_dev);
01172772
DA
933 if (drm_dev->mode_config.num_crtc)
934 nouveau_display_resume(drm_dev);
5addcf0a
DA
935 drm_kms_helper_poll_enable(drm_dev);
936 /* do magic */
937 nv_mask(device, 0x88488, (1 << 25), (1 << 25));
938 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
939 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
c52f4fa6 940 nv_debug_level(NORMAL);
5addcf0a
DA
941 return ret;
942}
943
944static int nouveau_pmops_runtime_idle(struct device *dev)
945{
946 struct pci_dev *pdev = to_pci_dev(dev);
947 struct drm_device *drm_dev = pci_get_drvdata(pdev);
948 struct nouveau_drm *drm = nouveau_drm(drm_dev);
949 struct drm_crtc *crtc;
950
951 if (nouveau_runtime_pm == 0)
952 return -EBUSY;
953
954 /* are we optimus enabled? */
955 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
956 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
957 return -EBUSY;
958 }
959
960 /* if we have a hdmi audio device - make sure it has a driver loaded */
961 if (drm->hdmi_device) {
962 if (!drm->hdmi_device->driver) {
963 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
964 pm_runtime_mark_last_busy(dev);
965 return -EBUSY;
966 }
967 }
968
969 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
970 if (crtc->enabled) {
971 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
972 return -EBUSY;
973 }
974 }
975 pm_runtime_mark_last_busy(dev);
976 pm_runtime_autosuspend(dev);
977 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
978 return 1;
979}
980
2d8b9ccb
DA
981static const struct dev_pm_ops nouveau_pm_ops = {
982 .suspend = nouveau_pmops_suspend,
983 .resume = nouveau_pmops_resume,
984 .freeze = nouveau_pmops_freeze,
985 .thaw = nouveau_pmops_thaw,
986 .poweroff = nouveau_pmops_freeze,
987 .restore = nouveau_pmops_resume,
5addcf0a
DA
988 .runtime_suspend = nouveau_pmops_runtime_suspend,
989 .runtime_resume = nouveau_pmops_runtime_resume,
990 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
991};
992
94580299
BS
993static struct pci_driver
994nouveau_drm_pci_driver = {
995 .name = "nouveau",
996 .id_table = nouveau_drm_pci_table,
997 .probe = nouveau_drm_probe,
998 .remove = nouveau_drm_remove,
2d8b9ccb 999 .driver.pm = &nouveau_pm_ops,
94580299
BS
1000};
1001
420b9469
AC
1002int nouveau_drm_platform_probe(struct platform_device *pdev)
1003{
1004 struct nouveau_device *device;
1005 int ret;
1006
1007 ret = nouveau_device_create(pdev, NOUVEAU_BUS_PLATFORM,
1008 nouveau_platform_name(pdev),
1009 dev_name(&pdev->dev), nouveau_config,
1010 nouveau_debug, &device);
1011
1012 ret = drm_platform_init(&driver, pdev);
1013 if (ret) {
1014 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
1015 return ret;
1016 }
1017
1018 return ret;
1019}
1020
94580299
BS
1021static int __init
1022nouveau_drm_init(void)
1023{
77145f1c
BS
1024 if (nouveau_modeset == -1) {
1025#ifdef CONFIG_VGA_CONSOLE
1026 if (vgacon_text_force())
1027 nouveau_modeset = 0;
77145f1c 1028#endif
77145f1c
BS
1029 }
1030
1031 if (!nouveau_modeset)
1032 return 0;
1033
1034 nouveau_register_dsm_handler();
1035 return drm_pci_init(&driver, &nouveau_drm_pci_driver);
94580299
BS
1036}
1037
1038static void __exit
1039nouveau_drm_exit(void)
1040{
77145f1c
BS
1041 if (!nouveau_modeset)
1042 return;
1043
1044 drm_pci_exit(&driver, &nouveau_drm_pci_driver);
1045 nouveau_unregister_dsm_handler();
94580299
BS
1046}
1047
1048module_init(nouveau_drm_init);
1049module_exit(nouveau_drm_exit);
1050
1051MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
77145f1c
BS
1052MODULE_AUTHOR(DRIVER_AUTHOR);
1053MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1054MODULE_LICENSE("GPL and additional rights");