drm/nve0/copy: add initial support for the async copy engines
[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
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1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
94580299
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26#include <linux/module.h>
27#include <linux/pci.h>
28
29#include <core/device.h>
30#include <core/client.h>
ebb945a9 31#include <core/gpuobj.h>
94580299
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32#include <core/class.h>
33
34#include <subdev/device.h>
ebb945a9 35#include <subdev/vm.h>
94580299
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36
37#include "nouveau_drm.h"
77145f1c 38#include "nouveau_irq.h"
ebb945a9 39#include "nouveau_dma.h"
77145f1c
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40#include "nouveau_ttm.h"
41#include "nouveau_gem.h"
cb75d97e 42#include "nouveau_agp.h"
77145f1c
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43#include "nouveau_vga.h"
44#include "nouveau_pm.h"
45#include "nouveau_acpi.h"
46#include "nouveau_bios.h"
47#include "nouveau_ioctl.h"
ebb945a9
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48#include "nouveau_abi16.h"
49#include "nouveau_fbcon.h"
50#include "nouveau_fence.h"
51
52#include "nouveau_ttm.h"
94580299 53
94580299
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54MODULE_PARM_DESC(config, "option string to pass to driver core");
55static char *nouveau_config;
56module_param_named(config, nouveau_config, charp, 0400);
57
58MODULE_PARM_DESC(debug, "debug string to pass to driver core");
59static char *nouveau_debug;
60module_param_named(debug, nouveau_debug, charp, 0400);
61
ebb945a9
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62MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
63static int nouveau_noaccel = 0;
64module_param_named(noaccel, nouveau_noaccel, int, 0400);
65
77145f1c
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66MODULE_PARM_DESC(modeset, "enable driver");
67int nouveau_modeset = -1;
68module_param_named(modeset, nouveau_modeset, int, 0400);
69
70static struct drm_driver driver;
71
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72static u64
73nouveau_name(struct pci_dev *pdev)
74{
75 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
76 name |= pdev->bus->number << 16;
77 name |= PCI_SLOT(pdev->devfn) << 8;
78 return name | PCI_FUNC(pdev->devfn);
79}
80
81static int
82nouveau_cli_create(struct pci_dev *pdev, u32 name, int size, void **pcli)
83{
84 struct nouveau_cli *cli;
85 int ret;
86
87 ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
88 nouveau_debug, size, pcli);
89 cli = *pcli;
90 if (ret)
91 return ret;
92
93 mutex_init(&cli->mutex);
94 return 0;
95}
96
97static void
98nouveau_cli_destroy(struct nouveau_cli *cli)
99{
100 struct nouveau_object *client = nv_object(cli);
ebb945a9 101 nouveau_vm_ref(NULL, &cli->base.vm, NULL);
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102 nouveau_client_fini(&cli->base, false);
103 atomic_set(&client->refcount, 1);
104 nouveau_object_ref(NULL, &client);
105}
106
ebb945a9
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107static void
108nouveau_accel_fini(struct nouveau_drm *drm)
109{
110 nouveau_gpuobj_ref(NULL, &drm->notify);
111 nouveau_channel_del(&drm->channel);
112 if (drm->fence)
113 nouveau_fence(drm)->dtor(drm);
114}
115
116static void
117nouveau_accel_init(struct nouveau_drm *drm)
118{
119 struct nouveau_device *device = nv_device(drm->device);
120 struct nouveau_object *object;
121 int ret;
122
123 if (nouveau_noaccel)
124 return;
125
126 /* initialise synchronisation routines */
127 if (device->card_type < NV_10) ret = nv04_fence_create(drm);
128 else if (device->chipset < 0x84) ret = nv10_fence_create(drm);
129 else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
130 else ret = nvc0_fence_create(drm);
131 if (ret) {
132 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
133 nouveau_accel_fini(drm);
134 return;
135 }
136
137 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
138 NvDmaFB, NvDmaTT, &drm->channel);
139 if (ret) {
140 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
141 nouveau_accel_fini(drm);
142 return;
143 }
144
145 if (device->card_type < NV_C0) {
146 ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
147 &drm->notify);
148 if (ret) {
149 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
150 nouveau_accel_fini(drm);
151 return;
152 }
153
154 ret = nouveau_object_new(nv_object(drm),
155 drm->channel->handle, NvNotify0,
156 0x003d, &(struct nv_dma_class) {
157 .flags = NV_DMA_TARGET_VRAM |
158 NV_DMA_ACCESS_RDWR,
159 .start = drm->notify->addr,
160 .limit = drm->notify->addr + 31
161 }, sizeof(struct nv_dma_class),
162 &object);
163 if (ret) {
164 nouveau_accel_fini(drm);
165 return;
166 }
167 }
168
169
170 nouveau_bo_move_init(drm->channel);
171}
172
94580299
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173static int __devinit
174nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent)
175{
176 struct nouveau_device *device;
ebb945a9
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177 struct apertures_struct *aper;
178 bool boot = false;
94580299
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179 int ret;
180
ebb945a9
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181 /* remove conflicting drivers (vesafb, efifb etc) */
182 aper = alloc_apertures(3);
183 if (!aper)
184 return -ENOMEM;
185
186 aper->ranges[0].base = pci_resource_start(pdev, 1);
187 aper->ranges[0].size = pci_resource_len(pdev, 1);
188 aper->count = 1;
189
190 if (pci_resource_len(pdev, 2)) {
191 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
192 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
193 aper->count++;
194 }
195
196 if (pci_resource_len(pdev, 3)) {
197 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
198 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
199 aper->count++;
200 }
201
202#ifdef CONFIG_X86
203 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
204#endif
205 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
206
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207 ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
208 nouveau_config, nouveau_debug, &device);
209 if (ret)
210 return ret;
211
212 pci_set_master(pdev);
213
77145f1c 214 ret = drm_get_pci_dev(pdev, pent, &driver);
94580299 215 if (ret) {
ebb945a9 216 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
94580299
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217 return ret;
218 }
219
220 return 0;
221}
222
223int
224nouveau_drm_load(struct drm_device *dev, unsigned long flags)
225{
226 struct pci_dev *pdev = dev->pdev;
ebb945a9 227 struct nouveau_device *device;
94580299
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228 struct nouveau_drm *drm;
229 int ret;
230
231 ret = nouveau_cli_create(pdev, 0, sizeof(*drm), (void**)&drm);
94580299
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232 if (ret)
233 return ret;
234
77145f1c
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235 dev->dev_private = drm;
236 drm->dev = dev;
237
94580299 238 INIT_LIST_HEAD(&drm->clients);
ebb945a9 239 spin_lock_init(&drm->tile.lock);
94580299 240
cb75d97e
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241 /* make sure AGP controller is in a consistent state before we
242 * (possibly) execute vbios init tables (see nouveau_agp.h)
243 */
244 if (drm_pci_device_is_agp(dev) && dev->agp) {
245 /* dummy device object, doesn't init anything, but allows
246 * agp code access to registers
247 */
248 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
249 NVDRM_DEVICE, 0x0080,
250 &(struct nv_device_class) {
251 .device = ~0,
252 .disable =
253 ~(NV_DEVICE_DISABLE_MMIO |
254 NV_DEVICE_DISABLE_IDENTIFY),
255 .debug0 = ~0,
256 }, sizeof(struct nv_device_class),
257 &drm->device);
258 if (ret)
ebb945a9 259 goto fail_device;
cb75d97e
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260
261 nouveau_agp_reset(drm);
262 nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
263 }
264
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265 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
266 0x0080, &(struct nv_device_class) {
267 .device = ~0,
268 .disable = 0,
269 .debug0 = 0,
270 }, sizeof(struct nv_device_class),
271 &drm->device);
272 if (ret)
273 goto fail_device;
274
77145f1c
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275 /* workaround an odd issue on nvc1 by disabling the device's
276 * nosnoop capability. hopefully won't cause issues until a
277 * better fix is found - assuming there is one...
278 */
ebb945a9 279 device = nv_device(drm->device);
77145f1c
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280 if (nv_device(drm->device)->chipset == 0xc1)
281 nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 282
77145f1c 283 nouveau_vga_init(drm);
cb75d97e
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284 nouveau_agp_init(drm);
285
ebb945a9
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286 if (device->card_type >= NV_50) {
287 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
288 0x1000, &drm->client.base.vm);
289 if (ret)
290 goto fail_device;
291 }
292
293 ret = nouveau_ttm_init(drm);
94580299 294 if (ret)
77145f1c
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295 goto fail_ttm;
296
297 ret = nouveau_bios_init(dev);
298 if (ret)
299 goto fail_bios;
300
301 ret = nouveau_irq_init(dev);
302 if (ret)
303 goto fail_irq;
94580299 304
77145f1c 305 ret = nouveau_display_create(dev);
ebb945a9 306 if (ret)
77145f1c
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307 goto fail_dispctor;
308
309 if (dev->mode_config.num_crtc) {
310 ret = nouveau_display_init(dev);
311 if (ret)
312 goto fail_dispinit;
313 }
314
315 nouveau_pm_init(dev);
ebb945a9
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316
317 nouveau_accel_init(drm);
318 nouveau_fbcon_init(dev);
94580299
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319 return 0;
320
77145f1c
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321fail_dispinit:
322 nouveau_display_destroy(dev);
323fail_dispctor:
324 nouveau_irq_fini(dev);
325fail_irq:
326 nouveau_bios_takedown(dev);
327fail_bios:
ebb945a9 328 nouveau_ttm_fini(drm);
77145f1c
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329fail_ttm:
330 nouveau_agp_fini(drm);
331 nouveau_vga_fini(drm);
94580299
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332fail_device:
333 nouveau_cli_destroy(&drm->client);
334 return ret;
335}
336
337int
338nouveau_drm_unload(struct drm_device *dev)
339{
77145f1c 340 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 341
ebb945a9
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342 nouveau_fbcon_fini(dev);
343 nouveau_accel_fini(drm);
344
77145f1c
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345 nouveau_pm_fini(dev);
346
347 nouveau_display_fini(dev);
348 nouveau_display_destroy(dev);
349
350 nouveau_irq_fini(dev);
351 nouveau_bios_takedown(dev);
94580299 352
ebb945a9 353 nouveau_ttm_fini(drm);
cb75d97e 354 nouveau_agp_fini(drm);
77145f1c 355 nouveau_vga_fini(drm);
cb75d97e 356
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357 nouveau_cli_destroy(&drm->client);
358 return 0;
359}
360
361static void
362nouveau_drm_remove(struct pci_dev *pdev)
363{
77145f1c
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364 struct drm_device *dev = pci_get_drvdata(pdev);
365 struct nouveau_drm *drm = nouveau_drm(dev);
ebb945a9 366 struct nouveau_object *device;
77145f1c
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367
368 device = drm->client.base.device;
369 drm_put_dev(dev);
370
ebb945a9
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371 nouveau_object_ref(NULL, &device);
372 nouveau_object_debug();
94580299
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373}
374
375int
376nouveau_drm_suspend(struct pci_dev *pdev, pm_message_t pm_state)
377{
378 struct drm_device *dev = pci_get_drvdata(pdev);
77145f1c 379 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
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380 struct nouveau_cli *cli;
381 int ret;
382
383 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
384 pm_state.event == PM_EVENT_PRETHAW)
385 return 0;
386
ebb945a9
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387 NV_INFO(drm, "suspending fbcon...\n");
388 nouveau_fbcon_set_suspend(dev, 1);
389
77145f1c
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390 NV_INFO(drm, "suspending display...\n");
391 ret = nouveau_display_suspend(dev);
94580299
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392 if (ret)
393 return ret;
394
ebb945a9
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395 NV_INFO(drm, "evicting buffers...\n");
396 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
397
398 if (drm->fence && nouveau_fence(drm)->suspend) {
399 if (!nouveau_fence(drm)->suspend(drm))
400 return -ENOMEM;
401 }
402
403 NV_INFO(drm, "suspending client object trees...\n");
94580299
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404 list_for_each_entry(cli, &drm->clients, head) {
405 ret = nouveau_client_fini(&cli->base, true);
406 if (ret)
407 goto fail_client;
408 }
409
410 ret = nouveau_client_fini(&drm->client.base, true);
411 if (ret)
412 goto fail_client;
413
cb75d97e
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414 nouveau_agp_fini(drm);
415
94580299
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416 pci_save_state(pdev);
417 if (pm_state.event == PM_EVENT_SUSPEND) {
418 pci_disable_device(pdev);
419 pci_set_power_state(pdev, PCI_D3hot);
420 }
421
422 return 0;
423
424fail_client:
425 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
426 nouveau_client_init(&cli->base);
427 }
428
77145f1c
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429 NV_INFO(drm, "resuming display...\n");
430 nouveau_display_resume(dev);
94580299
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431 return ret;
432}
433
434int
435nouveau_drm_resume(struct pci_dev *pdev)
436{
437 struct drm_device *dev = pci_get_drvdata(pdev);
77145f1c 438 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
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439 struct nouveau_cli *cli;
440 int ret;
441
442 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
443 return 0;
444
ebb945a9 445 NV_INFO(drm, "re-enabling device...\n");
94580299
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446 pci_set_power_state(pdev, PCI_D0);
447 pci_restore_state(pdev);
448 ret = pci_enable_device(pdev);
449 if (ret)
450 return ret;
451 pci_set_master(pdev);
452
cb75d97e
BS
453 nouveau_agp_reset(drm);
454
ebb945a9 455 NV_INFO(drm, "resuming client object trees...\n");
94580299 456 nouveau_client_init(&drm->client.base);
ebb945a9 457 nouveau_agp_init(drm);
94580299
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458
459 list_for_each_entry(cli, &drm->clients, head) {
460 nouveau_client_init(&cli->base);
461 }
cb75d97e 462
ebb945a9
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463 if (drm->fence && nouveau_fence(drm)->resume)
464 nouveau_fence(drm)->resume(drm);
94580299 465
77145f1c
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466 nouveau_run_vbios_init(dev);
467 nouveau_irq_postinstall(dev);
468 nouveau_pm_resume(dev);
469
470 NV_INFO(drm, "resuming display...\n");
471 nouveau_display_resume(dev);
472 return 0;
94580299
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473}
474
ebb945a9
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475int
476nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
477{
478 struct pci_dev *pdev = dev->pdev;
479 struct nouveau_drm *drm = nouveau_drm(dev);
480 struct nouveau_cli *cli;
481 int ret;
482
483 ret = nouveau_cli_create(pdev, fpriv->pid, sizeof(*cli), (void **)&cli);
484 if (ret)
485 return ret;
486
487 if (nv_device(drm->device)->card_type >= NV_50) {
488 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
489 0x1000, &cli->base.vm);
490 if (ret) {
491 nouveau_cli_destroy(cli);
492 return ret;
493 }
494 }
495
496 fpriv->driver_priv = cli;
497
498 mutex_lock(&drm->client.mutex);
499 list_add(&cli->head, &drm->clients);
500 mutex_unlock(&drm->client.mutex);
501 return 0;
502}
503
504void
505nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
506{
507 struct nouveau_cli *cli = nouveau_cli(fpriv);
508 struct nouveau_drm *drm = nouveau_drm(dev);
509
510 if (cli->abi16)
511 nouveau_abi16_fini(cli->abi16);
512
513 mutex_lock(&drm->client.mutex);
514 list_del(&cli->head);
515 mutex_unlock(&drm->client.mutex);
516}
517
518void
519nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
520{
521 struct nouveau_cli *cli = nouveau_cli(fpriv);
522 nouveau_cli_destroy(cli);
523}
524
77145f1c
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525static struct drm_ioctl_desc
526nouveau_ioctls[] = {
527 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
528 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
529 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
530 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
531 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
532 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
533 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
534 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
535 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
536 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
537 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
538 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
539};
540
541static const struct file_operations
542nouveau_driver_fops = {
543 .owner = THIS_MODULE,
544 .open = drm_open,
545 .release = drm_release,
546 .unlocked_ioctl = drm_ioctl,
547 .mmap = nouveau_ttm_mmap,
548 .poll = drm_poll,
549 .fasync = drm_fasync,
550 .read = drm_read,
551#if defined(CONFIG_COMPAT)
552 .compat_ioctl = nouveau_compat_ioctl,
553#endif
554 .llseek = noop_llseek,
555};
556
557static struct drm_driver
558driver = {
559 .driver_features =
560 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
561 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
562 DRIVER_MODESET | DRIVER_PRIME,
563
564 .load = nouveau_drm_load,
565 .unload = nouveau_drm_unload,
566 .open = nouveau_drm_open,
567 .preclose = nouveau_drm_preclose,
568 .postclose = nouveau_drm_postclose,
569 .lastclose = nouveau_vga_lastclose,
570
571 .irq_preinstall = nouveau_irq_preinstall,
572 .irq_postinstall = nouveau_irq_postinstall,
573 .irq_uninstall = nouveau_irq_uninstall,
574 .irq_handler = nouveau_irq_handler,
575
576 .get_vblank_counter = drm_vblank_count,
577 .enable_vblank = nouveau_vblank_enable,
578 .disable_vblank = nouveau_vblank_disable,
579
580 .ioctls = nouveau_ioctls,
581 .fops = &nouveau_driver_fops,
582
583 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
584 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
585 .gem_prime_export = nouveau_gem_prime_export,
586 .gem_prime_import = nouveau_gem_prime_import,
587
588 .gem_init_object = nouveau_gem_object_new,
589 .gem_free_object = nouveau_gem_object_del,
590 .gem_open_object = nouveau_gem_object_open,
591 .gem_close_object = nouveau_gem_object_close,
592
593 .dumb_create = nouveau_display_dumb_create,
594 .dumb_map_offset = nouveau_display_dumb_map_offset,
595 .dumb_destroy = nouveau_display_dumb_destroy,
596
597 .name = DRIVER_NAME,
598 .desc = DRIVER_DESC,
599#ifdef GIT_REVISION
600 .date = GIT_REVISION,
601#else
602 .date = DRIVER_DATE,
603#endif
604 .major = DRIVER_MAJOR,
605 .minor = DRIVER_MINOR,
606 .patchlevel = DRIVER_PATCHLEVEL,
607};
608
94580299
BS
609static struct pci_device_id
610nouveau_drm_pci_table[] = {
611 {
612 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
613 .class = PCI_BASE_CLASS_DISPLAY << 16,
614 .class_mask = 0xff << 16,
615 },
616 {
617 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
618 .class = PCI_BASE_CLASS_DISPLAY << 16,
619 .class_mask = 0xff << 16,
620 },
621 {}
622};
623
624static struct pci_driver
625nouveau_drm_pci_driver = {
626 .name = "nouveau",
627 .id_table = nouveau_drm_pci_table,
628 .probe = nouveau_drm_probe,
629 .remove = nouveau_drm_remove,
630 .suspend = nouveau_drm_suspend,
631 .resume = nouveau_drm_resume,
632};
633
634static int __init
635nouveau_drm_init(void)
636{
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637 driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
638
639 if (nouveau_modeset == -1) {
640#ifdef CONFIG_VGA_CONSOLE
641 if (vgacon_text_force())
642 nouveau_modeset = 0;
643 else
644#endif
645 nouveau_modeset = 1;
646 }
647
648 if (!nouveau_modeset)
649 return 0;
650
651 nouveau_register_dsm_handler();
652 return drm_pci_init(&driver, &nouveau_drm_pci_driver);
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653}
654
655static void __exit
656nouveau_drm_exit(void)
657{
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658 if (!nouveau_modeset)
659 return;
660
661 drm_pci_exit(&driver, &nouveau_drm_pci_driver);
662 nouveau_unregister_dsm_handler();
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663}
664
665module_init(nouveau_drm_init);
666module_exit(nouveau_drm_exit);
667
668MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
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669MODULE_AUTHOR(DRIVER_AUTHOR);
670MODULE_DESCRIPTION(DRIVER_DESC);
94580299 671MODULE_LICENSE("GPL and additional rights");