[linux-2.6-block.git] / drivers / gpu / drm / nouveau / include / nvkm / core / tegra.h

#ifndef __NVKM_DEVICE_TEGRA_H__
#define __NVKM_DEVICE_TEGRA_H__
#include <core/device.h>
#include <core/mm.h>

struct nvkm_device_tegra {
	const struct nvkm_device_tegra_func *func;
	struct nvkm_device device;
	struct platform_device *pdev;
	int irq;

	struct reset_control *rst;
	struct clk *clk;
	struct clk *clk_pwr;

	struct regulator *vdd;

	struct {
		/*
		 * Protects accesses to mm from subsystems
		 */
		struct mutex mutex;

		struct nvkm_mm mm;
		struct iommu_domain *domain;
		unsigned long pgshift;
	} iommu;

	int gpu_speedo;
};

struct nvkm_device_tegra_func {
	/*
	 * If an IOMMU is used, indicates which address bit will trigger a
	 * IOMMU translation when set (when this bit is not set, IOMMU is
	 * bypassed). A value of 0 means an IOMMU is never used.
	 */
	u8 iommu_bit;
};

int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *,
			  struct platform_device *,
			  const char *cfg, const char *dbg,
			  bool detect, bool mmio, u64 subdev_mask,
			  struct nvkm_device **);
#endif
Commit	Line	Data
7974dd1b BS	1	#ifndef __NVKM_DEVICE_TEGRA_H__
	2	#define __NVKM_DEVICE_TEGRA_H__
	3	#include <core/device.h>
43a70661	4	#include <core/mm.h>
7974dd1b BS	5
7974dd1b BS	6	struct nvkm_device_tegra {
e396ecd1	7	const struct nvkm_device_tegra_func *func;
7974dd1b BS	8	struct nvkm_device device;
7974dd1b BS	9	struct platform_device *pdev;
2b700825	10	int irq;
43a70661 BS	11
	12	struct reset_control *rst;
	13	struct clk *clk;
	14	struct clk *clk_pwr;
	15
	16	struct regulator *vdd;
	17
	18	struct {
	19	/*
	20	* Protects accesses to mm from subsystems
	21	*/
	22	struct mutex mutex;
	23
	24	struct nvkm_mm mm;
	25	struct iommu_domain *domain;
	26	unsigned long pgshift;
	27	} iommu;
	28
	29	int gpu_speedo;
7974dd1b BS	30	};
7974dd1b BS	31
e396ecd1 AC	32	struct nvkm_device_tegra_func {
	33	/*
	34	* If an IOMMU is used, indicates which address bit will trigger a
	35	* IOMMU translation when set (when this bit is not set, IOMMU is
	36	* bypassed). A value of 0 means an IOMMU is never used.
	37	*/
	38	u8 iommu_bit;
	39	};
	40
	41	int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *,
	42	struct platform_device *,
7974dd1b BS	43	const char cfg, const char dbg,
	44	bool detect, bool mmio, u64 subdev_mask,
	45	struct nvkm_device **);
	46	#endif