projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 1ccea77e | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| bbbe775e NA |
2 | /* |
| 3 | * Copyright (C) 2016 BayLibre, SAS | |
| 4 | * Author: Neil Armstrong <narmstrong@baylibre.com> | |
| bbbe775e NA |
5 | */ |
| 6 | ||
| 7 | /* | |
| 8 | * Video Encoders | |
| 9 | * - ENCI : Interlace Video Encoder | |
| 10 | * - ENCI_DVI : Interlace Video Encoder for DVI/HDMI | |
| 11 | * - ENCP : Progressive Video Encoder | |
| 12 | */ | |
| 13 | ||
| 14 | #ifndef __MESON_VENC_H | |
| 15 | #define __MESON_VENC_H | |
| 16 | ||
| 17 | enum { | |
| 18 | MESON_VENC_MODE_NONE = 0, | |
| 19 | MESON_VENC_MODE_CVBS_PAL, | |
| 20 | MESON_VENC_MODE_CVBS_NTSC, | |
| 335e3713 | 21 | MESON_VENC_MODE_HDMI, |
| bbbe775e NA |
22 | }; |
| 23 | ||
| 24 | struct meson_cvbs_enci_mode { | |
| 25 | unsigned int mode_tag; | |
| 26 | unsigned int hso_begin; /* HSO begin position */ | |
| 27 | unsigned int hso_end; /* HSO end position */ | |
| 28 | unsigned int vso_even; /* VSO even line */ | |
| 29 | unsigned int vso_odd; /* VSO odd line */ | |
| 30 | unsigned int macv_max_amp; /* Macrovision max amplitude */ | |
| 31 | unsigned int video_prog_mode; | |
| 32 | unsigned int video_mode; | |
| 33 | unsigned int sch_adjust; | |
| 34 | unsigned int yc_delay; | |
| 35 | unsigned int pixel_start; | |
| 36 | unsigned int pixel_end; | |
| 37 | unsigned int top_field_line_start; | |
| 38 | unsigned int top_field_line_end; | |
| 39 | unsigned int bottom_field_line_start; | |
| 40 | unsigned int bottom_field_line_end; | |
| 41 | unsigned int video_saturation; | |
| 42 | unsigned int video_contrast; | |
| 43 | unsigned int video_brightness; | |
| 44 | unsigned int video_hue; | |
| 45 | unsigned int analog_sync_adj; | |
| 46 | }; | |
| 47 | ||
| 335e3713 | 48 | /* HDMI Clock parameters */ |
| 3273fc63 NA |
49 | enum drm_mode_status |
| 50 | meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode); | |
| 335e3713 NA |
51 | bool meson_venc_hdmi_supported_vic(int vic); |
| 52 | bool meson_venc_hdmi_venc_repeat(int vic); | |
| 53 | ||
| bbbe775e NA |
54 | /* CVBS Timings and Parameters */ |
| 55 | extern struct meson_cvbs_enci_mode meson_cvbs_enci_pal; | |
| 56 | extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc; | |
| 57 | ||
| 58 | void meson_venci_cvbs_mode_set(struct meson_drm *priv, | |
| 59 | struct meson_cvbs_enci_mode *mode); | |
| 335e3713 NA |
60 | void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, |
| 61 | struct drm_display_mode *mode); | |
| bbbe775e NA |
62 | unsigned int meson_venci_get_field(struct meson_drm *priv); |
| 63 | ||
| 64 | void meson_venc_enable_vsync(struct meson_drm *priv); | |
| 65 | void meson_venc_disable_vsync(struct meson_drm *priv); | |
| 66 | ||
| 67 | void meson_venc_init(struct meson_drm *priv); | |
| 68 | ||
| 69 | #endif /* __MESON_VENC_H */ |