[linux-2.6-block.git] / drivers / gpu / drm / meson / meson_drv.c

/*
 * Copyright (C) 2016 BayLibre, SAS
 * Author: Neil Armstrong <narmstrong@baylibre.com>
 * Copyright (C) 2014 Endless Mobile
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of the
 * License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see <http://www.gnu.org/licenses/>.
 *
 * Written by:
 *     Jasper St. Pierre <jstpierre@mecheye.net>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/component.h>
#include <linux/of_graph.h>

#include <drm/drmP.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_flip_work.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_plane_helper.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_rect.h>
#include <drm/drm_fb_helper.h>

#include "meson_drv.h"
#include "meson_plane.h"
#include "meson_overlay.h"
#include "meson_crtc.h"
#include "meson_venc_cvbs.h"

#include "meson_vpp.h"
#include "meson_viu.h"
#include "meson_venc.h"
#include "meson_canvas.h"
#include "meson_registers.h"

#define DRIVER_NAME "meson"
#define DRIVER_DESC "Amlogic Meson DRM driver"

/**
 * DOC: Video Processing Unit
 *
 * VPU Handles the Global Video Processing, it includes management of the
 * clocks gates, blocks reset lines and power domains.
 *
 * What is missing :
 *
 * - Full reset of entire video processing HW blocks
 * - Scaling and setup of the VPU clock
 * - Bus clock gates
 * - Powering up video processing HW blocks
 * - Powering Up HDMI controller and PHY
 */

static const struct drm_mode_config_funcs meson_mode_config_funcs = {
	.atomic_check        = drm_atomic_helper_check,
	.atomic_commit       = drm_atomic_helper_commit,
	.fb_create           = drm_gem_fb_create,
};

static irqreturn_t meson_irq(int irq, void *arg)
{
	struct drm_device *dev = arg;
	struct meson_drm *priv = dev->dev_private;

	(void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));

	meson_crtc_irq(priv);

	return IRQ_HANDLED;
}

DEFINE_DRM_GEM_CMA_FOPS(fops);

static struct drm_driver meson_driver = {
	.driver_features	= DRIVER_HAVE_IRQ | DRIVER_GEM |
				  DRIVER_MODESET | DRIVER_PRIME |
				  DRIVER_ATOMIC,

	/* IRQ */
	.irq_handler		= meson_irq,

	/* PRIME Ops */
	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
	.gem_prime_import	= drm_gem_prime_import,
	.gem_prime_export	= drm_gem_prime_export,
	.gem_prime_get_sg_table	= drm_gem_cma_prime_get_sg_table,
	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
	.gem_prime_vmap		= drm_gem_cma_prime_vmap,
	.gem_prime_vunmap	= drm_gem_cma_prime_vunmap,
	.gem_prime_mmap		= drm_gem_cma_prime_mmap,

	/* GEM Ops */
	.dumb_create		= drm_gem_cma_dumb_create,
	.gem_free_object_unlocked = drm_gem_cma_free_object,
	.gem_vm_ops		= &drm_gem_cma_vm_ops,

	/* Misc */
	.fops			= &fops,
	.name			= DRIVER_NAME,
	.desc			= DRIVER_DESC,
	.date			= "20161109",
	.major			= 1,
	.minor			= 0,
};

static bool meson_vpu_has_available_connectors(struct device *dev)
{
	struct device_node *ep, *remote;

	/* Parses each endpoint and check if remote exists */
	for_each_endpoint_of_node(dev->of_node, ep) {
		/* If the endpoint node exists, consider it enabled */
		remote = of_graph_get_remote_port(ep);
		if (remote)
			return true;
	}

	return false;
}

static struct regmap_config meson_regmap_config = {
	.reg_bits       = 32,
	.val_bits       = 32,
	.reg_stride     = 4,
	.max_register   = 0x1000,
};

static void meson_vpu_init(struct meson_drm *priv)
{
	writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
	writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
	writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
	writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
}

static int meson_drv_bind_master(struct device *dev, bool has_components)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct meson_drm *priv;
	struct drm_device *drm;
	struct resource *res;
	void __iomem *regs;
	int ret;

	/* Checks if an output connector is available */
	if (!meson_vpu_has_available_connectors(dev)) {
		dev_err(dev, "No output connector available\n");
		return -ENODEV;
	}

	drm = drm_dev_alloc(&meson_driver, dev);
	if (IS_ERR(drm))
		return PTR_ERR(drm);

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv) {
		ret = -ENOMEM;
		goto free_drm;
	}
	drm->dev_private = priv;
	priv->drm = drm;
	priv->dev = dev;

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
	regs = devm_ioremap_resource(dev, res);
	if (IS_ERR(regs)) {
		ret = PTR_ERR(regs);
		goto free_drm;
	}

	priv->io_base = regs;

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
	if (!res) {
		ret = -EINVAL;
		goto free_drm;
	}
	/* Simply ioremap since it may be a shared register zone */
	regs = devm_ioremap(dev, res->start, resource_size(res));
	if (!regs) {
		ret = -EADDRNOTAVAIL;
		goto free_drm;
	}

	priv->hhi = devm_regmap_init_mmio(dev, regs,
					  &meson_regmap_config);
	if (IS_ERR(priv->hhi)) {
		dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
		ret = PTR_ERR(priv->hhi);
		goto free_drm;
	}

	priv->canvas = meson_canvas_get(dev);
	if (!IS_ERR(priv->canvas)) {
		ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
		if (ret)
			goto free_drm;
		ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
		if (ret) {
			meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
			goto free_drm;
		}
		ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
		if (ret) {
			meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
			meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
			goto free_drm;
		}
		ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
		if (ret) {
			meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
			meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
			meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
			goto free_drm;
		}
	} else {
		priv->canvas = NULL;

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
		if (!res) {
			ret = -EINVAL;
			goto free_drm;
		}
		/* Simply ioremap since it may be a shared register zone */
		regs = devm_ioremap(dev, res->start, resource_size(res));
		if (!regs) {
			ret = -EADDRNOTAVAIL;
			goto free_drm;
		}

		priv->dmc = devm_regmap_init_mmio(dev, regs,
						  &meson_regmap_config);
		if (IS_ERR(priv->dmc)) {
			dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");
			ret = PTR_ERR(priv->dmc);
			goto free_drm;
		}
	}

	priv->vsync_irq = platform_get_irq(pdev, 0);

	ret = drm_vblank_init(drm, 1);
	if (ret)
		goto free_drm;

	drm_mode_config_init(drm);
	drm->mode_config.max_width = 3840;
	drm->mode_config.max_height = 2160;
	drm->mode_config.funcs = &meson_mode_config_funcs;

	/* Hardware Initialization */

	meson_vpu_init(priv);
	meson_venc_init(priv);
	meson_vpp_init(priv);
	meson_viu_init(priv);

	/* Encoder Initialization */

	ret = meson_venc_cvbs_create(priv);
	if (ret)
		goto free_drm;

	if (has_components) {
		ret = component_bind_all(drm->dev, drm);
		if (ret) {
			dev_err(drm->dev, "Couldn't bind all components\n");
			goto free_drm;
		}
	}

	ret = meson_plane_create(priv);
	if (ret)
		goto free_drm;

	ret = meson_overlay_create(priv);
	if (ret)
		goto free_drm;

	ret = meson_crtc_create(priv);
	if (ret)
		goto free_drm;

	ret = drm_irq_install(drm, priv->vsync_irq);
	if (ret)
		goto free_drm;

	drm_mode_config_reset(drm);

	drm_kms_helper_poll_init(drm);

	platform_set_drvdata(pdev, priv);

	ret = drm_dev_register(drm, 0);
	if (ret)
		goto free_drm;

	drm_fbdev_generic_setup(drm, 32);

	return 0;

free_drm:
	drm_dev_put(drm);

	return ret;
}

static int meson_drv_bind(struct device *dev)
{
	return meson_drv_bind_master(dev, true);
}

static void meson_drv_unbind(struct device *dev)
{
	struct drm_device *drm = dev_get_drvdata(dev);
	struct meson_drm *priv = drm->dev_private;

	if (priv->canvas) {
		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
	}

	drm_dev_unregister(drm);
	drm_kms_helper_poll_fini(drm);
	drm_mode_config_cleanup(drm);
	drm_dev_put(drm);

}

static const struct component_master_ops meson_drv_master_ops = {
	.bind	= meson_drv_bind,
	.unbind	= meson_drv_unbind,
};

static int compare_of(struct device *dev, void *data)
{
	DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
			 dev->of_node, data);

	return dev->of_node == data;
}

/* Possible connectors nodes to ignore */
static const struct of_device_id connectors_match[] = {
	{ .compatible = "composite-video-connector" },
	{ .compatible = "svideo-connector" },
	{ .compatible = "hdmi-connector" },
	{ .compatible = "dvi-connector" },
	{}
};

static int meson_probe_remote(struct platform_device *pdev,
			      struct component_match **match,
			      struct device_node *parent,
			      struct device_node *remote)
{
	struct device_node *ep, *remote_node;
	int count = 1;

	/* If node is a connector, return and do not add to match table */
	if (of_match_node(connectors_match, remote))
		return 1;

	component_match_add(&pdev->dev, match, compare_of, remote);

	for_each_endpoint_of_node(remote, ep) {
		remote_node = of_graph_get_remote_port_parent(ep);
		if (!remote_node ||
		    remote_node == parent || /* Ignore parent endpoint */
		    !of_device_is_available(remote_node)) {
			of_node_put(remote_node);
			continue;
		}

		count += meson_probe_remote(pdev, match, remote, remote_node);

		of_node_put(remote_node);
	}

	return count;
}

static int meson_drv_probe(struct platform_device *pdev)
{
	struct component_match *match = NULL;
	struct device_node *np = pdev->dev.of_node;
	struct device_node *ep, *remote;
	int count = 0;

	for_each_endpoint_of_node(np, ep) {
		remote = of_graph_get_remote_port_parent(ep);
		if (!remote || !of_device_is_available(remote)) {
			of_node_put(remote);
			continue;
		}

		count += meson_probe_remote(pdev, &match, np, remote);
		of_node_put(remote);
	}

	if (count && !match)
		return meson_drv_bind_master(&pdev->dev, false);

	/* If some endpoints were found, initialize the nodes */
	if (count) {
		dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);

		return component_master_add_with_match(&pdev->dev,
						       &meson_drv_master_ops,
						       match);
	}

	/* If no output endpoints were available, simply bail out */
	return 0;
};

static const struct of_device_id dt_match[] = {
	{ .compatible = "amlogic,meson-gxbb-vpu" },
	{ .compatible = "amlogic,meson-gxl-vpu" },
	{ .compatible = "amlogic,meson-gxm-vpu" },
	{}
};
MODULE_DEVICE_TABLE(of, dt_match);

static struct platform_driver meson_drm_platform_driver = {
	.probe      = meson_drv_probe,
	.driver     = {
		.name	= "meson-drm",
		.of_match_table = dt_match,
	},
};

module_platform_driver(meson_drm_platform_driver);

MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
Commit	Line	Data
bbbe775e NA	1	/*
	2	* Copyright (C) 2016 BayLibre, SAS
	3	* Author: Neil Armstrong <narmstrong@baylibre.com>
	4	* Copyright (C) 2014 Endless Mobile
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation; either version 2 of the
	9	* License, or (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful, but
	12	* WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, see <http://www.gnu.org/licenses/>.
	18	*
	19	* Written by:
	20	* Jasper St. Pierre <jstpierre@mecheye.net>
	21	*/
	22
	23	#include <linux/kernel.h>
	24	#include <linux/module.h>
	25	#include <linux/mutex.h>
	26	#include <linux/platform_device.h>
a41e82e6	27	#include <linux/component.h>
bbbe775e NA	28	#include <linux/of_graph.h>
	29
	30	#include <drm/drmP.h>
	31	#include <drm/drm_atomic.h>
	32	#include <drm/drm_atomic_helper.h>
	33	#include <drm/drm_flip_work.h>
	34	#include <drm/drm_crtc_helper.h>
	35	#include <drm/drm_plane_helper.h>
	36	#include <drm/drm_gem_cma_helper.h>
24ef8157	37	#include <drm/drm_gem_framebuffer_helper.h>
bbbe775e NA	38	#include <drm/drm_fb_cma_helper.h>
	39	#include <drm/drm_rect.h>
	40	#include <drm/drm_fb_helper.h>
	41
	42	#include "meson_drv.h"
	43	#include "meson_plane.h"
f9a23481	44	#include "meson_overlay.h"
bbbe775e NA	45	#include "meson_crtc.h"
	46	#include "meson_venc_cvbs.h"
	47
	48	#include "meson_vpp.h"
	49	#include "meson_viu.h"
	50	#include "meson_venc.h"
	51	#include "meson_canvas.h"
	52	#include "meson_registers.h"
	53
	54	#define DRIVER_NAME "meson"
	55	#define DRIVER_DESC "Amlogic Meson DRM driver"
	56
2021d5b7 NA	57	/**
2021d5b7 NA	58	* DOC: Video Processing Unit
bbbe775e NA	59	*
	60	* VPU Handles the Global Video Processing, it includes management of the
	61	* clocks gates, blocks reset lines and power domains.
	62	*
	63	* What is missing :
2021d5b7	64	*
bbbe775e NA	65	* - Full reset of entire video processing HW blocks
	66	* - Scaling and setup of the VPU clock
	67	* - Bus clock gates
	68	* - Powering up video processing HW blocks
	69	* - Powering Up HDMI controller and PHY
	70	*/
	71
bbbe775e	72	static const struct drm_mode_config_funcs meson_mode_config_funcs = {
bbbe775e NA	73	.atomic_check = drm_atomic_helper_check,
bbbe775e NA	74	.atomic_commit = drm_atomic_helper_commit,
24ef8157	75	.fb_create = drm_gem_fb_create,
bbbe775e NA	76	};
bbbe775e NA	77
bbbe775e NA	78	static irqreturn_t meson_irq(int irq, void *arg)
	79	{
	80	struct drm_device *dev = arg;
	81	struct meson_drm *priv = dev->dev_private;
	82
	83	(void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
	84
	85	meson_crtc_irq(priv);
	86
	87	return IRQ_HANDLED;
	88	}
	89
d55f7e5d	90	DEFINE_DRM_GEM_CMA_FOPS(fops);
bbbe775e NA	91
	92	static struct drm_driver meson_driver = {
	93	.driver_features = DRIVER_HAVE_IRQ \| DRIVER_GEM \|
	94	DRIVER_MODESET \| DRIVER_PRIME \|
	95	DRIVER_ATOMIC,
	96
bbbe775e NA	97	/* IRQ */
	98	.irq_handler = meson_irq,
	99
	100	/* PRIME Ops */
	101	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	102	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	103	.gem_prime_import = drm_gem_prime_import,
	104	.gem_prime_export = drm_gem_prime_export,
	105	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
	106	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
	107	.gem_prime_vmap = drm_gem_cma_prime_vmap,
	108	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
	109	.gem_prime_mmap = drm_gem_cma_prime_mmap,
	110
	111	/* GEM Ops */
	112	.dumb_create = drm_gem_cma_dumb_create,
bbbe775e NA	113	.gem_free_object_unlocked = drm_gem_cma_free_object,
	114	.gem_vm_ops = &drm_gem_cma_vm_ops,
	115
	116	/* Misc */
	117	.fops = &fops,
	118	.name = DRIVER_NAME,
	119	.desc = DRIVER_DESC,
	120	.date = "20161109",
	121	.major = 1,
	122	.minor = 0,
	123	};
	124
	125	static bool meson_vpu_has_available_connectors(struct device *dev)
	126	{
	127	struct device_node ep, remote;
	128
	129	/* Parses each endpoint and check if remote exists */
	130	for_each_endpoint_of_node(dev->of_node, ep) {
	131	/* If the endpoint node exists, consider it enabled */
	132	remote = of_graph_get_remote_port(ep);
	133	if (remote)
	134	return true;
	135	}
	136
	137	return false;
	138	}
	139
	140	static struct regmap_config meson_regmap_config = {
	141	.reg_bits = 32,
	142	.val_bits = 32,
	143	.reg_stride = 4,
	144	.max_register = 0x1000,
	145	};
	146
09762525 NA	147	static void meson_vpu_init(struct meson_drm *priv)
	148	{
	149	writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
	150	writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
	151	writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
	152	writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
	153	}
	154
8604889f	155	static int meson_drv_bind_master(struct device *dev, bool has_components)
bbbe775e	156	{
a41e82e6	157	struct platform_device *pdev = to_platform_device(dev);
bbbe775e NA	158	struct meson_drm *priv;
	159	struct drm_device *drm;
	160	struct resource *res;
	161	void __iomem *regs;
	162	int ret;
	163
	164	/* Checks if an output connector is available */
	165	if (!meson_vpu_has_available_connectors(dev)) {
	166	dev_err(dev, "No output connector available\n");
	167	return -ENODEV;
	168	}
	169
	170	drm = drm_dev_alloc(&meson_driver, dev);
	171	if (IS_ERR(drm))
	172	return PTR_ERR(drm);
	173
	174	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	175	if (!priv) {
	176	ret = -ENOMEM;
	177	goto free_drm;
	178	}
	179	drm->dev_private = priv;
	180	priv->drm = drm;
	181	priv->dev = dev;
	182
	183	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
	184	regs = devm_ioremap_resource(dev, res);
2c18107b CJ	185	if (IS_ERR(regs)) {
	186	ret = PTR_ERR(regs);
	187	goto free_drm;
	188	}
bbbe775e NA	189
	190	priv->io_base = regs;
	191
	192	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
01a9e949 CJ	193	if (!res) {
	194	ret = -EINVAL;
	195	goto free_drm;
	196	}
bbbe775e NA	197	/* Simply ioremap since it may be a shared register zone */
bbbe775e NA	198	regs = devm_ioremap(dev, res->start, resource_size(res));
2c18107b CJ	199	if (!regs) {
	200	ret = -EADDRNOTAVAIL;
	201	goto free_drm;
	202	}
bbbe775e NA	203
	204	priv->hhi = devm_regmap_init_mmio(dev, regs,
	205	&meson_regmap_config);
	206	if (IS_ERR(priv->hhi)) {
	207	dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
2c18107b CJ	208	ret = PTR_ERR(priv->hhi);
2c18107b CJ	209	goto free_drm;
bbbe775e NA	210	}
bbbe775e NA	211
66cae477 MJ	212	priv->canvas = meson_canvas_get(dev);
	213	if (!IS_ERR(priv->canvas)) {
	214	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
	215	if (ret)
	216	goto free_drm;
f9a23481 NA	217	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
	218	if (ret) {
	219	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
	220	goto free_drm;
	221	}
	222	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
	223	if (ret) {
	224	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
	225	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
	226	goto free_drm;
	227	}
	228	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
	229	if (ret) {
	230	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
	231	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
	232	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
	233	goto free_drm;
	234	}
66cae477 MJ	235	} else {
66cae477 MJ	236	priv->canvas = NULL;
bbbe775e	237
66cae477 MJ	238	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
	239	if (!res) {
	240	ret = -EINVAL;
	241	goto free_drm;
	242	}
	243	/* Simply ioremap since it may be a shared register zone */
	244	regs = devm_ioremap(dev, res->start, resource_size(res));
	245	if (!regs) {
	246	ret = -EADDRNOTAVAIL;
	247	goto free_drm;
	248	}
	249
	250	priv->dmc = devm_regmap_init_mmio(dev, regs,
	251	&meson_regmap_config);
	252	if (IS_ERR(priv->dmc)) {
	253	dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");
	254	ret = PTR_ERR(priv->dmc);
	255	goto free_drm;
	256	}
bbbe775e NA	257	}
	258
	259	priv->vsync_irq = platform_get_irq(pdev, 0);
	260
e770f6bf CJ	261	ret = drm_vblank_init(drm, 1);
	262	if (ret)
	263	goto free_drm;
	264
bbbe775e	265	drm_mode_config_init(drm);
a41e82e6 NA	266	drm->mode_config.max_width = 3840;
	267	drm->mode_config.max_height = 2160;
	268	drm->mode_config.funcs = &meson_mode_config_funcs;
	269
	270	/* Hardware Initialization */
	271
09762525	272	meson_vpu_init(priv);
a41e82e6 NA	273	meson_venc_init(priv);
	274	meson_vpp_init(priv);
	275	meson_viu_init(priv);
bbbe775e NA	276
	277	/* Encoder Initialization */
	278
	279	ret = meson_venc_cvbs_create(priv);
	280	if (ret)
	281	goto free_drm;
	282
8604889f NA	283	if (has_components) {
	284	ret = component_bind_all(drm->dev, drm);
	285	if (ret) {
	286	dev_err(drm->dev, "Couldn't bind all components\n");
	287	goto free_drm;
	288	}
a41e82e6	289	}
bbbe775e NA	290
	291	ret = meson_plane_create(priv);
	292	if (ret)
	293	goto free_drm;
	294
f9a23481 NA	295	ret = meson_overlay_create(priv);
	296	if (ret)
	297	goto free_drm;
	298
bbbe775e NA	299	ret = meson_crtc_create(priv);
	300	if (ret)
	301	goto free_drm;
	302
	303	ret = drm_irq_install(drm, priv->vsync_irq);
	304	if (ret)
	305	goto free_drm;
	306
	307	drm_mode_config_reset(drm);
bbbe775e	308
bbbe775e NA	309	drm_kms_helper_poll_init(drm);
	310
	311	platform_set_drvdata(pdev, priv);
	312
	313	ret = drm_dev_register(drm, 0);
	314	if (ret)
	315	goto free_drm;
	316
efbb9df9 NT	317	drm_fbdev_generic_setup(drm, 32);
efbb9df9 NT	318
bbbe775e NA	319	return 0;
	320
	321	free_drm:
dcacf651	322	drm_dev_put(drm);
bbbe775e NA	323
	324	return ret;
	325	}
	326
8604889f NA	327	static int meson_drv_bind(struct device *dev)
	328	{
	329	return meson_drv_bind_master(dev, true);
	330	}
	331
a41e82e6	332	static void meson_drv_unbind(struct device *dev)
bbbe775e	333	{
a41e82e6	334	struct drm_device *drm = dev_get_drvdata(dev);
66cae477 MJ	335	struct meson_drm *priv = drm->dev_private;
66cae477 MJ	336
f9a23481	337	if (priv->canvas) {
66cae477	338	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
f9a23481 NA	339	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
	340	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
	341	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
	342	}
bbbe775e NA	343
	344	drm_dev_unregister(drm);
	345	drm_kms_helper_poll_fini(drm);
bbbe775e	346	drm_mode_config_cleanup(drm);
dcacf651	347	drm_dev_put(drm);
bbbe775e	348
bbbe775e NA	349	}
bbbe775e NA	350
a41e82e6 NA	351	static const struct component_master_ops meson_drv_master_ops = {
	352	.bind = meson_drv_bind,
	353	.unbind = meson_drv_unbind,
	354	};
	355
	356	static int compare_of(struct device dev, void data)
	357	{
4bf99144 RH	358	DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
4bf99144 RH	359	dev->of_node, data);
a41e82e6 NA	360
	361	return dev->of_node == data;
	362	}
	363
	364	/* Possible connectors nodes to ignore */
	365	static const struct of_device_id connectors_match[] = {
	366	{ .compatible = "composite-video-connector" },
	367	{ .compatible = "svideo-connector" },
	368	{ .compatible = "hdmi-connector" },
	369	{ .compatible = "dvi-connector" },
	370	{}
	371	};
	372
	373	static int meson_probe_remote(struct platform_device *pdev,
	374	struct component_match **match,
	375	struct device_node *parent,
	376	struct device_node *remote)
	377	{
	378	struct device_node ep, remote_node;
	379	int count = 1;
	380
	381	/* If node is a connector, return and do not add to match table */
	382	if (of_match_node(connectors_match, remote))
	383	return 1;
	384
	385	component_match_add(&pdev->dev, match, compare_of, remote);
	386
	387	for_each_endpoint_of_node(remote, ep) {
	388	remote_node = of_graph_get_remote_port_parent(ep);
	389	if (!remote_node \|\|
	390	remote_node == parent \|\| /* Ignore parent endpoint */
f672b93e JL	391	!of_device_is_available(remote_node)) {
f672b93e JL	392	of_node_put(remote_node);
a41e82e6	393	continue;
f672b93e	394	}
a41e82e6 NA	395
	396	count += meson_probe_remote(pdev, match, remote, remote_node);
	397
	398	of_node_put(remote_node);
	399	}
	400
	401	return count;
	402	}
	403
	404	static int meson_drv_probe(struct platform_device *pdev)
	405	{
	406	struct component_match *match = NULL;
	407	struct device_node *np = pdev->dev.of_node;
	408	struct device_node ep, remote;
	409	int count = 0;
	410
	411	for_each_endpoint_of_node(np, ep) {
	412	remote = of_graph_get_remote_port_parent(ep);
f672b93e JL	413	if (!remote \|\| !of_device_is_available(remote)) {
f672b93e JL	414	of_node_put(remote);
a41e82e6	415	continue;
f672b93e	416	}
a41e82e6 NA	417
a41e82e6 NA	418	count += meson_probe_remote(pdev, &match, np, remote);
f672b93e	419	of_node_put(remote);
a41e82e6 NA	420	}
a41e82e6 NA	421
8604889f NA	422	if (count && !match)
	423	return meson_drv_bind_master(&pdev->dev, false);
	424
a41e82e6 NA	425	/* If some endpoints were found, initialize the nodes */
	426	if (count) {
	427	dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
	428
	429	return component_master_add_with_match(&pdev->dev,
	430	&meson_drv_master_ops,
	431	match);
	432	}
	433
	434	/* If no output endpoints were available, simply bail out */
	435	return 0;
	436	};
	437
bbbe775e NA	438	static const struct of_device_id dt_match[] = {
	439	{ .compatible = "amlogic,meson-gxbb-vpu" },
	440	{ .compatible = "amlogic,meson-gxl-vpu" },
	441	{ .compatible = "amlogic,meson-gxm-vpu" },
	442	{}
	443	};
	444	MODULE_DEVICE_TABLE(of, dt_match);
	445
	446	static struct platform_driver meson_drm_platform_driver = {
	447	.probe = meson_drv_probe,
bbbe775e	448	.driver = {
8aaacbc0	449	.name = "meson-drm",
bbbe775e NA	450	.of_match_table = dt_match,
	451	},
	452	};
	453
	454	module_platform_driver(meson_drm_platform_driver);
	455
	456	MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
	457	MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
	458	MODULE_DESCRIPTION(DRIVER_DESC);
	459	MODULE_LICENSE("GPL");