[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_opregion.c

/*
 * Copyright 2008 Intel Corporation <hong.liu@intel.com>
 * Copyright 2008 Red Hat <mjg@redhat.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NON-INFRINGEMENT.  IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/acpi.h>
#include <linux/acpi_io.h>
#include <acpi/video.h>

#include <drm/drmP.h>
#include <drm/i915_drm.h>
#include "i915_drv.h"
#include "intel_drv.h"

#define PCI_ASLE 0xe4
#define PCI_ASLS 0xfc

#define OPREGION_HEADER_OFFSET 0
#define OPREGION_ACPI_OFFSET   0x100
#define   ACPI_CLID 0x01ac /* current lid state indicator */
#define   ACPI_CDCK 0x01b0 /* current docking state indicator */
#define OPREGION_SWSCI_OFFSET  0x200
#define OPREGION_ASLE_OFFSET   0x300
#define OPREGION_VBT_OFFSET    0x400

#define OPREGION_SIGNATURE "IntelGraphicsMem"
#define MBOX_ACPI      (1<<0)
#define MBOX_SWSCI     (1<<1)
#define MBOX_ASLE      (1<<2)

struct opregion_header {
	u8 signature[16];
	u32 size;
	u32 opregion_ver;
	u8 bios_ver[32];
	u8 vbios_ver[16];
	u8 driver_ver[16];
	u32 mboxes;
	u8 reserved[164];
} __attribute__((packed));

/* OpRegion mailbox #1: public ACPI methods */
struct opregion_acpi {
	u32 drdy;       /* driver readiness */
	u32 csts;       /* notification status */
	u32 cevt;       /* current event */
	u8 rsvd1[20];
	u32 didl[8];    /* supported display devices ID list */
	u32 cpdl[8];    /* currently presented display list */
	u32 cadl[8];    /* currently active display list */
	u32 nadl[8];    /* next active devices list */
	u32 aslp;       /* ASL sleep time-out */
	u32 tidx;       /* toggle table index */
	u32 chpd;       /* current hotplug enable indicator */
	u32 clid;       /* current lid state*/
	u32 cdck;       /* current docking state */
	u32 sxsw;       /* Sx state resume */
	u32 evts;       /* ASL supported events */
	u32 cnot;       /* current OS notification */
	u32 nrdy;       /* driver status */
	u8 rsvd2[60];
} __attribute__((packed));

/* OpRegion mailbox #2: SWSCI */
struct opregion_swsci {
	u32 scic;       /* SWSCI command|status|data */
	u32 parm;       /* command parameters */
	u32 dslp;       /* driver sleep time-out */
	u8 rsvd[244];
} __attribute__((packed));

/* OpRegion mailbox #3: ASLE */
struct opregion_asle {
	u32 ardy;       /* driver readiness */
	u32 aslc;       /* ASLE interrupt command */
	u32 tche;       /* technology enabled indicator */
	u32 alsi;       /* current ALS illuminance reading */
	u32 bclp;       /* backlight brightness to set */
	u32 pfit;       /* panel fitting state */
	u32 cblv;       /* current brightness level */
	u16 bclm[20];   /* backlight level duty cycle mapping table */
	u32 cpfm;       /* current panel fitting mode */
	u32 epfm;       /* enabled panel fitting modes */
	u8 plut[74];    /* panel LUT and identifier */
	u32 pfmb;       /* PWM freq and min brightness */
	u8 rsvd[102];
} __attribute__((packed));

/* ASLE irq request bits */
#define ASLE_SET_ALS_ILLUM     (1 << 0)
#define ASLE_SET_BACKLIGHT     (1 << 1)
#define ASLE_SET_PFIT          (1 << 2)
#define ASLE_SET_PWM_FREQ      (1 << 3)
#define ASLE_REQ_MSK           0xf

/* response bits of ASLE irq request */
#define ASLE_ALS_ILLUM_FAILED	(1<<10)
#define ASLE_BACKLIGHT_FAILED	(1<<12)
#define ASLE_PFIT_FAILED	(1<<14)
#define ASLE_PWM_FREQ_FAILED	(1<<16)

/* ASLE backlight brightness to set */
#define ASLE_BCLP_VALID                (1<<31)
#define ASLE_BCLP_MSK          (~(1<<31))

/* ASLE panel fitting request */
#define ASLE_PFIT_VALID         (1<<31)
#define ASLE_PFIT_CENTER (1<<0)
#define ASLE_PFIT_STRETCH_TEXT (1<<1)
#define ASLE_PFIT_STRETCH_GFX (1<<2)

/* PWM frequency and minimum brightness */
#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
#define ASLE_PFMB_PWM_VALID (1<<31)

#define ASLE_CBLV_VALID         (1<<31)

#define ACPI_OTHER_OUTPUT (0<<8)
#define ACPI_VGA_OUTPUT (1<<8)
#define ACPI_TV_OUTPUT (2<<8)
#define ACPI_DIGITAL_OUTPUT (3<<8)
#define ACPI_LVDS_OUTPUT (4<<8)

#ifdef CONFIG_ACPI
static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
	u32 max;

	DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);

	if (!(bclp & ASLE_BCLP_VALID))
		return ASLE_BACKLIGHT_FAILED;

	bclp &= ASLE_BCLP_MSK;
	if (bclp > 255)
		return ASLE_BACKLIGHT_FAILED;

	max = intel_panel_get_max_backlight(dev);
	intel_panel_set_backlight(dev, bclp * max / 255);
	iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &asle->cblv);

	return 0;
}

static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
{
	/* alsi is the current ALS reading in lux. 0 indicates below sensor
	   range, 0xffff indicates above sensor range. 1-0xfffe are valid */
	return 0;
}

static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	if (pfmb & ASLE_PFMB_PWM_VALID) {
		u32 blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
		u32 pwm = pfmb & ASLE_PFMB_PWM_MASK;
		blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
		pwm = pwm >> 9;
		/* FIXME - what do we do with the PWM? */
	}
	return 0;
}

static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
{
	/* Panel fitting is currently controlled by the X code, so this is a
	   noop until modesetting support works fully */
	if (!(pfit & ASLE_PFIT_VALID))
		return ASLE_PFIT_FAILED;
	return 0;
}

void intel_opregion_asle_intr(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
	u32 asle_stat = 0;
	u32 asle_req;

	if (!asle)
		return;

	asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;

	if (!asle_req) {
		DRM_DEBUG_DRIVER("non asle set request??\n");
		return;
	}

	if (asle_req & ASLE_SET_ALS_ILLUM)
		asle_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));

	if (asle_req & ASLE_SET_BACKLIGHT)
		asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));

	if (asle_req & ASLE_SET_PFIT)
		asle_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));

	if (asle_req & ASLE_SET_PWM_FREQ)
		asle_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));

	iowrite32(asle_stat, &asle->aslc);
}

void intel_opregion_gse_intr(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
	u32 asle_stat = 0;
	u32 asle_req;

	if (!asle)
		return;

	asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;

	if (!asle_req) {
		DRM_DEBUG_DRIVER("non asle set request??\n");
		return;
	}

	if (asle_req & ASLE_SET_ALS_ILLUM) {
		DRM_DEBUG_DRIVER("Illum is not supported\n");
		asle_stat |= ASLE_ALS_ILLUM_FAILED;
	}

	if (asle_req & ASLE_SET_BACKLIGHT)
		asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));

	if (asle_req & ASLE_SET_PFIT) {
		DRM_DEBUG_DRIVER("Pfit is not supported\n");
		asle_stat |= ASLE_PFIT_FAILED;
	}

	if (asle_req & ASLE_SET_PWM_FREQ) {
		DRM_DEBUG_DRIVER("PWM freq is not supported\n");
		asle_stat |= ASLE_PWM_FREQ_FAILED;
	}

	iowrite32(asle_stat, &asle->aslc);
}
#define ASLE_ALS_EN    (1<<0)
#define ASLE_BLC_EN    (1<<1)
#define ASLE_PFIT_EN   (1<<2)
#define ASLE_PFMB_EN   (1<<3)

void intel_opregion_enable_asle(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;

	if (asle) {
		if (IS_MOBILE(dev))
			intel_enable_asle(dev);

		iowrite32(ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN |
			  ASLE_PFMB_EN,
			  &asle->tche);
		iowrite32(1, &asle->ardy);
	}
}

#define ACPI_EV_DISPLAY_SWITCH (1<<0)
#define ACPI_EV_LID            (1<<1)
#define ACPI_EV_DOCK           (1<<2)

static struct intel_opregion *system_opregion;

static int intel_opregion_video_event(struct notifier_block *nb,
				      unsigned long val, void *data)
{
	/* The only video events relevant to opregion are 0x80. These indicate
	   either a docking event, lid switch or display switch request. In
	   Linux, these are handled by the dock, button and video drivers.
	*/

	struct opregion_acpi __iomem *acpi;
	struct acpi_bus_event *event = data;
	int ret = NOTIFY_OK;

	if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
		return NOTIFY_DONE;

	if (!system_opregion)
		return NOTIFY_DONE;

	acpi = system_opregion->acpi;

	if (event->type == 0x80 &&
	    (ioread32(&acpi->cevt) & 1) == 0)
		ret = NOTIFY_BAD;

	iowrite32(0, &acpi->csts);

	return ret;
}

static struct notifier_block intel_opregion_notifier = {
	.notifier_call = intel_opregion_video_event,
};

/*
 * Initialise the DIDL field in opregion. This passes a list of devices to
 * the firmware. Values are defined by section B.4.2 of the ACPI specification
 * (version 3)
 */

static void intel_didl_outputs(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;
	struct drm_connector *connector;
	acpi_handle handle;
	struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL;
	unsigned long long device_id;
	acpi_status status;
	u32 temp;
	int i = 0;

	handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
	if (!handle || ACPI_FAILURE(acpi_bus_get_device(handle, &acpi_dev)))
		return;

	if (acpi_is_video_device(acpi_dev))
		acpi_video_bus = acpi_dev;
	else {
		list_for_each_entry(acpi_cdev, &acpi_dev->children, node) {
			if (acpi_is_video_device(acpi_cdev)) {
				acpi_video_bus = acpi_cdev;
				break;
			}
		}
	}

	if (!acpi_video_bus) {
		pr_warn("No ACPI video bus found\n");
		return;
	}

	list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
		if (i >= 8) {
			dev_printk(KERN_ERR, &dev->pdev->dev,
				    "More than 8 outputs detected\n");
			return;
		}
		status =
			acpi_evaluate_integer(acpi_cdev->handle, "_ADR",
						NULL, &device_id);
		if (ACPI_SUCCESS(status)) {
			if (!device_id)
				goto blind_set;
			iowrite32((u32)(device_id & 0x0f0f),
				  &opregion->acpi->didl[i]);
			i++;
		}
	}

end:
	/* If fewer than 8 outputs, the list must be null terminated */
	if (i < 8)
		iowrite32(0, &opregion->acpi->didl[i]);
	return;

blind_set:
	i = 0;
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		int output_type = ACPI_OTHER_OUTPUT;
		if (i >= 8) {
			dev_printk(KERN_ERR, &dev->pdev->dev,
				    "More than 8 outputs detected\n");
			return;
		}
		switch (connector->connector_type) {
		case DRM_MODE_CONNECTOR_VGA:
		case DRM_MODE_CONNECTOR_DVIA:
			output_type = ACPI_VGA_OUTPUT;
			break;
		case DRM_MODE_CONNECTOR_Composite:
		case DRM_MODE_CONNECTOR_SVIDEO:
		case DRM_MODE_CONNECTOR_Component:
		case DRM_MODE_CONNECTOR_9PinDIN:
			output_type = ACPI_TV_OUTPUT;
			break;
		case DRM_MODE_CONNECTOR_DVII:
		case DRM_MODE_CONNECTOR_DVID:
		case DRM_MODE_CONNECTOR_DisplayPort:
		case DRM_MODE_CONNECTOR_HDMIA:
		case DRM_MODE_CONNECTOR_HDMIB:
			output_type = ACPI_DIGITAL_OUTPUT;
			break;
		case DRM_MODE_CONNECTOR_LVDS:
			output_type = ACPI_LVDS_OUTPUT;
			break;
		}
		temp = ioread32(&opregion->acpi->didl[i]);
		iowrite32(temp | (1<<31) | output_type | i,
			  &opregion->acpi->didl[i]);
		i++;
	}
	goto end;
}

static void intel_setup_cadls(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;
	int i = 0;
	u32 disp_id;

	/* Initialize the CADL field by duplicating the DIDL values.
	 * Technically, this is not always correct as display outputs may exist,
	 * but not active. This initialization is necessary for some Clevo
	 * laptops that check this field before processing the brightness and
	 * display switching hotkeys. Just like DIDL, CADL is NULL-terminated if
	 * there are less than eight devices. */
	do {
		disp_id = ioread32(&opregion->acpi->didl[i]);
		iowrite32(disp_id, &opregion->acpi->cadl[i]);
	} while (++i < 8 && disp_id != 0);
}

void intel_opregion_init(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;

	if (!opregion->header)
		return;

	if (opregion->acpi) {
		if (drm_core_check_feature(dev, DRIVER_MODESET)) {
			intel_didl_outputs(dev);
			intel_setup_cadls(dev);
		}

		/* Notify BIOS we are ready to handle ACPI video ext notifs.
		 * Right now, all the events are handled by the ACPI video module.
		 * We don't actually need to do anything with them. */
		iowrite32(0, &opregion->acpi->csts);
		iowrite32(1, &opregion->acpi->drdy);

		system_opregion = opregion;
		register_acpi_notifier(&intel_opregion_notifier);
	}

	if (opregion->asle)
		intel_opregion_enable_asle(dev);
}

void intel_opregion_fini(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;

	if (!opregion->header)
		return;

	if (opregion->acpi) {
		iowrite32(0, &opregion->acpi->drdy);

		system_opregion = NULL;
		unregister_acpi_notifier(&intel_opregion_notifier);
	}

	/* just clear all opregion memory pointers now */
	iounmap(opregion->header);
	opregion->header = NULL;
	opregion->acpi = NULL;
	opregion->swsci = NULL;
	opregion->asle = NULL;
	opregion->vbt = NULL;
}
#endif

int intel_opregion_setup(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;
	void __iomem *base;
	u32 asls, mboxes;
	char buf[sizeof(OPREGION_SIGNATURE)];
	int err = 0;

	pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
	DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
	if (asls == 0) {
		DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
		return -ENOTSUPP;
	}

	base = acpi_os_ioremap(asls, OPREGION_SIZE);
	if (!base)
		return -ENOMEM;

	memcpy_fromio(buf, base, sizeof(buf));

	if (memcmp(buf, OPREGION_SIGNATURE, 16)) {
		DRM_DEBUG_DRIVER("opregion signature mismatch\n");
		err = -EINVAL;
		goto err_out;
	}
	opregion->header = base;
	opregion->vbt = base + OPREGION_VBT_OFFSET;

	opregion->lid_state = base + ACPI_CLID;

	mboxes = ioread32(&opregion->header->mboxes);
	if (mboxes & MBOX_ACPI) {
		DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
		opregion->acpi = base + OPREGION_ACPI_OFFSET;
	}

	if (mboxes & MBOX_SWSCI) {
		DRM_DEBUG_DRIVER("SWSCI supported\n");
		opregion->swsci = base + OPREGION_SWSCI_OFFSET;
	}
	if (mboxes & MBOX_ASLE) {
		DRM_DEBUG_DRIVER("ASLE supported\n");
		opregion->asle = base + OPREGION_ASLE_OFFSET;
	}

	return 0;

err_out:
	iounmap(base);
	return err;
}
Commit	Line	Data
8ee1c3db MG	1	/*
	2	* Copyright 2008 Intel Corporation <hong.liu@intel.com>
	3	* Copyright 2008 Red Hat <mjg@redhat.com>
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining
	6	* a copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sub license, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* The above copyright notice and this permission notice (including the
	14	* next paragraph) shall be included in all copies or substantial
	15	* portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	18	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	19	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	20	* NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
	21	* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	22	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	23	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	24	* SOFTWARE.
	25	*
	26	*/
	27
a70491cc JP	28	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
a70491cc JP	29
8ee1c3db	30	#include <linux/acpi.h>
b705120e	31	#include <linux/acpi_io.h>
74a365b3	32	#include <acpi/video.h>
8ee1c3db	33
760285e7 DH	34	#include <drm/drmP.h>
760285e7 DH	35	#include <drm/i915_drm.h>
8ee1c3db	36	#include "i915_drv.h"
a9573556	37	#include "intel_drv.h"
8ee1c3db MG	38
8ee1c3db MG	39	#define PCI_ASLE 0xe4
8ee1c3db MG	40	#define PCI_ASLS 0xfc
8ee1c3db MG	41
8ee1c3db MG	42	#define OPREGION_HEADER_OFFSET 0
8ee1c3db MG	43	#define OPREGION_ACPI_OFFSET 0x100
82d3c90c CW	44	#define ACPI_CLID 0x01ac /* current lid state indicator */
82d3c90c CW	45	#define ACPI_CDCK 0x01b0 /* current docking state indicator */
8ee1c3db MG	46	#define OPREGION_SWSCI_OFFSET 0x200
8ee1c3db MG	47	#define OPREGION_ASLE_OFFSET 0x300
44834a67	48	#define OPREGION_VBT_OFFSET 0x400
8ee1c3db MG	49
	50	#define OPREGION_SIGNATURE "IntelGraphicsMem"
	51	#define MBOX_ACPI (1<<0)
	52	#define MBOX_SWSCI (1<<1)
	53	#define MBOX_ASLE (1<<2)
	54
	55	struct opregion_header {
0206e353 AJ	56	u8 signature[16];
	57	u32 size;
	58	u32 opregion_ver;
	59	u8 bios_ver[32];
	60	u8 vbios_ver[16];
	61	u8 driver_ver[16];
	62	u32 mboxes;
	63	u8 reserved[164];
8ee1c3db MG	64	} __attribute__((packed));
	65
	66	/* OpRegion mailbox #1: public ACPI methods */
	67	struct opregion_acpi {
0206e353 AJ	68	u32 drdy; /* driver readiness */
	69	u32 csts; /* notification status */
	70	u32 cevt; /* current event */
	71	u8 rsvd1[20];
	72	u32 didl[8]; /* supported display devices ID list */
	73	u32 cpdl[8]; /* currently presented display list */
	74	u32 cadl[8]; /* currently active display list */
	75	u32 nadl[8]; /* next active devices list */
	76	u32 aslp; /* ASL sleep time-out */
	77	u32 tidx; /* toggle table index */
	78	u32 chpd; /* current hotplug enable indicator */
	79	u32 clid; /* current lid state*/
	80	u32 cdck; /* current docking state */
	81	u32 sxsw; /* Sx state resume */
	82	u32 evts; /* ASL supported events */
	83	u32 cnot; /* current OS notification */
	84	u32 nrdy; /* driver status */
	85	u8 rsvd2[60];
8ee1c3db MG	86	} __attribute__((packed));
	87
	88	/* OpRegion mailbox #2: SWSCI */
	89	struct opregion_swsci {
0206e353 AJ	90	u32 scic; /* SWSCI command\|status\|data */
	91	u32 parm; /* command parameters */
	92	u32 dslp; /* driver sleep time-out */
	93	u8 rsvd[244];
8ee1c3db MG	94	} __attribute__((packed));
	95
	96	/* OpRegion mailbox #3: ASLE */
	97	struct opregion_asle {
0206e353 AJ	98	u32 ardy; /* driver readiness */
	99	u32 aslc; /* ASLE interrupt command */
	100	u32 tche; /* technology enabled indicator */
	101	u32 alsi; /* current ALS illuminance reading */
	102	u32 bclp; /* backlight brightness to set */
	103	u32 pfit; /* panel fitting state */
	104	u32 cblv; /* current brightness level */
	105	u16 bclm[20]; /* backlight level duty cycle mapping table */
	106	u32 cpfm; /* current panel fitting mode */
	107	u32 epfm; /* enabled panel fitting modes */
	108	u8 plut[74]; /* panel LUT and identifier */
	109	u32 pfmb; /* PWM freq and min brightness */
	110	u8 rsvd[102];
8ee1c3db MG	111	} __attribute__((packed));
	112
	113	/* ASLE irq request bits */
	114	#define ASLE_SET_ALS_ILLUM (1 << 0)
	115	#define ASLE_SET_BACKLIGHT (1 << 1)
	116	#define ASLE_SET_PFIT (1 << 2)
	117	#define ASLE_SET_PWM_FREQ (1 << 3)
	118	#define ASLE_REQ_MSK 0xf
	119
	120	/* response bits of ASLE irq request */
01c66889 ZY	121	#define ASLE_ALS_ILLUM_FAILED (1<<10)
	122	#define ASLE_BACKLIGHT_FAILED (1<<12)
	123	#define ASLE_PFIT_FAILED (1<<14)
	124	#define ASLE_PWM_FREQ_FAILED (1<<16)
8ee1c3db MG	125
	126	/* ASLE backlight brightness to set */
	127	#define ASLE_BCLP_VALID (1<<31)
	128	#define ASLE_BCLP_MSK (~(1<<31))
	129
	130	/* ASLE panel fitting request */
	131	#define ASLE_PFIT_VALID (1<<31)
	132	#define ASLE_PFIT_CENTER (1<<0)
	133	#define ASLE_PFIT_STRETCH_TEXT (1<<1)
	134	#define ASLE_PFIT_STRETCH_GFX (1<<2)
	135
	136	/* PWM frequency and minimum brightness */
	137	#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
	138	#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
	139	#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
	140	#define ASLE_PFMB_PWM_VALID (1<<31)
	141
	142	#define ASLE_CBLV_VALID (1<<31)
	143
74a365b3 MG	144	#define ACPI_OTHER_OUTPUT (0<<8)
	145	#define ACPI_VGA_OUTPUT (1<<8)
	146	#define ACPI_TV_OUTPUT (2<<8)
	147	#define ACPI_DIGITAL_OUTPUT (3<<8)
	148	#define ACPI_LVDS_OUTPUT (4<<8)
	149
44834a67	150	#ifdef CONFIG_ACPI
8ee1c3db MG	151	static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
	152	{
	153	struct drm_i915_private *dev_priv = dev->dev_private;
5bc4418b	154	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
a9573556	155	u32 max;
8ee1c3db	156
749052fb JN	157	DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);
749052fb JN	158
8ee1c3db	159	if (!(bclp & ASLE_BCLP_VALID))
862daefc	160	return ASLE_BACKLIGHT_FAILED;
8ee1c3db MG	161
8ee1c3db MG	162	bclp &= ASLE_BCLP_MSK;
a9573556	163	if (bclp > 255)
862daefc	164	return ASLE_BACKLIGHT_FAILED;
8ee1c3db	165
a9573556 CW	166	max = intel_panel_get_max_backlight(dev);
a9573556 CW	167	intel_panel_set_backlight(dev, bclp * max / 255);
5bc4418b	168	iowrite32((bclp*0x64)/0xff \| ASLE_CBLV_VALID, &asle->cblv);
8ee1c3db MG	169
	170	return 0;
	171	}
	172
	173	static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
	174	{
	175	/* alsi is the current ALS reading in lux. 0 indicates below sensor
	176	range, 0xffff indicates above sensor range. 1-0xfffe are valid */
	177	return 0;
	178	}
	179
	180	static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
	181	{
	182	struct drm_i915_private *dev_priv = dev->dev_private;
	183	if (pfmb & ASLE_PFMB_PWM_VALID) {
	184	u32 blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
	185	u32 pwm = pfmb & ASLE_PFMB_PWM_MASK;
	186	blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
	187	pwm = pwm >> 9;
	188	/* FIXME - what do we do with the PWM? */
	189	}
	190	return 0;
	191	}
	192
	193	static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
	194	{
	195	/* Panel fitting is currently controlled by the X code, so this is a
	196	noop until modesetting support works fully */
	197	if (!(pfit & ASLE_PFIT_VALID))
862daefc	198	return ASLE_PFIT_FAILED;
8ee1c3db MG	199	return 0;
	200	}
	201
3b617967	202	void intel_opregion_asle_intr(struct drm_device *dev)
8ee1c3db MG	203	{
8ee1c3db MG	204	struct drm_i915_private *dev_priv = dev->dev_private;
5bc4418b	205	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
8ee1c3db MG	206	u32 asle_stat = 0;
	207	u32 asle_req;
	208
	209	if (!asle)
	210	return;
	211
5bc4418b	212	asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;
8ee1c3db MG	213
8ee1c3db MG	214	if (!asle_req) {
44d98a61	215	DRM_DEBUG_DRIVER("non asle set request??\n");
8ee1c3db MG	216	return;
	217	}
	218
	219	if (asle_req & ASLE_SET_ALS_ILLUM)
5bc4418b	220	asle_stat \|= asle_set_als_illum(dev, ioread32(&asle->alsi));
8ee1c3db MG	221
8ee1c3db MG	222	if (asle_req & ASLE_SET_BACKLIGHT)
5bc4418b	223	asle_stat \|= asle_set_backlight(dev, ioread32(&asle->bclp));
8ee1c3db MG	224
8ee1c3db MG	225	if (asle_req & ASLE_SET_PFIT)
5bc4418b	226	asle_stat \|= asle_set_pfit(dev, ioread32(&asle->pfit));
8ee1c3db MG	227
8ee1c3db MG	228	if (asle_req & ASLE_SET_PWM_FREQ)
5bc4418b	229	asle_stat \|= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
8ee1c3db	230
5bc4418b	231	iowrite32(asle_stat, &asle->aslc);
8ee1c3db MG	232	}
8ee1c3db MG	233
3b617967	234	void intel_opregion_gse_intr(struct drm_device *dev)
01c66889 ZY	235	{
01c66889 ZY	236	struct drm_i915_private *dev_priv = dev->dev_private;
5bc4418b	237	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
01c66889 ZY	238	u32 asle_stat = 0;
	239	u32 asle_req;
	240
	241	if (!asle)
	242	return;
	243
5bc4418b	244	asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;
01c66889 ZY	245
	246	if (!asle_req) {
	247	DRM_DEBUG_DRIVER("non asle set request??\n");
	248	return;
	249	}
	250
	251	if (asle_req & ASLE_SET_ALS_ILLUM) {
	252	DRM_DEBUG_DRIVER("Illum is not supported\n");
	253	asle_stat \|= ASLE_ALS_ILLUM_FAILED;
	254	}
	255
	256	if (asle_req & ASLE_SET_BACKLIGHT)
5bc4418b	257	asle_stat \|= asle_set_backlight(dev, ioread32(&asle->bclp));
01c66889 ZY	258
	259	if (asle_req & ASLE_SET_PFIT) {
	260	DRM_DEBUG_DRIVER("Pfit is not supported\n");
	261	asle_stat \|= ASLE_PFIT_FAILED;
	262	}
	263
	264	if (asle_req & ASLE_SET_PWM_FREQ) {
	265	DRM_DEBUG_DRIVER("PWM freq is not supported\n");
	266	asle_stat \|= ASLE_PWM_FREQ_FAILED;
	267	}
	268
5bc4418b	269	iowrite32(asle_stat, &asle->aslc);
01c66889	270	}
8ee1c3db MG	271	#define ASLE_ALS_EN (1<<0)
	272	#define ASLE_BLC_EN (1<<1)
	273	#define ASLE_PFIT_EN (1<<2)
	274	#define ASLE_PFMB_EN (1<<3)
	275
3b617967	276	void intel_opregion_enable_asle(struct drm_device *dev)
8ee1c3db MG	277	{
8ee1c3db MG	278	struct drm_i915_private *dev_priv = dev->dev_private;
5bc4418b	279	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
8ee1c3db MG	280
8ee1c3db MG	281	if (asle) {
1ec14ad3	282	if (IS_MOBILE(dev))
01c66889	283	intel_enable_asle(dev);
8ee1c3db	284
5bc4418b BW	285	iowrite32(ASLE_ALS_EN \| ASLE_BLC_EN \| ASLE_PFIT_EN \|
	286	ASLE_PFMB_EN,
	287	&asle->tche);
	288	iowrite32(1, &asle->ardy);
8ee1c3db MG	289	}
	290	}
	291
	292	#define ACPI_EV_DISPLAY_SWITCH (1<<0)
	293	#define ACPI_EV_LID (1<<1)
	294	#define ACPI_EV_DOCK (1<<2)
	295
	296	static struct intel_opregion *system_opregion;
	297
b358d0a6 HE	298	static int intel_opregion_video_event(struct notifier_block *nb,
b358d0a6 HE	299	unsigned long val, void *data)
8ee1c3db MG	300	{
	301	/* The only video events relevant to opregion are 0x80. These indicate
	302	either a docking event, lid switch or display switch request. In
	303	Linux, these are handled by the dock, button and video drivers.
f5a3d0c4	304	*/
8ee1c3db	305
5bc4418b	306	struct opregion_acpi __iomem *acpi;
f5a3d0c4 MG	307	struct acpi_bus_event *event = data;
	308	int ret = NOTIFY_OK;
	309
	310	if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
	311	return NOTIFY_DONE;
8ee1c3db MG	312
	313	if (!system_opregion)
	314	return NOTIFY_DONE;
	315
	316	acpi = system_opregion->acpi;
f5a3d0c4	317
5bc4418b BW	318	if (event->type == 0x80 &&
5bc4418b BW	319	(ioread32(&acpi->cevt) & 1) == 0)
f5a3d0c4 MG	320	ret = NOTIFY_BAD;
f5a3d0c4 MG	321
5bc4418b	322	iowrite32(0, &acpi->csts);
8ee1c3db	323
f5a3d0c4	324	return ret;
8ee1c3db MG	325	}
	326
	327	static struct notifier_block intel_opregion_notifier = {
	328	.notifier_call = intel_opregion_video_event,
	329	};
	330
74a365b3 MG	331	/*
	332	* Initialise the DIDL field in opregion. This passes a list of devices to
	333	* the firmware. Values are defined by section B.4.2 of the ACPI specification
	334	* (version 3)
	335	*/
	336
	337	static void intel_didl_outputs(struct drm_device *dev)
	338	{
	339	struct drm_i915_private *dev_priv = dev->dev_private;
	340	struct intel_opregion *opregion = &dev_priv->opregion;
	341	struct drm_connector *connector;
3143751f ZR	342	acpi_handle handle;
	343	struct acpi_device acpi_dev, acpi_cdev, *acpi_video_bus = NULL;
	344	unsigned long long device_id;
	345	acpi_status status;
5bc4418b	346	u32 temp;
74a365b3 MG	347	int i = 0;
74a365b3 MG	348
3143751f ZR	349	handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
	350	if (!handle \|\| ACPI_FAILURE(acpi_bus_get_device(handle, &acpi_dev)))
	351	return;
	352
	353	if (acpi_is_video_device(acpi_dev))
	354	acpi_video_bus = acpi_dev;
	355	else {
	356	list_for_each_entry(acpi_cdev, &acpi_dev->children, node) {
	357	if (acpi_is_video_device(acpi_cdev)) {
	358	acpi_video_bus = acpi_cdev;
	359	break;
	360	}
	361	}
	362	}
	363
	364	if (!acpi_video_bus) {
a70491cc	365	pr_warn("No ACPI video bus found\n");
3143751f ZR	366	return;
	367	}
	368
	369	list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
	370	if (i >= 8) {
0206e353	371	dev_printk(KERN_ERR, &dev->pdev->dev,
3143751f ZR	372	"More than 8 outputs detected\n");
	373	return;
	374	}
	375	status =
	376	acpi_evaluate_integer(acpi_cdev->handle, "_ADR",
	377	NULL, &device_id);
	378	if (ACPI_SUCCESS(status)) {
	379	if (!device_id)
	380	goto blind_set;
5bc4418b BW	381	iowrite32((u32)(device_id & 0x0f0f),
5bc4418b BW	382	&opregion->acpi->didl[i]);
3143751f ZR	383	i++;
	384	}
	385	}
	386
	387	end:
	388	/* If fewer than 8 outputs, the list must be null terminated */
	389	if (i < 8)
5bc4418b	390	iowrite32(0, &opregion->acpi->didl[i]);
3143751f ZR	391	return;
	392
	393	blind_set:
	394	i = 0;
74a365b3 MG	395	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	396	int output_type = ACPI_OTHER_OUTPUT;
	397	if (i >= 8) {
0206e353	398	dev_printk(KERN_ERR, &dev->pdev->dev,
74a365b3 MG	399	"More than 8 outputs detected\n");
	400	return;
	401	}
	402	switch (connector->connector_type) {
	403	case DRM_MODE_CONNECTOR_VGA:
	404	case DRM_MODE_CONNECTOR_DVIA:
	405	output_type = ACPI_VGA_OUTPUT;
	406	break;
	407	case DRM_MODE_CONNECTOR_Composite:
	408	case DRM_MODE_CONNECTOR_SVIDEO:
	409	case DRM_MODE_CONNECTOR_Component:
	410	case DRM_MODE_CONNECTOR_9PinDIN:
	411	output_type = ACPI_TV_OUTPUT;
	412	break;
	413	case DRM_MODE_CONNECTOR_DVII:
	414	case DRM_MODE_CONNECTOR_DVID:
	415	case DRM_MODE_CONNECTOR_DisplayPort:
	416	case DRM_MODE_CONNECTOR_HDMIA:
	417	case DRM_MODE_CONNECTOR_HDMIB:
	418	output_type = ACPI_DIGITAL_OUTPUT;
	419	break;
	420	case DRM_MODE_CONNECTOR_LVDS:
	421	output_type = ACPI_LVDS_OUTPUT;
	422	break;
	423	}
5bc4418b BW	424	temp = ioread32(&opregion->acpi->didl[i]);
	425	iowrite32(temp \| (1<<31) \| output_type \| i,
	426	&opregion->acpi->didl[i]);
74a365b3 MG	427	i++;
74a365b3 MG	428	}
3143751f	429	goto end;
74a365b3 MG	430	}
74a365b3 MG	431
d627b62f L	432	static void intel_setup_cadls(struct drm_device *dev)
	433	{
	434	struct drm_i915_private *dev_priv = dev->dev_private;
	435	struct intel_opregion *opregion = &dev_priv->opregion;
	436	int i = 0;
	437	u32 disp_id;
	438
	439	/* Initialize the CADL field by duplicating the DIDL values.
	440	* Technically, this is not always correct as display outputs may exist,
	441	* but not active. This initialization is necessary for some Clevo
	442	* laptops that check this field before processing the brightness and
	443	* display switching hotkeys. Just like DIDL, CADL is NULL-terminated if
	444	* there are less than eight devices. */
	445	do {
	446	disp_id = ioread32(&opregion->acpi->didl[i]);
	447	iowrite32(disp_id, &opregion->acpi->cadl[i]);
	448	} while (++i < 8 && disp_id != 0);
	449	}
	450
44834a67 CW	451	void intel_opregion_init(struct drm_device *dev)
	452	{
	453	struct drm_i915_private *dev_priv = dev->dev_private;
	454	struct intel_opregion *opregion = &dev_priv->opregion;
	455
	456	if (!opregion->header)
	457	return;
	458
	459	if (opregion->acpi) {
d627b62f	460	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
44834a67	461	intel_didl_outputs(dev);
d627b62f L	462	intel_setup_cadls(dev);
d627b62f L	463	}
44834a67 CW	464
	465	/* Notify BIOS we are ready to handle ACPI video ext notifs.
	466	* Right now, all the events are handled by the ACPI video module.
	467	* We don't actually need to do anything with them. */
5bc4418b BW	468	iowrite32(0, &opregion->acpi->csts);
5bc4418b BW	469	iowrite32(1, &opregion->acpi->drdy);
44834a67 CW	470
	471	system_opregion = opregion;
	472	register_acpi_notifier(&intel_opregion_notifier);
	473	}
	474
	475	if (opregion->asle)
	476	intel_opregion_enable_asle(dev);
	477	}
	478
	479	void intel_opregion_fini(struct drm_device *dev)
	480	{
	481	struct drm_i915_private *dev_priv = dev->dev_private;
	482	struct intel_opregion *opregion = &dev_priv->opregion;
	483
	484	if (!opregion->header)
	485	return;
	486
	487	if (opregion->acpi) {
5bc4418b	488	iowrite32(0, &opregion->acpi->drdy);
44834a67 CW	489
	490	system_opregion = NULL;
	491	unregister_acpi_notifier(&intel_opregion_notifier);
	492	}
	493
	494	/* just clear all opregion memory pointers now */
	495	iounmap(opregion->header);
	496	opregion->header = NULL;
	497	opregion->acpi = NULL;
	498	opregion->swsci = NULL;
	499	opregion->asle = NULL;
	500	opregion->vbt = NULL;
	501	}
	502	#endif
	503
	504	int intel_opregion_setup(struct drm_device *dev)
8ee1c3db MG	505	{
	506	struct drm_i915_private *dev_priv = dev->dev_private;
	507	struct intel_opregion *opregion = &dev_priv->opregion;
5bc4418b	508	void __iomem *base;
8ee1c3db	509	u32 asls, mboxes;
5bc4418b	510	char buf[sizeof(OPREGION_SIGNATURE)];
8ee1c3db MG	511	int err = 0;
	512
	513	pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
44d98a61	514	DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
8ee1c3db	515	if (asls == 0) {
44d98a61	516	DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
8ee1c3db MG	517	return -ENOTSUPP;
	518	}
	519
b705120e	520	base = acpi_os_ioremap(asls, OPREGION_SIZE);
8ee1c3db MG	521	if (!base)
	522	return -ENOMEM;
	523
5bc4418b BW	524	memcpy_fromio(buf, base, sizeof(buf));
	525
	526	if (memcmp(buf, OPREGION_SIGNATURE, 16)) {
44d98a61	527	DRM_DEBUG_DRIVER("opregion signature mismatch\n");
8ee1c3db MG	528	err = -EINVAL;
	529	goto err_out;
	530	}
44834a67 CW	531	opregion->header = base;
44834a67 CW	532	opregion->vbt = base + OPREGION_VBT_OFFSET;
8ee1c3db	533
82d3c90c	534	opregion->lid_state = base + ACPI_CLID;
01fe9dbd	535
5bc4418b	536	mboxes = ioread32(&opregion->header->mboxes);
8ee1c3db	537	if (mboxes & MBOX_ACPI) {
44d98a61	538	DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
8ee1c3db	539	opregion->acpi = base + OPREGION_ACPI_OFFSET;
8ee1c3db	540	}
8ee1c3db MG	541
8ee1c3db MG	542	if (mboxes & MBOX_SWSCI) {
44d98a61	543	DRM_DEBUG_DRIVER("SWSCI supported\n");
8ee1c3db MG	544	opregion->swsci = base + OPREGION_SWSCI_OFFSET;
	545	}
	546	if (mboxes & MBOX_ASLE) {
44d98a61	547	DRM_DEBUG_DRIVER("ASLE supported\n");
8ee1c3db MG	548	opregion->asle = base + OPREGION_ASLE_OFFSET;
	549	}
	550
8ee1c3db MG	551	return 0;
	552
	553	err_out:
30c56660	554	iounmap(base);
8ee1c3db MG	555	return err;
8ee1c3db MG	556	}