drm/i915: convert LVDS driver to new encoder/connector structure
[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_hdmi.c
CommitLineData
7d57382e
EA
1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2009 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Jesse Barnes <jesse.barnes@intel.com>
27 */
28
29#include <linux/i2c.h>
30#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
aa93d632 34#include "drm_edid.h"
7d57382e
EA
35#include "intel_drv.h"
36#include "i915_drm.h"
37#include "i915_drv.h"
38
39struct intel_hdmi_priv {
40 u32 sdvox_reg;
9dff6af8 41 bool has_hdmi_sink;
7d57382e
EA
42};
43
44static void intel_hdmi_mode_set(struct drm_encoder *encoder,
45 struct drm_display_mode *mode,
46 struct drm_display_mode *adjusted_mode)
47{
48 struct drm_device *dev = encoder->dev;
49 struct drm_i915_private *dev_priv = dev->dev_private;
50 struct drm_crtc *crtc = encoder->crtc;
51 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
21d40d37
EA
52 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
53 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
7d57382e
EA
54 u32 sdvox;
55
56 sdvox = SDVO_ENCODING_HDMI |
57 SDVO_BORDER_ENABLE |
58 SDVO_VSYNC_ACTIVE_HIGH |
56d21b07 59 SDVO_HSYNC_ACTIVE_HIGH;
7d57382e
EA
60
61 if (hdmi_priv->has_hdmi_sink)
62 sdvox |= SDVO_AUDIO_ENABLE;
63
0f229062
ZW
64 if (intel_crtc->pipe == 1) {
65 if (HAS_PCH_CPT(dev))
66 sdvox |= PORT_TRANS_B_SEL_CPT;
67 else
68 sdvox |= SDVO_PIPE_B_SELECT;
69 }
7d57382e
EA
70
71 I915_WRITE(hdmi_priv->sdvox_reg, sdvox);
72 POSTING_READ(hdmi_priv->sdvox_reg);
73}
74
75static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
76{
77 struct drm_device *dev = encoder->dev;
78 struct drm_i915_private *dev_priv = dev->dev_private;
21d40d37
EA
79 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
80 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
7d57382e
EA
81 u32 temp;
82
d8a2d0e0
ZW
83 temp = I915_READ(hdmi_priv->sdvox_reg);
84
85 /* HW workaround, need to toggle enable bit off and on for 12bpc, but
86 * we do this anyway which shows more stable in testing.
87 */
c619eed4 88 if (HAS_PCH_SPLIT(dev)) {
7d57382e 89 I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE);
d8a2d0e0
ZW
90 POSTING_READ(hdmi_priv->sdvox_reg);
91 }
92
93 if (mode != DRM_MODE_DPMS_ON) {
94 temp &= ~SDVO_ENABLE;
7d57382e 95 } else {
d8a2d0e0 96 temp |= SDVO_ENABLE;
7d57382e 97 }
d8a2d0e0
ZW
98
99 I915_WRITE(hdmi_priv->sdvox_reg, temp);
7d57382e 100 POSTING_READ(hdmi_priv->sdvox_reg);
d8a2d0e0
ZW
101
102 /* HW workaround, need to write this twice for issue that may result
103 * in first write getting masked.
104 */
c619eed4 105 if (HAS_PCH_SPLIT(dev)) {
d8a2d0e0
ZW
106 I915_WRITE(hdmi_priv->sdvox_reg, temp);
107 POSTING_READ(hdmi_priv->sdvox_reg);
108 }
7d57382e
EA
109}
110
7d57382e
EA
111static int intel_hdmi_mode_valid(struct drm_connector *connector,
112 struct drm_display_mode *mode)
113{
114 if (mode->clock > 165000)
115 return MODE_CLOCK_HIGH;
116 if (mode->clock < 20000)
117 return MODE_CLOCK_HIGH;
118
119 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
120 return MODE_NO_DBLESCAN;
121
122 return MODE_OK;
123}
124
125static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
126 struct drm_display_mode *mode,
127 struct drm_display_mode *adjusted_mode)
128{
129 return true;
130}
131
aa93d632 132static enum drm_connector_status
2ded9e27 133intel_hdmi_detect(struct drm_connector *connector)
9dff6af8 134{
21d40d37
EA
135 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
136 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
9dff6af8 137 struct edid *edid = NULL;
aa93d632 138 enum drm_connector_status status = connector_status_disconnected;
9dff6af8 139
2ded9e27 140 hdmi_priv->has_hdmi_sink = false;
21d40d37
EA
141 edid = drm_get_edid(&intel_encoder->base,
142 intel_encoder->ddc_bus);
2ded9e27 143
aa93d632 144 if (edid) {
be9f1c4f 145 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
aa93d632
KP
146 status = connector_status_connected;
147 hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
148 }
21d40d37 149 intel_encoder->base.display_info.raw_edid = NULL;
aa93d632 150 kfree(edid);
9dff6af8 151 }
30ad48b7 152
2ded9e27 153 return status;
7d57382e
EA
154}
155
156static int intel_hdmi_get_modes(struct drm_connector *connector)
157{
21d40d37 158 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
7d57382e
EA
159
160 /* We should parse the EDID data and find out if it's an HDMI sink so
161 * we can send audio to it.
162 */
163
335af9a2 164 return intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
7d57382e
EA
165}
166
167static void intel_hdmi_destroy(struct drm_connector *connector)
168{
21d40d37 169 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
7d57382e 170
21d40d37
EA
171 if (intel_encoder->i2c_bus)
172 intel_i2c_destroy(intel_encoder->i2c_bus);
7d57382e
EA
173 drm_sysfs_connector_remove(connector);
174 drm_connector_cleanup(connector);
21d40d37 175 kfree(intel_encoder);
7d57382e
EA
176}
177
178static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
179 .dpms = intel_hdmi_dpms,
180 .mode_fixup = intel_hdmi_mode_fixup,
181 .prepare = intel_encoder_prepare,
182 .mode_set = intel_hdmi_mode_set,
183 .commit = intel_encoder_commit,
184};
185
186static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
c9fb15f6 187 .dpms = drm_helper_connector_dpms,
7d57382e
EA
188 .detect = intel_hdmi_detect,
189 .fill_modes = drm_helper_probe_single_connector_modes,
190 .destroy = intel_hdmi_destroy,
191};
192
193static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
194 .get_modes = intel_hdmi_get_modes,
195 .mode_valid = intel_hdmi_mode_valid,
196 .best_encoder = intel_best_encoder,
197};
198
199static void intel_hdmi_enc_destroy(struct drm_encoder *encoder)
200{
201 drm_encoder_cleanup(encoder);
202}
203
204static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
205 .destroy = intel_hdmi_enc_destroy,
206};
207
7d57382e
EA
208void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
209{
210 struct drm_i915_private *dev_priv = dev->dev_private;
211 struct drm_connector *connector;
21d40d37 212 struct intel_encoder *intel_encoder;
7d57382e
EA
213 struct intel_hdmi_priv *hdmi_priv;
214
21d40d37 215 intel_encoder = kcalloc(sizeof(struct intel_encoder) +
7d57382e 216 sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL);
21d40d37 217 if (!intel_encoder)
7d57382e 218 return;
21d40d37 219 hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1);
7d57382e 220
21d40d37 221 connector = &intel_encoder->base;
7d57382e 222 drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
8d91104a 223 DRM_MODE_CONNECTOR_HDMIA);
7d57382e
EA
224 drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
225
21d40d37 226 intel_encoder->type = INTEL_OUTPUT_HDMI;
7d57382e
EA
227
228 connector->interlace_allowed = 0;
229 connector->doublescan_allowed = 0;
21d40d37 230 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
7d57382e
EA
231
232 /* Set up the DDC bus. */
f8aed700 233 if (sdvox_reg == SDVOB) {
21d40d37
EA
234 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
235 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
b01f2c3a 236 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
f8aed700 237 } else if (sdvox_reg == SDVOC) {
21d40d37
EA
238 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
239 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
b01f2c3a 240 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
f8aed700 241 } else if (sdvox_reg == HDMIB) {
21d40d37
EA
242 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
243 intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
30ad48b7 244 "HDMIB");
b01f2c3a 245 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
f8aed700 246 } else if (sdvox_reg == HDMIC) {
21d40d37
EA
247 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
248 intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
30ad48b7 249 "HDMIC");
b01f2c3a 250 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
f8aed700 251 } else if (sdvox_reg == HDMID) {
21d40d37
EA
252 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
253 intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
30ad48b7 254 "HDMID");
b01f2c3a 255 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
f8aed700 256 }
21d40d37 257 if (!intel_encoder->ddc_bus)
7d57382e
EA
258 goto err_connector;
259
260 hdmi_priv->sdvox_reg = sdvox_reg;
21d40d37 261 intel_encoder->dev_priv = hdmi_priv;
7d57382e 262
21d40d37 263 drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs,
7d57382e 264 DRM_MODE_ENCODER_TMDS);
21d40d37 265 drm_encoder_helper_add(&intel_encoder->enc, &intel_hdmi_helper_funcs);
7d57382e 266
21d40d37
EA
267 drm_mode_connector_attach_encoder(&intel_encoder->base,
268 &intel_encoder->enc);
7d57382e
EA
269 drm_sysfs_connector_add(connector);
270
271 /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
272 * 0xd. Failure to do so will result in spurious interrupts being
273 * generated on the port when a cable is not attached.
274 */
275 if (IS_G4X(dev) && !IS_GM45(dev)) {
276 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
277 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
278 }
279
280 return;
281
282err_connector:
283 drm_connector_cleanup(connector);
21d40d37 284 kfree(intel_encoder);
7d57382e
EA
285
286 return;
287}