[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_hdmi.c

/*
 * Copyright 2006 Dave Airlie <airlied@linux.ie>
 * Copyright © 2006-2009 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *	Jesse Barnes <jesse.barnes@intel.com>
 */

#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "drm_edid.h"
#include "intel_drv.h"
#include "i915_drm.h"
#include "i915_drv.h"

struct intel_hdmi {
	struct intel_encoder base;
	u32 sdvox_reg;
	int ddc_bus;
	bool has_hdmi_sink;
	bool has_audio;
	int force_audio;
	struct drm_property *force_audio_property;
};

static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
{
	return container_of(encoder, struct intel_hdmi, base.base);
}

static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
{
	return container_of(intel_attached_encoder(connector),
			    struct intel_hdmi, base);
}

void intel_dip_infoframe_csum(struct dip_infoframe *avi_if)
{
	uint8_t *data = (uint8_t *)avi_if;
	uint8_t sum = 0;
	unsigned i;

	avi_if->checksum = 0;
	avi_if->ecc = 0;

	for (i = 0; i < sizeof(*avi_if); i++)
		sum += data[i];

	avi_if->checksum = 0x100 - sum;
}

static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
{
	struct dip_infoframe avi_if = {
		.type = DIP_TYPE_AVI,
		.ver = DIP_VERSION_AVI,
		.len = DIP_LEN_AVI,
	};
	uint32_t *data = (uint32_t *)&avi_if;
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
	u32 port;
	unsigned i;

	if (!intel_hdmi->has_hdmi_sink)
		return;

	/* XXX first guess at handling video port, is this corrent? */
	if (intel_hdmi->sdvox_reg == SDVOB)
		port = VIDEO_DIP_PORT_B;
	else if (intel_hdmi->sdvox_reg == SDVOC)
		port = VIDEO_DIP_PORT_C;
	else
		return;

	I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
		   VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC);

	intel_dip_infoframe_csum(&avi_if);
	for (i = 0; i < sizeof(avi_if); i += 4) {
		I915_WRITE(VIDEO_DIP_DATA, *data);
		data++;
	}

	I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
		   VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC |
		   VIDEO_DIP_ENABLE_AVI);
}

static void intel_hdmi_mode_set(struct drm_encoder *encoder,
				struct drm_display_mode *mode,
				struct drm_display_mode *adjusted_mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_crtc *crtc = encoder->crtc;
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
	u32 sdvox;

	sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		sdvox |= SDVO_HSYNC_ACTIVE_HIGH;

	/* Required on CPT */
	if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
		sdvox |= HDMI_MODE_SELECT;

	if (intel_hdmi->has_audio) {
		sdvox |= SDVO_AUDIO_ENABLE;
		sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC;
	}

	if (intel_crtc->pipe == 1) {
		if (HAS_PCH_CPT(dev))
			sdvox |= PORT_TRANS_B_SEL_CPT;
		else
			sdvox |= SDVO_PIPE_B_SELECT;
	}

	I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
	POSTING_READ(intel_hdmi->sdvox_reg);

	intel_hdmi_set_avi_infoframe(encoder);
}

static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
	u32 temp;

	temp = I915_READ(intel_hdmi->sdvox_reg);

	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
	 * we do this anyway which shows more stable in testing.
	 */
	if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
		POSTING_READ(intel_hdmi->sdvox_reg);
	}

	if (mode != DRM_MODE_DPMS_ON) {
		temp &= ~SDVO_ENABLE;
	} else {
		temp |= SDVO_ENABLE;
	}

	I915_WRITE(intel_hdmi->sdvox_reg, temp);
	POSTING_READ(intel_hdmi->sdvox_reg);

	/* HW workaround, need to write this twice for issue that may result
	 * in first write getting masked.
	 */
	if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(intel_hdmi->sdvox_reg, temp);
		POSTING_READ(intel_hdmi->sdvox_reg);
	}
}

static int intel_hdmi_mode_valid(struct drm_connector *connector,
				 struct drm_display_mode *mode)
{
	if (mode->clock > 165000)
		return MODE_CLOCK_HIGH;
	if (mode->clock < 20000)
		return MODE_CLOCK_HIGH;

	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;

	return MODE_OK;
}

static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
				  struct drm_display_mode *mode,
				  struct drm_display_mode *adjusted_mode)
{
	return true;
}

static enum drm_connector_status
intel_hdmi_detect(struct drm_connector *connector, bool force)
{
	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
	struct drm_i915_private *dev_priv = connector->dev->dev_private;
	struct edid *edid;
	enum drm_connector_status status = connector_status_disconnected;

	intel_hdmi->has_hdmi_sink = false;
	intel_hdmi->has_audio = false;
	edid = drm_get_edid(connector,
			    &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);

	if (edid) {
		if (edid->input & DRM_EDID_INPUT_DIGITAL) {
			status = connector_status_connected;
			intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
			intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
		}
		connector->display_info.raw_edid = NULL;
		kfree(edid);
	}

	if (status == connector_status_connected) {
		if (intel_hdmi->force_audio)
			intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
	}

	return status;
}

static int intel_hdmi_get_modes(struct drm_connector *connector)
{
	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
	struct drm_i915_private *dev_priv = connector->dev->dev_private;

	/* We should parse the EDID data and find out if it's an HDMI sink so
	 * we can send audio to it.
	 */

	return intel_ddc_get_modes(connector,
				   &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
}

static int
intel_hdmi_set_property(struct drm_connector *connector,
		      struct drm_property *property,
		      uint64_t val)
{
	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
	int ret;

	ret = drm_connector_property_set_value(connector, property, val);
	if (ret)
		return ret;

	if (property == intel_hdmi->force_audio_property) {
		if (val == intel_hdmi->force_audio)
			return 0;

		intel_hdmi->force_audio = val;

		if (val > 0 && intel_hdmi->has_audio)
			return 0;
		if (val < 0 && !intel_hdmi->has_audio)
			return 0;

		intel_hdmi->has_audio = val > 0;
		goto done;
	}

	return -EINVAL;

done:
	if (intel_hdmi->base.base.crtc) {
		struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
		drm_crtc_helper_set_mode(crtc, &crtc->mode,
					 crtc->x, crtc->y,
					 crtc->fb);
	}

	return 0;
}

static void intel_hdmi_destroy(struct drm_connector *connector)
{
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(connector);
}

static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
	.dpms = intel_hdmi_dpms,
	.mode_fixup = intel_hdmi_mode_fixup,
	.prepare = intel_encoder_prepare,
	.mode_set = intel_hdmi_mode_set,
	.commit = intel_encoder_commit,
};

static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
	.dpms = drm_helper_connector_dpms,
	.detect = intel_hdmi_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.set_property = intel_hdmi_set_property,
	.destroy = intel_hdmi_destroy,
};

static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
	.get_modes = intel_hdmi_get_modes,
	.mode_valid = intel_hdmi_mode_valid,
	.best_encoder = intel_best_encoder,
};

static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
	.destroy = intel_encoder_destroy,
};

static void
intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;

	intel_hdmi->force_audio_property =
		drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
	if (intel_hdmi->force_audio_property) {
		intel_hdmi->force_audio_property->values[0] = -1;
		intel_hdmi->force_audio_property->values[1] = 1;
		drm_connector_attach_property(connector, intel_hdmi->force_audio_property, 0);
	}
}

void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_connector *connector;
	struct intel_encoder *intel_encoder;
	struct intel_connector *intel_connector;
	struct intel_hdmi *intel_hdmi;

	intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
	if (!intel_hdmi)
		return;

	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	if (!intel_connector) {
		kfree(intel_hdmi);
		return;
	}

	intel_encoder = &intel_hdmi->base;
	drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
			 DRM_MODE_ENCODER_TMDS);

	connector = &intel_connector->base;
	drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
			   DRM_MODE_CONNECTOR_HDMIA);
	drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);

	intel_encoder->type = INTEL_OUTPUT_HDMI;

	connector->polled = DRM_CONNECTOR_POLL_HPD;
	connector->interlace_allowed = 0;
	connector->doublescan_allowed = 0;
	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

	/* Set up the DDC bus. */
	if (sdvox_reg == SDVOB) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == SDVOC) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMIB) {
		intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMIC) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMID) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
		dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
	}

	intel_hdmi->sdvox_reg = sdvox_reg;

	drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);

	intel_hdmi_add_properties(intel_hdmi, connector);

	intel_connector_attach_encoder(intel_connector, intel_encoder);
	drm_sysfs_connector_add(connector);

	/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
	 * 0xd.  Failure to do so will result in spurious interrupts being
	 * generated on the port when a cable is not attached.
	 */
	if (IS_G4X(dev) && !IS_GM45(dev)) {
		u32 temp = I915_READ(PEG_BAND_GAP_DATA);
		I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
	}
}
Commit	Line	Data
7d57382e EA	1	/*
	2	* Copyright 2006 Dave Airlie <airlied@linux.ie>
	3	* Copyright © 2006-2009 Intel Corporation
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors:
	25	* Eric Anholt <eric@anholt.net>
	26	* Jesse Barnes <jesse.barnes@intel.com>
	27	*/
	28
	29	#include <linux/i2c.h>
5a0e3ad6	30	#include <linux/slab.h>
7d57382e EA	31	#include <linux/delay.h>
	32	#include "drmP.h"
	33	#include "drm.h"
	34	#include "drm_crtc.h"
aa93d632	35	#include "drm_edid.h"
7d57382e EA	36	#include "intel_drv.h"
	37	#include "i915_drm.h"
	38	#include "i915_drv.h"
	39
ea5b213a CW	40	struct intel_hdmi {
ea5b213a CW	41	struct intel_encoder base;
7d57382e	42	u32 sdvox_reg;
f899fc64	43	int ddc_bus;
9dff6af8	44	bool has_hdmi_sink;
2e3d6006	45	bool has_audio;
55b7d6e8 CW	46	int force_audio;
55b7d6e8 CW	47	struct drm_property *force_audio_property;
7d57382e EA	48	};
7d57382e EA	49
ea5b213a CW	50	static struct intel_hdmi enc_to_intel_hdmi(struct drm_encoder encoder)
ea5b213a CW	51	{
4ef69c7a	52	return container_of(encoder, struct intel_hdmi, base.base);
ea5b213a CW	53	}
ea5b213a CW	54
df0e9248 CW	55	static struct intel_hdmi intel_attached_hdmi(struct drm_connector connector)
	56	{
	57	return container_of(intel_attached_encoder(connector),
	58	struct intel_hdmi, base);
	59	}
	60
3c17fe4b DH	61	void intel_dip_infoframe_csum(struct dip_infoframe *avi_if)
	62	{
	63	uint8_t data = (uint8_t )avi_if;
	64	uint8_t sum = 0;
	65	unsigned i;
	66
	67	avi_if->checksum = 0;
	68	avi_if->ecc = 0;
	69
	70	for (i = 0; i < sizeof(*avi_if); i++)
	71	sum += data[i];
	72
	73	avi_if->checksum = 0x100 - sum;
	74	}
	75
	76	static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
	77	{
	78	struct dip_infoframe avi_if = {
	79	.type = DIP_TYPE_AVI,
	80	.ver = DIP_VERSION_AVI,
	81	.len = DIP_LEN_AVI,
	82	};
	83	uint32_t data = (uint32_t )&avi_if;
	84	struct drm_device *dev = encoder->dev;
	85	struct drm_i915_private *dev_priv = dev->dev_private;
	86	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
	87	u32 port;
	88	unsigned i;
	89
	90	if (!intel_hdmi->has_hdmi_sink)
	91	return;
	92
	93	/* XXX first guess at handling video port, is this corrent? */
	94	if (intel_hdmi->sdvox_reg == SDVOB)
	95	port = VIDEO_DIP_PORT_B;
	96	else if (intel_hdmi->sdvox_reg == SDVOC)
	97	port = VIDEO_DIP_PORT_C;
	98	else
	99	return;
	100
	101	I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE \| port \|
	102	VIDEO_DIP_SELECT_AVI \| VIDEO_DIP_FREQ_VSYNC);
	103
	104	intel_dip_infoframe_csum(&avi_if);
	105	for (i = 0; i < sizeof(avi_if); i += 4) {
	106	I915_WRITE(VIDEO_DIP_DATA, *data);
	107	data++;
	108	}
	109
	110	I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE \| port \|
	111	VIDEO_DIP_SELECT_AVI \| VIDEO_DIP_FREQ_VSYNC \|
	112	VIDEO_DIP_ENABLE_AVI);
	113	}
	114
7d57382e EA	115	static void intel_hdmi_mode_set(struct drm_encoder *encoder,
	116	struct drm_display_mode *mode,
	117	struct drm_display_mode *adjusted_mode)
	118	{
	119	struct drm_device *dev = encoder->dev;
	120	struct drm_i915_private *dev_priv = dev->dev_private;
	121	struct drm_crtc *crtc = encoder->crtc;
	122	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
ea5b213a	123	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
7d57382e EA	124	u32 sdvox;
7d57382e EA	125
b599c0bc AJ	126	sdvox = SDVO_ENCODING_HDMI \| SDVO_BORDER_ENABLE;
	127	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
	128	sdvox \|= SDVO_VSYNC_ACTIVE_HIGH;
	129	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
	130	sdvox \|= SDVO_HSYNC_ACTIVE_HIGH;
7d57382e	131
2e3d6006 ZW	132	/* Required on CPT */
	133	if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
	134	sdvox \|= HDMI_MODE_SELECT;
	135
3c17fe4b	136	if (intel_hdmi->has_audio) {
7d57382e	137	sdvox \|= SDVO_AUDIO_ENABLE;
3c17fe4b DH	138	sdvox \|= SDVO_NULL_PACKETS_DURING_VSYNC;
3c17fe4b DH	139	}
7d57382e	140
0f229062 ZW	141	if (intel_crtc->pipe == 1) {
	142	if (HAS_PCH_CPT(dev))
	143	sdvox \|= PORT_TRANS_B_SEL_CPT;
	144	else
	145	sdvox \|= SDVO_PIPE_B_SELECT;
	146	}
7d57382e	147
ea5b213a CW	148	I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
ea5b213a CW	149	POSTING_READ(intel_hdmi->sdvox_reg);
3c17fe4b DH	150
3c17fe4b DH	151	intel_hdmi_set_avi_infoframe(encoder);
7d57382e EA	152	}
	153
	154	static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
	155	{
	156	struct drm_device *dev = encoder->dev;
	157	struct drm_i915_private *dev_priv = dev->dev_private;
ea5b213a	158	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
7d57382e EA	159	u32 temp;
7d57382e EA	160
ea5b213a	161	temp = I915_READ(intel_hdmi->sdvox_reg);
d8a2d0e0 ZW	162
	163	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
	164	* we do this anyway which shows more stable in testing.
	165	*/
c619eed4	166	if (HAS_PCH_SPLIT(dev)) {
ea5b213a CW	167	I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
ea5b213a CW	168	POSTING_READ(intel_hdmi->sdvox_reg);
d8a2d0e0 ZW	169	}
	170
	171	if (mode != DRM_MODE_DPMS_ON) {
	172	temp &= ~SDVO_ENABLE;
7d57382e	173	} else {
d8a2d0e0	174	temp \|= SDVO_ENABLE;
7d57382e	175	}
d8a2d0e0	176
ea5b213a CW	177	I915_WRITE(intel_hdmi->sdvox_reg, temp);
ea5b213a CW	178	POSTING_READ(intel_hdmi->sdvox_reg);
d8a2d0e0 ZW	179
	180	/* HW workaround, need to write this twice for issue that may result
	181	* in first write getting masked.
	182	*/
c619eed4	183	if (HAS_PCH_SPLIT(dev)) {
ea5b213a CW	184	I915_WRITE(intel_hdmi->sdvox_reg, temp);
ea5b213a CW	185	POSTING_READ(intel_hdmi->sdvox_reg);
d8a2d0e0	186	}
7d57382e EA	187	}
7d57382e EA	188
7d57382e EA	189	static int intel_hdmi_mode_valid(struct drm_connector *connector,
	190	struct drm_display_mode *mode)
	191	{
	192	if (mode->clock > 165000)
	193	return MODE_CLOCK_HIGH;
	194	if (mode->clock < 20000)
	195	return MODE_CLOCK_HIGH;
	196
	197	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	198	return MODE_NO_DBLESCAN;
	199
	200	return MODE_OK;
	201	}
	202
	203	static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
	204	struct drm_display_mode *mode,
	205	struct drm_display_mode *adjusted_mode)
	206	{
	207	return true;
	208	}
	209
aa93d632	210	static enum drm_connector_status
930a9e28	211	intel_hdmi_detect(struct drm_connector *connector, bool force)
9dff6af8	212	{
df0e9248	213	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
f899fc64 CW	214	struct drm_i915_private *dev_priv = connector->dev->dev_private;
f899fc64 CW	215	struct edid *edid;
aa93d632	216	enum drm_connector_status status = connector_status_disconnected;
9dff6af8	217
ea5b213a	218	intel_hdmi->has_hdmi_sink = false;
2e3d6006	219	intel_hdmi->has_audio = false;
f899fc64 CW	220	edid = drm_get_edid(connector,
f899fc64 CW	221	&dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
2ded9e27	222
aa93d632	223	if (edid) {
be9f1c4f	224	if (edid->input & DRM_EDID_INPUT_DIGITAL) {
aa93d632	225	status = connector_status_connected;
ea5b213a	226	intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
2e3d6006	227	intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
aa93d632	228	}
674e2d08	229	connector->display_info.raw_edid = NULL;
aa93d632	230	kfree(edid);
9dff6af8	231	}
30ad48b7	232
55b7d6e8 CW	233	if (status == connector_status_connected) {
	234	if (intel_hdmi->force_audio)
	235	intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
	236	}
	237
2ded9e27	238	return status;
7d57382e EA	239	}
	240
	241	static int intel_hdmi_get_modes(struct drm_connector *connector)
	242	{
df0e9248	243	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
f899fc64	244	struct drm_i915_private *dev_priv = connector->dev->dev_private;
7d57382e EA	245
	246	/* We should parse the EDID data and find out if it's an HDMI sink so
	247	* we can send audio to it.
	248	*/
	249
f899fc64 CW	250	return intel_ddc_get_modes(connector,
f899fc64 CW	251	&dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
7d57382e EA	252	}
7d57382e EA	253
55b7d6e8 CW	254	static int
	255	intel_hdmi_set_property(struct drm_connector *connector,
	256	struct drm_property *property,
	257	uint64_t val)
	258	{
	259	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
	260	int ret;
	261
	262	ret = drm_connector_property_set_value(connector, property, val);
	263	if (ret)
	264	return ret;
	265
	266	if (property == intel_hdmi->force_audio_property) {
	267	if (val == intel_hdmi->force_audio)
	268	return 0;
	269
	270	intel_hdmi->force_audio = val;
	271
	272	if (val > 0 && intel_hdmi->has_audio)
	273	return 0;
	274	if (val < 0 && !intel_hdmi->has_audio)
	275	return 0;
	276
	277	intel_hdmi->has_audio = val > 0;
	278	goto done;
	279	}
	280
	281	return -EINVAL;
	282
	283	done:
	284	if (intel_hdmi->base.base.crtc) {
	285	struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
	286	drm_crtc_helper_set_mode(crtc, &crtc->mode,
	287	crtc->x, crtc->y,
	288	crtc->fb);
	289	}
	290
	291	return 0;
	292	}
	293
7d57382e EA	294	static void intel_hdmi_destroy(struct drm_connector *connector)
7d57382e EA	295	{
7d57382e EA	296	drm_sysfs_connector_remove(connector);
7d57382e EA	297	drm_connector_cleanup(connector);
674e2d08	298	kfree(connector);
7d57382e EA	299	}
	300
	301	static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
	302	.dpms = intel_hdmi_dpms,
	303	.mode_fixup = intel_hdmi_mode_fixup,
	304	.prepare = intel_encoder_prepare,
	305	.mode_set = intel_hdmi_mode_set,
	306	.commit = intel_encoder_commit,
	307	};
	308
	309	static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
c9fb15f6	310	.dpms = drm_helper_connector_dpms,
7d57382e EA	311	.detect = intel_hdmi_detect,
7d57382e EA	312	.fill_modes = drm_helper_probe_single_connector_modes,
55b7d6e8	313	.set_property = intel_hdmi_set_property,
7d57382e EA	314	.destroy = intel_hdmi_destroy,
	315	};
	316
	317	static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
	318	.get_modes = intel_hdmi_get_modes,
	319	.mode_valid = intel_hdmi_mode_valid,
df0e9248	320	.best_encoder = intel_best_encoder,
7d57382e EA	321	};
7d57382e EA	322
7d57382e	323	static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
ea5b213a	324	.destroy = intel_encoder_destroy,
7d57382e EA	325	};
7d57382e EA	326
55b7d6e8 CW	327	static void
	328	intel_hdmi_add_properties(struct intel_hdmi intel_hdmi, struct drm_connector connector)
	329	{
	330	struct drm_device *dev = connector->dev;
	331
	332	intel_hdmi->force_audio_property =
	333	drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
	334	if (intel_hdmi->force_audio_property) {
	335	intel_hdmi->force_audio_property->values[0] = -1;
	336	intel_hdmi->force_audio_property->values[1] = 1;
	337	drm_connector_attach_property(connector, intel_hdmi->force_audio_property, 0);
	338	}
	339	}
	340
7d57382e EA	341	void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
	342	{
	343	struct drm_i915_private *dev_priv = dev->dev_private;
	344	struct drm_connector *connector;
21d40d37	345	struct intel_encoder *intel_encoder;
674e2d08	346	struct intel_connector *intel_connector;
ea5b213a	347	struct intel_hdmi *intel_hdmi;
7d57382e	348
ea5b213a CW	349	intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
ea5b213a CW	350	if (!intel_hdmi)
7d57382e	351	return;
674e2d08 ZW	352
	353	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	354	if (!intel_connector) {
ea5b213a	355	kfree(intel_hdmi);
674e2d08 ZW	356	return;
	357	}
	358
ea5b213a	359	intel_encoder = &intel_hdmi->base;
373a3cf7 CW	360	drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
	361	DRM_MODE_ENCODER_TMDS);
	362
674e2d08	363	connector = &intel_connector->base;
7d57382e	364	drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
8d91104a	365	DRM_MODE_CONNECTOR_HDMIA);
7d57382e EA	366	drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
7d57382e EA	367
21d40d37	368	intel_encoder->type = INTEL_OUTPUT_HDMI;
7d57382e	369
eb1f8e4f	370	connector->polled = DRM_CONNECTOR_POLL_HPD;
7d57382e EA	371	connector->interlace_allowed = 0;
7d57382e EA	372	connector->doublescan_allowed = 0;
21d40d37	373	intel_encoder->crtc_mask = (1 << 0) \| (1 << 1);
7d57382e EA	374
7d57382e EA	375	/* Set up the DDC bus. */
f8aed700	376	if (sdvox_reg == SDVOB) {
21d40d37	377	intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
f899fc64	378	intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
b01f2c3a	379	dev_priv->hotplug_supported_mask \|= HDMIB_HOTPLUG_INT_STATUS;
f8aed700	380	} else if (sdvox_reg == SDVOC) {
21d40d37	381	intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
f899fc64	382	intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
b01f2c3a	383	dev_priv->hotplug_supported_mask \|= HDMIC_HOTPLUG_INT_STATUS;
f8aed700	384	} else if (sdvox_reg == HDMIB) {
21d40d37	385	intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
f899fc64	386	intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
b01f2c3a	387	dev_priv->hotplug_supported_mask \|= HDMIB_HOTPLUG_INT_STATUS;
f8aed700	388	} else if (sdvox_reg == HDMIC) {
21d40d37	389	intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
f899fc64	390	intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
b01f2c3a	391	dev_priv->hotplug_supported_mask \|= HDMIC_HOTPLUG_INT_STATUS;
f8aed700	392	} else if (sdvox_reg == HDMID) {
21d40d37	393	intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
f899fc64	394	intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
b01f2c3a	395	dev_priv->hotplug_supported_mask \|= HDMID_HOTPLUG_INT_STATUS;
f8aed700	396	}
7d57382e	397
ea5b213a	398	intel_hdmi->sdvox_reg = sdvox_reg;
7d57382e	399
4ef69c7a	400	drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
7d57382e	401
55b7d6e8 CW	402	intel_hdmi_add_properties(intel_hdmi, connector);
55b7d6e8 CW	403
df0e9248	404	intel_connector_attach_encoder(intel_connector, intel_encoder);
7d57382e EA	405	drm_sysfs_connector_add(connector);
	406
	407	/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
	408	* 0xd. Failure to do so will result in spurious interrupts being
	409	* generated on the port when a cable is not attached.
	410	*/
	411	if (IS_G4X(dev) && !IS_GM45(dev)) {
	412	u32 temp = I915_READ(PEG_BAND_GAP_DATA);
	413	I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) \| 0xd);
	414	}
7d57382e	415	}