drm/i915: Do not clobber the contents of TRANS_DP_CTL when enabling.
[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_dvo.c
CommitLineData
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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27#include <linux/i2c.h>
5a0e3ad6 28#include <linux/slab.h>
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29#include "drmP.h"
30#include "drm.h"
31#include "drm_crtc.h"
32#include "intel_drv.h"
33#include "i915_drm.h"
34#include "i915_drv.h"
35#include "dvo.h"
36
37#define SIL164_ADDR 0x38
38#define CH7xxx_ADDR 0x76
39#define TFP410_ADDR 0x38
40
b358d0a6 41static struct intel_dvo_device intel_dvo_devices[] = {
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42 {
43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164",
45 .dvo_reg = DVOC,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
48 },
49 {
50 .type = INTEL_DVO_CHIP_TMDS,
51 .name = "ch7xxx",
52 .dvo_reg = DVOC,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
55 },
56 {
57 .type = INTEL_DVO_CHIP_LVDS,
58 .name = "ivch",
59 .dvo_reg = DVOA,
60 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
61 .dev_ops = &ivch_ops,
62 },
63 {
64 .type = INTEL_DVO_CHIP_TMDS,
65 .name = "tfp410",
66 .dvo_reg = DVOC,
67 .slave_addr = TFP410_ADDR,
68 .dev_ops = &tfp410_ops,
69 },
70 {
71 .type = INTEL_DVO_CHIP_LVDS,
72 .name = "ch7017",
73 .dvo_reg = DVOC,
74 .slave_addr = 0x75,
75 .gpio = GPIOE,
76 .dev_ops = &ch7017_ops,
77 }
78};
79
80static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
81{
82 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
21d40d37
EA
83 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
84 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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85 u32 dvo_reg = dvo->dvo_reg;
86 u32 temp = I915_READ(dvo_reg);
87
88 if (mode == DRM_MODE_DPMS_ON) {
89 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
90 I915_READ(dvo_reg);
91 dvo->dev_ops->dpms(dvo, mode);
92 } else {
93 dvo->dev_ops->dpms(dvo, mode);
94 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
95 I915_READ(dvo_reg);
96 }
97}
98
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99static int intel_dvo_mode_valid(struct drm_connector *connector,
100 struct drm_display_mode *mode)
101{
599be16c
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102 struct drm_encoder *encoder = intel_attached_encoder(connector);
103 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 104 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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105
106 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
107 return MODE_NO_DBLESCAN;
108
109 /* XXX: Validate clock range */
110
111 if (dvo->panel_fixed_mode) {
112 if (mode->hdisplay > dvo->panel_fixed_mode->hdisplay)
113 return MODE_PANEL;
114 if (mode->vdisplay > dvo->panel_fixed_mode->vdisplay)
115 return MODE_PANEL;
116 }
117
118 return dvo->dev_ops->mode_valid(dvo, mode);
119}
120
121static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
122 struct drm_display_mode *mode,
123 struct drm_display_mode *adjusted_mode)
124{
21d40d37
EA
125 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
126 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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127
128 /* If we have timings from the BIOS for the panel, put them in
129 * to the adjusted mode. The CRTC will be set up for this mode,
130 * with the panel scaling set up to source from the H/VDisplay
131 * of the original mode.
132 */
133 if (dvo->panel_fixed_mode != NULL) {
134#define C(x) adjusted_mode->x = dvo->panel_fixed_mode->x
135 C(hdisplay);
136 C(hsync_start);
137 C(hsync_end);
138 C(htotal);
139 C(vdisplay);
140 C(vsync_start);
141 C(vsync_end);
142 C(vtotal);
143 C(clock);
144 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
145#undef C
146 }
147
148 if (dvo->dev_ops->mode_fixup)
149 return dvo->dev_ops->mode_fixup(dvo, mode, adjusted_mode);
150
151 return true;
152}
153
154static void intel_dvo_mode_set(struct drm_encoder *encoder,
155 struct drm_display_mode *mode,
156 struct drm_display_mode *adjusted_mode)
157{
158 struct drm_device *dev = encoder->dev;
159 struct drm_i915_private *dev_priv = dev->dev_private;
160 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
21d40d37
EA
161 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
162 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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163 int pipe = intel_crtc->pipe;
164 u32 dvo_val;
165 u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg;
166 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
167
168 switch (dvo_reg) {
169 case DVOA:
170 default:
171 dvo_srcdim_reg = DVOA_SRCDIM;
172 break;
173 case DVOB:
174 dvo_srcdim_reg = DVOB_SRCDIM;
175 break;
176 case DVOC:
177 dvo_srcdim_reg = DVOC_SRCDIM;
178 break;
179 }
180
181 dvo->dev_ops->mode_set(dvo, mode, adjusted_mode);
182
183 /* Save the data order, since I don't know what it should be set to. */
184 dvo_val = I915_READ(dvo_reg) &
185 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
186 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
187 DVO_BLANK_ACTIVE_HIGH;
188
189 if (pipe == 1)
190 dvo_val |= DVO_PIPE_B_SELECT;
191 dvo_val |= DVO_PIPE_STALL;
192 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
193 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
194 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
195 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
196
197 I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
198
199 /*I915_WRITE(DVOB_SRCDIM,
200 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
201 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
202 I915_WRITE(dvo_srcdim_reg,
203 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
204 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
205 /*I915_WRITE(DVOB, dvo_val);*/
206 I915_WRITE(dvo_reg, dvo_val);
207}
208
209/**
210 * Detect the output connection on our DVO device.
211 *
212 * Unimplemented.
213 */
214static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector)
215{
599be16c
ZW
216 struct drm_encoder *encoder = intel_attached_encoder(connector);
217 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 218 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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219
220 return dvo->dev_ops->detect(dvo);
221}
222
223static int intel_dvo_get_modes(struct drm_connector *connector)
224{
599be16c
ZW
225 struct drm_encoder *encoder = intel_attached_encoder(connector);
226 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 227 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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228
229 /* We should probably have an i2c driver get_modes function for those
230 * devices which will have a fixed set of modes determined by the chip
231 * (TV-out, for example), but for now with just TMDS and LVDS,
232 * that's not the case.
233 */
335af9a2 234 intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
79e53945
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235 if (!list_empty(&connector->probed_modes))
236 return 1;
237
238
239 if (dvo->panel_fixed_mode != NULL) {
240 struct drm_display_mode *mode;
241 mode = drm_mode_duplicate(connector->dev, dvo->panel_fixed_mode);
242 if (mode) {
243 drm_mode_probed_add(connector, mode);
244 return 1;
245 }
246 }
247 return 0;
248}
249
250static void intel_dvo_destroy (struct drm_connector *connector)
251{
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252 drm_sysfs_connector_remove(connector);
253 drm_connector_cleanup(connector);
599be16c 254 kfree(connector);
79e53945 255}
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256
257static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
258 .dpms = intel_dvo_dpms,
259 .mode_fixup = intel_dvo_mode_fixup,
260 .prepare = intel_encoder_prepare,
261 .mode_set = intel_dvo_mode_set,
262 .commit = intel_encoder_commit,
263};
264
265static const struct drm_connector_funcs intel_dvo_connector_funcs = {
c9fb15f6 266 .dpms = drm_helper_connector_dpms,
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267 .detect = intel_dvo_detect,
268 .destroy = intel_dvo_destroy,
269 .fill_modes = drm_helper_probe_single_connector_modes,
270};
271
272static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
273 .mode_valid = intel_dvo_mode_valid,
274 .get_modes = intel_dvo_get_modes,
599be16c 275 .best_encoder = intel_attached_encoder,
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276};
277
b358d0a6 278static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
79e53945 279{
599be16c
ZW
280 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
281 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
282
283 if (dvo) {
284 if (dvo->dev_ops->destroy)
285 dvo->dev_ops->destroy(dvo);
286 if (dvo->panel_fixed_mode)
287 kfree(dvo->panel_fixed_mode);
288 }
289 if (intel_encoder->i2c_bus)
290 intel_i2c_destroy(intel_encoder->i2c_bus);
291 if (intel_encoder->ddc_bus)
292 intel_i2c_destroy(intel_encoder->ddc_bus);
79e53945 293 drm_encoder_cleanup(encoder);
599be16c 294 kfree(intel_encoder);
79e53945
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295}
296
297static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
298 .destroy = intel_dvo_enc_destroy,
299};
300
301
302/**
303 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
304 *
305 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
306 * chip being on DVOB/C and having multiple pipes.
307 */
308static struct drm_display_mode *
309intel_dvo_get_current_mode (struct drm_connector *connector)
310{
311 struct drm_device *dev = connector->dev;
312 struct drm_i915_private *dev_priv = dev->dev_private;
599be16c
ZW
313 struct drm_encoder *encoder = intel_attached_encoder(connector);
314 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 315 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
79e53945
JB
316 uint32_t dvo_reg = dvo->dvo_reg;
317 uint32_t dvo_val = I915_READ(dvo_reg);
318 struct drm_display_mode *mode = NULL;
319
320 /* If the DVO port is active, that'll be the LVDS, so we can pull out
321 * its timings to get how the BIOS set up the panel.
322 */
323 if (dvo_val & DVO_ENABLE) {
324 struct drm_crtc *crtc;
325 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
326
327 crtc = intel_get_crtc_from_pipe(dev, pipe);
328 if (crtc) {
329 mode = intel_crtc_mode_get(dev, crtc);
330
331 if (mode) {
332 mode->type |= DRM_MODE_TYPE_PREFERRED;
333 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
334 mode->flags |= DRM_MODE_FLAG_PHSYNC;
335 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
336 mode->flags |= DRM_MODE_FLAG_PVSYNC;
337 }
338 }
339 }
340 return mode;
341}
342
343void intel_dvo_init(struct drm_device *dev)
344{
21d40d37 345 struct intel_encoder *intel_encoder;
599be16c 346 struct intel_connector *intel_connector;
79e53945 347 struct intel_dvo_device *dvo;
f9c10a9b 348 struct i2c_adapter *i2cbus = NULL;
79e53945
JB
349 int ret = 0;
350 int i;
79e53945 351 int encoder_type = DRM_MODE_ENCODER_NONE;
21d40d37
EA
352 intel_encoder = kzalloc (sizeof(struct intel_encoder), GFP_KERNEL);
353 if (!intel_encoder)
79e53945
JB
354 return;
355
599be16c
ZW
356 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
357 if (!intel_connector) {
358 kfree(intel_encoder);
359 return;
360 }
361
79e53945 362 /* Set up the DDC bus */
21d40d37
EA
363 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
364 if (!intel_encoder->ddc_bus)
79e53945
JB
365 goto free_intel;
366
367 /* Now, try to find a controller */
368 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
599be16c 369 struct drm_connector *connector = &intel_connector->base;
79e53945
JB
370 int gpio;
371
372 dvo = &intel_dvo_devices[i];
373
374 /* Allow the I2C driver info to specify the GPIO to be used in
375 * special cases, but otherwise default to what's defined
376 * in the spec.
377 */
378 if (dvo->gpio != 0)
379 gpio = dvo->gpio;
380 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
381 gpio = GPIOB;
382 else
383 gpio = GPIOE;
384
385 /* Set up the I2C bus necessary for the chip we're probing.
386 * It appears that everything is on GPIOE except for panels
387 * on i830 laptops, which are on GPIOB (DVOA).
388 */
f9c10a9b
KP
389 if (i2cbus != NULL)
390 intel_i2c_destroy(i2cbus);
391 if (!(i2cbus = intel_i2c_create(dev, gpio,
392 gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
393 continue;
79e53945
JB
394 }
395
396 if (dvo->dev_ops!= NULL)
397 ret = dvo->dev_ops->init(dvo, i2cbus);
398 else
399 ret = false;
400
401 if (!ret)
402 continue;
403
21d40d37
EA
404 intel_encoder->type = INTEL_OUTPUT_DVO;
405 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
79e53945
JB
406 switch (dvo->type) {
407 case INTEL_DVO_CHIP_TMDS:
21d40d37 408 intel_encoder->clone_mask =
f8aed700
ML
409 (1 << INTEL_DVO_TMDS_CLONE_BIT) |
410 (1 << INTEL_ANALOG_CLONE_BIT);
79e53945
JB
411 drm_connector_init(dev, connector,
412 &intel_dvo_connector_funcs,
413 DRM_MODE_CONNECTOR_DVII);
414 encoder_type = DRM_MODE_ENCODER_TMDS;
415 break;
416 case INTEL_DVO_CHIP_LVDS:
21d40d37 417 intel_encoder->clone_mask =
f8aed700 418 (1 << INTEL_DVO_LVDS_CLONE_BIT);
79e53945
JB
419 drm_connector_init(dev, connector,
420 &intel_dvo_connector_funcs,
421 DRM_MODE_CONNECTOR_LVDS);
422 encoder_type = DRM_MODE_ENCODER_LVDS;
423 break;
424 }
425
426 drm_connector_helper_add(connector,
427 &intel_dvo_connector_helper_funcs);
428 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
429 connector->interlace_allowed = false;
430 connector->doublescan_allowed = false;
431
21d40d37
EA
432 intel_encoder->dev_priv = dvo;
433 intel_encoder->i2c_bus = i2cbus;
79e53945 434
21d40d37 435 drm_encoder_init(dev, &intel_encoder->enc,
79e53945 436 &intel_dvo_enc_funcs, encoder_type);
21d40d37 437 drm_encoder_helper_add(&intel_encoder->enc,
79e53945
JB
438 &intel_dvo_helper_funcs);
439
599be16c 440 drm_mode_connector_attach_encoder(&intel_connector->base,
21d40d37 441 &intel_encoder->enc);
79e53945
JB
442 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
443 /* For our LVDS chipsets, we should hopefully be able
444 * to dig the fixed panel mode out of the BIOS data.
445 * However, it's in a different format from the BIOS
446 * data on chipsets with integrated LVDS (stored in AIM
447 * headers, likely), so for now, just get the current
448 * mode being output through DVO.
449 */
450 dvo->panel_fixed_mode =
451 intel_dvo_get_current_mode(connector);
452 dvo->panel_wants_dither = true;
453 }
454
455 drm_sysfs_connector_add(connector);
456 return;
457 }
458
21d40d37 459 intel_i2c_destroy(intel_encoder->ddc_bus);
79e53945
JB
460 /* Didn't find a chip, so tear down. */
461 if (i2cbus != NULL)
462 intel_i2c_destroy(i2cbus);
463free_intel:
21d40d37 464 kfree(intel_encoder);
599be16c 465 kfree(intel_connector);
79e53945 466}