Commit | Line | Data |
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0e32b39c DA |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * 2014 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
22 | * IN THE SOFTWARE. | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <drm/drmP.h> | |
27 | #include "i915_drv.h" | |
28 | #include "intel_drv.h" | |
c6f95f27 | 29 | #include <drm/drm_atomic_helper.h> |
0e32b39c DA |
30 | #include <drm/drm_crtc_helper.h> |
31 | #include <drm/drm_edid.h> | |
32 | ||
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | |
5cec258b | 34 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
35 | { |
36 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
37 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
38 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
39 | struct drm_device *dev = encoder->base.dev; | |
40 | int bpp; | |
ed4e9c1d | 41 | int lane_count, slots, rate; |
2d112de7 | 42 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
0e32b39c DA |
43 | struct intel_connector *found = NULL, *intel_connector; |
44 | int mst_pbn; | |
45 | ||
46 | pipe_config->dp_encoder_is_mst = true; | |
47 | pipe_config->has_pch_encoder = false; | |
48 | pipe_config->has_dp_encoder = true; | |
49 | bpp = 24; | |
50 | /* | |
51 | * for MST we always configure max link bw - the spec doesn't | |
52 | * seem to suggest we should do otherwise. | |
53 | */ | |
54 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); | |
ed4e9c1d VS |
55 | |
56 | rate = intel_dp_max_link_rate(intel_dp); | |
57 | ||
94ca719e | 58 | if (intel_dp->num_sink_rates) { |
ed4e9c1d VS |
59 | intel_dp->link_bw = 0; |
60 | intel_dp->rate_select = intel_dp_rate_select(intel_dp, rate); | |
61 | } else { | |
62 | intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate); | |
63 | intel_dp->rate_select = 0; | |
64 | } | |
65 | ||
0e32b39c DA |
66 | intel_dp->lane_count = lane_count; |
67 | ||
68 | pipe_config->pipe_bpp = 24; | |
ed4e9c1d | 69 | pipe_config->port_clock = rate; |
0e32b39c | 70 | |
3a3371ff | 71 | for_each_intel_connector(dev, intel_connector) { |
0e32b39c DA |
72 | if (intel_connector->new_encoder == encoder) { |
73 | found = intel_connector; | |
74 | break; | |
75 | } | |
76 | } | |
77 | ||
78 | if (!found) { | |
79 | DRM_ERROR("can't find connector\n"); | |
80 | return false; | |
81 | } | |
82 | ||
83 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); | |
84 | ||
85 | pipe_config->pbn = mst_pbn; | |
86 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); | |
87 | ||
88 | intel_link_compute_m_n(bpp, lane_count, | |
89 | adjusted_mode->crtc_clock, | |
90 | pipe_config->port_clock, | |
91 | &pipe_config->dp_m_n); | |
92 | ||
93 | pipe_config->dp_m_n.tu = slots; | |
94 | return true; | |
95 | ||
96 | } | |
97 | ||
98 | static void intel_mst_disable_dp(struct intel_encoder *encoder) | |
99 | { | |
100 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
101 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
102 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
103 | int ret; | |
104 | ||
105 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
106 | ||
107 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); | |
108 | ||
109 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
110 | if (ret) { | |
111 | DRM_ERROR("failed to update payload %d\n", ret); | |
112 | } | |
113 | } | |
114 | ||
115 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) | |
116 | { | |
117 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
118 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
119 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
120 | ||
121 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
122 | ||
123 | /* this can fail */ | |
124 | drm_dp_check_act_status(&intel_dp->mst_mgr); | |
125 | /* and this can also fail */ | |
126 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
127 | ||
128 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); | |
129 | ||
130 | intel_dp->active_mst_links--; | |
131 | intel_mst->port = NULL; | |
132 | if (intel_dp->active_mst_links == 0) { | |
133 | intel_dig_port->base.post_disable(&intel_dig_port->base); | |
134 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); | |
135 | } | |
136 | } | |
137 | ||
138 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) | |
139 | { | |
140 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
141 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
142 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
143 | struct drm_device *dev = encoder->base.dev; | |
144 | struct drm_i915_private *dev_priv = dev->dev_private; | |
145 | enum port port = intel_dig_port->port; | |
146 | int ret; | |
147 | uint32_t temp; | |
148 | struct intel_connector *found = NULL, *intel_connector; | |
149 | int slots; | |
150 | struct drm_crtc *crtc = encoder->base.crtc; | |
151 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
152 | ||
3a3371ff | 153 | for_each_intel_connector(dev, intel_connector) { |
0e32b39c DA |
154 | if (intel_connector->new_encoder == encoder) { |
155 | found = intel_connector; | |
156 | break; | |
157 | } | |
158 | } | |
159 | ||
160 | if (!found) { | |
161 | DRM_ERROR("can't find connector\n"); | |
162 | return; | |
163 | } | |
164 | ||
165 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
166 | intel_mst->port = found->port; | |
167 | ||
168 | if (intel_dp->active_mst_links == 0) { | |
169 | enum port port = intel_ddi_get_encoder_port(encoder); | |
170 | ||
6e3c9717 ACO |
171 | I915_WRITE(PORT_CLK_SEL(port), |
172 | intel_crtc->config->ddi_pll_sel); | |
0e32b39c DA |
173 | |
174 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); | |
175 | ||
176 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | |
177 | ||
178 | ||
179 | intel_dp_start_link_train(intel_dp); | |
180 | intel_dp_complete_link_train(intel_dp); | |
181 | intel_dp_stop_link_train(intel_dp); | |
182 | } | |
183 | ||
184 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, | |
6e3c9717 ACO |
185 | intel_mst->port, |
186 | intel_crtc->config->pbn, &slots); | |
0e32b39c DA |
187 | if (ret == false) { |
188 | DRM_ERROR("failed to allocate vcpi\n"); | |
189 | return; | |
190 | } | |
191 | ||
192 | ||
193 | intel_dp->active_mst_links++; | |
194 | temp = I915_READ(DP_TP_STATUS(port)); | |
195 | I915_WRITE(DP_TP_STATUS(port), temp); | |
196 | ||
197 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
198 | } | |
199 | ||
200 | static void intel_mst_enable_dp(struct intel_encoder *encoder) | |
201 | { | |
202 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
203 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
204 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
205 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
206 | struct drm_i915_private *dev_priv = dev->dev_private; | |
207 | enum port port = intel_dig_port->port; | |
208 | int ret; | |
209 | ||
210 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
211 | ||
212 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), | |
213 | 1)) | |
214 | DRM_ERROR("Timed out waiting for ACT sent\n"); | |
215 | ||
216 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); | |
217 | ||
218 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
219 | } | |
220 | ||
221 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, | |
222 | enum pipe *pipe) | |
223 | { | |
224 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
225 | *pipe = intel_mst->pipe; | |
226 | if (intel_mst->port) | |
227 | return true; | |
228 | return false; | |
229 | } | |
230 | ||
231 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, | |
5cec258b | 232 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
233 | { |
234 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
235 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
236 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | |
237 | struct drm_device *dev = encoder->base.dev; | |
238 | struct drm_i915_private *dev_priv = dev->dev_private; | |
0cb09a97 | 239 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
0e32b39c DA |
240 | u32 temp, flags = 0; |
241 | ||
242 | pipe_config->has_dp_encoder = true; | |
243 | ||
244 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); | |
245 | if (temp & TRANS_DDI_PHSYNC) | |
246 | flags |= DRM_MODE_FLAG_PHSYNC; | |
247 | else | |
248 | flags |= DRM_MODE_FLAG_NHSYNC; | |
249 | if (temp & TRANS_DDI_PVSYNC) | |
250 | flags |= DRM_MODE_FLAG_PVSYNC; | |
251 | else | |
252 | flags |= DRM_MODE_FLAG_NVSYNC; | |
253 | ||
254 | switch (temp & TRANS_DDI_BPC_MASK) { | |
255 | case TRANS_DDI_BPC_6: | |
256 | pipe_config->pipe_bpp = 18; | |
257 | break; | |
258 | case TRANS_DDI_BPC_8: | |
259 | pipe_config->pipe_bpp = 24; | |
260 | break; | |
261 | case TRANS_DDI_BPC_10: | |
262 | pipe_config->pipe_bpp = 30; | |
263 | break; | |
264 | case TRANS_DDI_BPC_12: | |
265 | pipe_config->pipe_bpp = 36; | |
266 | break; | |
267 | default: | |
268 | break; | |
269 | } | |
2d112de7 | 270 | pipe_config->base.adjusted_mode.flags |= flags; |
0e32b39c DA |
271 | intel_dp_get_m_n(crtc, pipe_config); |
272 | ||
273 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); | |
274 | } | |
275 | ||
276 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) | |
277 | { | |
278 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
279 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
280 | struct edid *edid; | |
281 | int ret; | |
282 | ||
283 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); | |
284 | if (!edid) | |
285 | return 0; | |
286 | ||
287 | ret = intel_connector_update_modes(connector, edid); | |
288 | kfree(edid); | |
289 | ||
290 | return ret; | |
291 | } | |
292 | ||
293 | static enum drm_connector_status | |
f7f3d48a | 294 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
0e32b39c DA |
295 | { |
296 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
297 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
298 | ||
c6a0aed4 | 299 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
300 | } |
301 | ||
0e32b39c DA |
302 | static int |
303 | intel_dp_mst_set_property(struct drm_connector *connector, | |
304 | struct drm_property *property, | |
305 | uint64_t val) | |
306 | { | |
307 | return 0; | |
308 | } | |
309 | ||
310 | static void | |
311 | intel_dp_mst_connector_destroy(struct drm_connector *connector) | |
312 | { | |
313 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
314 | ||
315 | if (!IS_ERR_OR_NULL(intel_connector->edid)) | |
316 | kfree(intel_connector->edid); | |
317 | ||
318 | drm_connector_cleanup(connector); | |
319 | kfree(connector); | |
320 | } | |
321 | ||
322 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { | |
323 | .dpms = intel_connector_dpms, | |
324 | .detect = intel_dp_mst_detect, | |
325 | .fill_modes = drm_helper_probe_single_connector_modes, | |
326 | .set_property = intel_dp_mst_set_property, | |
2545e4a6 | 327 | .atomic_get_property = intel_connector_atomic_get_property, |
0e32b39c | 328 | .destroy = intel_dp_mst_connector_destroy, |
c6f95f27 | 329 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
0e32b39c DA |
330 | }; |
331 | ||
332 | static int intel_dp_mst_get_modes(struct drm_connector *connector) | |
333 | { | |
334 | return intel_dp_mst_get_ddc_modes(connector); | |
335 | } | |
336 | ||
337 | static enum drm_mode_status | |
338 | intel_dp_mst_mode_valid(struct drm_connector *connector, | |
339 | struct drm_display_mode *mode) | |
340 | { | |
341 | /* TODO - validate mode against available PBN for link */ | |
342 | if (mode->clock < 10000) | |
343 | return MODE_CLOCK_LOW; | |
344 | ||
345 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
346 | return MODE_H_ILLEGAL; | |
347 | ||
348 | return MODE_OK; | |
349 | } | |
350 | ||
351 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) | |
352 | { | |
353 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
354 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
355 | return &intel_dp->mst_encoders[0]->base.base; | |
356 | } | |
357 | ||
358 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { | |
359 | .get_modes = intel_dp_mst_get_modes, | |
360 | .mode_valid = intel_dp_mst_mode_valid, | |
361 | .best_encoder = intel_mst_best_encoder, | |
362 | }; | |
363 | ||
364 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) | |
365 | { | |
366 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); | |
367 | ||
368 | drm_encoder_cleanup(encoder); | |
369 | kfree(intel_mst); | |
370 | } | |
371 | ||
372 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { | |
373 | .destroy = intel_dp_mst_encoder_destroy, | |
374 | }; | |
375 | ||
376 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) | |
377 | { | |
378 | if (connector->encoder) { | |
379 | enum pipe pipe; | |
380 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) | |
381 | return false; | |
382 | return true; | |
383 | } | |
384 | return false; | |
385 | } | |
386 | ||
7296c849 CW |
387 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
388 | { | |
389 | #ifdef CONFIG_DRM_I915_FBDEV | |
390 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
391 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); | |
392 | #endif | |
393 | } | |
394 | ||
395 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) | |
396 | { | |
397 | #ifdef CONFIG_DRM_I915_FBDEV | |
398 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
399 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); | |
400 | #endif | |
401 | } | |
402 | ||
12e6cecd | 403 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
0e32b39c DA |
404 | { |
405 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
406 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
407 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
0e32b39c DA |
408 | struct intel_connector *intel_connector; |
409 | struct drm_connector *connector; | |
410 | int i; | |
411 | ||
412 | intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); | |
413 | if (!intel_connector) | |
414 | return NULL; | |
415 | ||
416 | connector = &intel_connector->base; | |
417 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); | |
418 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); | |
419 | ||
420 | intel_connector->unregister = intel_connector_unregister; | |
421 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; | |
422 | intel_connector->mst_port = intel_dp; | |
423 | intel_connector->port = port; | |
424 | ||
425 | for (i = PIPE_A; i <= PIPE_C; i++) { | |
426 | drm_mode_connector_attach_encoder(&intel_connector->base, | |
427 | &intel_dp->mst_encoders[i]->base.base); | |
428 | } | |
429 | intel_dp_add_properties(intel_dp, connector); | |
430 | ||
431 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); | |
6f134d7b DA |
432 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
433 | ||
0e32b39c DA |
434 | drm_mode_connector_set_path_property(connector, pathprop); |
435 | drm_reinit_primary_mode_group(dev); | |
436 | mutex_lock(&dev->mode_config.mutex); | |
7296c849 | 437 | intel_connector_add_to_fbdev(intel_connector); |
0e32b39c DA |
438 | mutex_unlock(&dev->mode_config.mutex); |
439 | drm_connector_register(&intel_connector->base); | |
440 | return connector; | |
441 | } | |
442 | ||
443 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, | |
444 | struct drm_connector *connector) | |
445 | { | |
446 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
447 | struct drm_device *dev = connector->dev; | |
0e32b39c DA |
448 | /* need to nuke the connector */ |
449 | mutex_lock(&dev->mode_config.mutex); | |
450 | intel_connector_dpms(connector, DRM_MODE_DPMS_OFF); | |
451 | mutex_unlock(&dev->mode_config.mutex); | |
452 | ||
453 | intel_connector->unregister(intel_connector); | |
454 | ||
455 | mutex_lock(&dev->mode_config.mutex); | |
7296c849 | 456 | intel_connector_remove_from_fbdev(intel_connector); |
0e32b39c DA |
457 | drm_connector_cleanup(connector); |
458 | mutex_unlock(&dev->mode_config.mutex); | |
459 | ||
460 | drm_reinit_primary_mode_group(dev); | |
461 | ||
462 | kfree(intel_connector); | |
463 | DRM_DEBUG_KMS("\n"); | |
464 | } | |
465 | ||
466 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) | |
467 | { | |
468 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
469 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
470 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
471 | ||
472 | drm_kms_helper_hotplug_event(dev); | |
473 | } | |
474 | ||
475 | static struct drm_dp_mst_topology_cbs mst_cbs = { | |
476 | .add_connector = intel_dp_add_mst_connector, | |
477 | .destroy_connector = intel_dp_destroy_mst_connector, | |
478 | .hotplug = intel_dp_mst_hotplug, | |
479 | }; | |
480 | ||
481 | static struct intel_dp_mst_encoder * | |
482 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) | |
483 | { | |
484 | struct intel_dp_mst_encoder *intel_mst; | |
485 | struct intel_encoder *intel_encoder; | |
486 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
487 | ||
488 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); | |
489 | ||
490 | if (!intel_mst) | |
491 | return NULL; | |
492 | ||
493 | intel_mst->pipe = pipe; | |
494 | intel_encoder = &intel_mst->base; | |
495 | intel_mst->primary = intel_dig_port; | |
496 | ||
497 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, | |
498 | DRM_MODE_ENCODER_DPMST); | |
499 | ||
500 | intel_encoder->type = INTEL_OUTPUT_DP_MST; | |
501 | intel_encoder->crtc_mask = 0x7; | |
502 | intel_encoder->cloneable = 0; | |
503 | ||
504 | intel_encoder->compute_config = intel_dp_mst_compute_config; | |
505 | intel_encoder->disable = intel_mst_disable_dp; | |
506 | intel_encoder->post_disable = intel_mst_post_disable_dp; | |
507 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; | |
508 | intel_encoder->enable = intel_mst_enable_dp; | |
509 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; | |
510 | intel_encoder->get_config = intel_dp_mst_enc_get_config; | |
511 | ||
512 | return intel_mst; | |
513 | ||
514 | } | |
515 | ||
516 | static bool | |
517 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) | |
518 | { | |
519 | int i; | |
520 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
521 | ||
522 | for (i = PIPE_A; i <= PIPE_C; i++) | |
523 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); | |
524 | return true; | |
525 | } | |
526 | ||
527 | int | |
528 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) | |
529 | { | |
530 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
531 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
532 | int ret; | |
533 | ||
534 | intel_dp->can_mst = true; | |
535 | intel_dp->mst_mgr.cbs = &mst_cbs; | |
536 | ||
537 | /* create encoders */ | |
538 | intel_dp_create_fake_mst_encoders(intel_dig_port); | |
539 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); | |
540 | if (ret) { | |
541 | intel_dp->can_mst = false; | |
542 | return ret; | |
543 | } | |
544 | return 0; | |
545 | } | |
546 | ||
547 | void | |
548 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) | |
549 | { | |
550 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
551 | ||
552 | if (!intel_dp->can_mst) | |
553 | return; | |
554 | ||
555 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); | |
556 | /* encoders will get killed by normal cleanup */ | |
557 | } |