[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_crt.c

/*
 * Copyright © 2006-2007 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 */

#include <linux/dmi.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
#include "drm_edid.h"
#include "intel_drv.h"
#include "i915_drm.h"
#include "i915_drv.h"

/* Here's the desired hotplug mode */
#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |		\
			   ADPA_CRT_HOTPLUG_WARMUP_10MS |		\
			   ADPA_CRT_HOTPLUG_SAMPLE_4S |			\
			   ADPA_CRT_HOTPLUG_VOLTAGE_50 |		\
			   ADPA_CRT_HOTPLUG_VOLREF_325MV |		\
			   ADPA_CRT_HOTPLUG_ENABLE)

struct intel_crt {
	struct intel_encoder base;
	bool force_hotplug_required;
};

static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
{
	return container_of(intel_attached_encoder(connector),
			    struct intel_crt, base);
}

static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 temp, reg;

	if (HAS_PCH_SPLIT(dev))
		reg = PCH_ADPA;
	else
		reg = ADPA;

	temp = I915_READ(reg);
	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
	temp &= ~ADPA_DAC_ENABLE;

	switch (mode) {
	case DRM_MODE_DPMS_ON:
		temp |= ADPA_DAC_ENABLE;
		break;
	case DRM_MODE_DPMS_STANDBY:
		temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
		break;
	case DRM_MODE_DPMS_SUSPEND:
		temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
		break;
	case DRM_MODE_DPMS_OFF:
		temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
		break;
	}

	I915_WRITE(reg, temp);
}

static int intel_crt_mode_valid(struct drm_connector *connector,
				struct drm_display_mode *mode)
{
	struct drm_device *dev = connector->dev;

	int max_clock = 0;
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;

	if (mode->clock < 25000)
		return MODE_CLOCK_LOW;

	if (IS_GEN2(dev))
		max_clock = 350000;
	else
		max_clock = 400000;
	if (mode->clock > max_clock)
		return MODE_CLOCK_HIGH;

	return MODE_OK;
}

static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
				 struct drm_display_mode *mode,
				 struct drm_display_mode *adjusted_mode)
{
	return true;
}

static void intel_crt_mode_set(struct drm_encoder *encoder,
			       struct drm_display_mode *mode,
			       struct drm_display_mode *adjusted_mode)
{

	struct drm_device *dev = encoder->dev;
	struct drm_crtc *crtc = encoder->crtc;
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	struct drm_i915_private *dev_priv = dev->dev_private;
	int dpll_md_reg;
	u32 adpa, dpll_md;
	u32 adpa_reg;

	dpll_md_reg = DPLL_MD(intel_crtc->pipe);

	if (HAS_PCH_SPLIT(dev))
		adpa_reg = PCH_ADPA;
	else
		adpa_reg = ADPA;

	/*
	 * Disable separate mode multiplier used when cloning SDVO to CRT
	 * XXX this needs to be adjusted when we really are cloning
	 */
	if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
		dpll_md = I915_READ(dpll_md_reg);
		I915_WRITE(dpll_md_reg,
			   dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
	}

	adpa = ADPA_HOTPLUG_BITS;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		adpa |= ADPA_HSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		adpa |= ADPA_VSYNC_ACTIVE_HIGH;

	/* For CPT allow 3 pipe config, for others just use A or B */
	if (HAS_PCH_CPT(dev))
		adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
	else if (intel_crtc->pipe == 0)
		adpa |= ADPA_PIPE_A_SELECT;
	else
		adpa |= ADPA_PIPE_B_SELECT;

	if (!HAS_PCH_SPLIT(dev))
		I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);

	I915_WRITE(adpa_reg, adpa);
}

static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct intel_crt *crt = intel_attached_crt(connector);
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 adpa;
	bool ret;

	/* The first time through, trigger an explicit detection cycle */
	if (crt->force_hotplug_required) {
		bool turn_off_dac = HAS_PCH_SPLIT(dev);
		u32 save_adpa;

		crt->force_hotplug_required = 0;

		save_adpa = adpa = I915_READ(PCH_ADPA);
		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);

		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
		if (turn_off_dac)
			adpa &= ~ADPA_DAC_ENABLE;

		I915_WRITE(PCH_ADPA, adpa);

		if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
			     1000))
			DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");

		if (turn_off_dac) {
			I915_WRITE(PCH_ADPA, save_adpa);
			POSTING_READ(PCH_ADPA);
		}
	}

	/* Check the status to see if both blue and green are on now */
	adpa = I915_READ(PCH_ADPA);
	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
		ret = true;
	else
		ret = false;
	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);

	return ret;
}

/**
 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 *
 * Not for i915G/i915GM
 *
 * \return true if CRT is connected.
 * \return false if CRT is disconnected.
 */
static bool intel_crt_detect_hotplug(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 hotplug_en, orig, stat;
	bool ret = false;
	int i, tries = 0;

	if (HAS_PCH_SPLIT(dev))
		return intel_ironlake_crt_detect_hotplug(connector);

	/*
	 * On 4 series desktop, CRT detect sequence need to be done twice
	 * to get a reliable result.
	 */

	if (IS_G4X(dev) && !IS_GM45(dev))
		tries = 2;
	else
		tries = 1;
	hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;

	for (i = 0; i < tries ; i++) {
		/* turn on the FORCE_DETECT */
		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
		/* wait for FORCE_DETECT to go off */
		if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
			      CRT_HOTPLUG_FORCE_DETECT) == 0,
			     1000))
			DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
	}

	stat = I915_READ(PORT_HOTPLUG_STAT);
	if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
		ret = true;

	/* clear the interrupt we just generated, if any */
	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);

	/* and put the bits back */
	I915_WRITE(PORT_HOTPLUG_EN, orig);

	return ret;
}

static bool intel_crt_detect_ddc(struct drm_connector *connector)
{
	struct intel_crt *crt = intel_attached_crt(connector);
	struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;

	/* CRT should always be at 0, but check anyway */
	if (crt->base.type != INTEL_OUTPUT_ANALOG)
		return false;

	if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
		struct edid *edid;
		bool is_digital = false;

		edid = drm_get_edid(connector,
			&dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
		/*
		 * This may be a DVI-I connector with a shared DDC
		 * link between analog and digital outputs, so we
		 * have to check the EDID input spec of the attached device.
		 *
		 * On the other hand, what should we do if it is a broken EDID?
		 */
		if (edid != NULL) {
			is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
			connector->display_info.raw_edid = NULL;
			kfree(edid);
		}

		if (!is_digital) {
			DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
			return true;
		} else {
			DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
		}
	}

	return false;
}

static enum drm_connector_status
intel_crt_load_detect(struct intel_crt *crt)
{
	struct drm_device *dev = crt->base.base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
	uint32_t save_bclrpat;
	uint32_t save_vtotal;
	uint32_t vtotal, vactive;
	uint32_t vsample;
	uint32_t vblank, vblank_start, vblank_end;
	uint32_t dsl;
	uint32_t bclrpat_reg;
	uint32_t vtotal_reg;
	uint32_t vblank_reg;
	uint32_t vsync_reg;
	uint32_t pipeconf_reg;
	uint32_t pipe_dsl_reg;
	uint8_t	st00;
	enum drm_connector_status status;

	DRM_DEBUG_KMS("starting load-detect on CRT\n");

	bclrpat_reg = BCLRPAT(pipe);
	vtotal_reg = VTOTAL(pipe);
	vblank_reg = VBLANK(pipe);
	vsync_reg = VSYNC(pipe);
	pipeconf_reg = PIPECONF(pipe);
	pipe_dsl_reg = PIPEDSL(pipe);

	save_bclrpat = I915_READ(bclrpat_reg);
	save_vtotal = I915_READ(vtotal_reg);
	vblank = I915_READ(vblank_reg);

	vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
	vactive = (save_vtotal & 0x7ff) + 1;

	vblank_start = (vblank & 0xfff) + 1;
	vblank_end = ((vblank >> 16) & 0xfff) + 1;

	/* Set the border color to purple. */
	I915_WRITE(bclrpat_reg, 0x500050);

	if (!IS_GEN2(dev)) {
		uint32_t pipeconf = I915_READ(pipeconf_reg);
		I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
		POSTING_READ(pipeconf_reg);
		/* Wait for next Vblank to substitue
		 * border color for Color info */
		intel_wait_for_vblank(dev, pipe);
		st00 = I915_READ8(VGA_MSR_WRITE);
		status = ((st00 & (1 << 4)) != 0) ?
			connector_status_connected :
			connector_status_disconnected;

		I915_WRITE(pipeconf_reg, pipeconf);
	} else {
		bool restore_vblank = false;
		int count, detect;

		/*
		* If there isn't any border, add some.
		* Yes, this will flicker
		*/
		if (vblank_start <= vactive && vblank_end >= vtotal) {
			uint32_t vsync = I915_READ(vsync_reg);
			uint32_t vsync_start = (vsync & 0xffff) + 1;

			vblank_start = vsync_start;
			I915_WRITE(vblank_reg,
				   (vblank_start - 1) |
				   ((vblank_end - 1) << 16));
			restore_vblank = true;
		}
		/* sample in the vertical border, selecting the larger one */
		if (vblank_start - vactive >= vtotal - vblank_end)
			vsample = (vblank_start + vactive) >> 1;
		else
			vsample = (vtotal + vblank_end) >> 1;

		/*
		 * Wait for the border to be displayed
		 */
		while (I915_READ(pipe_dsl_reg) >= vactive)
			;
		while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
			;
		/*
		 * Watch ST00 for an entire scanline
		 */
		detect = 0;
		count = 0;
		do {
			count++;
			/* Read the ST00 VGA status register */
			st00 = I915_READ8(VGA_MSR_WRITE);
			if (st00 & (1 << 4))
				detect++;
		} while ((I915_READ(pipe_dsl_reg) == dsl));

		/* restore vblank if necessary */
		if (restore_vblank)
			I915_WRITE(vblank_reg, vblank);
		/*
		 * If more than 3/4 of the scanline detected a monitor,
		 * then it is assumed to be present. This works even on i830,
		 * where there isn't any way to force the border color across
		 * the screen
		 */
		status = detect * 4 > count * 3 ?
			 connector_status_connected :
			 connector_status_disconnected;
	}

	/* Restore previous settings */
	I915_WRITE(bclrpat_reg, save_bclrpat);

	return status;
}

static enum drm_connector_status
intel_crt_detect(struct drm_connector *connector, bool force)
{
	struct drm_device *dev = connector->dev;
	struct intel_crt *crt = intel_attached_crt(connector);
	struct drm_crtc *crtc;
	enum drm_connector_status status;

	if (I915_HAS_HOTPLUG(dev)) {
		if (intel_crt_detect_hotplug(connector)) {
			DRM_DEBUG_KMS("CRT detected via hotplug\n");
			return connector_status_connected;
		} else {
			DRM_DEBUG_KMS("CRT not detected via hotplug\n");
			return connector_status_disconnected;
		}
	}

	if (intel_crt_detect_ddc(connector))
		return connector_status_connected;

	if (!force)
		return connector->status;

	/* for pre-945g platforms use load detect */
	crtc = crt->base.base.crtc;
	if (crtc && crtc->enabled) {
		status = intel_crt_load_detect(crt);
	} else {
		struct intel_load_detect_pipe tmp;

		if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
					       &tmp)) {
			if (intel_crt_detect_ddc(connector))
				status = connector_status_connected;
			else
				status = intel_crt_load_detect(crt);
			intel_release_load_detect_pipe(&crt->base, connector,
						       &tmp);
		} else
			status = connector_status_unknown;
	}

	return status;
}

static void intel_crt_destroy(struct drm_connector *connector)
{
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(connector);
}

static int intel_crt_get_modes(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret;

	ret = intel_ddc_get_modes(connector,
				 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
	if (ret || !IS_G4X(dev))
		return ret;

	/* Try to probe digital port for output in DVI-I -> VGA mode. */
	return intel_ddc_get_modes(connector,
				   &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
}

static int intel_crt_set_property(struct drm_connector *connector,
				  struct drm_property *property,
				  uint64_t value)
{
	return 0;
}

static void intel_crt_reset(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct intel_crt *crt = intel_attached_crt(connector);

	if (HAS_PCH_SPLIT(dev))
		crt->force_hotplug_required = 1;
}

/*
 * Routines for controlling stuff on the analog port
 */

static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
	.dpms = intel_crt_dpms,
	.mode_fixup = intel_crt_mode_fixup,
	.prepare = intel_encoder_prepare,
	.commit = intel_encoder_commit,
	.mode_set = intel_crt_mode_set,
};

static const struct drm_connector_funcs intel_crt_connector_funcs = {
	.reset = intel_crt_reset,
	.dpms = drm_helper_connector_dpms,
	.detect = intel_crt_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = intel_crt_destroy,
	.set_property = intel_crt_set_property,
};

static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
	.mode_valid = intel_crt_mode_valid,
	.get_modes = intel_crt_get_modes,
	.best_encoder = intel_best_encoder,
};

static const struct drm_encoder_funcs intel_crt_enc_funcs = {
	.destroy = intel_encoder_destroy,
};

static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
{
	DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id->ident);
	return 1;
}

static const struct dmi_system_id intel_no_crt[] = {
	{
		.callback = intel_no_crt_dmi_callback,
		.ident = "ACER ZGB",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
			DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
		},
	},
	{ }
};

void intel_crt_init(struct drm_device *dev)
{
	struct drm_connector *connector;
	struct intel_crt *crt;
	struct intel_connector *intel_connector;
	struct drm_i915_private *dev_priv = dev->dev_private;

	/* Skip machines without VGA that falsely report hotplug events */
	if (dmi_check_system(intel_no_crt))
		return;

	crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
	if (!crt)
		return;

	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	if (!intel_connector) {
		kfree(crt);
		return;
	}

	connector = &intel_connector->base;
	drm_connector_init(dev, &intel_connector->base,
			   &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);

	drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
			 DRM_MODE_ENCODER_DAC);

	intel_connector_attach_encoder(intel_connector, &crt->base);

	crt->base.type = INTEL_OUTPUT_ANALOG;
	crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
				1 << INTEL_ANALOG_CLONE_BIT |
				1 << INTEL_SDVO_LVDS_CLONE_BIT);
	crt->base.crtc_mask = (1 << 0) | (1 << 1);
	if (IS_GEN2(dev))
		connector->interlace_allowed = 0;
	else
		connector->interlace_allowed = 1;
	connector->doublescan_allowed = 0;

	drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);

	drm_sysfs_connector_add(connector);

	if (I915_HAS_HOTPLUG(dev))
		connector->polled = DRM_CONNECTOR_POLL_HPD;
	else
		connector->polled = DRM_CONNECTOR_POLL_CONNECT;

	/*
	 * Configure the automatic hotplug detection stuff
	 */
	crt->force_hotplug_required = 0;
	if (HAS_PCH_SPLIT(dev)) {
		u32 adpa;

		adpa = I915_READ(PCH_ADPA);
		adpa &= ~ADPA_CRT_HOTPLUG_MASK;
		adpa |= ADPA_HOTPLUG_BITS;
		I915_WRITE(PCH_ADPA, adpa);
		POSTING_READ(PCH_ADPA);

		DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
		crt->force_hotplug_required = 1;
	}

	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
}
Commit	Line	Data
79e53945 JB	1	/*
	2	* Copyright © 2006-2007 Intel Corporation
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	21	* DEALINGS IN THE SOFTWARE.
	22	*
	23	* Authors:
	24	* Eric Anholt <eric@anholt.net>
	25	*/
	26
8ca4013d	27	#include <linux/dmi.h>
79e53945	28	#include <linux/i2c.h>
5a0e3ad6	29	#include <linux/slab.h>
79e53945 JB	30	#include "drmP.h"
	31	#include "drm.h"
	32	#include "drm_crtc.h"
	33	#include "drm_crtc_helper.h"
f5afcd3d	34	#include "drm_edid.h"
79e53945 JB	35	#include "intel_drv.h"
	36	#include "i915_drm.h"
	37	#include "i915_drv.h"
	38
e7dbb2f2 KP	39	/* Here's the desired hotplug mode */
	40	#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 \| \
	41	ADPA_CRT_HOTPLUG_WARMUP_10MS \| \
	42	ADPA_CRT_HOTPLUG_SAMPLE_4S \| \
	43	ADPA_CRT_HOTPLUG_VOLTAGE_50 \| \
	44	ADPA_CRT_HOTPLUG_VOLREF_325MV \| \
	45	ADPA_CRT_HOTPLUG_ENABLE)
	46
c9a1c4cd CW	47	struct intel_crt {
c9a1c4cd CW	48	struct intel_encoder base;
e7dbb2f2	49	bool force_hotplug_required;
c9a1c4cd CW	50	};
	51
	52	static struct intel_crt intel_attached_crt(struct drm_connector connector)
	53	{
	54	return container_of(intel_attached_encoder(connector),
	55	struct intel_crt, base);
	56	}
	57
79e53945 JB	58	static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
	59	{
	60	struct drm_device *dev = encoder->dev;
	61	struct drm_i915_private *dev_priv = dev->dev_private;
2c07245f	62	u32 temp, reg;
79e53945	63
bad720ff	64	if (HAS_PCH_SPLIT(dev))
2c07245f ZW	65	reg = PCH_ADPA;
	66	else
	67	reg = ADPA;
	68
	69	temp = I915_READ(reg);
79e53945	70	temp &= ~(ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE);
febc7694	71	temp &= ~ADPA_DAC_ENABLE;
79e53945	72
0206e353	73	switch (mode) {
79e53945 JB	74	case DRM_MODE_DPMS_ON:
	75	temp \|= ADPA_DAC_ENABLE;
	76	break;
	77	case DRM_MODE_DPMS_STANDBY:
	78	temp \|= ADPA_DAC_ENABLE \| ADPA_HSYNC_CNTL_DISABLE;
	79	break;
	80	case DRM_MODE_DPMS_SUSPEND:
	81	temp \|= ADPA_DAC_ENABLE \| ADPA_VSYNC_CNTL_DISABLE;
	82	break;
	83	case DRM_MODE_DPMS_OFF:
	84	temp \|= ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE;
	85	break;
	86	}
	87
2c07245f	88	I915_WRITE(reg, temp);
79e53945 JB	89	}
	90
	91	static int intel_crt_mode_valid(struct drm_connector *connector,
	92	struct drm_display_mode *mode)
	93	{
6bcdcd9e ZY	94	struct drm_device *dev = connector->dev;
	95
	96	int max_clock = 0;
79e53945 JB	97	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	98	return MODE_NO_DBLESCAN;
	99
6bcdcd9e ZY	100	if (mode->clock < 25000)
	101	return MODE_CLOCK_LOW;
	102
a6c45cf0	103	if (IS_GEN2(dev))
6bcdcd9e ZY	104	max_clock = 350000;
	105	else
	106	max_clock = 400000;
	107	if (mode->clock > max_clock)
	108	return MODE_CLOCK_HIGH;
79e53945 JB	109
	110	return MODE_OK;
	111	}
	112
	113	static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
	114	struct drm_display_mode *mode,
	115	struct drm_display_mode *adjusted_mode)
	116	{
	117	return true;
	118	}
	119
	120	static void intel_crt_mode_set(struct drm_encoder *encoder,
	121	struct drm_display_mode *mode,
	122	struct drm_display_mode *adjusted_mode)
	123	{
	124
	125	struct drm_device *dev = encoder->dev;
	126	struct drm_crtc *crtc = encoder->crtc;
	127	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	128	struct drm_i915_private *dev_priv = dev->dev_private;
	129	int dpll_md_reg;
	130	u32 adpa, dpll_md;
2c07245f	131	u32 adpa_reg;
79e53945	132
9db4a9c7	133	dpll_md_reg = DPLL_MD(intel_crtc->pipe);
79e53945	134
bad720ff	135	if (HAS_PCH_SPLIT(dev))
2c07245f ZW	136	adpa_reg = PCH_ADPA;
	137	else
	138	adpa_reg = ADPA;
	139
79e53945 JB	140	/*
	141	* Disable separate mode multiplier used when cloning SDVO to CRT
	142	* XXX this needs to be adjusted when we really are cloning
	143	*/
a6c45cf0	144	if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
79e53945 JB	145	dpll_md = I915_READ(dpll_md_reg);
	146	I915_WRITE(dpll_md_reg,
	147	dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
	148	}
	149
e7dbb2f2	150	adpa = ADPA_HOTPLUG_BITS;
79e53945 JB	151	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
	152	adpa \|= ADPA_HSYNC_ACTIVE_HIGH;
	153	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
	154	adpa \|= ADPA_VSYNC_ACTIVE_HIGH;
	155
75770564 JB	156	/* For CPT allow 3 pipe config, for others just use A or B */
	157	if (HAS_PCH_CPT(dev))
	158	adpa \|= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
	159	else if (intel_crtc->pipe == 0)
	160	adpa \|= ADPA_PIPE_A_SELECT;
	161	else
	162	adpa \|= ADPA_PIPE_B_SELECT;
79e53945	163
9db4a9c7 JB	164	if (!HAS_PCH_SPLIT(dev))
	165	I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
	166
2c07245f ZW	167	I915_WRITE(adpa_reg, adpa);
	168	}
	169
f2b115e6	170	static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
2c07245f ZW	171	{
2c07245f ZW	172	struct drm_device *dev = connector->dev;
e7dbb2f2	173	struct intel_crt *crt = intel_attached_crt(connector);
2c07245f	174	struct drm_i915_private *dev_priv = dev->dev_private;
e7dbb2f2	175	u32 adpa;
2c07245f ZW	176	bool ret;
2c07245f ZW	177
e7dbb2f2 KP	178	/* The first time through, trigger an explicit detection cycle */
	179	if (crt->force_hotplug_required) {
	180	bool turn_off_dac = HAS_PCH_SPLIT(dev);
	181	u32 save_adpa;
67941da2	182
e7dbb2f2 KP	183	crt->force_hotplug_required = 0;
	184
	185	save_adpa = adpa = I915_READ(PCH_ADPA);
	186	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
	187
	188	adpa \|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
	189	if (turn_off_dac)
	190	adpa &= ~ADPA_DAC_ENABLE;
	191
	192	I915_WRITE(PCH_ADPA, adpa);
	193
	194	if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
	195	1000))
	196	DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
	197
	198	if (turn_off_dac) {
	199	I915_WRITE(PCH_ADPA, save_adpa);
	200	POSTING_READ(PCH_ADPA);
	201	}
a4a6b901 ZW	202	}
a4a6b901 ZW	203
2c07245f ZW	204	/* Check the status to see if both blue and green are on now */
2c07245f ZW	205	adpa = I915_READ(PCH_ADPA);
e7dbb2f2	206	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
2c07245f ZW	207	ret = true;
	208	else
	209	ret = false;
e7dbb2f2	210	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
2c07245f	211
2c07245f	212	return ret;
79e53945 JB	213	}
	214
	215	/**
	216	* Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
	217	*
	218	* Not for i915G/i915GM
	219	*
	220	* \return true if CRT is connected.
	221	* \return false if CRT is disconnected.
	222	*/
	223	static bool intel_crt_detect_hotplug(struct drm_connector *connector)
	224	{
	225	struct drm_device *dev = connector->dev;
	226	struct drm_i915_private *dev_priv = dev->dev_private;
7a772c49 AJ	227	u32 hotplug_en, orig, stat;
7a772c49 AJ	228	bool ret = false;
771cb081	229	int i, tries = 0;
2c07245f	230
bad720ff	231	if (HAS_PCH_SPLIT(dev))
f2b115e6	232	return intel_ironlake_crt_detect_hotplug(connector);
2c07245f	233
771cb081 ZY	234	/*
	235	* On 4 series desktop, CRT detect sequence need to be done twice
	236	* to get a reliable result.
	237	*/
79e53945	238
771cb081 ZY	239	if (IS_G4X(dev) && !IS_GM45(dev))
	240	tries = 2;
	241	else
	242	tries = 1;
7a772c49	243	hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
771cb081 ZY	244	hotplug_en \|= CRT_HOTPLUG_FORCE_DETECT;
771cb081 ZY	245
771cb081	246	for (i = 0; i < tries ; i++) {
771cb081 ZY	247	/* turn on the FORCE_DETECT */
771cb081 ZY	248	I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
771cb081	249	/* wait for FORCE_DETECT to go off */
913d8d11 CW	250	if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
913d8d11 CW	251	CRT_HOTPLUG_FORCE_DETECT) == 0,
481b6af3	252	1000))
79077319	253	DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
771cb081	254	}
79e53945	255
7a772c49 AJ	256	stat = I915_READ(PORT_HOTPLUG_STAT);
	257	if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
	258	ret = true;
	259
	260	/* clear the interrupt we just generated, if any */
	261	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
79e53945	262
7a772c49 AJ	263	/* and put the bits back */
	264	I915_WRITE(PORT_HOTPLUG_EN, orig);
	265
	266	return ret;
79e53945 JB	267	}
79e53945 JB	268
f5afcd3d	269	static bool intel_crt_detect_ddc(struct drm_connector *connector)
79e53945	270	{
f5afcd3d	271	struct intel_crt *crt = intel_attached_crt(connector);
c9a1c4cd	272	struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
79e53945 JB	273
79e53945 JB	274	/* CRT should always be at 0, but check anyway */
c9a1c4cd	275	if (crt->base.type != INTEL_OUTPUT_ANALOG)
79e53945 JB	276	return false;
79e53945 JB	277
c9a1c4cd	278	if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
f5afcd3d DM	279	struct edid *edid;
	280	bool is_digital = false;
	281
	282	edid = drm_get_edid(connector,
	283	&dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
	284	/*
	285	* This may be a DVI-I connector with a shared DDC
	286	* link between analog and digital outputs, so we
	287	* have to check the EDID input spec of the attached device.
d3bcb757 CW	288	*
d3bcb757 CW	289	* On the other hand, what should we do if it is a broken EDID?
f5afcd3d DM	290	*/
	291	if (edid != NULL) {
	292	is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
	293	connector->display_info.raw_edid = NULL;
	294	kfree(edid);
	295	}
	296
	297	if (!is_digital) {
	298	DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
	299	return true;
d3bcb757 CW	300	} else {
d3bcb757 CW	301	DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
f5afcd3d	302	}
6ec3d0c0 CW	303	}
	304
	305	return false;
79e53945 JB	306	}
79e53945 JB	307
e4a5d54f	308	static enum drm_connector_status
7173188d	309	intel_crt_load_detect(struct intel_crt *crt)
e4a5d54f	310	{
7173188d	311	struct drm_device *dev = crt->base.base.dev;
e4a5d54f	312	struct drm_i915_private *dev_priv = dev->dev_private;
7173188d	313	uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
e4a5d54f ML	314	uint32_t save_bclrpat;
	315	uint32_t save_vtotal;
	316	uint32_t vtotal, vactive;
	317	uint32_t vsample;
	318	uint32_t vblank, vblank_start, vblank_end;
	319	uint32_t dsl;
	320	uint32_t bclrpat_reg;
	321	uint32_t vtotal_reg;
	322	uint32_t vblank_reg;
	323	uint32_t vsync_reg;
	324	uint32_t pipeconf_reg;
	325	uint32_t pipe_dsl_reg;
	326	uint8_t st00;
	327	enum drm_connector_status status;
	328
6ec3d0c0 CW	329	DRM_DEBUG_KMS("starting load-detect on CRT\n");
6ec3d0c0 CW	330
9db4a9c7 JB	331	bclrpat_reg = BCLRPAT(pipe);
	332	vtotal_reg = VTOTAL(pipe);
	333	vblank_reg = VBLANK(pipe);
	334	vsync_reg = VSYNC(pipe);
	335	pipeconf_reg = PIPECONF(pipe);
	336	pipe_dsl_reg = PIPEDSL(pipe);
e4a5d54f ML	337
	338	save_bclrpat = I915_READ(bclrpat_reg);
	339	save_vtotal = I915_READ(vtotal_reg);
	340	vblank = I915_READ(vblank_reg);
	341
	342	vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
	343	vactive = (save_vtotal & 0x7ff) + 1;
	344
	345	vblank_start = (vblank & 0xfff) + 1;
	346	vblank_end = ((vblank >> 16) & 0xfff) + 1;
	347
	348	/* Set the border color to purple. */
	349	I915_WRITE(bclrpat_reg, 0x500050);
	350
a6c45cf0	351	if (!IS_GEN2(dev)) {
e4a5d54f ML	352	uint32_t pipeconf = I915_READ(pipeconf_reg);
e4a5d54f ML	353	I915_WRITE(pipeconf_reg, pipeconf \| PIPECONF_FORCE_BORDER);
19c55da1	354	POSTING_READ(pipeconf_reg);
e4a5d54f ML	355	/* Wait for next Vblank to substitue
e4a5d54f ML	356	* border color for Color info */
9d0498a2	357	intel_wait_for_vblank(dev, pipe);
e4a5d54f ML	358	st00 = I915_READ8(VGA_MSR_WRITE);
	359	status = ((st00 & (1 << 4)) != 0) ?
	360	connector_status_connected :
	361	connector_status_disconnected;
	362
	363	I915_WRITE(pipeconf_reg, pipeconf);
	364	} else {
	365	bool restore_vblank = false;
	366	int count, detect;
	367
	368	/*
	369	* If there isn't any border, add some.
	370	* Yes, this will flicker
	371	*/
	372	if (vblank_start <= vactive && vblank_end >= vtotal) {
	373	uint32_t vsync = I915_READ(vsync_reg);
	374	uint32_t vsync_start = (vsync & 0xffff) + 1;
	375
	376	vblank_start = vsync_start;
	377	I915_WRITE(vblank_reg,
	378	(vblank_start - 1) \|
	379	((vblank_end - 1) << 16));
	380	restore_vblank = true;
	381	}
	382	/* sample in the vertical border, selecting the larger one */
	383	if (vblank_start - vactive >= vtotal - vblank_end)
	384	vsample = (vblank_start + vactive) >> 1;
	385	else
	386	vsample = (vtotal + vblank_end) >> 1;
	387
	388	/*
	389	* Wait for the border to be displayed
	390	*/
	391	while (I915_READ(pipe_dsl_reg) >= vactive)
	392	;
	393	while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
	394	;
	395	/*
	396	* Watch ST00 for an entire scanline
	397	*/
	398	detect = 0;
	399	count = 0;
	400	do {
	401	count++;
	402	/* Read the ST00 VGA status register */
	403	st00 = I915_READ8(VGA_MSR_WRITE);
	404	if (st00 & (1 << 4))
	405	detect++;
	406	} while ((I915_READ(pipe_dsl_reg) == dsl));
	407
	408	/* restore vblank if necessary */
	409	if (restore_vblank)
	410	I915_WRITE(vblank_reg, vblank);
	411	/*
	412	* If more than 3/4 of the scanline detected a monitor,
	413	* then it is assumed to be present. This works even on i830,
	414	* where there isn't any way to force the border color across
	415	* the screen
	416	*/
	417	status = detect * 4 > count * 3 ?
	418	connector_status_connected :
	419	connector_status_disconnected;
	420	}
	421
422	/* Restore previous settings */
423	I915_WRITE(bclrpat_reg, save_bclrpat);
424
425	return status;
426	}
427
7b334fcb	428	static enum drm_connector_status
930a9e28	429	intel_crt_detect(struct drm_connector *connector, bool force)
79e53945 JB	430	{
79e53945 JB	431	struct drm_device *dev = connector->dev;
c9a1c4cd	432	struct intel_crt *crt = intel_attached_crt(connector);
e4a5d54f	433	struct drm_crtc *crtc;
e4a5d54f	434	enum drm_connector_status status;
79e53945	435
a6c45cf0	436	if (I915_HAS_HOTPLUG(dev)) {
6ec3d0c0 CW	437	if (intel_crt_detect_hotplug(connector)) {
6ec3d0c0 CW	438	DRM_DEBUG_KMS("CRT detected via hotplug\n");
79e53945	439	return connector_status_connected;
e7dbb2f2 KP	440	} else {
e7dbb2f2 KP	441	DRM_DEBUG_KMS("CRT not detected via hotplug\n");
79e53945	442	return connector_status_disconnected;
e7dbb2f2	443	}
79e53945 JB	444	}
79e53945 JB	445
f5afcd3d	446	if (intel_crt_detect_ddc(connector))
79e53945 JB	447	return connector_status_connected;
79e53945 JB	448
930a9e28	449	if (!force)
7b334fcb CW	450	return connector->status;
7b334fcb CW	451
e4a5d54f	452	/* for pre-945g platforms use load detect */
c9a1c4cd CW	453	crtc = crt->base.base.crtc;
c9a1c4cd CW	454	if (crtc && crtc->enabled) {
7173188d	455	status = intel_crt_load_detect(crt);
e4a5d54f	456	} else {
8261b191 CW	457	struct intel_load_detect_pipe tmp;
	458
	459	if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
	460	&tmp)) {
f5afcd3d	461	if (intel_crt_detect_ddc(connector))
6ec3d0c0 CW	462	status = connector_status_connected;
6ec3d0c0 CW	463	else
7173188d	464	status = intel_crt_load_detect(crt);
8261b191 CW	465	intel_release_load_detect_pipe(&crt->base, connector,
8261b191 CW	466	&tmp);
e4a5d54f ML	467	} else
	468	status = connector_status_unknown;
	469	}
	470
	471	return status;
79e53945 JB	472	}
	473
	474	static void intel_crt_destroy(struct drm_connector *connector)
	475	{
79e53945 JB	476	drm_sysfs_connector_remove(connector);
	477	drm_connector_cleanup(connector);
	478	kfree(connector);
	479	}
	480
	481	static int intel_crt_get_modes(struct drm_connector *connector)
	482	{
8e4d36b9	483	struct drm_device *dev = connector->dev;
f899fc64	484	struct drm_i915_private *dev_priv = dev->dev_private;
890f3359	485	int ret;
8e4d36b9	486
f899fc64 CW	487	ret = intel_ddc_get_modes(connector,
f899fc64 CW	488	&dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
8e4d36b9	489	if (ret \|\| !IS_G4X(dev))
f899fc64	490	return ret;
8e4d36b9	491
8e4d36b9	492	/* Try to probe digital port for output in DVI-I -> VGA mode. */
f899fc64 CW	493	return intel_ddc_get_modes(connector,
f899fc64 CW	494	&dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
79e53945 JB	495	}
	496
	497	static int intel_crt_set_property(struct drm_connector *connector,
	498	struct drm_property *property,
	499	uint64_t value)
	500	{
79e53945 JB	501	return 0;
	502	}
	503
f3269058 CW	504	static void intel_crt_reset(struct drm_connector *connector)
	505	{
	506	struct drm_device *dev = connector->dev;
	507	struct intel_crt *crt = intel_attached_crt(connector);
	508
	509	if (HAS_PCH_SPLIT(dev))
	510	crt->force_hotplug_required = 1;
	511	}
	512
79e53945 JB	513	/*
	514	* Routines for controlling stuff on the analog port
	515	*/
	516
	517	static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
	518	.dpms = intel_crt_dpms,
	519	.mode_fixup = intel_crt_mode_fixup,
	520	.prepare = intel_encoder_prepare,
	521	.commit = intel_encoder_commit,
	522	.mode_set = intel_crt_mode_set,
	523	};
	524
	525	static const struct drm_connector_funcs intel_crt_connector_funcs = {
f3269058	526	.reset = intel_crt_reset,
c9fb15f6	527	.dpms = drm_helper_connector_dpms,
79e53945 JB	528	.detect = intel_crt_detect,
	529	.fill_modes = drm_helper_probe_single_connector_modes,
	530	.destroy = intel_crt_destroy,
	531	.set_property = intel_crt_set_property,
	532	};
	533
	534	static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
	535	.mode_valid = intel_crt_mode_valid,
	536	.get_modes = intel_crt_get_modes,
df0e9248	537	.best_encoder = intel_best_encoder,
79e53945 JB	538	};
79e53945 JB	539
79e53945	540	static const struct drm_encoder_funcs intel_crt_enc_funcs = {
ea5b213a	541	.destroy = intel_encoder_destroy,
79e53945 JB	542	};
79e53945 JB	543
8ca4013d DL	544	static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
	545	{
	546	DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id->ident);
	547	return 1;
	548	}
	549
	550	static const struct dmi_system_id intel_no_crt[] = {
	551	{
	552	.callback = intel_no_crt_dmi_callback,
	553	.ident = "ACER ZGB",
	554	.matches = {
	555	DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
	556	DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
	557	},
	558	},
	559	{ }
	560	};
	561
79e53945 JB	562	void intel_crt_init(struct drm_device *dev)
	563	{
	564	struct drm_connector *connector;
c9a1c4cd	565	struct intel_crt *crt;
454c1ca8	566	struct intel_connector *intel_connector;
db545019	567	struct drm_i915_private *dev_priv = dev->dev_private;
79e53945	568
8ca4013d DL	569	/* Skip machines without VGA that falsely report hotplug events */
	570	if (dmi_check_system(intel_no_crt))
	571	return;
	572
c9a1c4cd CW	573	crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
c9a1c4cd CW	574	if (!crt)
79e53945 JB	575	return;
79e53945 JB	576
454c1ca8 ZW	577	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
454c1ca8 ZW	578	if (!intel_connector) {
c9a1c4cd	579	kfree(crt);
454c1ca8 ZW	580	return;
	581	}
	582
	583	connector = &intel_connector->base;
	584	drm_connector_init(dev, &intel_connector->base,
79e53945 JB	585	&intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
79e53945 JB	586
c9a1c4cd	587	drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
79e53945 JB	588	DRM_MODE_ENCODER_DAC);
79e53945 JB	589
c9a1c4cd	590	intel_connector_attach_encoder(intel_connector, &crt->base);
79e53945	591
c9a1c4cd CW	592	crt->base.type = INTEL_OUTPUT_ANALOG;
	593	crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT \|
	594	1 << INTEL_ANALOG_CLONE_BIT \|
	595	1 << INTEL_SDVO_LVDS_CLONE_BIT);
	596	crt->base.crtc_mask = (1 << 0) \| (1 << 1);
dbb02575 DV	597	if (IS_GEN2(dev))
	598	connector->interlace_allowed = 0;
	599	else
	600	connector->interlace_allowed = 1;
79e53945 JB	601	connector->doublescan_allowed = 0;
79e53945 JB	602
c9a1c4cd	603	drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
79e53945 JB	604	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
	605
	606	drm_sysfs_connector_add(connector);
b01f2c3a	607
eb1f8e4f DA	608	if (I915_HAS_HOTPLUG(dev))
	609	connector->polled = DRM_CONNECTOR_POLL_HPD;
	610	else
	611	connector->polled = DRM_CONNECTOR_POLL_CONNECT;
	612
e7dbb2f2 KP	613	/*
	614	* Configure the automatic hotplug detection stuff
	615	*/
	616	crt->force_hotplug_required = 0;
	617	if (HAS_PCH_SPLIT(dev)) {
	618	u32 adpa;
	619
	620	adpa = I915_READ(PCH_ADPA);
	621	adpa &= ~ADPA_CRT_HOTPLUG_MASK;
	622	adpa \|= ADPA_HOTPLUG_BITS;
	623	I915_WRITE(PCH_ADPA, adpa);
	624	POSTING_READ(PCH_ADPA);
	625
	626	DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
	627	crt->force_hotplug_required = 1;
	628	}
	629
b01f2c3a	630	dev_priv->hotplug_supported_mask \|= CRT_HOTPLUG_INT_STATUS;
79e53945	631	}