[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_crt.c

/*
 * Copyright © 2006-2007 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 */

#include <linux/i2c.h>
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
#include "intel_drv.h"
#include "i915_drm.h"
#include "i915_drv.h"

static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 temp;

	temp = I915_READ(ADPA);
	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
	temp |= ADPA_DAC_ENABLE;

	switch(mode) {
	case DRM_MODE_DPMS_ON:
		temp |= ADPA_DAC_ENABLE;
		break;
	case DRM_MODE_DPMS_STANDBY:
		temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
		break;
	case DRM_MODE_DPMS_SUSPEND:
		temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
		break;
	case DRM_MODE_DPMS_OFF:
		temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
		break;
	}

	I915_WRITE(ADPA, temp);
}

static int intel_crt_mode_valid(struct drm_connector *connector,
				struct drm_display_mode *mode)
{
	struct drm_device *dev = connector->dev;

	int max_clock = 0;
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;

	if (mode->clock < 25000)
		return MODE_CLOCK_LOW;

	if (!IS_I9XX(dev))
		max_clock = 350000;
	else
		max_clock = 400000;
	if (mode->clock > max_clock)
		return MODE_CLOCK_HIGH;

	return MODE_OK;
}

static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
				 struct drm_display_mode *mode,
				 struct drm_display_mode *adjusted_mode)
{
	return true;
}

static void intel_crt_mode_set(struct drm_encoder *encoder,
			       struct drm_display_mode *mode,
			       struct drm_display_mode *adjusted_mode)
{

	struct drm_device *dev = encoder->dev;
	struct drm_crtc *crtc = encoder->crtc;
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	struct drm_i915_private *dev_priv = dev->dev_private;
	int dpll_md_reg;
	u32 adpa, dpll_md;

	if (intel_crtc->pipe == 0)
		dpll_md_reg = DPLL_A_MD;
	else
		dpll_md_reg = DPLL_B_MD;

	/*
	 * Disable separate mode multiplier used when cloning SDVO to CRT
	 * XXX this needs to be adjusted when we really are cloning
	 */
	if (IS_I965G(dev)) {
		dpll_md = I915_READ(dpll_md_reg);
		I915_WRITE(dpll_md_reg,
			   dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
	}

	adpa = 0;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		adpa |= ADPA_HSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		adpa |= ADPA_VSYNC_ACTIVE_HIGH;

	if (intel_crtc->pipe == 0) {
		adpa |= ADPA_PIPE_A_SELECT;
		I915_WRITE(BCLRPAT_A, 0);
	} else {
		adpa |= ADPA_PIPE_B_SELECT;
		I915_WRITE(BCLRPAT_B, 0);
	}

	I915_WRITE(ADPA, adpa);
}

/**
 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 *
 * Not for i915G/i915GM
 *
 * \return true if CRT is connected.
 * \return false if CRT is disconnected.
 */
static bool intel_crt_detect_hotplug(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 hotplug_en;
	int i, tries = 0;
	/*
	 * On 4 series desktop, CRT detect sequence need to be done twice
	 * to get a reliable result.
	 */

	if (IS_G4X(dev) && !IS_GM45(dev))
		tries = 2;
	else
		tries = 1;
	hotplug_en = I915_READ(PORT_HOTPLUG_EN);
	hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;

	if (IS_G4X(dev))
		hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;

	hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;

	for (i = 0; i < tries ; i++) {
		unsigned long timeout;
		/* turn on the FORCE_DETECT */
		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
		timeout = jiffies + msecs_to_jiffies(1000);
		/* wait for FORCE_DETECT to go off */
		do {
			if (!(I915_READ(PORT_HOTPLUG_EN) &
					CRT_HOTPLUG_FORCE_DETECT))
				break;
			msleep(1);
		} while (time_after(timeout, jiffies));
	}

	if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
	    CRT_HOTPLUG_MONITOR_COLOR)
		return true;

	return false;
}

static bool intel_crt_detect_ddc(struct drm_connector *connector)
{
	struct intel_output *intel_output = to_intel_output(connector);

	/* CRT should always be at 0, but check anyway */
	if (intel_output->type != INTEL_OUTPUT_ANALOG)
		return false;

	return intel_ddc_probe(intel_output);
}

static enum drm_connector_status
intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
{
	struct drm_encoder *encoder = &intel_output->enc;
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	uint32_t pipe = intel_crtc->pipe;
	uint32_t save_bclrpat;
	uint32_t save_vtotal;
	uint32_t vtotal, vactive;
	uint32_t vsample;
	uint32_t vblank, vblank_start, vblank_end;
	uint32_t dsl;
	uint32_t bclrpat_reg;
	uint32_t vtotal_reg;
	uint32_t vblank_reg;
	uint32_t vsync_reg;
	uint32_t pipeconf_reg;
	uint32_t pipe_dsl_reg;
	uint8_t	st00;
	enum drm_connector_status status;

	if (pipe == 0) {
		bclrpat_reg = BCLRPAT_A;
		vtotal_reg = VTOTAL_A;
		vblank_reg = VBLANK_A;
		vsync_reg = VSYNC_A;
		pipeconf_reg = PIPEACONF;
		pipe_dsl_reg = PIPEADSL;
	} else {
		bclrpat_reg = BCLRPAT_B;
		vtotal_reg = VTOTAL_B;
		vblank_reg = VBLANK_B;
		vsync_reg = VSYNC_B;
		pipeconf_reg = PIPEBCONF;
		pipe_dsl_reg = PIPEBDSL;
	}

	save_bclrpat = I915_READ(bclrpat_reg);
	save_vtotal = I915_READ(vtotal_reg);
	vblank = I915_READ(vblank_reg);

	vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
	vactive = (save_vtotal & 0x7ff) + 1;

	vblank_start = (vblank & 0xfff) + 1;
	vblank_end = ((vblank >> 16) & 0xfff) + 1;

	/* Set the border color to purple. */
	I915_WRITE(bclrpat_reg, 0x500050);

	if (IS_I9XX(dev)) {
		uint32_t pipeconf = I915_READ(pipeconf_reg);
		I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
		/* Wait for next Vblank to substitue
		 * border color for Color info */
		intel_wait_for_vblank(dev);
		st00 = I915_READ8(VGA_MSR_WRITE);
		status = ((st00 & (1 << 4)) != 0) ?
			connector_status_connected :
			connector_status_disconnected;

		I915_WRITE(pipeconf_reg, pipeconf);
	} else {
		bool restore_vblank = false;
		int count, detect;

		/*
		* If there isn't any border, add some.
		* Yes, this will flicker
		*/
		if (vblank_start <= vactive && vblank_end >= vtotal) {
			uint32_t vsync = I915_READ(vsync_reg);
			uint32_t vsync_start = (vsync & 0xffff) + 1;

			vblank_start = vsync_start;
			I915_WRITE(vblank_reg,
				   (vblank_start - 1) |
				   ((vblank_end - 1) << 16));
			restore_vblank = true;
		}
		/* sample in the vertical border, selecting the larger one */
		if (vblank_start - vactive >= vtotal - vblank_end)
			vsample = (vblank_start + vactive) >> 1;
		else
			vsample = (vtotal + vblank_end) >> 1;

		/*
		 * Wait for the border to be displayed
		 */
		while (I915_READ(pipe_dsl_reg) >= vactive)
			;
		while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
			;
		/*
		 * Watch ST00 for an entire scanline
		 */
		detect = 0;
		count = 0;
		do {
			count++;
			/* Read the ST00 VGA status register */
			st00 = I915_READ8(VGA_MSR_WRITE);
			if (st00 & (1 << 4))
				detect++;
		} while ((I915_READ(pipe_dsl_reg) == dsl));

		/* restore vblank if necessary */
		if (restore_vblank)
			I915_WRITE(vblank_reg, vblank);
		/*
		 * If more than 3/4 of the scanline detected a monitor,
		 * then it is assumed to be present. This works even on i830,
		 * where there isn't any way to force the border color across
		 * the screen
		 */
		status = detect * 4 > count * 3 ?
			 connector_status_connected :
			 connector_status_disconnected;
	}

	/* Restore previous settings */
	I915_WRITE(bclrpat_reg, save_bclrpat);

	return status;
}

static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct intel_output *intel_output = to_intel_output(connector);
	struct drm_encoder *encoder = &intel_output->enc;
	struct drm_crtc *crtc;
	int dpms_mode;
	enum drm_connector_status status;

	if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
		if (intel_crt_detect_hotplug(connector))
			return connector_status_connected;
		else
			return connector_status_disconnected;
	}

	if (intel_crt_detect_ddc(connector))
		return connector_status_connected;

	/* for pre-945g platforms use load detect */
	if (encoder->crtc && encoder->crtc->enabled) {
		status = intel_crt_load_detect(encoder->crtc, intel_output);
	} else {
		crtc = intel_get_load_detect_pipe(intel_output,
						  NULL, &dpms_mode);
		if (crtc) {
			status = intel_crt_load_detect(crtc, intel_output);
			intel_release_load_detect_pipe(intel_output, dpms_mode);
		} else
			status = connector_status_unknown;
	}

	return status;
}

static void intel_crt_destroy(struct drm_connector *connector)
{
	struct intel_output *intel_output = to_intel_output(connector);

	intel_i2c_destroy(intel_output->ddc_bus);
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(connector);
}

static int intel_crt_get_modes(struct drm_connector *connector)
{
	struct intel_output *intel_output = to_intel_output(connector);
	return intel_ddc_get_modes(intel_output);
}

static int intel_crt_set_property(struct drm_connector *connector,
				  struct drm_property *property,
				  uint64_t value)
{
	struct drm_device *dev = connector->dev;

	if (property == dev->mode_config.dpms_property && connector->encoder)
		intel_crt_dpms(connector->encoder, (uint32_t)(value & 0xf));

	return 0;
}

/*
 * Routines for controlling stuff on the analog port
 */

static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
	.dpms = intel_crt_dpms,
	.mode_fixup = intel_crt_mode_fixup,
	.prepare = intel_encoder_prepare,
	.commit = intel_encoder_commit,
	.mode_set = intel_crt_mode_set,
};

static const struct drm_connector_funcs intel_crt_connector_funcs = {
	.detect = intel_crt_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = intel_crt_destroy,
	.set_property = intel_crt_set_property,
};

static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
	.mode_valid = intel_crt_mode_valid,
	.get_modes = intel_crt_get_modes,
	.best_encoder = intel_best_encoder,
};

static void intel_crt_enc_destroy(struct drm_encoder *encoder)
{
	drm_encoder_cleanup(encoder);
}

static const struct drm_encoder_funcs intel_crt_enc_funcs = {
	.destroy = intel_crt_enc_destroy,
};

void intel_crt_init(struct drm_device *dev)
{
	struct drm_connector *connector;
	struct intel_output *intel_output;

	intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
	if (!intel_output)
		return;

	connector = &intel_output->base;
	drm_connector_init(dev, &intel_output->base,
			   &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);

	drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
			 DRM_MODE_ENCODER_DAC);

	drm_mode_connector_attach_encoder(&intel_output->base,
					  &intel_output->enc);

	/* Set up the DDC bus. */
	intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
	if (!intel_output->ddc_bus) {
		dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
			   "failed.\n");
		return;
	}

	intel_output->type = INTEL_OUTPUT_ANALOG;
	connector->interlace_allowed = 0;
	connector->doublescan_allowed = 0;

	drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);

	drm_sysfs_connector_add(connector);
}
Commit	Line	Data
79e53945 JB	1	/*
	2	* Copyright © 2006-2007 Intel Corporation
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	21	* DEALINGS IN THE SOFTWARE.
	22	*
	23	* Authors:
	24	* Eric Anholt <eric@anholt.net>
	25	*/
	26
	27	#include <linux/i2c.h>
	28	#include "drmP.h"
	29	#include "drm.h"
	30	#include "drm_crtc.h"
	31	#include "drm_crtc_helper.h"
	32	#include "intel_drv.h"
	33	#include "i915_drm.h"
	34	#include "i915_drv.h"
	35
	36	static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
	37	{
	38	struct drm_device *dev = encoder->dev;
	39	struct drm_i915_private *dev_priv = dev->dev_private;
	40	u32 temp;
	41
	42	temp = I915_READ(ADPA);
	43	temp &= ~(ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE);
5ca58282	44	temp \|= ADPA_DAC_ENABLE;
79e53945 JB	45
	46	switch(mode) {
	47	case DRM_MODE_DPMS_ON:
	48	temp \|= ADPA_DAC_ENABLE;
	49	break;
	50	case DRM_MODE_DPMS_STANDBY:
	51	temp \|= ADPA_DAC_ENABLE \| ADPA_HSYNC_CNTL_DISABLE;
	52	break;
	53	case DRM_MODE_DPMS_SUSPEND:
	54	temp \|= ADPA_DAC_ENABLE \| ADPA_VSYNC_CNTL_DISABLE;
	55	break;
	56	case DRM_MODE_DPMS_OFF:
	57	temp \|= ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE;
	58	break;
	59	}
	60
	61	I915_WRITE(ADPA, temp);
	62	}
	63
	64	static int intel_crt_mode_valid(struct drm_connector *connector,
	65	struct drm_display_mode *mode)
	66	{
6bcdcd9e ZY	67	struct drm_device *dev = connector->dev;
	68
	69	int max_clock = 0;
79e53945 JB	70	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	71	return MODE_NO_DBLESCAN;
	72
6bcdcd9e ZY	73	if (mode->clock < 25000)
	74	return MODE_CLOCK_LOW;
	75
	76	if (!IS_I9XX(dev))
	77	max_clock = 350000;
	78	else
	79	max_clock = 400000;
	80	if (mode->clock > max_clock)
	81	return MODE_CLOCK_HIGH;
79e53945 JB	82
	83	return MODE_OK;
	84	}
	85
	86	static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
	87	struct drm_display_mode *mode,
	88	struct drm_display_mode *adjusted_mode)
	89	{
	90	return true;
	91	}
	92
	93	static void intel_crt_mode_set(struct drm_encoder *encoder,
	94	struct drm_display_mode *mode,
	95	struct drm_display_mode *adjusted_mode)
	96	{
	97
	98	struct drm_device *dev = encoder->dev;
	99	struct drm_crtc *crtc = encoder->crtc;
	100	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	101	struct drm_i915_private *dev_priv = dev->dev_private;
	102	int dpll_md_reg;
	103	u32 adpa, dpll_md;
	104
	105	if (intel_crtc->pipe == 0)
	106	dpll_md_reg = DPLL_A_MD;
	107	else
	108	dpll_md_reg = DPLL_B_MD;
	109
	110	/*
	111	* Disable separate mode multiplier used when cloning SDVO to CRT
	112	* XXX this needs to be adjusted when we really are cloning
	113	*/
	114	if (IS_I965G(dev)) {
	115	dpll_md = I915_READ(dpll_md_reg);
	116	I915_WRITE(dpll_md_reg,
	117	dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
	118	}
	119
	120	adpa = 0;
	121	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
	122	adpa \|= ADPA_HSYNC_ACTIVE_HIGH;
	123	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
	124	adpa \|= ADPA_VSYNC_ACTIVE_HIGH;
	125
6bcdcd9e	126	if (intel_crtc->pipe == 0) {
79e53945	127	adpa \|= ADPA_PIPE_A_SELECT;
6bcdcd9e ZY	128	I915_WRITE(BCLRPAT_A, 0);
6bcdcd9e ZY	129	} else {
79e53945	130	adpa \|= ADPA_PIPE_B_SELECT;
6bcdcd9e ZY	131	I915_WRITE(BCLRPAT_B, 0);
6bcdcd9e ZY	132	}
79e53945 JB	133
	134	I915_WRITE(ADPA, adpa);
	135	}
	136
	137	/**
	138	* Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
	139	*
	140	* Not for i915G/i915GM
	141	*
	142	* \return true if CRT is connected.
	143	* \return false if CRT is disconnected.
	144	*/
	145	static bool intel_crt_detect_hotplug(struct drm_connector *connector)
	146	{
	147	struct drm_device *dev = connector->dev;
	148	struct drm_i915_private *dev_priv = dev->dev_private;
771cb081 ZY	149	u32 hotplug_en;
	150	int i, tries = 0;
	151	/*
	152	* On 4 series desktop, CRT detect sequence need to be done twice
	153	* to get a reliable result.
	154	*/
79e53945	155
771cb081 ZY	156	if (IS_G4X(dev) && !IS_GM45(dev))
	157	tries = 2;
	158	else
	159	tries = 1;
	160	hotplug_en = I915_READ(PORT_HOTPLUG_EN);
5ca58282	161	hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
771cb081 ZY	162	hotplug_en \|= CRT_HOTPLUG_FORCE_DETECT;
771cb081 ZY	163
e92597cf	164	if (IS_G4X(dev))
771cb081 ZY	165	hotplug_en \|= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
	166
	167	hotplug_en \|= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
	168
	169	for (i = 0; i < tries ; i++) {
	170	unsigned long timeout;
	171	/* turn on the FORCE_DETECT */
	172	I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
	173	timeout = jiffies + msecs_to_jiffies(1000);
	174	/* wait for FORCE_DETECT to go off */
	175	do {
	176	if (!(I915_READ(PORT_HOTPLUG_EN) &
	177	CRT_HOTPLUG_FORCE_DETECT))
	178	break;
	179	msleep(1);
	180	} while (time_after(timeout, jiffies));
	181	}
79e53945 JB	182
	183	if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
	184	CRT_HOTPLUG_MONITOR_COLOR)
	185	return true;
	186
	187	return false;
	188	}
	189
	190	static bool intel_crt_detect_ddc(struct drm_connector *connector)
	191	{
	192	struct intel_output *intel_output = to_intel_output(connector);
	193
	194	/* CRT should always be at 0, but check anyway */
	195	if (intel_output->type != INTEL_OUTPUT_ANALOG)
	196	return false;
	197
	198	return intel_ddc_probe(intel_output);
	199	}
	200
e4a5d54f ML	201	static enum drm_connector_status
	202	intel_crt_load_detect(struct drm_crtc crtc, struct intel_output intel_output)
	203	{
	204	struct drm_encoder *encoder = &intel_output->enc;
	205	struct drm_device *dev = encoder->dev;
	206	struct drm_i915_private *dev_priv = dev->dev_private;
	207	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	208	uint32_t pipe = intel_crtc->pipe;
	209	uint32_t save_bclrpat;
	210	uint32_t save_vtotal;
	211	uint32_t vtotal, vactive;
	212	uint32_t vsample;
	213	uint32_t vblank, vblank_start, vblank_end;
	214	uint32_t dsl;
	215	uint32_t bclrpat_reg;
	216	uint32_t vtotal_reg;
	217	uint32_t vblank_reg;
	218	uint32_t vsync_reg;
	219	uint32_t pipeconf_reg;
	220	uint32_t pipe_dsl_reg;
	221	uint8_t st00;
	222	enum drm_connector_status status;
	223
	224	if (pipe == 0) {
	225	bclrpat_reg = BCLRPAT_A;
	226	vtotal_reg = VTOTAL_A;
	227	vblank_reg = VBLANK_A;
	228	vsync_reg = VSYNC_A;
	229	pipeconf_reg = PIPEACONF;
	230	pipe_dsl_reg = PIPEADSL;
	231	} else {
	232	bclrpat_reg = BCLRPAT_B;
	233	vtotal_reg = VTOTAL_B;
	234	vblank_reg = VBLANK_B;
	235	vsync_reg = VSYNC_B;
	236	pipeconf_reg = PIPEBCONF;
	237	pipe_dsl_reg = PIPEBDSL;
	238	}
	239
	240	save_bclrpat = I915_READ(bclrpat_reg);
	241	save_vtotal = I915_READ(vtotal_reg);
	242	vblank = I915_READ(vblank_reg);
	243
	244	vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
	245	vactive = (save_vtotal & 0x7ff) + 1;
	246
	247	vblank_start = (vblank & 0xfff) + 1;
	248	vblank_end = ((vblank >> 16) & 0xfff) + 1;
	249
	250	/* Set the border color to purple. */
	251	I915_WRITE(bclrpat_reg, 0x500050);
	252
	253	if (IS_I9XX(dev)) {
	254	uint32_t pipeconf = I915_READ(pipeconf_reg);
	255	I915_WRITE(pipeconf_reg, pipeconf \| PIPECONF_FORCE_BORDER);
	256	/* Wait for next Vblank to substitue
	257	* border color for Color info */
	258	intel_wait_for_vblank(dev);
	259	st00 = I915_READ8(VGA_MSR_WRITE);
	260	status = ((st00 & (1 << 4)) != 0) ?
	261	connector_status_connected :
	262	connector_status_disconnected;
	263
	264	I915_WRITE(pipeconf_reg, pipeconf);
265	} else {
266	bool restore_vblank = false;
267	int count, detect;
268
269	/*
270	* If there isn't any border, add some.
271	* Yes, this will flicker
272	*/
273	if (vblank_start <= vactive && vblank_end >= vtotal) {
274	uint32_t vsync = I915_READ(vsync_reg);
275	uint32_t vsync_start = (vsync & 0xffff) + 1;
276
277	vblank_start = vsync_start;
278	I915_WRITE(vblank_reg,
279	(vblank_start - 1) \|
280	((vblank_end - 1) << 16));
281	restore_vblank = true;
282	}
283	/* sample in the vertical border, selecting the larger one */
284	if (vblank_start - vactive >= vtotal - vblank_end)
285	vsample = (vblank_start + vactive) >> 1;
286	else
287	vsample = (vtotal + vblank_end) >> 1;
288
289	/*
290	* Wait for the border to be displayed
291	*/
292	while (I915_READ(pipe_dsl_reg) >= vactive)
293	;
294	while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
295	;
296	/*
297	* Watch ST00 for an entire scanline
298	*/
299	detect = 0;
300	count = 0;
301	do {
302	count++;
303	/* Read the ST00 VGA status register */
304	st00 = I915_READ8(VGA_MSR_WRITE);
305	if (st00 & (1 << 4))
306	detect++;
307	} while ((I915_READ(pipe_dsl_reg) == dsl));
308
309	/* restore vblank if necessary */
310	if (restore_vblank)
311	I915_WRITE(vblank_reg, vblank);
312	/*
313	* If more than 3/4 of the scanline detected a monitor,
314	* then it is assumed to be present. This works even on i830,
315	* where there isn't any way to force the border color across
316	* the screen
317	*/
318	status = detect * 4 > count * 3 ?
319	connector_status_connected :
320	connector_status_disconnected;
321	}
322
323	/* Restore previous settings */
324	I915_WRITE(bclrpat_reg, save_bclrpat);
325
326	return status;
327	}
328
79e53945 JB	329	static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
	330	{
	331	struct drm_device *dev = connector->dev;
e4a5d54f ML	332	struct intel_output *intel_output = to_intel_output(connector);
	333	struct drm_encoder *encoder = &intel_output->enc;
	334	struct drm_crtc *crtc;
	335	int dpms_mode;
	336	enum drm_connector_status status;
79e53945 JB	337
	338	if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
	339	if (intel_crt_detect_hotplug(connector))
	340	return connector_status_connected;
	341	else
	342	return connector_status_disconnected;
	343	}
	344
	345	if (intel_crt_detect_ddc(connector))
	346	return connector_status_connected;
	347
e4a5d54f ML	348	/* for pre-945g platforms use load detect */
	349	if (encoder->crtc && encoder->crtc->enabled) {
	350	status = intel_crt_load_detect(encoder->crtc, intel_output);
	351	} else {
	352	crtc = intel_get_load_detect_pipe(intel_output,
	353	NULL, &dpms_mode);
	354	if (crtc) {
	355	status = intel_crt_load_detect(crtc, intel_output);
	356	intel_release_load_detect_pipe(intel_output, dpms_mode);
	357	} else
	358	status = connector_status_unknown;
	359	}
	360
	361	return status;
79e53945 JB	362	}
	363
	364	static void intel_crt_destroy(struct drm_connector *connector)
	365	{
	366	struct intel_output *intel_output = to_intel_output(connector);
	367
	368	intel_i2c_destroy(intel_output->ddc_bus);
	369	drm_sysfs_connector_remove(connector);
	370	drm_connector_cleanup(connector);
	371	kfree(connector);
	372	}
	373
	374	static int intel_crt_get_modes(struct drm_connector *connector)
	375	{
	376	struct intel_output *intel_output = to_intel_output(connector);
	377	return intel_ddc_get_modes(intel_output);
	378	}
	379
	380	static int intel_crt_set_property(struct drm_connector *connector,
	381	struct drm_property *property,
	382	uint64_t value)
	383	{
	384	struct drm_device *dev = connector->dev;
	385
	386	if (property == dev->mode_config.dpms_property && connector->encoder)
	387	intel_crt_dpms(connector->encoder, (uint32_t)(value & 0xf));
	388
	389	return 0;
	390	}
	391
	392	/*
	393	* Routines for controlling stuff on the analog port
	394	*/
	395
	396	static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
	397	.dpms = intel_crt_dpms,
	398	.mode_fixup = intel_crt_mode_fixup,
	399	.prepare = intel_encoder_prepare,
	400	.commit = intel_encoder_commit,
	401	.mode_set = intel_crt_mode_set,
	402	};
	403
	404	static const struct drm_connector_funcs intel_crt_connector_funcs = {
	405	.detect = intel_crt_detect,
	406	.fill_modes = drm_helper_probe_single_connector_modes,
	407	.destroy = intel_crt_destroy,
	408	.set_property = intel_crt_set_property,
	409	};
	410
	411	static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
	412	.mode_valid = intel_crt_mode_valid,
	413	.get_modes = intel_crt_get_modes,
	414	.best_encoder = intel_best_encoder,
	415	};
	416
b358d0a6	417	static void intel_crt_enc_destroy(struct drm_encoder *encoder)
79e53945 JB	418	{
	419	drm_encoder_cleanup(encoder);
	420	}
	421
	422	static const struct drm_encoder_funcs intel_crt_enc_funcs = {
	423	.destroy = intel_crt_enc_destroy,
	424	};
	425
	426	void intel_crt_init(struct drm_device *dev)
	427	{
	428	struct drm_connector *connector;
	429	struct intel_output *intel_output;
	430
	431	intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
	432	if (!intel_output)
	433	return;
	434
	435	connector = &intel_output->base;
	436	drm_connector_init(dev, &intel_output->base,
	437	&intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
	438
	439	drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
	440	DRM_MODE_ENCODER_DAC);
	441
	442	drm_mode_connector_attach_encoder(&intel_output->base,
	443	&intel_output->enc);
	444
	445	/* Set up the DDC bus. */
	446	intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
	447	if (!intel_output->ddc_bus) {
	448	dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
	449	"failed.\n");
	450	return;
	451	}
	452
	453	intel_output->type = INTEL_OUTPUT_ANALOG;
	454	connector->interlace_allowed = 0;
	455	connector->doublescan_allowed = 0;
	456
	457	drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
	458	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
	459
	460	drm_sysfs_connector_add(connector);
	461	}